diff options
| author | 2008-06-12 19:59:19 +0000 | |
|---|---|---|
| committer | 2008-06-12 19:59:19 +0000 | |
| commit | 5a162da3d4019ddb4a09003fd9ce763aa5d3bcd5 (patch) | |
| tree | e115fb3b67f6c5a81a9d5dd9bb98ec7f23bf2319 /src/emu/cpu | |
| parent | 1855238186f63a2844012cc2460d17e69e0ed8f2 (diff) | |
Cleanups and version bump.mame0125u5
Diffstat (limited to 'src/emu/cpu')
| -rw-r--r-- | src/emu/cpu/cop400/cop420.c | 4 | ||||
| -rw-r--r-- | src/emu/cpu/drcbec.c | 2 | ||||
| -rw-r--r-- | src/emu/cpu/drcbex64.c | 16 | ||||
| -rw-r--r-- | src/emu/cpu/drcbex86.c | 10 | ||||
| -rw-r--r-- | src/emu/cpu/drcfe.c | 12 | ||||
| -rw-r--r-- | src/emu/cpu/drcuml.c | 170 | ||||
| -rw-r--r-- | src/emu/cpu/i8085/i8085.c | 28 | ||||
| -rw-r--r-- | src/emu/cpu/i8085/i8085cpu.h | 4 | ||||
| -rw-r--r-- | src/emu/cpu/minx/minxops.h | 2 | ||||
| -rw-r--r-- | src/emu/cpu/mips/mips3.h | 4 | ||||
| -rw-r--r-- | src/emu/cpu/powerpc/ppc.h | 2 | ||||
| -rw-r--r-- | src/emu/cpu/powerpc/ppccom.c | 16 | ||||
| -rw-r--r-- | src/emu/cpu/powerpc/ppcdrc.c | 18 | ||||
| -rw-r--r-- | src/emu/cpu/powerpc/ppcfe.c | 4 |
14 files changed, 146 insertions, 146 deletions
diff --git a/src/emu/cpu/cop400/cop420.c b/src/emu/cpu/cop400/cop420.c index b9e6ffec0ea..b7aaff61085 100644 --- a/src/emu/cpu/cop400/cop420.c +++ b/src/emu/cpu/cop400/cop420.c @@ -14,8 +14,8 @@ TODO: - when is the microbus int cleared? - - CKO sync input - - save internal RAM when CKO is RAM power supply pin + - CKO sync input + - save internal RAM when CKO is RAM power supply pin - run interrupt test suite - run production test suite - run microbus test suite diff --git a/src/emu/cpu/drcbec.c b/src/emu/cpu/drcbec.c index 27d90b1ef2c..2146b2637d7 100644 --- a/src/emu/cpu/drcbec.c +++ b/src/emu/cpu/drcbec.c @@ -436,7 +436,7 @@ static void drcbec_generate(drcbe_state *drcbe, drcuml_block *block, const drcum dst->inst = (drcbec_instruction *)drclabel_get_codeptr(drcbe->labels, inst->param[0].value, fixup_label, dst); dst++; break; - + /* generically handle everything else */ default: diff --git a/src/emu/cpu/drcbex64.c b/src/emu/cpu/drcbex64.c index 6c8abb4da3b..cbd70a5f58b 100644 --- a/src/emu/cpu/drcbex64.c +++ b/src/emu/cpu/drcbex64.c @@ -19,11 +19,11 @@ * Identify common pairs and optimize output * Convert AND 0xff/0xffff to movzx - + * Convert SUB a,0,b to NEG - + * Optimize, e.g., and [r5],i0,$FF to use rbx as temporary register - (avoid initial move) if i0 is not needed going forward + (avoid initial move) if i0 is not needed going forward **************************************************************************** @@ -1240,7 +1240,7 @@ static void emit_mov_r32_p32(drcbe_state *drcbe, x86code **dst, UINT8 reg, const /*------------------------------------------------- - emit_mov_r32_p32_keepflags - move a 32-bit + emit_mov_r32_p32_keepflags - move a 32-bit parameter into a register without affecting any flags -------------------------------------------------*/ @@ -1995,7 +1995,7 @@ static void emit_mov_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reg, const /*------------------------------------------------- - emit_mov_r64_p64_keepflags - move a 64-bit + emit_mov_r64_p64_keepflags - move a 64-bit parameter into a register without affecting any flags -------------------------------------------------*/ @@ -2978,7 +2978,7 @@ static x86code *op_handle(drcbe_state *drcbe, x86code *dst, const drcuml_instruc assert_no_flags(inst); assert(inst->numparams == 1); assert(inst->param[0].type == DRCUML_PTYPE_MEMORY); - + /* emit a jump around the stack adjust in case code falls through here */ emit_jmp_short_link(&dst, &skip); // jmp skip @@ -3539,7 +3539,7 @@ static x86code *op_getflgs(drcbe_state *drcbe, x86code *dst, const drcuml_instru /* pick a target register for the general case */ dstreg = param_select_register(REG_EAX, &dstp, NULL); - + /* compute mask for flags */ if (maskp.value & DRCUML_FLAG_C) flagmask |= 0x001; if (maskp.value & DRCUML_FLAG_V) flagmask |= 0x800; @@ -6079,7 +6079,7 @@ static x86code *op_fstore(drcbe_state *drcbe, x86code *dst, const drcuml_instruc assert(inst->size == 4 || inst->size == 8); assert_no_condition(inst); assert_no_flags(inst); - + /* normalize parameters */ param_normalize_3(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MF); diff --git a/src/emu/cpu/drcbex86.c b/src/emu/cpu/drcbex86.c index b4912bd0a87..73dd74ea83b 100644 --- a/src/emu/cpu/drcbex86.c +++ b/src/emu/cpu/drcbex86.c @@ -19,11 +19,11 @@ * Identify common pairs and optimize output * Convert AND 0xff/0xffff to movzx - + * Convert SUB a,0,b to NEG - + * Optimize, e.g., and [r5],i0,$FF to use ebx as temporary register - (avoid initial move) if i0 is not needed going forward + (avoid initial move) if i0 is not needed going forward **************************************************************************** @@ -1044,7 +1044,7 @@ static void emit_mov_r32_p32(drcbe_state *drcbe, x86code **dst, UINT8 reg, const /*------------------------------------------------- - emit_mov_r32_p32_keepflags - move a 32-bit + emit_mov_r32_p32_keepflags - move a 32-bit parameter into a register without affecting any flags -------------------------------------------------*/ @@ -1845,7 +1845,7 @@ static void emit_mov_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UIN /*------------------------------------------------- - emit_mov_r64_p64_keepflags - move a 64-bit + emit_mov_r64_p64_keepflags - move a 64-bit parameter into a pair of registers without affecting any flags -------------------------------------------------*/ diff --git a/src/emu/cpu/drcfe.c b/src/emu/cpu/drcfe.c index b31a0a03536..1e2a68021cd 100644 --- a/src/emu/cpu/drcfe.c +++ b/src/emu/cpu/drcfe.c @@ -12,8 +12,8 @@ Future improvements/changes: - * more aggressive handling of needed registers for conditional - intrablock branches + * more aggressive handling of needed registers for conditional + intrablock branches ***************************************************************************/ @@ -485,23 +485,23 @@ static void accumulate_required_backwards(opcode_desc *desc, UINT32 *reqmask) /* recursively handle delay slots */ if (desc->delay != NULL) accumulate_required_backwards(desc->delay, reqmask); - + /* if this is a branch, we have to reset our requests */ if (desc->flags & OPFLAG_IS_BRANCH) reqmask[0] = reqmask[1] = reqmask[2] = reqmask[3] = 0xffffffff; - + /* determine the required registers */ desc->regreq[0] = desc->regout[0] & reqmask[0]; desc->regreq[1] = desc->regout[1] & reqmask[1]; desc->regreq[2] = desc->regout[2] & reqmask[2]; desc->regreq[3] = desc->regout[3] & reqmask[3]; - + /* any registers modified by this instruction aren't required upstream until referenced */ reqmask[0] &= ~desc->regout[0]; reqmask[1] &= ~desc->regout[1]; reqmask[2] &= ~desc->regout[2]; reqmask[3] &= ~desc->regout[3]; - + /* any registers required by this instruction now get marked required */ reqmask[0] |= desc->regin[0]; reqmask[1] |= desc->regin[1]; diff --git a/src/emu/cpu/drcuml.c b/src/emu/cpu/drcuml.c index 5a23967062c..8127f158433 100644 --- a/src/emu/cpu/drcuml.c +++ b/src/emu/cpu/drcuml.c @@ -475,7 +475,7 @@ INLINE void convert_to_nop(drcuml_instruction *inst) /*------------------------------------------------- - convert_to_mov_immediate - convert an + convert_to_mov_immediate - convert an instruction inline to a MOV immediate -------------------------------------------------*/ @@ -490,7 +490,7 @@ INLINE void convert_to_mov_immediate(drcuml_instruction *inst, UINT64 immediate) /*------------------------------------------------- - convert_to_mov_param - convert an + convert_to_mov_param - convert an instruction inline to a MOV with a source parameter given by the existing parameter index pnum @@ -588,15 +588,15 @@ void drcuml_reset(drcuml_state *drcuml) (*drcuml->beintf->be_reset)(drcuml->bestate); /* do a one-time validation if requested */ -/* if (VALIDATE_BACKEND) - { - static int validated = FALSE; - if (!validated) - { - validated = TRUE; - validate_backend(drcuml); - } - }*/ +/* if (VALIDATE_BACKEND) + { + static int validated = FALSE; + if (!validated) + { + validated = TRUE; + validate_backend(drcuml); + } + }*/ } @@ -624,7 +624,7 @@ void drcuml_free(drcuml_state *drcuml) free(block->inst); free(block); } - + /* free all the symbols */ while (drcuml->symlist != NULL) { @@ -853,7 +853,7 @@ void drcuml_block_end(drcuml_block *block) drcuml_state *drcuml = block->drcuml; assert(block->inuse); - + /* optimize the resulting code first */ optimize_block(block); @@ -1003,7 +1003,7 @@ const char *drcuml_handle_name(const drcuml_codehandle *handle) ***************************************************************************/ /*------------------------------------------------- - drcuml_symbol_add - add a symbol to the + drcuml_symbol_add - add a symbol to the internal symbol table -------------------------------------------------*/ @@ -1015,13 +1015,13 @@ void drcuml_symbol_add(drcuml_state *drcuml, void *base, UINT32 length, const ch symbol = malloc(sizeof(*symbol) + strlen(name)); if (symbol == NULL) fatalerror("Out of memory allocating symbol in drcuml_symbol_add"); - + /* fill in the structure */ symbol->next = NULL; symbol->base = (drccodeptr)base; symbol->length = length; strcpy(symbol->symname, name); - + /* add to the tail of the list */ *drcuml->symtailptr = symbol; drcuml->symtailptr = &symbol->next; @@ -1029,8 +1029,8 @@ void drcuml_symbol_add(drcuml_state *drcuml, void *base, UINT32 length, const ch /*------------------------------------------------- - drcuml_symbol_find - look up a symbol from the - internal symbol table or return NULL if not + drcuml_symbol_find - look up a symbol from the + internal symbol table or return NULL if not found -------------------------------------------------*/ @@ -1038,7 +1038,7 @@ const char *drcuml_symbol_find(drcuml_state *drcuml, void *base, UINT32 *offset) { drccodeptr search = base; drcuml_symbol *symbol; - + /* simple linear search */ for (symbol = drcuml->symlist; symbol != NULL; symbol = symbol->next) if (search >= symbol->base && search < symbol->base + symbol->length) @@ -1046,13 +1046,13 @@ const char *drcuml_symbol_find(drcuml_state *drcuml, void *base, UINT32 *offset) /* if no offset pointer, only match perfectly */ if (offset == NULL && search != symbol->base) continue; - + /* return the offset and name */ if (offset != NULL) *offset = search - symbol->base; return symbol->symname; } - + /* not found; return NULL */ return NULL; } @@ -1125,7 +1125,7 @@ void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *d int pnum; assert(inst->opcode != DRCUML_OP_INVALID && inst->opcode < DRCUML_OP_MAX); - + /* start with the raw mnemonic and substitute sizes */ for (opsrc = opinfo->mnemonic; *opsrc != 0; opsrc++) if (*opsrc == '!') @@ -1134,11 +1134,11 @@ void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *d dest += sprintf(dest, "%s", pound_size[inst->size]); else *dest++ = *opsrc; - + /* pad to 8 spaces */ while (dest < &buffer[8]) *dest++ = ' '; - + /* iterate through parameters */ for (pnum = 0; pnum < inst->numparams; pnum++) { @@ -1150,35 +1150,35 @@ void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *d /* start with a comma for all except the first parameter */ if (pnum != 0) *dest++ = ','; - + /* ouput based on type */ switch (param->type) { /* immediates have several special cases */ case DRCUML_PTYPE_IMMEDIATE: - + /* size immediate */ if (typemask == PTYPES_SIZE) dest += sprintf(dest, "%s", sizes[param->value]); - + /* address space immediate */ else if (typemask == PTYPES_SPACE) dest += sprintf(dest, "%s", address_space_names[param->value]); - + /* size + address space immediate */ else if (typemask == PTYPES_SPSZ) dest += sprintf(dest, "%s_%s", address_space_names[param->value / 16], sizes[param->value % 16]); - + /* fmod immediate */ else if (typemask == PTYPES_FMOD) dest += sprintf(dest, "%s", fmods[param->value]); - + /* general immediate */ else { int size = effective_psize(inst, opinfo, pnum); UINT64 value = param->value; - + /* truncate to size */ if (size == 1) value = (UINT8)value; if (size == 2) value = (UINT16)value; @@ -1189,7 +1189,7 @@ void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *d dest += sprintf(dest, "$%X%08X", (UINT32)(value >> 32), (UINT32)value); } break; - + /* integer registers */ case DRCUML_PTYPE_INT_REGISTER: if (param->value >= DRCUML_REG_I0 && param->value < DRCUML_REG_I_END) @@ -1216,15 +1216,15 @@ void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *d /* memory */ case DRCUML_PTYPE_MEMORY: - + /* handle pointer */ if (typemask == PTYPES_HAND) dest += sprintf(dest, "%s", drcuml_handle_name((const drcuml_codehandle *)(FPTR)param->value)); - + /* string pointer */ else if (typemask == PTYPES_STR) dest += sprintf(dest, "%s", (const char *)(FPTR)param->value); - + /* symbol */ else if (drcuml != NULL && (symbol = drcuml_symbol_find(drcuml, (drccodeptr)(FPTR)param->value, &symoffset)) != NULL) { @@ -1233,26 +1233,26 @@ void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *d else dest += sprintf(dest, "[%s+$%X]", symbol, symoffset); } - + /* cache memory */ else if (drcuml != NULL && drccache_contains_pointer(drcuml->cache, (void *)(FPTR)param->value)) dest += sprintf(dest, "[+$%X]", (UINT32)(FPTR)((drccodeptr)(FPTR)param->value - drccache_near(drcuml->cache))); - + /* general memory */ else dest += sprintf(dest, "[[$%p]]", (void *)(FPTR)param->value); break; - + default: dest += sprintf(dest, "???"); break; } } - + /* if there's a condition, append it */ if (inst->condition != DRCUML_COND_ALWAYS) dest += sprintf(dest, ",%s", conditions[inst->condition & 0x0f]); - + /* if there are flags, append them */ if (inst->flags != 0) { @@ -1268,7 +1268,7 @@ void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *d if (inst->flags & DRCUML_FLAG_C) *dest++ = 'C'; } - + /* ensure we are NULL-terminated */ *dest = 0; } @@ -1296,29 +1296,29 @@ static void optimize_block(drcuml_block *block) const drcuml_opcode_info *opinfo = opcode_info_table[inst->opcode]; UINT8 remainingflags; int scannum, pnum; - + /* first compute what flags we need */ inst->flags = 0; remainingflags = effective_outflags(inst, opinfo); - + /* scan ahead until we run out of possible remaining flags */ for (scannum = instnum + 1; remainingflags != 0 && scannum < block->nextinst; scannum++) { const drcuml_instruction *scan = &block->inst[scannum]; const drcuml_opcode_info *scaninfo = opcode_info_table[scan->opcode]; - + /* any input flags are required */ inst->flags |= effective_inflags(scan, scaninfo); - + /* if the scanahead instruction is unconditional, assume his flags are modified */ if (scan->condition == DRCUML_COND_ALWAYS) remainingflags &= ~scaninfo->modflags; } - + /* track mapvars */ if (inst->opcode == DRCUML_OP_MAPVAR) mapvar[inst->param[0].value - DRCUML_MAPVAR_M0] = inst->param[1].value; - + /* convert all mapvar parameters to immediates */ else if (inst->opcode != DRCUML_OP_RECOVER) for (pnum = 0; pnum < inst->numparams; pnum++) @@ -1327,7 +1327,7 @@ static void optimize_block(drcuml_block *block) inst->param[pnum].type = DRCUML_PTYPE_IMMEDIATE; inst->param[pnum].value = mapvar[inst->param[pnum].value - DRCUML_MAPVAR_M0]; } - + /* if we don't need any flags, then we can eliminate a lot of dumb operations */ if (inst->flags == 0) simplify_instruction_with_no_flags(block, inst); @@ -1371,19 +1371,19 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr inst->param[2] = inst->param[3]; } break; - + /* SET: convert to MOV if constant condition */ case DRCUML_OP_SET: if (inst->condition == DRCUML_COND_ALWAYS) convert_to_mov_immediate(inst, 1); break; - + /* MOV: convert to NOP if move-to-self */ case DRCUML_OP_MOV: if (param_equal(inst, 0, 1)) convert_to_nop(inst); break; - + /* SEXT: convert immediates to MOV */ case DRCUML_OP_SEXT: if (param_is_immediate(inst, 1)) @@ -1395,7 +1395,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr case DRCUML_SIZE_QWORD: convert_to_mov_immediate(inst, (INT64)inst->param[1].value); break; } break; - + /* ROLAND: convert to MOV if all immediate, or to ROL or AND if one is not needed, or to SHL/SHR if the mask is right */ case DRCUML_OP_ROLAND: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2) && param_is_immediate(inst, 3)) @@ -1428,13 +1428,13 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr inst->param[2].value = 8 * inst->size - inst->param[2].value; } break; - + /* ROLINS: convert to ROLAND if the mask is full */ case DRCUML_OP_ROLINS: if (param_is_immediate_value(inst, 3, instsizemask[inst->size])) inst->opcode = DRCUML_OP_ROLAND; break; - + /* ADD: convert to MOV if immediate, or if adding 0 */ case DRCUML_OP_ADD: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1444,7 +1444,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* SUB: convert to MOV if immediate, or if subtracting 0 */ case DRCUML_OP_SUB: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1452,7 +1452,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* CMP: no-op if no flags needed, compare i0 to i0 if the parameters are equal */ case DRCUML_OP_CMP: if (inst->flags == 0) @@ -1463,7 +1463,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr inst->param[1].value = inst->param[2].value = DRCUML_REG_I0; } break; - + /* MULU: convert simple form to MOV if immediate, or if multiplying by 0 */ case DRCUML_OP_MULU: if (param_equal(inst, 0, 1)) @@ -1479,7 +1479,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr } } break; - + /* MULS: convert simple form to MOV if immediate, or if multiplying by 0 */ case DRCUML_OP_MULS: if (param_equal(inst, 0, 1)) @@ -1545,7 +1545,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr if (inst->flags == 0) convert_to_nop(inst); break; - + /* OR: convert to MOV if immediate, or if oring against 0 or 0xffffffff */ case DRCUML_OP_OR: if (param_is_immediate_value(inst, 1, instsizemask[inst->size]) || param_is_immediate_value(inst, 2, instsizemask[inst->size])) @@ -1557,7 +1557,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* XOR: convert to MOV if immediate, or if xoring against 0 */ case DRCUML_OP_XOR: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1567,7 +1567,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* LZCNT: convert to MOV if immediate */ case DRCUML_OP_LZCNT: if (param_is_immediate(inst, 1)) @@ -1583,7 +1583,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr } } break; - + /* BSWAP: convert to MOV if immediate */ case DRCUML_OP_BSWAP: if (param_is_immediate(inst, 1)) @@ -1594,7 +1594,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr convert_to_mov_immediate(inst, FLIPENDIAN_INT64(inst->param[1].value)); } break; - + /* SHL: convert to MOV if immediate or shifting by 0 */ case DRCUML_OP_SHL: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1602,7 +1602,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* SHR: convert to MOV if immediate or shifting by 0 */ case DRCUML_OP_SHR: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1615,7 +1615,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* SAR: convert to MOV if immediate or shifting by 0 */ case DRCUML_OP_SAR: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1628,7 +1628,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* ROL: convert to NOP if immediate or rotating by 0 */ case DRCUML_OP_ROL: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1641,7 +1641,7 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr else if (param_is_immediate_value(inst, 2, 0)) convert_to_mov_param(inst, 1); break; - + /* ROR: convert to NOP if immediate or rotating by 0 */ case DRCUML_OP_ROR: if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2)) @@ -1660,11 +1660,11 @@ static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instr if (param_equal(inst, 0, 1)) convert_to_nop(inst); break; - + default: break; } - + #if LOG_SIMPLIFICATIONS if (memcmp(&orig, inst, sizeof(orig)) != 0) { @@ -1704,14 +1704,14 @@ static void disassemble_block(drcuml_block *block) { const drcuml_instruction *inst = &block->inst[instnum]; int flushcomments = FALSE; - + /* remember comments and mapvars for later */ if (inst->opcode == DRCUML_OP_COMMENT || inst->opcode == DRCUML_OP_MAPVAR) { if (firstcomment == -1) firstcomment = instnum; } - + /* print labels, handles, and hashes left justified */ else if (inst->opcode == DRCUML_OP_LABEL) drcuml_log_printf(block->drcuml, "$%X:\n", (UINT32)inst->param[0].value); @@ -1725,7 +1725,7 @@ static void disassemble_block(drcuml_block *block) { char dasm[256]; drcuml_disasm(&block->inst[instnum], dasm, block->drcuml); - + /* include the first accumulated comment with this line */ if (firstcomment != -1) { @@ -1736,7 +1736,7 @@ static void disassemble_block(drcuml_block *block) else drcuml_log_printf(block->drcuml, "\t%s\n", dasm); } - + /* flush any comments pending */ if (firstcomment != -1 && (flushcomments || instnum == block->nextinst - 1)) { @@ -1762,18 +1762,18 @@ static void disassemble_block(drcuml_block *block) static const char *get_comment_text(const drcuml_instruction *inst) { static char tempbuf[100]; - + /* comments return their strings */ if (inst->opcode == DRCUML_OP_COMMENT) return (char *)(FPTR)inst->param[0].value; - + /* mapvars comment about their values */ else if (inst->opcode == DRCUML_OP_MAPVAR) { sprintf(tempbuf, "m%d = $%X", (int)inst->param[0].value - DRCUML_MAPVAR_M0, (UINT32)inst->param[1].value); return tempbuf; } - + /* everything else is NULL */ return NULL; } @@ -1797,21 +1797,21 @@ static void validate_instruction(drcuml_block *block, const drcuml_instruction * /* validate raw information */ assert(inst->opcode != DRCUML_OP_INVALID && inst->opcode < DRCUML_OP_MAX); assert(inst->size == 1 || inst->size == 2 || inst->size == 4 || inst->size == 8); - + /* validate against opcode limits */ assert((opinfo->sizes & inst->size) != 0); assert(inst->condition == DRCUML_COND_ALWAYS || opinfo->condition); - + /* validate each parameter */ for (pnum = 0; pnum < inst->numparams; pnum++) { const drcuml_parameter *param = &inst->param[pnum]; UINT16 typemask = opinfo->param[pnum].typemask; - + /* ensure the type is correct */ assert(param->type > DRCUML_PTYPE_NONE && param->type < DRCUML_PTYPE_MAX); assert((typemask >> param->type) & 1); - + /* validate various parameter types */ switch (param->type) { @@ -1820,7 +1820,7 @@ static void validate_instruction(drcuml_block *block, const drcuml_instruction * if (typemask != PTYPES_PTR && typemask != PTYPES_STATE && typemask != PTYPES_STR && typemask != PTYPES_CFUNC) assert_in_near_cache(block->drcuml->cache, (void *)(FPTR)param->value); break; - + case DRCUML_PTYPE_IMMEDIATE: /* many special parameter types are encoded as immediately; ensure they are in range */ if (typemask == PTYPES_SIZE) @@ -1835,19 +1835,19 @@ static void validate_instruction(drcuml_block *block, const drcuml_instruction * else if (typemask == PTYPES_FMOD) assert(param->value >= DRCUML_FMOD_TRUNC && param->value <= DRCUML_FMOD_DEFAULT); break; - + case DRCUML_PTYPE_MAPVAR: assert(param->value >= DRCUML_MAPVAR_M0 && param->value < DRCUML_MAPVAR_END); break; - + case DRCUML_PTYPE_INT_REGISTER: assert(param->value >= DRCUML_REG_I0 && param->value < DRCUML_REG_I_END); break; - + case DRCUML_PTYPE_FLOAT_REGISTER: assert(param->value >= DRCUML_REG_F0 && param->value < DRCUML_REG_F_END); break; - + default: assert(FALSE); break; diff --git a/src/emu/cpu/i8085/i8085.c b/src/emu/cpu/i8085/i8085.c index f0be12d86dd..ba63205d2a8 100644 --- a/src/emu/cpu/i8085/i8085.c +++ b/src/emu/cpu/i8085/i8085.c @@ -202,7 +202,7 @@ INLINE void execute_one(int opcode) break; case 0x03: i8085_ICount -= (I.cputype) ? 6 : 5; /* INX B */ I.BC.w.l++; - if( I.cputype ) + if( I.cputype ) { if (I.BC.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } @@ -236,8 +236,8 @@ INLINE void execute_one(int opcode) break; case 0x0b: i8085_ICount -= (I.cputype) ? 6 : 5; /* DCX B */ I.BC.w.l--; - if( I.cputype ) - { + if( I.cputype ) + { if (I.BC.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } break; @@ -271,8 +271,8 @@ INLINE void execute_one(int opcode) break; case 0x13: i8085_ICount -= (I.cputype) ? 6 : 5; /* INX D */ I.DE.w.l++; - if( I.cputype ) - { + if( I.cputype ) + { if (I.DE.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } break; @@ -308,7 +308,7 @@ INLINE void execute_one(int opcode) break; case 0x1b: i8085_ICount -= (I.cputype) ? 6 : 5; /* DCX D */ I.DE.w.l--; - if( I.cputype ) + if( I.cputype ) { if (I.DE.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } @@ -348,8 +348,8 @@ INLINE void execute_one(int opcode) break; case 0x23: i8085_ICount -= (I.cputype) ? 6 : 5; /* INX H */ I.HL.w.l++; - if( I.cputype ) - { + if( I.cputype ) + { if (I.HL.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } break; @@ -368,7 +368,7 @@ INLINE void execute_one(int opcode) if (I.AF.b.l & HF) I.XX.d |= 0x200; if (I.AF.b.l & NF) I.XX.d |= 0x400; I.AF.w.l = DAA[I.XX.d]; - if( I.cputype==0 ) + if( I.cputype==0 ) { I.AF.b.l &= 0xd5; // Ignore not used flags } @@ -394,7 +394,7 @@ INLINE void execute_one(int opcode) break; case 0x2b: i8085_ICount -= (I.cputype) ? 6 : 5; /* DCX H */ I.HL.w.l--; - if( I.cputype ) + if( I.cputype ) { if (I.HL.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } @@ -453,7 +453,7 @@ INLINE void execute_one(int opcode) break; case 0x33: i8085_ICount -= (I.cputype) ? 6 : 5; /* INX SP */ I.SP.w.l++; - if( I.cputype ) + if( I.cputype ) { if (I.SP.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } @@ -494,8 +494,8 @@ INLINE void execute_one(int opcode) break; case 0x3b: i8085_ICount -= (I.cputype) ? 6 : 5; /* DCX SP */ I.SP.w.l--; - if( I.cputype ) - { + if( I.cputype ) + { if (I.SP.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF; } break; @@ -508,7 +508,7 @@ INLINE void execute_one(int opcode) case 0x3e: i8085_ICount -= 7; /* MVI A,nn */ M_MVI(I.AF.b.h); break; - case 0x3f: i8085_ICount -= 4; /* CMC */ + case 0x3f: i8085_ICount -= 4; /* CMC */ I.AF.b.l = (I.AF.b.l & 0xfe) | ((I.AF.b.l & CF)==1 ? 0 : 1); break; diff --git a/src/emu/cpu/i8085/i8085cpu.h b/src/emu/cpu/i8085/i8085cpu.h index f0d6f321739..6c6e8b30267 100644 --- a/src/emu/cpu/i8085/i8085cpu.h +++ b/src/emu/cpu/i8085/i8085cpu.h @@ -36,8 +36,8 @@ #define ADDR_RST75 0x003c #define ADDR_INTR 0x0038 -#define M_INR(R) {UINT8 hc = ((R & 0x0f) == 0x0f) ? HF : 0; ++R; I.AF.b.l= (I.AF.b.l & CF ) | ZSP[R] | hc; } -#define M_DCR(R) {UINT8 hc = ((R & 0x0f) == 0x00) ? HF : 0; --R; I.AF.b.l= (I.AF.b.l & CF ) | ZSP[R] | hc | NF; } +#define M_INR(R) {UINT8 hc = ((R & 0x0f) == 0x0f) ? HF : 0; ++R; I.AF.b.l= (I.AF.b.l & CF ) | ZSP[R] | hc; } +#define M_DCR(R) {UINT8 hc = ((R & 0x0f) == 0x00) ? HF : 0; --R; I.AF.b.l= (I.AF.b.l & CF ) | ZSP[R] | hc | NF; } #define M_MVI(R) R=ARG() #define M_ANA(R) { int i = ((I.AF.b.h | R)>>3)&1 * HF; I.AF.b.h&=R; I.AF.b.l=ZSP[I.AF.b.h]; if( I.cputype ) { I.AF.b.l |= HF; } else {I.AF.b.l |= i; } } diff --git a/src/emu/cpu/minx/minxops.h b/src/emu/cpu/minx/minxops.h index 43a69ca1f74..c575316b36a 100644 --- a/src/emu/cpu/minx/minxops.h +++ b/src/emu/cpu/minx/minxops.h @@ -314,7 +314,7 @@ static const int insnminx_cycles[256] = { 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8, - + 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8, 8, 8, 8, 8, 16, 12, 12, 12, 8, 8, 8, 8, 16, 12, 12, 12, diff --git a/src/emu/cpu/mips/mips3.h b/src/emu/cpu/mips/mips3.h index 634698b5e0c..a82cf84e88e 100644 --- a/src/emu/cpu/mips/mips3.h +++ b/src/emu/cpu/mips/mips3.h @@ -1,8 +1,8 @@ /*************************************************************************** mips3.h - - Interface file for the universal machine language-based + + Interface file for the universal machine language-based MIPS III/IV emulator. Copyright Aaron Giles diff --git a/src/emu/cpu/powerpc/ppc.h b/src/emu/cpu/powerpc/ppc.h index 72fdf76a2d7..623250ae672 100644 --- a/src/emu/cpu/powerpc/ppc.h +++ b/src/emu/cpu/powerpc/ppc.h @@ -2,7 +2,7 @@ ppc.h - Interface file for the universal machine language-based + Interface file for the universal machine language-based PowerPC emulator. Copyright Aaron Giles diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c index d2e54293591..6994c73c52a 100644 --- a/src/emu/cpu/powerpc/ppccom.c +++ b/src/emu/cpu/powerpc/ppccom.c @@ -476,18 +476,18 @@ void ppccom_tlb_fill(powerpc_state *ppc) int transtype = ppc->param1; offs_t transaddr = address; UINT32 entryval; - + /* 4xx case: "TLB" really just caches writes and checks compare registers */ if (ppc->cap & PPCCAP_4XX) { /* assume success and direct translation */ ppc->param0 = 1; transaddr = address & 0x7fffffff; - + /* we don't support the MMU of the 403GCX */ if (ppc->flavor == PPC_MODEL_403GCX && (ppc->msr & MSROEA_DR)) fatalerror("MMU enabled but not supported!"); - + /* only check if PE is enabled */ if (transtype == TRANSLATE_WRITE && (ppc->msr & MSR4XX_PE)) { @@ -500,11 +500,11 @@ void ppccom_tlb_fill(powerpc_state *ppc) ppc->param0 = 2; } } - + /* OEA case: perform an address translation */ else ppc->param0 = ppccom_translate_address_internal(ppc, transtype | transuser, &transaddr); - + /* log information and return upon failure */ if (PRINTF_TLB_FILL) printf("tlb_fill: %08X (%s%s) -> ", address, (transtype == TRANSLATE_READ) ? "R" : (transtype == TRANSLATE_WRITE) ? "W" : "F", transuser ? "U" : "S"); @@ -1386,7 +1386,7 @@ static int ppc4xx_dma_decrement_count(powerpc_state *ppc, int dmachan) /* set the complete bit and handle interrupts */ ppc->dcr[DCR4XX_DMASR] |= 1 << (31 - dmachan); -// ppc->dcr[DCR4XX_DMASR] |= 1 << (27 - dmachan); +// ppc->dcr[DCR4XX_DMASR] |= 1 << (27 - dmachan); ppc4xx_dma_update_irq_states(ppc); return TRUE; } @@ -1644,7 +1644,7 @@ static void ppc4xx_spu_rx_data(powerpc_state *ppc, UINT8 data) new_rxin = (ppc->spu.rxin + 1) % ARRAY_LENGTH(ppc->spu.rxbuffer); if (new_rxin == ppc->spu.rxout) fatalerror("ppc4xx_spu_rx_data: buffer overrun!"); - + /* store the data and accept the new in index */ ppc->spu.rxbuffer[ppc->spu.rxin] = data; ppc->spu.rxin = new_rxin; @@ -1719,7 +1719,7 @@ static TIMER_CALLBACK( ppc4xx_spu_callback ) { int operation = (ppc->spu.regs[SPU4XX_RX_COMMAND] >> 5) & 3; UINT8 rxbyte; - + /* consume the byte and advance the out pointer */ rxbyte = ppc->spu.rxbuffer[ppc->spu.rxout]; ppc->spu.rxout = (ppc->spu.rxout + 1) % ARRAY_LENGTH(ppc->spu.rxbuffer); diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c index 48da8cd2de4..51597e8e100 100644 --- a/src/emu/cpu/powerpc/ppcdrc.c +++ b/src/emu/cpu/powerpc/ppcdrc.c @@ -12,7 +12,7 @@ Future improvements/changes: - * crxor a,a,a / creqv a,a,a / cror a,a,a + * crxor a,a,a / creqv a,a,a / cror a,a,a ***************************************************************************/ @@ -582,7 +582,7 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int cl ppc->impstate->drcuml = drcuml_alloc(cache, flags, 8, 32, 2); if (ppc->impstate->drcuml == NULL) fatalerror("Error initializing the UML"); - + /* add symbols for our stuff */ drcuml_symbol_add(ppc->impstate->drcuml, &ppc->pc, sizeof(ppc->pc), "pc"); drcuml_symbol_add(ppc->impstate->drcuml, &ppc->icount, sizeof(ppc->icount), "icount"); @@ -1798,14 +1798,14 @@ static void static_generate_memory_accessor(drcuml_state *drcuml, int mode, int UML_LOAD(block, IREG(3), ppc->tlb_table, IREG(3), DWORD); // load i3,[tlb_table],i3,dword UML_JMP(block, tlbreturn); // jmp tlbreturn UML_LABEL(block, dsi); // dsi: - + /* 4XX case: protection exception */ if (ppc->cap & PPCCAP_4XX) { UML_MOV(block, SPR32(SPR4XX_DEAR), IREG(0)); // mov [dear],i0 UML_EXH(block, ppc->impstate->exception[EXCEPTION_DSI], IREG(0)); // exh dsi,i0 } - + /* 603 case: TLBMISS exception */ else if (ppc->cap & PPCCAP_603_MMU) { @@ -1818,7 +1818,7 @@ static void static_generate_memory_accessor(drcuml_state *drcuml, int mode, int else UML_EXH(block, ppc->impstate->exception[EXCEPTION_DTLBMISSL], IREG(0)); // exh dtlbmissl,i0 } - + /* general case: DSI exception */ else { @@ -1887,7 +1887,7 @@ static void static_generate_lsw_entries(drcuml_state *drcuml, int mode) for (regnum = 0; regnum < 32; regnum++) { char temp[20]; - + /* allocate a handle */ sprintf(temp, "lsw%d", regnum); alloc_handle(drcuml, &ppc->impstate->lsw[mode][regnum], temp); @@ -1947,7 +1947,7 @@ static void static_generate_stsw_entries(drcuml_state *drcuml, int mode) for (regnum = 0; regnum < 32; regnum++) { char temp[20]; - + /* allocate a handle */ sprintf(temp, "stsw%d", regnum); alloc_handle(drcuml, &ppc->impstate->stsw[mode][regnum], temp); @@ -1994,7 +1994,7 @@ static void generate_update_mode(drcuml_block *block) { /* LE in bit 0 of mode */ UML_AND(block, IREG(0), MSR32, IMM(MSR_LE)); // and i0,msr,MSR_LE - + /* DR (OEA and 403GCX) in bit 1 of mode */ if ((ppc->cap & PPCCAP_OEA) || ppc->flavor == PPC_MODEL_403GCX) { @@ -2008,7 +2008,7 @@ static void generate_update_mode(drcuml_block *block) UML_ROLAND(block, IREG(1), MSR32, IMM(30), IMM(0x02)); // roland i1,[msr],30,0x02 UML_OR(block, IREG(0), IREG(0), IREG(1)); // or i0,i0,i1 } - + /* PR in bit 2 of mode */ UML_ROLAND(block, IREG(1), MSR32, IMM(20), IMM(0x04)); // roland i1,[msr],20,0x04 UML_OR(block, MEM(&ppc->impstate->mode), IREG(0), IREG(1)); // or [mode],i0,i1 diff --git a/src/emu/cpu/powerpc/ppcfe.c b/src/emu/cpu/powerpc/ppcfe.c index 78ed46709c1..550a2810fbe 100644 --- a/src/emu/cpu/powerpc/ppcfe.c +++ b/src/emu/cpu/powerpc/ppcfe.c @@ -655,7 +655,7 @@ static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *d if (op & M_RC) CR_MODIFIED(desc, 0); return TRUE; - + case 0x2c8: /* SUBFZEOx */ case 0x2ca: /* ADDZEOx */ case 0x2e8: /* SUBFMEOx */ @@ -1066,7 +1066,7 @@ static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *d GPR_USED(desc, regnum); desc->flags |= OPFLAG_WRITES_MEMORY; return TRUE; - + case 0x2d5: /* STSWI */ GPR_USED_OR_ZERO(desc, G_RA(op)); for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4) |
