diff options
| author | 2013-09-17 06:47:03 +0000 | |
|---|---|---|
| committer | 2013-09-17 06:47:03 +0000 | |
| commit | 96aa5e1c086b4927456dc88b925d8ec112f0482e (patch) | |
| tree | f59d136c51d4a065f39e3ab0d73981526c4d156b /src/emu/cpu | |
| parent | a7d12daf5b4c3374e8ad47a003ac7fff73d5c8fc (diff) | |
Cleanups and version bumpmame0150
Diffstat (limited to 'src/emu/cpu')
52 files changed, 483 insertions, 511 deletions
diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak index 7bfbe9cdf91..8b5ab207e92 100644 --- a/src/emu/cpu/cpu.mak +++ b/src/emu/cpu/cpu.mak @@ -726,8 +726,8 @@ $(CPUOBJ)/i8085/i8085.o: $(CPUSRC)/i8085/i8085.c \ ifneq ($(filter I8089,$(CPUS)),) OBJDIRS += $(CPUOBJ)/i8089 CPUOBJS += $(CPUOBJ)/i8089/i8089.o \ - $(CPUOBJ)/i8089/i8089_channel.o \ - $(CPUOBJ)/i8089/i8089_ops.o + $(CPUOBJ)/i8089/i8089_channel.o \ + $(CPUOBJ)/i8089/i8089_ops.o DASMOBJS += $(CPUOBJ)/i8089/i8089_dasm.o endif diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.c b/src/emu/cpu/cubeqcpu/cubeqcpu.c index 63f7dded5e2..157a53218f3 100644 --- a/src/emu/cpu/cubeqcpu/cubeqcpu.c +++ b/src/emu/cpu/cubeqcpu/cubeqcpu.c @@ -111,8 +111,8 @@ offs_t cquestrot_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const U cquestlin_cpu_device::cquestlin_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : cpu_device(mconfig, CQUESTLIN, "Cube Quest Line CPU", tag, owner, clock, "cquestlin", __FILE__) - , m_program_config("program", ENDIANNESS_BIG, 64, 8, -3) + : cpu_device(mconfig, CQUESTLIN, "Cube Quest Line CPU", tag, owner, clock, "cquestlin", __FILE__) + , m_program_config("program", ENDIANNESS_BIG, 64, 8, -3) , m_linedata_r(*this) , m_flags(0) , m_curpc(0) @@ -358,8 +358,8 @@ void cquestrot_cpu_device::state_string_export(const device_state_entry &entry, { case STATE_GENFLAGS: string.printf( "%c%c%c", m_cflag ? 'C' : '.', - m_vflag ? 'V' : '.', - m_f ? '.' : 'Z'); + m_vflag ? 'V' : '.', + m_f ? '.' : 'Z'); break; } } @@ -488,9 +488,9 @@ void cquestlin_cpu_device::state_string_export(const device_state_entry &entry, { case STATE_GENFLAGS: string.printf( "%c%c%c|%cG", m_cflag ? 'C' : '.', - m_vflag ? 'V' : '.', - m_f ? '.' : 'Z', - ( m_clkcnt & 3 ) ? 'B' : 'F'); + m_vflag ? 'V' : '.', + m_f ? '.' : 'Z', + ( m_clkcnt & 3 ) ? 'B' : 'F'); break; } } @@ -1551,4 +1551,3 @@ void cquestlin_cpu_device::execute_run() m_clkcnt++; } while (m_icount > 0); } - diff --git a/src/emu/cpu/es5510/es5510.c b/src/emu/cpu/es5510/es5510.c index 0786fcb36c0..1e6fbf6968c 100644 --- a/src/emu/cpu/es5510/es5510.c +++ b/src/emu/cpu/es5510/es5510.c @@ -168,7 +168,7 @@ es5510_device::es5510_device(const machine_config &mconfig, const char *tag, dev instr_latch = 0; ram_sel = 0; host_control = 0; - + pc = 0; memset(&alu, 0, sizeof(alu)); memset(&mulacc, 0, sizeof(mulacc)); @@ -606,7 +606,7 @@ void es5510_device::list_program(void(p)(const char *, ...)) { is_written[i] = is_read[i] = false; name[i][0] = '\0'; } - + for (addr = 0; addr < 0xa0; addr++) { DESCRIBE_INSTR(buf, instr[addr], gpr[addr], NULL, NULL, NULL, NULL); UINT64 inst = instr[addr]; @@ -621,7 +621,7 @@ void es5510_device::list_program(void(p)(const char *, ...)) { } UINT8 operandSelect = (UINT8)((inst >> 8) & 0x0f); - const op_select_t &opSelect = OPERAND_SELECT[operandSelect]; + const op_select_t &opSelect = OPERAND_SELECT[operandSelect]; if (opSelect.mac_src == SRC_DST_REG) { is_read[cReg] = true; @@ -630,7 +630,7 @@ void es5510_device::list_program(void(p)(const char *, ...)) { if (opSelect.mac_dst != SRC_DST_DELAY) { // either REG or BOTH is_written[cReg] = true; } - + alu_op_t aluOp = ALU_OPS[alu_op]; if (aluOp.operands == 1) { if (opSelect.alu_src == SRC_DST_REG) { @@ -663,7 +663,7 @@ void es5510_device::list_program(void(p)(const char *, ...)) { for (int i = 0xc0; i < 0x100; i++) { name[i][0] = 0; } - + for (addr = 0; addr < 0xa0; addr++) { UINT8 aReg = (UINT8)((instr[addr] >> 16) & 0xff); UINT8 bReg = (UINT8)((instr[addr] >> 24) & 0xff); @@ -830,7 +830,7 @@ void es5510_device::execute_run() { // *** T2, clock high LOG_EXEC(("- T2.1\n")); - + // --- Write ALU Result N-1 LOG_EXEC((". write ALU:\n")); if (alu.write_result) { diff --git a/src/emu/cpu/es5510/es5510.h b/src/emu/cpu/es5510/es5510.h index 6e73e4e1542..974c8511705 100644 --- a/src/emu/cpu/es5510/es5510.h +++ b/src/emu/cpu/es5510/es5510.h @@ -152,8 +152,8 @@ private: INT16 ser2l; INT16 ser3r; INT16 ser3l; - INT64 machl; // 48 bits, right justified and sign extended - bool mac_overflow; // whether reading the MAC register should return a saturated replacement value + INT64 machl; // 48 bits, right justified and sign extended + bool mac_overflow; // whether reading the MAC register should return a saturated replacement value INT32 dil; INT32 memsiz; INT32 memmask; @@ -165,8 +165,8 @@ private: INT32 dbase; INT32 sigreg; int mulshift; - INT8 ccr; // really, 5 bits, left justified - INT8 cmr; // really, 6 bits, left justified + INT8 ccr; // really, 5 bits, left justified + INT8 cmr; // really, 6 bits, left justified INT32 dol[2]; int dol_count; diff --git a/src/emu/cpu/f8/f8.c b/src/emu/cpu/f8/f8.c index 00ca393bee4..c5c1dee0a0b 100644 --- a/src/emu/cpu/f8/f8.c +++ b/src/emu/cpu/f8/f8.c @@ -1601,7 +1601,7 @@ void f8_cpu_device::device_reset() m_irq_vector = 0; memset(m_r, 0, sizeof(m_r)); m_irq_request = 0; - + m_w&=~I; /* save PC0 to PC1 and reset PC0 */ @@ -2054,11 +2054,11 @@ void f8_cpu_device::state_string_export(const device_state_entry &entry, astring { case STATE_GENFLAGS: string.printf("%c%c%c%c%c", - m_w & 0x10 ? 'I':'.', - m_w & 0x08 ? 'O':'.', - m_w & 0x04 ? 'Z':'.', - m_w & 0x02 ? 'C':'.', - m_w & 0x01 ? 'S':'.'); + m_w & 0x10 ? 'I':'.', + m_w & 0x08 ? 'O':'.', + m_w & 0x04 ? 'Z':'.', + m_w & 0x02 ? 'C':'.', + m_w & 0x01 ? 'S':'.'); break; } } @@ -2075,5 +2075,3 @@ void f8_cpu_device::execute_set_input( int inptnum, int state ) { m_irq_request = state; } - - diff --git a/src/emu/cpu/i8085/i8085.c b/src/emu/cpu/i8085/i8085.c index 64b2fa268e3..732a03cf349 100644 --- a/src/emu/cpu/i8085/i8085.c +++ b/src/emu/cpu/i8085/i8085.c @@ -1133,4 +1133,3 @@ offs_t i8085a_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT extern CPU_DISASSEMBLE( i8085 ); return CPU_DISASSEMBLE_NAME(i8085)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/i8089/i8089.h b/src/emu/cpu/i8089/i8089.h index c5d3d62a453..adcc945f765 100644 --- a/src/emu/cpu/i8089/i8089.h +++ b/src/emu/cpu/i8089/i8089.h @@ -121,14 +121,14 @@ private: SOC, DIVIDER1, CH1_GA, CH1_GB, CH1_GC, - CH1_TP, CH1_BC, CH1_IX, - CH1_CC, CH1_MC, CH1_CP, - CH1_PP, CH1_PSW, + CH1_TP, CH1_BC, CH1_IX, + CH1_CC, CH1_MC, CH1_CP, + CH1_PP, CH1_PSW, DIVIDER2, - CH2_GA, CH2_GB, CH2_GC, - CH2_TP, CH2_BC, CH2_IX, - CH2_CC, CH2_MC, CH2_CP, - CH2_PP, CH2_PSW + CH2_GA, CH2_GB, CH2_GC, + CH2_TP, CH2_BC, CH2_IX, + CH2_CC, CH2_MC, CH2_CP, + CH2_PP, CH2_PSW }; // system configuration diff --git a/src/emu/cpu/i8089/i8089_channel.c b/src/emu/cpu/i8089/i8089_channel.c index 8e9e2833b46..b8d93c7e0bf 100644 --- a/src/emu/cpu/i8089/i8089_channel.c +++ b/src/emu/cpu/i8089/i8089_channel.c @@ -19,16 +19,16 @@ #define VERBOSE_DMA 1 // channel control register fields -#define CC_TMC ((m_r[CC].w >> 0) & 0x07) // terminate on masked compare -#define CC_TBC ((m_r[CC].w >> 3) & 0x03) // terminate on byte count -#define CC_TX ((m_r[CC].w >> 5) & 0x03) // terminate on external signal -#define CC_TS ((m_r[CC].w >> 7) & 0x01) // terminate on single transfer -#define CC_CHAIN ((m_r[CC].w >> 8) & 0x01) // chaining -#define CC_LOCK ((m_r[CC].w >> 9) & 0x01) // actuate lock -#define CC_SOURCE ((m_r[CC].w >> 10) & 0x01) // source register -#define CC_SYNC ((m_r[CC].w >> 11) & 0x03) // synchronization -#define CC_TRANS ((m_r[CC].w >> 13) & 0x01) // translation -#define CC_FUNC ((m_r[CC].w >> 14) & 0x03) // function +#define CC_TMC ((m_r[CC].w >> 0) & 0x07) // terminate on masked compare +#define CC_TBC ((m_r[CC].w >> 3) & 0x03) // terminate on byte count +#define CC_TX ((m_r[CC].w >> 5) & 0x03) // terminate on external signal +#define CC_TS ((m_r[CC].w >> 7) & 0x01) // terminate on single transfer +#define CC_CHAIN ((m_r[CC].w >> 8) & 0x01) // chaining +#define CC_LOCK ((m_r[CC].w >> 9) & 0x01) // actuate lock +#define CC_SOURCE ((m_r[CC].w >> 10) & 0x01) // source register +#define CC_SYNC ((m_r[CC].w >> 11) & 0x03) // synchronization +#define CC_TRANS ((m_r[CC].w >> 13) & 0x01) // translation +#define CC_FUNC ((m_r[CC].w >> 14) & 0x03) // function //************************************************************************** diff --git a/src/emu/cpu/i8089/i8089_ops.c b/src/emu/cpu/i8089/i8089_ops.c index 4ceff35ddc8..f65cae7986c 100644 --- a/src/emu/cpu/i8089/i8089_ops.c +++ b/src/emu/cpu/i8089/i8089_ops.c @@ -2,7 +2,7 @@ Intel 8089 I/O Processor - Opcode implementations + Opcode implementations ***************************************************************************/ diff --git a/src/emu/cpu/i86/i186.c b/src/emu/cpu/i86/i186.c index 5850c157330..a36b8bcfad2 100644 --- a/src/emu/cpu/i86/i186.c +++ b/src/emu/cpu/i86/i186.c @@ -1284,8 +1284,8 @@ void i80186_cpu_device::drq_callback(int which) update_interrupt_state(); } -// dma->finish_timer->adjust(attotime::from_hz(clock()/8), 0); -// dma->drq_delay = true; +// dma->finish_timer->adjust(attotime::from_hz(clock()/8), 0); +// dma->drq_delay = true; } READ16_MEMBER(i80186_cpu_device::internal_port_r) diff --git a/src/emu/cpu/i86/i286.c b/src/emu/cpu/i86/i286.c index efd37afe402..00b4df6be99 100644 --- a/src/emu/cpu/i86/i286.c +++ b/src/emu/cpu/i86/i286.c @@ -1956,4 +1956,3 @@ void i80286_cpu_device::check_permission(UINT8 check_seg, UINT32 offset, UINT16 throw TRAP(trap, 0); } } - diff --git a/src/emu/cpu/i86/i286.h b/src/emu/cpu/i86/i286.h index f869c20ad4a..543f023fb50 100644 --- a/src/emu/cpu/i86/i286.h +++ b/src/emu/cpu/i86/i286.h @@ -7,7 +7,7 @@ extern const device_type I80286; enum -{ // same order as I8086 registers +{ // same order as I8086 registers I286_PC = 0, I286_IP, diff --git a/src/emu/cpu/i860/i860.c b/src/emu/cpu/i860/i860.c index 0ea1be31177..f3aab4f7289 100644 --- a/src/emu/cpu/i860/i860.c +++ b/src/emu/cpu/i860/i860.c @@ -139,9 +139,9 @@ void i860_cpu_device::device_start() void i860_cpu_device::state_import(const device_state_entry &entry) { #define I860_SET_INFO_F(fnum) m_frg[0+(4*fnum)] = (m_freg[fnum] & 0x000000ff); \ - m_frg[1+(4*fnum)] = (m_freg[fnum] & 0x0000ff00) >> 8; \ - m_frg[2+(4*fnum)] = (m_freg[fnum] & 0x00ff0000) >> 16; \ - m_frg[3+(4*fnum)] = (m_freg[fnum] & 0xff000000) >> 24; + m_frg[1+(4*fnum)] = (m_freg[fnum] & 0x0000ff00) >> 8; \ + m_frg[2+(4*fnum)] = (m_freg[fnum] & 0x00ff0000) >> 16; \ + m_frg[3+(4*fnum)] = (m_freg[fnum] & 0xff000000) >> 24; switch (entry.index()) { @@ -238,4 +238,3 @@ offs_t i860_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 * The actual decode and execute code. **************************************************************************/ #include "i860dec.c" - diff --git a/src/emu/cpu/i860/i860dec.c b/src/emu/cpu/i860/i860dec.c index 286e4a9f893..ac036a1f124 100644 --- a/src/emu/cpu/i860/i860dec.c +++ b/src/emu/cpu/i860/i860dec.c @@ -285,11 +285,11 @@ void i860_cpu_device::set_fregval_d (int fr, double d) int i860_cpu_device::has_delay_slot(UINT32 insn) { - int opc = (insn >> 26) & 0x3f; - if (opc == 0x10 || opc == 0x1a || opc == 0x1b || opc == 0x1d || - opc == 0x1f || opc == 0x2d || (opc == 0x13 && (insn & 3) == 2)) - return 1; - return 0; + int opc = (insn >> 26) & 0x3f; + if (opc == 0x10 || opc == 0x1a || opc == 0x1b || opc == 0x1d || + opc == 0x1f || opc == 0x2d || (opc == 0x13 && (insn & 3) == 2)) + return 1; + return 0; } /* This is the external interface for asserting/deasserting pins on diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c index 05c9f768d38..b30f9dc865a 100644 --- a/src/emu/cpu/i960/i960.c +++ b/src/emu/cpu/i960/i960.c @@ -2077,7 +2077,6 @@ void i960_cpu_device::device_start() void i960_cpu_device::state_string_export(const device_state_entry &entry, astring &string) { - static const char *const conditions[8] = { "no", "g", "e", "ge", "l", "ne", "le", "o" @@ -2116,4 +2115,3 @@ offs_t i960_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 extern CPU_DISASSEMBLE( i960 ); return CPU_DISASSEMBLE_NAME(i960)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/jaguar/jaguar.c b/src/emu/cpu/jaguar/jaguar.c index 3ac6d1fffe2..44a24f78b8d 100644 --- a/src/emu/cpu/jaguar/jaguar.c +++ b/src/emu/cpu/jaguar/jaguar.c @@ -416,7 +416,7 @@ void jaguar_cpu_device::state_string_export(const device_state_entry &entry, ast FLAGS & 0x0008 ? 'I':'.', FLAGS & 0x0004 ? 'N':'.', FLAGS & 0x0002 ? 'C':'.', - FLAGS & 0x0001 ? 'Z':'.'); + FLAGS & 0x0001 ? 'Z':'.'); break; } } @@ -1447,4 +1447,3 @@ offs_t jaguardsp_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const U extern CPU_DISASSEMBLE( jaguardsp ); return CPU_DISASSEMBLE_NAME(jaguardsp)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/lh5801/lh5801.c b/src/emu/cpu/lh5801/lh5801.c index 5c2151dbc87..bfaf8c7ec79 100644 --- a/src/emu/cpu/lh5801/lh5801.c +++ b/src/emu/cpu/lh5801/lh5801.c @@ -264,4 +264,3 @@ offs_t lh5801_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT extern CPU_DISASSEMBLE( lh5801 ); return CPU_DISASSEMBLE_NAME(lh5801)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/m37710/m37710.h b/src/emu/cpu/m37710/m37710.h index 32f33a81067..1aa492f99cb 100644 --- a/src/emu/cpu/m37710/m37710.h +++ b/src/emu/cpu/m37710/m37710.h @@ -161,7 +161,7 @@ private: address_space *m_program; address_space *m_io; UINT32 m_stopped; /* Sets how the CPU is stopped */ - + // on-board peripheral stuff UINT8 m_m37710_regs[128]; attotime m_reload[8]; diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c index 1c5ad8e2598..aed01bf45c3 100644 --- a/src/emu/cpu/m6800/m6800.c +++ b/src/emu/cpu/m6800/m6800.c @@ -1708,17 +1708,17 @@ WRITE8_MEMBER( m6800_cpu_device::m6801_io_w ) } } -void m6801_cpu_device::m6801_clock_serial() -{ +void m6801_cpu_device::m6801_clock_serial() +{ if (m_use_ext_serclock) { - m_ext_serclock++; + m_ext_serclock++; if (m_ext_serclock >= 8) - { - m_ext_serclock = 0; - serial_transmit(); - serial_receive(); + { + m_ext_serclock = 0; + serial_transmit(); + serial_receive(); } } } @@ -1777,4 +1777,3 @@ offs_t nsc8105_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UIN extern CPU_DISASSEMBLE( nsc8105 ); return CPU_DISASSEMBLE_NAME(nsc8105)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/m6800/m6800.h b/src/emu/cpu/m6800/m6800.h index 6560f738e99..d5d790e0151 100644 --- a/src/emu/cpu/m6800/m6800.h +++ b/src/emu/cpu/m6800/m6800.h @@ -139,7 +139,7 @@ protected: int m_clock_divider; UINT8 m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tsr; int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_ext_serclock; - bool m_use_ext_serclock; + bool m_use_ext_serclock; int m_port2_written; int m_icount; diff --git a/src/emu/cpu/m68000/m68k_in.c b/src/emu/cpu/m68000/m68k_in.c index 793137fa1e7..19af7dde3c9 100644 --- a/src/emu/cpu/m68000/m68k_in.c +++ b/src/emu/cpu/m68000/m68k_in.c @@ -3897,9 +3897,9 @@ M68KMAKE_OP(clr, 8, ., .) { UINT32 ea = M68KMAKE_GET_EA_AY_8; - if(CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type)) { - m68ki_read_8((mc68kcpu), ea); /* the 68000 (and 010?) does a dummy read, the value is discarded */ + m68ki_read_8((mc68kcpu), ea); /* the 68000 (and 010?) does a dummy read, the value is discarded */ } m68ki_write_8((mc68kcpu), ea, 0); @@ -3926,9 +3926,9 @@ M68KMAKE_OP(clr, 16, ., .) { UINT32 ea = M68KMAKE_GET_EA_AY_16; - if(CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type)) { - m68ki_read_16((mc68kcpu), ea); /* the 68000 (and 010?) does a dummy read, the value is discarded */ + m68ki_read_16((mc68kcpu), ea); /* the 68000 (and 010?) does a dummy read, the value is discarded */ } m68ki_write_16((mc68kcpu), ea, 0); @@ -3955,9 +3955,9 @@ M68KMAKE_OP(clr, 32, ., .) { UINT32 ea = M68KMAKE_GET_EA_AY_32; - if(CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type)) + if(CPU_TYPE_IS_010_LESS((mc68kcpu)->cpu_type)) { - m68ki_read_32((mc68kcpu), ea); /* the 68000 (and 010?) does a dummy read, the value is discarded */ + m68ki_read_32((mc68kcpu), ea); /* the 68000 (and 010?) does a dummy read, the value is discarded */ } m68ki_write_32((mc68kcpu), ea, 0); diff --git a/src/emu/cpu/mb86233/mb86233.c b/src/emu/cpu/mb86233/mb86233.c index 67e2d388330..f1a4738d1e4 100644 --- a/src/emu/cpu/mb86233/mb86233.c +++ b/src/emu/cpu/mb86233/mb86233.c @@ -96,7 +96,7 @@ void mb86233_cpu_device::device_start() m_fifo_read_cb.resolve_safe(0); m_fifo_read_ok_cb.resolve_safe(0); m_fifo_write_cb.resolve_safe(); - + m_program = &space(AS_PROGRAM); m_direct = &m_program->direct(); @@ -1582,4 +1582,3 @@ void mb86233_cpu_device::execute_run() } } } - diff --git a/src/emu/cpu/mb88xx/mb88xx.c b/src/emu/cpu/mb88xx/mb88xx.c index 44a8393a71c..d613c7a989e 100644 --- a/src/emu/cpu/mb88xx/mb88xx.c +++ b/src/emu/cpu/mb88xx/mb88xx.c @@ -114,25 +114,25 @@ mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type mb8841_cpu_device::mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : mb88_cpu_device(mconfig, MB8841, "MB8841", tag, owner, clock, "mb8841", __FILE__, 11, 7) + : mb88_cpu_device(mconfig, MB8841, "MB8841", tag, owner, clock, "mb8841", __FILE__, 11, 7) { } mb8842_cpu_device::mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : mb88_cpu_device(mconfig, MB8842, "MB8842", tag, owner, clock, "mb8842", __FILE__, 11, 7) + : mb88_cpu_device(mconfig, MB8842, "MB8842", tag, owner, clock, "mb8842", __FILE__, 11, 7) { } mb8843_cpu_device::mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : mb88_cpu_device(mconfig, MB8843, "MB8843", tag, owner, clock, "mb8843", __FILE__, 10, 6) + : mb88_cpu_device(mconfig, MB8843, "MB8843", tag, owner, clock, "mb8843", __FILE__, 10, 6) { } mb8844_cpu_device::mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : mb88_cpu_device(mconfig, MB8844, "MB8844", tag, owner, clock, "mb8844", __FILE__, 10, 6) + : mb88_cpu_device(mconfig, MB8844, "MB8844", tag, owner, clock, "mb8844", __FILE__, 10, 6) { } @@ -946,4 +946,3 @@ void mb88_cpu_device::execute_run() update_pio(oc); } } - diff --git a/src/emu/cpu/mb88xx/mb88xx.h b/src/emu/cpu/mb88xx/mb88xx.h index 3e0103b1c5c..254df96f266 100644 --- a/src/emu/cpu/mb88xx/mb88xx.h +++ b/src/emu/cpu/mb88xx/mb88xx.h @@ -158,32 +158,32 @@ private: class mb8841_cpu_device : public mb88_cpu_device { public: - // construction/destruction - mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + // construction/destruction + mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); }; class mb8842_cpu_device : public mb88_cpu_device { public: - // construction/destruction - mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + // construction/destruction + mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); }; class mb8843_cpu_device : public mb88_cpu_device { public: - // construction/destruction - mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + // construction/destruction + mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); }; class mb8844_cpu_device : public mb88_cpu_device { public: - // construction/destruction - mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + // construction/destruction + mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); }; diff --git a/src/emu/cpu/mc68hc11/mc68hc11.c b/src/emu/cpu/mc68hc11/mc68hc11.c index 4ed5b4e76af..243157eeb19 100644 --- a/src/emu/cpu/mc68hc11/mc68hc11.c +++ b/src/emu/cpu/mc68hc11/mc68hc11.c @@ -595,4 +595,3 @@ void mc68hc11_cpu_device::execute_run() (this->*hc11_optable[op])(); } } - diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c index ce3783120f4..36156cbf7b0 100644 --- a/src/emu/cpu/mcs48/mcs48.c +++ b/src/emu/cpu/mcs48/mcs48.c @@ -1330,4 +1330,3 @@ void mcs48_cpu_device::execute_set_input(int inputnum, int state) break; } } - diff --git a/src/emu/cpu/mcs48/mcs48.h b/src/emu/cpu/mcs48/mcs48.h index b95ea95b405..c1d19bc6c30 100644 --- a/src/emu/cpu/mcs48/mcs48.h +++ b/src/emu/cpu/mcs48/mcs48.h @@ -484,9 +484,9 @@ public: i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); protected: - // device_execute_interface overrides - virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 30 - 1) / 30; } - virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 30); } + // device_execute_interface overrides + virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 30 - 1) / 30; } + virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 30); } }; class i8022_device : public mcs48_cpu_device @@ -496,9 +496,9 @@ public: i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); protected: - // device_execute_interface overrides - virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 30 - 1) / 30; } - virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 30); } + // device_execute_interface overrides + virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 30 - 1) / 30; } + virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 30); } }; class i8035_device : public mcs48_cpu_device diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c index 69369cbc8af..fc6bee9cfd7 100644 --- a/src/emu/cpu/mcs51/mcs51.c +++ b/src/emu/cpu/mcs51/mcs51.c @@ -2506,4 +2506,3 @@ offs_t ds5002fp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 extern CPU_DISASSEMBLE( ds5002fp ); return CPU_DISASSEMBLE_NAME(ds5002fp)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/minx/minx.c b/src/emu/cpu/minx/minx.c index 6c02873a54b..f33dcadc26a 100644 --- a/src/emu/cpu/minx/minx.c +++ b/src/emu/cpu/minx/minx.c @@ -236,4 +236,3 @@ offs_t minx_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 extern CPU_DISASSEMBLE( minx ); return CPU_DISASSEMBLE_NAME(minx)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/minx/minx.h b/src/emu/cpu/minx/minx.h index 34d61dcd519..90217e973ac 100644 --- a/src/emu/cpu/minx/minx.h +++ b/src/emu/cpu/minx/minx.h @@ -880,8 +880,8 @@ private: static const op_func insnminx_CE[256]; static const int insnminx_cycles_CE[256]; - static const op_func insnminx_CF[256]; - static const int insnminx_cycles_CF[256]; + static const op_func insnminx_CF[256]; + static const int insnminx_cycles_CF[256]; }; diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c index bc0bb9c485d..f226b4c924f 100644 --- a/src/emu/cpu/mips/mips3drc.c +++ b/src/emu/cpu/mips/mips3drc.c @@ -3934,7 +3934,7 @@ CPU_GET_INFO( r4700le_drc ) /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little) DRC"); break; case CPUINFO_STR_SHORTNAME: strcpy(info->s, "r4700le_drc"); break; - + /* --- everything else is handled generically --- */ default: CPU_GET_INFO_CALL(mips3); break; } @@ -4124,4 +4124,3 @@ DEFINE_LEGACY_CPU_DEVICE(QED5271LE_DRC, qed5271le_drc); DEFINE_LEGACY_CPU_DEVICE(RM7000BE_DRC, rm7000be_drc); DEFINE_LEGACY_CPU_DEVICE(RM7000LE_DRC, rm7000le_drc); - diff --git a/src/emu/cpu/mn10200/mn10200.c b/src/emu/cpu/mn10200/mn10200.c index 33cbeabc7ef..662183241d4 100644 --- a/src/emu/cpu/mn10200/mn10200.c +++ b/src/emu/cpu/mn10200/mn10200.c @@ -2436,5 +2436,3 @@ offs_t mn10200_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 * extern CPU_DISASSEMBLE( mn10200 ); return CPU_DISASSEMBLE_NAME(mn10200)(this, buffer, pc, oprom, opram, options); } - - diff --git a/src/emu/cpu/nec/v25.c b/src/emu/cpu/nec/v25.c index 5ccb57fdfd0..e302dccc0ca 100644 --- a/src/emu/cpu/nec/v25.c +++ b/src/emu/cpu/nec/v25.c @@ -711,7 +711,7 @@ static CPU_GET_INFO( v25v35 ) case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_state->icount; break; /* --- the following bits of info are returned as NULL-terminated strings --- */ - case CPUINFO_STR_NAME: strcpy(info->s, "NEC"); break; + case CPUINFO_STR_NAME: strcpy(info->s, "NEC"); break; case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V-Series"); break; case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break; case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; diff --git a/src/emu/cpu/pic16c5x/pic16c5x.c b/src/emu/cpu/pic16c5x/pic16c5x.c index 3ab526f9a28..6dca0b2fe20 100644 --- a/src/emu/cpu/pic16c5x/pic16c5x.c +++ b/src/emu/cpu/pic16c5x/pic16c5x.c @@ -703,78 +703,78 @@ void pic16c5x_device::xorwf() const pic16c5x_device::pic16c5x_opcode pic16c5x_device::s_opcode_main[256]= { /*00*/ {1, &pic16c5x_device::nop },{0, &pic16c5x_device::illegal },{1, &pic16c5x_device::movwf },{1, &pic16c5x_device::movwf }, - {1, &pic16c5x_device::clrw },{0, &pic16c5x_device::illegal },{1, &pic16c5x_device::clrf },{1, &pic16c5x_device::clrf }, + {1, &pic16c5x_device::clrw },{0, &pic16c5x_device::illegal },{1, &pic16c5x_device::clrf },{1, &pic16c5x_device::clrf }, /*08*/ {1, &pic16c5x_device::subwf },{1, &pic16c5x_device::subwf },{1, &pic16c5x_device::subwf },{1, &pic16c5x_device::subwf }, - {1, &pic16c5x_device::decf },{1, &pic16c5x_device::decf },{1, &pic16c5x_device::decf },{1, &pic16c5x_device::decf }, + {1, &pic16c5x_device::decf },{1, &pic16c5x_device::decf },{1, &pic16c5x_device::decf },{1, &pic16c5x_device::decf }, /*10*/ {1, &pic16c5x_device::iorwf },{1, &pic16c5x_device::iorwf },{1, &pic16c5x_device::iorwf },{1, &pic16c5x_device::iorwf }, - {1, &pic16c5x_device::andwf },{1, &pic16c5x_device::andwf },{1, &pic16c5x_device::andwf },{1, &pic16c5x_device::andwf }, + {1, &pic16c5x_device::andwf },{1, &pic16c5x_device::andwf },{1, &pic16c5x_device::andwf },{1, &pic16c5x_device::andwf }, /*18*/ {1, &pic16c5x_device::xorwf },{1, &pic16c5x_device::xorwf },{1, &pic16c5x_device::xorwf },{1, &pic16c5x_device::xorwf }, - {1, &pic16c5x_device::addwf },{1, &pic16c5x_device::addwf },{1, &pic16c5x_device::addwf },{1, &pic16c5x_device::addwf }, + {1, &pic16c5x_device::addwf },{1, &pic16c5x_device::addwf },{1, &pic16c5x_device::addwf },{1, &pic16c5x_device::addwf }, /*20*/ {1, &pic16c5x_device::movf },{1, &pic16c5x_device::movf },{1, &pic16c5x_device::movf },{1, &pic16c5x_device::movf }, - {1, &pic16c5x_device::comf },{1, &pic16c5x_device::comf },{1, &pic16c5x_device::comf },{1, &pic16c5x_device::comf }, + {1, &pic16c5x_device::comf },{1, &pic16c5x_device::comf },{1, &pic16c5x_device::comf },{1, &pic16c5x_device::comf }, /*28*/ {1, &pic16c5x_device::incf },{1, &pic16c5x_device::incf },{1, &pic16c5x_device::incf },{1, &pic16c5x_device::incf }, - {1, &pic16c5x_device::decfsz },{1, &pic16c5x_device::decfsz },{1, &pic16c5x_device::decfsz },{1, &pic16c5x_device::decfsz }, + {1, &pic16c5x_device::decfsz },{1, &pic16c5x_device::decfsz },{1, &pic16c5x_device::decfsz },{1, &pic16c5x_device::decfsz }, /*30*/ {1, &pic16c5x_device::rrf },{1, &pic16c5x_device::rrf },{1, &pic16c5x_device::rrf },{1, &pic16c5x_device::rrf }, - {1, &pic16c5x_device::rlf },{1, &pic16c5x_device::rlf },{1, &pic16c5x_device::rlf },{1, &pic16c5x_device::rlf }, + {1, &pic16c5x_device::rlf },{1, &pic16c5x_device::rlf },{1, &pic16c5x_device::rlf },{1, &pic16c5x_device::rlf }, /*38*/ {1, &pic16c5x_device::swapf },{1, &pic16c5x_device::swapf },{1, &pic16c5x_device::swapf },{1, &pic16c5x_device::swapf }, - {1, &pic16c5x_device::incfsz },{1, &pic16c5x_device::incfsz },{1, &pic16c5x_device::incfsz },{1, &pic16c5x_device::incfsz }, + {1, &pic16c5x_device::incfsz },{1, &pic16c5x_device::incfsz },{1, &pic16c5x_device::incfsz },{1, &pic16c5x_device::incfsz }, /*40*/ {1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf }, - {1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf }, + {1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf }, /*48*/ {1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf }, - {1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf }, + {1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf },{1, &pic16c5x_device::bcf }, /*50*/ {1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf }, - {1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf }, + {1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf }, /*58*/ {1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf }, - {1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf }, + {1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf },{1, &pic16c5x_device::bsf }, /*60*/ {1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc }, - {1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc }, + {1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc }, /*68*/ {1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc }, - {1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc }, + {1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc },{1, &pic16c5x_device::btfsc }, /*70*/ {1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss }, - {1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss }, + {1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss }, /*78*/ {1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss }, - {1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss }, + {1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss },{1, &pic16c5x_device::btfss }, /*80*/ {2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw }, - {2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw }, + {2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw }, /*88*/ {2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw }, - {2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw }, + {2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw },{2, &pic16c5x_device::retlw }, /*90*/ {2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call }, - {2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call }, + {2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call }, /*98*/ {2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call }, - {2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call }, + {2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call },{2, &pic16c5x_device::call }, /*A0*/ {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, - {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, + {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, /*A8*/ {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, - {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, + {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, /*B0*/ {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, - {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, + {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, /*B8*/ {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, - {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, + {2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op },{2, &pic16c5x_device::goto_op }, /*C0*/ {1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw }, - {1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw }, + {1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw }, /*C8*/ {1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw }, - {1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw }, + {1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw },{1, &pic16c5x_device::movlw }, /*D0*/ {1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw }, - {1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw }, + {1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw }, /*D8*/ {1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw }, - {1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw }, + {1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw },{1, &pic16c5x_device::iorlw }, /*E0*/ {1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw }, - {1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw }, + {1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw }, /*E8*/ {1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw }, - {1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw }, + {1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw },{1, &pic16c5x_device::andlw }, /*F0*/ {1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw }, - {1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw }, + {1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw }, /*F8*/ {1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw }, - {1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw } + {1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw },{1, &pic16c5x_device::xorlw } }; const pic16c5x_device::pic16c5x_opcode pic16c5x_device::s_opcode_00x[16]= { /*00*/ {1, &pic16c5x_device::nop },{0, &pic16c5x_device::illegal },{1, &pic16c5x_device::option },{1, &pic16c5x_device::sleepic }, - {1, &pic16c5x_device::clrwdt },{1, &pic16c5x_device::tris },{1, &pic16c5x_device::tris },{1, &pic16c5x_device::tris }, + {1, &pic16c5x_device::clrwdt },{1, &pic16c5x_device::tris },{1, &pic16c5x_device::tris },{1, &pic16c5x_device::tris }, /*08*/ {0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal }, - {0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal } + {0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal },{0, &pic16c5x_device::illegal } }; @@ -1102,4 +1102,3 @@ void pic16c5x_device::execute_run() } while (m_icount > 0); } - diff --git a/src/emu/cpu/pic16c62x/pic16c62x.c b/src/emu/cpu/pic16c62x/pic16c62x.c index 37ed67b3703..6a4c239e2fb 100644 --- a/src/emu/cpu/pic16c62x/pic16c62x.c +++ b/src/emu/cpu/pic16c62x/pic16c62x.c @@ -1176,4 +1176,3 @@ void pic16c62x_device::device_reset() pic16c62x_reset_regs(); SET(STATUS, (TO_FLAG | PD_FLAG)); } - diff --git a/src/emu/cpu/pic16c62x/pic16c62x.h b/src/emu/cpu/pic16c62x/pic16c62x.h index 4e2e1ab3e89..a0e924b19de 100644 --- a/src/emu/cpu/pic16c62x/pic16c62x.h +++ b/src/emu/cpu/pic16c62x/pic16c62x.h @@ -227,8 +227,8 @@ public: class pic16cr620a_device : public pic16c62x_device { public: - // construction/destruction - pic16cr620a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + // construction/destruction + pic16cr620a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); }*/; class pic16c621_device : public pic16c62x_device diff --git a/src/emu/cpu/pps4/pps4.c b/src/emu/cpu/pps4/pps4.c index 3379dd2d413..84ace009839 100644 --- a/src/emu/cpu/pps4/pps4.c +++ b/src/emu/cpu/pps4/pps4.c @@ -367,4 +367,3 @@ void pps4_device::device_reset() m_SB.d = 0; m_B.d = 0; } - diff --git a/src/emu/cpu/psx/rcnt.h b/src/emu/cpu/psx/rcnt.h index d1477a91e5c..336109dd5d9 100644 --- a/src/emu/cpu/psx/rcnt.h +++ b/src/emu/cpu/psx/rcnt.h @@ -65,7 +65,7 @@ private: UINT16 root_current( int n_counter ); int root_target( int n_counter ); void root_timer_adjust( int n_counter ); - + devcb2_write_line m_irq0_handler; devcb2_write_line m_irq1_handler; devcb2_write_line m_irq2_handler; diff --git a/src/emu/cpu/rsp/rspdrc.c b/src/emu/cpu/rsp/rspdrc.c index 479d10d3786..eaa62b8d124 100644 --- a/src/emu/cpu/rsp/rspdrc.c +++ b/src/emu/cpu/rsp/rspdrc.c @@ -6167,4 +6167,3 @@ CPU_GET_INFO( rsp_drc ) } DEFINE_LEGACY_CPU_DEVICE(RSP_DRC, rsp_drc); - diff --git a/src/emu/cpu/s2650/s2650.c b/src/emu/cpu/s2650/s2650.c index a0ad6bc71c7..64b71fc4e0a 100644 --- a/src/emu/cpu/s2650/s2650.c +++ b/src/emu/cpu/s2650/s2650.c @@ -1564,4 +1564,3 @@ void s2650_device::execute_run() } } while( m_icount > 0 ); } - diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c index d90363c0f83..e866a83e910 100644 --- a/src/emu/cpu/sh2/sh2comn.c +++ b/src/emu/cpu/sh2/sh2comn.c @@ -17,11 +17,11 @@ INLINE sh2_state *GET_SH2(device_t *dev) { - if (dev->machine().options().drc()) { + if (dev->machine().options().drc()) { return *(sh2_state **)downcast<legacy_cpu_device *>(dev)->token(); - } else { + } else { return (sh2_state *)downcast<legacy_cpu_device *>(dev)->token(); - } + } } static const int div_tab[4] = { 3, 5, 7, 0 }; @@ -844,7 +844,7 @@ void sh2_set_irq_line(sh2_state *sh2, int irqline, int state) sh2_exception(sh2, "Set IRQ line", 16); if (sh2->isdrc) - sh2->pending_nmi = 1; + sh2->pending_nmi = 1; } } else diff --git a/src/emu/cpu/sh2/sh2comn.h b/src/emu/cpu/sh2/sh2comn.h index 64cadf3b965..6a1218ae2b5 100644 --- a/src/emu/cpu/sh2/sh2comn.h +++ b/src/emu/cpu/sh2/sh2comn.h @@ -117,7 +117,7 @@ struct sh2_state UINT32 irqsr; // IRQ-time old SR for DRC UINT32 target; // target for jmp/jsr/etc so the delay slot can't kill it irq_entry irq_queue[16]; - + bool isdrc; int pcfsel; // last pcflush entry set diff --git a/src/emu/cpu/sh2/sh2fe.c b/src/emu/cpu/sh2/sh2fe.c index e5981966ca6..688b729c8ff 100644 --- a/src/emu/cpu/sh2/sh2fe.c +++ b/src/emu/cpu/sh2/sh2fe.c @@ -760,4 +760,3 @@ bool sh2_frontend::describe_group_12(opcode_desc &desc, const opcode_desc *prev, return false; } - diff --git a/src/emu/cpu/tlcs900/tlcs900.c b/src/emu/cpu/tlcs900/tlcs900.c index db55b567bc9..ac9f4e09f56 100644 --- a/src/emu/cpu/tlcs900/tlcs900.c +++ b/src/emu/cpu/tlcs900/tlcs900.c @@ -2168,4 +2168,3 @@ void tmp95c063_device::execute_set_input(int input, int level) } m_check_irqs = 1; } - diff --git a/src/emu/cpu/tms32082/dis_mp.c b/src/emu/cpu/tms32082/dis_mp.c index 6c50536ce0a..0bcb5a79788 100644 --- a/src/emu/cpu/tms32082/dis_mp.c +++ b/src/emu/cpu/tms32082/dis_mp.c @@ -16,10 +16,10 @@ static const char *BCND_CONDITION[32] = static const char *BITNUM_CONDITION[32] = { - "eq.b", "ne.b", "gt.b", "le.b", "lt.b", "ge.b", "hi.b", "ls.b", - "lo.b", "hs.b", "eq.h", "ne.h", "gt.h", "le.h", "lt.h", "ge.h", - "hi.h", "ls.h", "lo.h", "hs.h", "eq.w", "ne.w", "gt.w", "le.w", - "lt.w", "ge.w", "hi.w", "ls.w", "lo.w", "hs.w", "?", "?", + "eq.b", "ne.b", "gt.b", "le.b", "lt.b", "ge.b", "hi.b", "ls.b", + "lo.b", "hs.b", "eq.h", "ne.h", "gt.h", "le.h", "lt.h", "ge.h", + "hi.h", "ls.h", "lo.h", "hs.h", "eq.w", "ne.w", "gt.w", "le.w", + "lt.w", "ge.w", "hi.w", "ls.w", "lo.w", "hs.w", "?", "?", }; static const char *MEMOP_S[2] = @@ -156,8 +156,8 @@ static char* format_vector_op(UINT32 op, UINT32 imm32) b += sprintf(b, "vrnd.%s%s 0x%08X, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[pd4], imm32, rs); break; - case 0xca: b += sprintf(b, "vrnd.%s%s R%d, R%d", FLOATOP_PRECISION[2 + p1], FLOATOP_PRECISION[pd2],src1, rs); break; - case 0xcb: b += sprintf(b, "vrnd.%s%s 0x%08X, R%d", FLOATOP_PRECISION[2 + p1], FLOATOP_PRECISION[pd2], imm32, rs); break; + case 0xca: b += sprintf(b, "vrnd.%s%s R%d, R%d", FLOATOP_PRECISION[2 + p1], FLOATOP_PRECISION[pd2],src1, rs); break; + case 0xcb: b += sprintf(b, "vrnd.%s%s 0x%08X, R%d", FLOATOP_PRECISION[2 + p1], FLOATOP_PRECISION[pd2], imm32, rs); break; case 0xcc: case 0xdc: b += sprintf(b, "vmac.ss%s R%d, R%d, %s, %s", FLOATOP_PRECISION[(op >> 9) & 1], src1, rs, z ? "0" : ACC_SEL[acc], (regdest && rd == 0) ? ACC_SEL[acc] : dest); @@ -172,7 +172,7 @@ static char* format_vector_op(UINT32 op, UINT32 imm32) b += sprintf(b, "vmsc.ss%s 0x%08X, R%d, %s, %s", FLOATOP_PRECISION[(op >> 9) & 1], imm32, rs, z ? "0" : ACC_SEL[acc], (regdest && rd == 0) ? ACC_SEL[acc] : dest); break; - default: b += sprintf(b, "?"); break; + default: b += sprintf(b, "?"); break; } // align the line end @@ -183,17 +183,17 @@ static char* format_vector_op(UINT32 op, UINT32 imm32) { b += sprintf(b, " "); } - } + } // optional load/store op switch (vector_ls_bits) { - case 0x01: b += sprintf(b, "|| vst.s R%d", rd); break; - case 0x03: b += sprintf(b, "|| vst.d R%d", rd); break; - case 0x04: b += sprintf(b, "|| vld0.s R%d", rd); break; - case 0x05: b += sprintf(b, "|| vld1.s R%d", rd); break; - case 0x06: b += sprintf(b, "|| vld0.d R%d", rd); break; - case 0x07: b += sprintf(b, "|| vld1.d R%d", rd); break; + case 0x01: b += sprintf(b, "|| vst.s R%d", rd); break; + case 0x03: b += sprintf(b, "|| vst.d R%d", rd); break; + case 0x04: b += sprintf(b, "|| vld0.s R%d", rd); break; + case 0x05: b += sprintf(b, "|| vld1.s R%d", rd); break; + case 0x06: b += sprintf(b, "|| vld0.d R%d", rd); break; + case 0x07: b += sprintf(b, "|| vld1.d R%d", rd); break; } return buffer; @@ -226,30 +226,30 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom) switch (subop) { - case 0x00: print("illop0 "); break; - case 0x01: print("trap %d", UIMM15(uimm15)); break; - case 0x02: print("cmnd 0x%04X", UIMM15(uimm15)); break; - case 0x04: print("rdcr %s, R%d", get_creg_name(UIMM15(uimm15)), rd); break; - case 0x05: print("swcr R%d, %s, R%d", rd, get_creg_name(UIMM15(uimm15)), rs); break; - case 0x06: print("brcr %s", get_creg_name(UIMM15(uimm15))); break; - case 0x08: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x09: print("shift%s.dm %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x0a: print("shift%s.ds %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x0b: print("shift%s.ez %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x0c: print("shift%s.em %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x0d: print("shift%s.es %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x0e: print("shift%s.iz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x0f: print("shift%s.im %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; - case 0x11: print("and 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x12: print("and.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x14: print("and.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x16: print("xor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x17: print("or 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x18: print("and.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x19: print("xnor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x1b: print("or.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x1d: print("or.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; - case 0x1e: print("or.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x00: print("illop0 "); break; + case 0x01: print("trap %d", UIMM15(uimm15)); break; + case 0x02: print("cmnd 0x%04X", UIMM15(uimm15)); break; + case 0x04: print("rdcr %s, R%d", get_creg_name(UIMM15(uimm15)), rd); break; + case 0x05: print("swcr R%d, %s, R%d", rd, get_creg_name(UIMM15(uimm15)), rs); break; + case 0x06: print("brcr %s", get_creg_name(UIMM15(uimm15))); break; + case 0x08: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x09: print("shift%s.dm %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x0a: print("shift%s.ds %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x0b: print("shift%s.ez %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x0c: print("shift%s.em %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x0d: print("shift%s.es %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x0e: print("shift%s.iz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x0f: print("shift%s.im %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; + case 0x11: print("and 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x12: print("and.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x14: print("and.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x16: print("xor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x17: print("or 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x18: print("and.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x19: print("xnor 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x1b: print("or.tf 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x1d: print("or.ft 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; + case 0x1e: print("or.ff 0x%04X, R%d, R%d", UIMM15(uimm15), rs, rd); break; case 0x24: case 0x20: print("ld.b 0x%04X(R%d%s), R%d", UIMM15(uimm15), rs, MEMOP_M[m], rd); @@ -283,23 +283,23 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom) print("st.d R%d, 0x%04X(R%d%s)", rd, UIMM15(uimm15), rs, MEMOP_M[m]); break; - case 0x40: print("bsr 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break; - case 0x41: print("bsr.a 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break; - case 0x44: print("jsr 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break; - case 0x45: print("jsr.a 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break; - case 0x48: print("bbz 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x49: print("bbz.a 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x4a: print("bbo 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x4b: print("bbo.a 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x4c: print("bcnd 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break; - case 0x4d: print("bcnd.a 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break; - case 0x50: print("cmp 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; - case 0x58: print("add 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; - case 0x59: print("addu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; - case 0x5a: print("sub 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; - case 0x5b: print("subu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; - - default: print("?"); break; + case 0x40: print("bsr 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break; + case 0x41: print("bsr.a 0x%08X, R%d", pc + (SIMM15(uimm15) * 4), link); break; + case 0x44: print("jsr 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break; + case 0x45: print("jsr.a 0x%04X(R%d), R%d", SIMM15(uimm15), rs, link); break; + case 0x48: print("bbz 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x49: print("bbz.a 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x4a: print("bbo 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x4b: print("bbo.a 0x%08X, R%d, %s (%d)", pc + (SIMM15(uimm15) * 4), rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x4c: print("bcnd 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break; + case 0x4d: print("bcnd.a 0x%08X, R%d, %s", pc + (SIMM15(uimm15) * 4), rs, BCND_CONDITION[rd]); break; + case 0x50: print("cmp 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; + case 0x58: print("add 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; + case 0x59: print("addu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; + case 0x5a: print("sub 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; + case 0x5b: print("subu 0x%08X, R%d, R%d", SIMM15(uimm15), rs, rd); break; + + default: print("?"); break; } break; } @@ -324,16 +324,16 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom) switch (subop) { - case 0x02: print("trap %d", src1); break; - case 0x03: print("trap %d", imm32); break; - case 0x04: print("cmnd R%d", src1); break; - case 0x05: print("cmnd 0x%08X", imm32); break; - case 0x08: print("rdcr R%d, R%d,", src1, rd); break; - case 0x09: print("rdcr %s, R%d", get_creg_name(imm32), rd); break; - case 0x0a: print("swcr R%d, R%d, R%d", rd, src1, rs); break; - case 0x0b: print("swcr R%d, %s, R%d", rd, get_creg_name(imm32), rs); break; - case 0x0c: print("brcr R%d", src1); break; - case 0x0d: print("brcr %s", get_creg_name(imm32)); break; + case 0x02: print("trap %d", src1); break; + case 0x03: print("trap %d", imm32); break; + case 0x04: print("cmnd R%d", src1); break; + case 0x05: print("cmnd 0x%08X", imm32); break; + case 0x08: print("rdcr R%d, R%d,", src1, rd); break; + case 0x09: print("rdcr %s, R%d", get_creg_name(imm32), rd); break; + case 0x0a: print("swcr R%d, R%d, R%d", rd, src1, rs); break; + case 0x0b: print("swcr R%d, %s, R%d", rd, get_creg_name(imm32), rs); break; + case 0x0c: print("brcr R%d", src1); break; + case 0x0d: print("brcr %s", get_creg_name(imm32)); break; case 0x10: print("shift%s.dz %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; case 0x12: print("shift%s.dm %d, %d, R%d, R%d", (op & (1 << 10)) ? "r" : "l", rotate, endmask, rs, rd); break; @@ -434,69 +434,69 @@ static offs_t tms32082_disasm_mp(char *buffer, offs_t pc, const UINT8 *oprom) print("dcache 0x%08X(R%d)", imm32, rs); break; - case 0x80: print("bsr R%d, R%d", src1, link); break; - case 0x81: print("bsr 0x%08X, R%d", imm32, link); break; - case 0x82: print("bsr.a R%d, R%d", src1, rd); break; - case 0x83: print("bsr.a 0x%08X, R%d", imm32, link); break; - case 0x88: print("jsr R%d, R%d", src1, link); break; - case 0x89: print("jsr 0x%08X, R%d", imm32, link); break; - case 0x8a: print("jsr.a R%d, R%d", src1, link); break; - case 0x8b: print("jsr.a 0x%08X, R%d", imm32, link); break; - case 0x90: print("bbz R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x91: print("bbz 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x92: print("bbz.a R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x93: print("bbz.a 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x94: print("bbo R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x95: print("bbo 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x96: print("bbo.a R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x97: print("bbo.a 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; - case 0x98: print("bcnd R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break; - case 0x99: print("bcnd 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break; - case 0x9a: print("bcnd.a R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break; - case 0x9b: print("bcnd.a 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break; - case 0xa0: print("cmp R%d, R%d, R%d", src1, rs, rd); break; - case 0xa1: print("cmp 0x%08X, R%d, R%d", imm32, rs, rd); break; - case 0xb0: print("add R%d, R%d, R%d", src1, rs, rd); break; - case 0xb1: print("add 0x%08X, R%d, R%d", imm32, rs, rd); break; - case 0xb2: print("addu R%d, R%d, R%d", src1, rs, rd); break; - case 0xb3: print("addu 0x%08X, R%d, R%d", imm32, rs, rd); break; - case 0xb4: print("sub R%d, R%d, R%d", src1, rs, rd); break; - case 0xb5: print("sub 0x%08X, R%d, R%d", imm32, rs, rd); break; - case 0xb6: print("subu R%d, R%d, R%d", src1, rs, rd); break; - case 0xb7: print("subu 0x%08X, R%d, R%d", imm32, rs, rd); break; + case 0x80: print("bsr R%d, R%d", src1, link); break; + case 0x81: print("bsr 0x%08X, R%d", imm32, link); break; + case 0x82: print("bsr.a R%d, R%d", src1, rd); break; + case 0x83: print("bsr.a 0x%08X, R%d", imm32, link); break; + case 0x88: print("jsr R%d, R%d", src1, link); break; + case 0x89: print("jsr 0x%08X, R%d", imm32, link); break; + case 0x8a: print("jsr.a R%d, R%d", src1, link); break; + case 0x8b: print("jsr.a 0x%08X, R%d", imm32, link); break; + case 0x90: print("bbz R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x91: print("bbz 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x92: print("bbz.a R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x93: print("bbz.a 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x94: print("bbo R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x95: print("bbo 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x96: print("bbo.a R%d, R%d, %s (%d)", src1, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x97: print("bbo.a 0x%08X, R%d, %s (%d)", imm32, rs, BITNUM_CONDITION[bitnum], bitnum); break; + case 0x98: print("bcnd R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break; + case 0x99: print("bcnd 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break; + case 0x9a: print("bcnd.a R%d, R%d, %s", src1, rs, BCND_CONDITION[rd]); break; + case 0x9b: print("bcnd.a 0x%08X, R%d, %s", imm32, rs, BCND_CONDITION[rd]); break; + case 0xa0: print("cmp R%d, R%d, R%d", src1, rs, rd); break; + case 0xa1: print("cmp 0x%08X, R%d, R%d", imm32, rs, rd); break; + case 0xb0: print("add R%d, R%d, R%d", src1, rs, rd); break; + case 0xb1: print("add 0x%08X, R%d, R%d", imm32, rs, rd); break; + case 0xb2: print("addu R%d, R%d, R%d", src1, rs, rd); break; + case 0xb3: print("addu 0x%08X, R%d, R%d", imm32, rs, rd); break; + case 0xb4: print("sub R%d, R%d, R%d", src1, rs, rd); break; + case 0xb5: print("sub 0x%08X, R%d, R%d", imm32, rs, rd); break; + case 0xb6: print("subu R%d, R%d, R%d", src1, rs, rd); break; + case 0xb7: print("subu 0x%08X, R%d, R%d", imm32, rs, rd); break; case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xd6: case 0xc7: case 0xd7: case 0xc8: case 0xd8: case 0xc9: case 0xd9: - case 0xca: case 0xcb: case 0xcc: case 0xdc: case 0xcd: case 0xdd: case 0xce: case 0xde: + case 0xca: case 0xcb: case 0xcc: case 0xdc: case 0xcd: case 0xdd: case 0xce: case 0xde: case 0xcf: case 0xdf: { print("%s", format_vector_op(op, imm32)); break; } - case 0xe0: print("fadd.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; - case 0xe1: print("fadd.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; - case 0xe2: print("fsub.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; - case 0xe3: print("fsub.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; - case 0xe4: print("fmpy.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; - case 0xe5: print("fmpy.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; - case 0xe6: print("fdiv.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; - case 0xe7: print("fdiv.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; - case 0xe8: print("frnd%s.%s%s R%d, R%d", FLOATOP_ROUND[rndmode], FLOATOP_PRECISION[p1], FLOATOP_PRECISION[pd], src1, rd); break; - case 0xe9: print("frnd%s.%s%s 0x%08X, R%d", FLOATOP_ROUND[rndmode], FLOATOP_PRECISION[p1], FLOATOP_PRECISION[pd], imm32, rd); break; - case 0xea: print("fcmp R%d, R%d, R%d", src1, rs, rd); break; - case 0xeb: print("fcmp 0x%08X, R%d, R%d", imm32, rs, rd); break; - case 0xee: print("fsqrt R%d, R%d", src1, rd); break; - case 0xef: print("fsqrt 0x%08X, R%d", imm32, rd); break; - case 0xf0: print("lmo R%d, R%d", rs, rd); break; - case 0xf2: print("rmo R%d, R%d", rs, rd); break; - case 0xfc: print("estop "); break; - + case 0xe0: print("fadd.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; + case 0xe1: print("fadd.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; + case 0xe2: print("fsub.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; + case 0xe3: print("fsub.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; + case 0xe4: print("fmpy.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; + case 0xe5: print("fmpy.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; + case 0xe6: print("fdiv.%s%s%s R%d, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], src1, rs, rd); break; + case 0xe7: print("fdiv.%s%s%s 0x%08X, R%d, R%d", FLOATOP_PRECISION[p1], FLOATOP_PRECISION[p2], FLOATOP_PRECISION[pd], imm32, rs, rd); break; + case 0xe8: print("frnd%s.%s%s R%d, R%d", FLOATOP_ROUND[rndmode], FLOATOP_PRECISION[p1], FLOATOP_PRECISION[pd], src1, rd); break; + case 0xe9: print("frnd%s.%s%s 0x%08X, R%d", FLOATOP_ROUND[rndmode], FLOATOP_PRECISION[p1], FLOATOP_PRECISION[pd], imm32, rd); break; + case 0xea: print("fcmp R%d, R%d, R%d", src1, rs, rd); break; + case 0xeb: print("fcmp 0x%08X, R%d, R%d", imm32, rs, rd); break; + case 0xee: print("fsqrt R%d, R%d", src1, rd); break; + case 0xef: print("fsqrt 0x%08X, R%d", imm32, rd); break; + case 0xf0: print("lmo R%d, R%d", rs, rd); break; + case 0xf2: print("rmo R%d, R%d", rs, rd); break; + case 0xfc: print("estop "); break; + case 0xfe: case 0xff: print("illopF "); break; - default: print("?"); break; + default: print("?"); break; } break; } diff --git a/src/emu/cpu/tms32082/dis_pp.c b/src/emu/cpu/tms32082/dis_pp.c index 01397ac39d3..cd63a3c2559 100644 --- a/src/emu/cpu/tms32082/dis_pp.c +++ b/src/emu/cpu/tms32082/dis_pp.c @@ -6,37 +6,37 @@ static const char *REG_NAMES[128] = { // 0 - 15 - "a0", "a1", "a2", "a3", "a4", "???", "a6", "a7", - "a8", "a9", "a10", "a11", "a12", "???", "a14", "a15", + "a0", "a1", "a2", "a3", "a4", "???", "a6", "a7", + "a8", "a9", "a10", "a11", "a12", "???", "a14", "a15", // 16 - 31 - "x0", "x1", "x2", "???", "???", "???", "???", "???", - "x8", "x9", "x10", "???", "???", "???", "???", "???", + "x0", "x1", "x2", "???", "???", "???", "???", "???", + "x8", "x9", "x10", "???", "???", "???", "???", "???", // 32 - 47 - "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", - "???", "sr", "mf", "???", "???", "???", "???", "???", + "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", + "???", "sr", "mf", "???", "???", "???", "???", "???", // 48 - 63 - "???", "???", "???", "???", "???", "???", "???", "???", - "pc/call", "ipa/br", "ipe", "iprs", "inten", "intflg", "comm", "lctl", + "???", "???", "???", "???", "???", "???", "???", "???", + "pc/call", "ipa/br", "ipe", "iprs", "inten", "intflg", "comm", "lctl", // 64 - 79 - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", // 80 - 95 - "???", "???", "???", "???", "???", "???", "???", "???", - "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", + "???", "???", "???", "???", "???", "???", "???", "???", // 96 - 111 - "lc0", "lc1", "lc2", "???", "lr0", "lr1", "lr2", "???", - "lrse0", "lrse1", "lrse2", "???", "lrs0", "lrs1", "lrs2", "???", + "lc0", "lc1", "lc2", "???", "lr0", "lr1", "lr2", "???", + "lrse0", "lrse1", "lrse2", "???", "lrs0", "lrs1", "lrs2", "???", // 112 - 127 - "ls0", "ls1", "ls2", "???", "le0", "le1", "le2", "???", - "???", "???", "???", "???", "tag0", "tag1", "tag2", "tag3" + "ls0", "ls1", "ls2", "???", "le0", "le1", "le2", "???", + "???", "???", "???", "???", "tag0", "tag1", "tag2", "tag3" }; static const char *CONDITION_CODES[16] = { - "", "[p] ", "[ls] ", "[hi] ", - "[lt] ", "[le] ", "[ge] ", "[gt] ", - "[hs] ", "[lo] ", "[eq] ", "[ne] ", - "[v] ", "[nv] ", "[n] ", "[nn] " + "", "[p] ", "[ls] ", "[hi] ", + "[lt] ", "[le] ", "[ge] ", "[gt] ", + "[hs] ", "[lo] ", "[eq] ", "[ne] ", + "[v] ", "[nv] ", "[n] ", "[nn] " }; static const char *TRANSFER_SIZE[4] = @@ -103,7 +103,7 @@ static void format_transfer(UINT64 op) switch (gmode) { - case 0x00: // Format 7: Conditional DU || Conditional Move + case 0x00: // Format 7: Conditional DU || Conditional Move { int dstbank = (op >> 18) & 0xf; int srcbank = (op >> 6) & 0xf; @@ -117,14 +117,14 @@ static void format_transfer(UINT64 op) b += sprintf(b, "%s = %s", REG_NAMES[dreg], REG_NAMES[sreg]); break; } - case 0x01: // Format 8: Conditional DU ||Conditional Field Move + case 0x01: // Format 8: Conditional DU ||Conditional Field Move { int dstbank = (op >> 18) & 0xf; int src = (op >> 10) & 0x7; int dst = (op >> 3) & 0x7; int itm = (op >> 22) & 0x3; int size = (op >> 7) & 0x3; - // int e = (op & (1 << 9)); + // int e = (op & (1 << 9)); int dreg = (dstbank << 3) | dst; int sreg = (4 << 3) | src; @@ -133,7 +133,7 @@ static void format_transfer(UINT64 op) b += sprintf(b, "%s = [%s%d]%s", REG_NAMES[dreg], TRANSFER_SIZE[size], itm, REG_NAMES[sreg]); break; } - case 0x02: case 0x03: // Format 10: Conditional Non-D Data Unit + case 0x02: case 0x03: // Format 10: Conditional Non-D Data Unit { int as1bank = (op >> 6) & 0xf; int adstbank = (op >> 18) & 0xf; @@ -156,7 +156,7 @@ static void format_transfer(UINT64 op) } default: { - if (op & 0x4) // Format 9: Conditional DU || Conditional Global + if (op & 0x4) // Format 9: Conditional DU || Conditional Global { int bank = (op >> 18) & 0xf; int le = ((op >> 16) & 2) | ((op >> 9) & 1); @@ -178,7 +178,7 @@ static void format_transfer(UINT64 op) case 3: b += sprintf(b, "%s = &%s%s", REG_NAMES[greg], TRANSFER_SIZE[size], format_address_mode(gmode, ga, s, gimx)); break; } } - else // Format 5: Global (Long Offset) + else // Format 5: Global (Long Offset) { int bank = (op >> 18) & 0xf; int le = ((op >> 16) & 2) | ((op >> 9) & 1); @@ -194,7 +194,7 @@ static void format_transfer(UINT64 op) // sign extend offset if (s && (offset & 0x4000)) offset |= 0xffffc000; - + switch (le) { case 0: b += sprintf(b, "&%s%s = %s", TRANSFER_SIZE[size], format_address_mode(gmode, ga, s, offset), REG_NAMES[greg]); break; @@ -215,17 +215,17 @@ static void format_transfer(UINT64 op) switch (mode) { - case 0x00: // Format 2: Move || Local + case 0x00: // Format 2: Move || Local { b += sprintf(b, "move||local <TODO>"); break; } - case 0x01: // Format 3: Field Move || Local + case 0x01: // Format 3: Field Move || Local { b += sprintf(b, "field move||local <TODO>"); break; } - case 0x02: case 0x03: // Format 6: Non-D DU || Local + case 0x02: case 0x03: // Format 6: Non-D DU || Local { int d = (op >> 32) & 0x7; int s = (op & (1 << 28)); @@ -245,7 +245,7 @@ static void format_transfer(UINT64 op) } break; } - case 0x10: case 0x11: case 0x12: case 0x13: // Format 4: Local (Long Offset) + case 0x10: case 0x11: case 0x12: case 0x13: // Format 4: Local (Long Offset) { int d = (op >> 32) & 0x7; int bank = (op >> 18) & 0xf; @@ -277,7 +277,7 @@ static void format_transfer(UINT64 op) } break; } - case 0x14: case 0x15: case 0x16: case 0x17: // Format 1: Double Parallel + case 0x14: case 0x15: case 0x16: case 0x17: // Format 1: Double Parallel case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: { @@ -329,83 +329,83 @@ static void format_transfer(UINT64 op) static void format_alu_op(int aluop, int a, const char *dst_text, const char *a_text, const char *b_text, const char *c_text) { - if (a) // arithmetic + if (a) // arithmetic { int bits = (aluop & 1) | ((aluop >> 1) & 2) | ((aluop >> 2) & 4) | ((aluop >> 3) & 8); switch (bits) { - case 1: print("%s = %s - %s<1<", dst_text, a_text, b_text); break; - case 2: print("%s = %s + %s<0<", dst_text, a_text, b_text); break; - case 3: print("%s = %s - %s", dst_text, a_text, c_text); break; - case 4: print("%s = %s - %s>1>", dst_text, a_text, b_text); break; - case 5: print("%s = %s - %s", dst_text, a_text, b_text); break; - case 6: print("?"); break; - case 7: print("%s = %s - %s>0>", dst_text, a_text, b_text); break; - case 8: print("%s = %s + %s>0>", dst_text, a_text, b_text); break; - case 9: print("?"); break; - case 10: print("%s = %s + %s", dst_text, a_text, b_text); break; - case 11: print("%s = %s + %s>1>", dst_text, a_text, b_text); break; - case 12: print("%s = %s + %s", dst_text, a_text, c_text); break; - case 13: print("%s = %s - %s<0<", dst_text, a_text, b_text); break; - case 14: print("%s = %s + %s<1<", dst_text, a_text, b_text); break; - case 15: print("%s = field %s + %s", dst_text, a_text, b_text); break; + case 1: print("%s = %s - %s<1<", dst_text, a_text, b_text); break; + case 2: print("%s = %s + %s<0<", dst_text, a_text, b_text); break; + case 3: print("%s = %s - %s", dst_text, a_text, c_text); break; + case 4: print("%s = %s - %s>1>", dst_text, a_text, b_text); break; + case 5: print("%s = %s - %s", dst_text, a_text, b_text); break; + case 6: print("?"); break; + case 7: print("%s = %s - %s>0>", dst_text, a_text, b_text); break; + case 8: print("%s = %s + %s>0>", dst_text, a_text, b_text); break; + case 9: print("?"); break; + case 10: print("%s = %s + %s", dst_text, a_text, b_text); break; + case 11: print("%s = %s + %s>1>", dst_text, a_text, b_text); break; + case 12: print("%s = %s + %s", dst_text, a_text, c_text); break; + case 13: print("%s = %s - %s<0<", dst_text, a_text, b_text); break; + case 14: print("%s = %s + %s<1<", dst_text, a_text, b_text); break; + case 15: print("%s = field %s + %s", dst_text, a_text, b_text); break; } } - else // boolean + else // boolean { switch (aluop) { - case 0xaa: // A & B & C | A & ~B & C | A & B & ~C | A & ~B & ~C = A + case 0xaa: // A & B & C | A & ~B & C | A & B & ~C | A & ~B & ~C = A print("%s = %s", dst_text, a_text); break; - case 0x55: // ~A & B & C | ~A & ~B & C | ~A & B & ~C | ~A & ~B & ~C = ~A + case 0x55: // ~A & B & C | ~A & ~B & C | ~A & B & ~C | ~A & ~B & ~C = ~A print("%s = ~%s", dst_text, a_text); break; - case 0xcc: // A & B & C | ~A & B & C | A & B & ~C | ~A & B & ~C = B + case 0xcc: // A & B & C | ~A & B & C | A & B & ~C | ~A & B & ~C = B print("%s = %s", dst_text, b_text); break; - case 0x33: // A & ~B & C | ~A & ~B & C | A & ~B & ~C | ~A & ~B & ~C = ~B + case 0x33: // A & ~B & C | ~A & ~B & C | A & ~B & ~C | ~A & ~B & ~C = ~B print("%s = %s", dst_text, b_text); break; - case 0xf0: // A & B & C | ~A & B & C | A & ~B & C | ~A & ~B & C = C + case 0xf0: // A & B & C | ~A & B & C | A & ~B & C | ~A & ~B & C = C print("%s = %s", dst_text, c_text); break; - case 0x0f: // A & B & ~C | ~A & B & ~C | A & ~B & ~C | ~A & ~B & ~C = ~C + case 0x0f: // A & B & ~C | ~A & B & ~C | A & ~B & ~C | ~A & ~B & ~C = ~C print("%s = ~%s", dst_text, c_text); break; - case 0x80: // A & B & C + case 0x80: // A & B & C print("%s = %s & %s & %s", dst_text, a_text, b_text, c_text); break; - case 0x88: // A & B & C | A & B & ~C = A & B + case 0x88: // A & B & C | A & B & ~C = A & B print("%s = %s & %s", dst_text, a_text, b_text); break; - case 0xa0: // A & B & C | A & ~B & C = A & C + case 0xa0: // A & B & C | A & ~B & C = A & C print("%s = %s & %s", dst_text, a_text, c_text); break; - case 0xc0: // A & B & C | ~A & B & C = B & C + case 0xc0: // A & B & C | ~A & B & C = B & C print("%s = %s & %s", dst_text, b_text, c_text); break; - case 0xea: // A & B & C | ~A & B & C | A & ~B & C | + case 0xea: // A & B & C | ~A & B & C | A & ~B & C | // A & B & ~C | A & ~B & ~C = A | C print("%s = %s | %s", dst_text, a_text, c_text); break; - case 0xee: // A & B & C | ~A & B & C | A & ~B & C | + case 0xee: // A & B & C | ~A & B & C | A & ~B & C | // A & B & ~C | ~A & B & ~C | A & ~B & ~C = A | B print("%s = %s | %s", dst_text, a_text, b_text); break; - case 0x44: // ~A & B & C | ~A & B & ~C = ~A & B + case 0x44: // ~A & B & C | ~A & B & ~C = ~A & B print("%s = ~%s & %s", dst_text, a_text, b_text); break; @@ -420,14 +420,14 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom) { output = buffer; UINT32 flags = 0; - + UINT64 op = ((UINT64)(oprom[0]) << 56) | ((UINT64)(oprom[1]) << 48) | ((UINT64)(oprom[2]) << 40) | ((UINT64)(oprom[3]) << 32) | ((UINT64)(oprom[4]) << 24) | ((UINT64)(oprom[5]) << 16) | ((UINT64)(oprom[6]) << 8) | ((UINT64)(oprom[7])); switch (op >> 60) { case 0x6: - case 0x7: // Six-operand + case 0x7: // Six-operand { print("A: six operand <TODO>"); break; @@ -452,7 +452,7 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom) case 0x00: print("nop"); break; case 0x02: print("eint"); break; case 0x03: print("dint"); break; - default: print("<reserved>"); break; + default: print("<reserved>"); break; } format_transfer(parallel_xfer); @@ -467,7 +467,7 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom) switch ((op >> 43) & 3) { case 0: - case 1: // Base set ALU (5-bit immediate) + case 1: // Base set ALU (5-bit immediate) { UINT64 parallel_xfer = (op & U64(0x0000007fffffffff)); @@ -545,8 +545,8 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom) format_transfer(parallel_xfer); break; } - - case 2: // Base set ALU (reg src2) + + case 2: // Base set ALU (reg src2) { UINT64 parallel_xfer = (op & U64(0x0000007fffffffff)); @@ -625,8 +625,8 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom) format_transfer(parallel_xfer); break; } - - case 3: // Base set ALU (32-bit immediate) + + case 3: // Base set ALU (32-bit immediate) { int dst = (op >> 48) & 7; int src1 = (op >> 45) & 7; @@ -709,4 +709,4 @@ static offs_t tms32082_disasm_pp(char *buffer, offs_t pc, const UINT8 *oprom) CPU_DISASSEMBLE(tms32082_pp) { return tms32082_disasm_pp(buffer, pc, oprom); -}
\ No newline at end of file +} diff --git a/src/emu/cpu/tms32082/mp_ops.c b/src/emu/cpu/tms32082/mp_ops.c index b02cc1a5390..5f79cb2379c 100644 --- a/src/emu/cpu/tms32082/mp_ops.c +++ b/src/emu/cpu/tms32082/mp_ops.c @@ -32,7 +32,7 @@ #define SIGN16(x) (((x) & 0x8000) ? 1 : 0) #define SIGN8(x) (((x) & 0x80) ? 1 : 0) -#define SIGN_EXTEND(x, r) ((x) | (((x) & (0x80000000 >> r)) ? ((INT32)(0x80000000) >> r) : 0)) +#define SIGN_EXTEND(x, r) ((x) | (((x) & (0x80000000 >> r)) ? ((INT32)(0x80000000) >> r) : 0)) @@ -95,38 +95,38 @@ UINT32 tms32082_mp_device::calculate_cmp(UINT32 src1, UINT32 src2) UINT32 flags = 0; // 32-bits (bits 20-29) - flags |= ((~c32) & 1) << 29; // higher than or same (C) - flags |= ((c32) & 1) << 28; // lower than (~C) - flags |= ((c32|z32) & 1) << 27; // lower than or same (~C|Z) - flags |= ((~c32&~z32) & 1) << 26; // higher than (C&~Z) - flags |= (((n32&v32)|(~n32&~v32)) & 1) << 25; // greater than or equal (N&V)|(~N&~V) - flags |= (((n32&~v32)|(~n32&v32)) & 1) << 24; // less than (N&~V)|(~N&V) - flags |= (((n32&~v32)|(~n32&v32)|(z32)) & 1) << 23; // less than or equal (N&~V)|(~N&V)|Z - flags |= (((n32&v32&~z32)|(~n32&~v32&~z32)) & 1) << 22; // greater than (N&V&~Z)|(~N&~V&~Z) - flags |= ((~z32) & 1) << 21; // not equal (~Z) - flags |= ((z32) & 1) << 20; // equal (Z) + flags |= ((~c32) & 1) << 29; // higher than or same (C) + flags |= ((c32) & 1) << 28; // lower than (~C) + flags |= ((c32|z32) & 1) << 27; // lower than or same (~C|Z) + flags |= ((~c32&~z32) & 1) << 26; // higher than (C&~Z) + flags |= (((n32&v32)|(~n32&~v32)) & 1) << 25; // greater than or equal (N&V)|(~N&~V) + flags |= (((n32&~v32)|(~n32&v32)) & 1) << 24; // less than (N&~V)|(~N&V) + flags |= (((n32&~v32)|(~n32&v32)|(z32)) & 1) << 23; // less than or equal (N&~V)|(~N&V)|Z + flags |= (((n32&v32&~z32)|(~n32&~v32&~z32)) & 1) << 22; // greater than (N&V&~Z)|(~N&~V&~Z) + flags |= ((~z32) & 1) << 21; // not equal (~Z) + flags |= ((z32) & 1) << 20; // equal (Z) // 16-bits (bits 10-19) - flags |= ((~c16) & 1) << 19; // higher than or same (C) - flags |= ((c16) & 1) << 18; // lower than (~C) - flags |= ((c16|z16) & 1) << 17; // lower than or same (~C|Z) - flags |= ((~c16&~z16) & 1) << 16; // higher than (C&~Z) - flags |= (((n16&v16)|(~n16&~v16)) & 1) << 15; // greater than or equal (N&V)|(~N&~V) - flags |= (((n16&~v16)|(~n16&v16)) & 1) << 14; // less than (N&~V)|(~N&V) - flags |= (((n16&~v16)|(~n16&v16)|(z16)) & 1) << 13; // less than or equal (N&~V)|(~N&V)|Z - flags |= (((n16&v16&~z16)|(~n16&~v16&~z16)) & 1) << 12; // greater than (N&V&~Z)|(~N&~V&~Z) - flags |= ((~z16) & 1) << 11; // not equal (~Z) - flags |= ((z16) & 1) << 10; // equal (Z) + flags |= ((~c16) & 1) << 19; // higher than or same (C) + flags |= ((c16) & 1) << 18; // lower than (~C) + flags |= ((c16|z16) & 1) << 17; // lower than or same (~C|Z) + flags |= ((~c16&~z16) & 1) << 16; // higher than (C&~Z) + flags |= (((n16&v16)|(~n16&~v16)) & 1) << 15; // greater than or equal (N&V)|(~N&~V) + flags |= (((n16&~v16)|(~n16&v16)) & 1) << 14; // less than (N&~V)|(~N&V) + flags |= (((n16&~v16)|(~n16&v16)|(z16)) & 1) << 13; // less than or equal (N&~V)|(~N&V)|Z + flags |= (((n16&v16&~z16)|(~n16&~v16&~z16)) & 1) << 12; // greater than (N&V&~Z)|(~N&~V&~Z) + flags |= ((~z16) & 1) << 11; // not equal (~Z) + flags |= ((z16) & 1) << 10; // equal (Z) // 8-bits (bits 0-9) - flags |= ((~c8) & 1) << 9; // higher than or same (C) - flags |= ((c8) & 1) << 8; // lower than (~C) - flags |= ((c8|z8) & 1) << 7; // lower than or same (~C|Z) - flags |= ((~c8&~z8) & 1) << 6; // higher than (C&~Z) - flags |= (((n8&v8)|(~n8&~v8)) & 1) << 5; // greater than or equal (N&V)|(~N&~V) - flags |= (((n8&~v8)|(~n8&v8)) & 1) << 4; // less than (N&~V)|(~N&V) - flags |= (((n8&~v8)|(~n8&v8)|(z8)) & 1) << 3; // less than or equal (N&~V)|(~N&V)|Z - flags |= (((n8&v8&~z8)|(~n8&~v8&~z8)) & 1) << 2; // greater than (N&V&~Z)|(~N&~V&~Z) - flags |= ((~z8) & 1) << 1; // not equal (~Z) - flags |= ((z8) & 1) << 0; // equal (Z) + flags |= ((~c8) & 1) << 9; // higher than or same (C) + flags |= ((c8) & 1) << 8; // lower than (~C) + flags |= ((c8|z8) & 1) << 7; // lower than or same (~C|Z) + flags |= ((~c8&~z8) & 1) << 6; // higher than (C&~Z) + flags |= (((n8&v8)|(~n8&~v8)) & 1) << 5; // greater than or equal (N&V)|(~N&~V) + flags |= (((n8&~v8)|(~n8&v8)) & 1) << 4; // less than (N&~V)|(~N&V) + flags |= (((n8&~v8)|(~n8&v8)|(z8)) & 1) << 3; // less than or equal (N&~V)|(~N&V)|Z + flags |= (((n8&v8&~z8)|(~n8&~v8&~z8)) & 1) << 2; // greater than (N&V&~Z)|(~N&~V&~Z) + flags |= ((~z8) & 1) << 1; // not equal (~Z) + flags |= ((z8) & 1) << 0; // equal (Z) return flags; } @@ -138,38 +138,38 @@ void tms32082_mp_device::vector_loadstore() switch (vector_ls_bits) { - case 0x01: // vst.s + case 0x01: // vst.s { m_program->write_dword(m_outp, m_reg[rd]); m_outp += 4; break; } - case 0x03: // vst.d + case 0x03: // vst.d { UINT64 data = m_fpair[rd >> 1]; m_program->write_qword(m_outp, data); m_outp += 8; break; } - case 0x04: // vld0.s + case 0x04: // vld0.s { m_reg[rd] = m_program->read_dword(m_in0p); m_in0p += 4; break; } - case 0x05: // vld1.s + case 0x05: // vld1.s { m_reg[rd] = m_program->read_dword(m_in1p); m_in1p += 4; break; } - case 0x06: // vld0.d + case 0x06: // vld0.d { m_fpair[rd >> 1] = m_program->read_qword(m_in0p); m_in0p += 8; break; } - case 0x07: // vld1.d + case 0x07: // vld1.d { m_fpair[rd >> 1] = m_program->read_qword(m_in1p); m_in1p += 8; @@ -186,7 +186,7 @@ void tms32082_mp_device::execute_short_imm() { switch ((m_ir >> 15) & 0x7f) { - case 0x02: // cmnd + case 0x02: // cmnd { UINT32 data = OP_UIMM15(); @@ -220,7 +220,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x06: // brcr + case 0x06: // brcr { int cr = OP_UIMM15(); @@ -233,13 +233,13 @@ void tms32082_mp_device::execute_short_imm() UINT32 data = read_creg(cr); m_fetchpc = data & ~3; - m_ie = (m_ie & ~1) | (data & 1); // global interrupt mask from creg + m_ie = (m_ie & ~1) | (data & 1); // global interrupt mask from creg // TODO: user/supervisor latch from creg } break; } - case 0x08: // shift.dz + case 0x08: // shift.dz { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -251,14 +251,14 @@ void tms32082_mp_device::execute_short_imm() UINT32 endmask = SHIFT_MASK[end ? end : 32]; if (inv) endmask = ~endmask; - UINT32 compmask = endmask; // shiftmask == 0xffffffff + UINT32 compmask = endmask; // shiftmask == 0xffffffff UINT32 res = 0; - if (r) // right + if (r) // right { res = ROTATE_R(source, rot) & compmask; } - else // left + else // left { res = ROTATE_L(source, rot) & compmask; } @@ -268,7 +268,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x0a: // shift.ds + case 0x0a: // shift.ds { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -280,15 +280,15 @@ void tms32082_mp_device::execute_short_imm() UINT32 endmask = SHIFT_MASK[end ? end : 32]; if (inv) endmask = ~endmask; - UINT32 compmask = endmask; // shiftmask == 0xffffffff + UINT32 compmask = endmask; // shiftmask == 0xffffffff UINT32 res = 0; - if (r) // right + if (r) // right { res = ROTATE_R(source, rot) & compmask; res = SIGN_EXTEND(res, rot); } - else // left + else // left { res = ROTATE_L(source, rot) & compmask; // sign extend makes no sense to left.. @@ -299,7 +299,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x0b: // shift.ez + case 0x0b: // shift.ez { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -330,7 +330,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x0c: // shift.em + case 0x0c: // shift.em { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -346,11 +346,11 @@ void tms32082_mp_device::execute_short_imm() UINT32 compmask = endmask & shiftmask; UINT32 res = 0; - if (r) // right + if (r) // right { res = (ROTATE_R(source, rot) & compmask) | (m_reg[rd] & ~compmask); } - else // left + else // left { res = (ROTATE_L(source, rot) & compmask) | (m_reg[rd] & ~compmask); } @@ -360,7 +360,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x0d: // shift.es + case 0x0d: // shift.es { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -371,18 +371,18 @@ void tms32082_mp_device::execute_short_imm() UINT32 endmask = SHIFT_MASK[end ? end : 32]; if (inv) endmask = ~endmask; - + int shift = r ? 32-rot : rot; UINT32 shiftmask = SHIFT_MASK[shift ? shift : 32]; UINT32 compmask = endmask & shiftmask; UINT32 res = 0; - if (r) // right + if (r) // right { res = ROTATE_R(source, rot) & compmask; res = SIGN_EXTEND(res, rot); } - else // left + else // left { res = ROTATE_L(source, rot) & compmask; // sign extend makes no sense to left.. @@ -393,7 +393,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x0e: // shift.iz + case 0x0e: // shift.iz { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -423,7 +423,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x0f: // shift.im + case 0x0f: // shift.im { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -439,11 +439,11 @@ void tms32082_mp_device::execute_short_imm() UINT32 compmask = endmask & ~shiftmask; UINT32 res = 0; - if (r) // right + if (r) // right { res = (ROTATE_R(source, rot) & compmask) | (m_reg[rd] & ~compmask); } - else // left + else // left { res = (ROTATE_L(source, rot) & compmask) | (m_reg[rd] & ~compmask); } @@ -453,7 +453,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x11: // and + case 0x11: // and { int rd = OP_RD(); int rs = OP_RS(); @@ -464,7 +464,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x14: // and.ft + case 0x14: // and.ft { int rd = OP_RD(); int rs = OP_RS(); @@ -475,7 +475,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x17: // or + case 0x17: // or { int rd = OP_RD(); int rs = OP_RS(); @@ -486,7 +486,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x1d: // or.ft + case 0x1d: // or.ft { int rd = OP_RD(); int rs = OP_RS(); @@ -498,7 +498,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x24: - case 0x20: // ld.b + case 0x20: // ld.b { int rd = OP_RD(); int base = OP_BASE(); @@ -517,7 +517,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x25: - case 0x21: // ld.h + case 0x21: // ld.h { int rd = OP_RD(); int base = OP_BASE(); @@ -536,7 +536,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x26: - case 0x22: // ld + case 0x22: // ld { int rd = OP_RD(); int base = OP_BASE(); @@ -554,7 +554,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x27: - case 0x23: // ld.d + case 0x23: // ld.d { int rd = OP_RD(); int base = OP_BASE(); @@ -576,7 +576,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x28: - case 0x2c: // ld.ub + case 0x2c: // ld.ub { int rd = OP_RD(); int base = OP_BASE(); @@ -594,7 +594,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x2d: - case 0x29: // ld.uh + case 0x29: // ld.uh { int rd = OP_RD(); int base = OP_BASE(); @@ -612,7 +612,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x34: - case 0x30: // st.b + case 0x30: // st.b { int rd = OP_RD(); int base = OP_BASE(); @@ -629,7 +629,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x35: - case 0x31: // st.h + case 0x31: // st.h { int rd = OP_RD(); int base = OP_BASE(); @@ -663,7 +663,7 @@ void tms32082_mp_device::execute_short_imm() } case 0x37: - case 0x33: // st.d + case 0x33: // st.d { int rd = OP_RD(); int base = OP_BASE(); @@ -679,8 +679,8 @@ void tms32082_mp_device::execute_short_imm() m_reg[base] = address; break; } - - case 0x48: // bbz + + case 0x48: // bbz { int bitnum = OP_BITNUM() ^ 0x1f; INT32 offset = OP_SIMM15(); @@ -698,7 +698,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x49: // bbz.a + case 0x49: // bbz.a { int bitnum = OP_BITNUM() ^ 0x1f; INT32 offset = OP_SIMM15(); @@ -711,7 +711,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x4a: // bbo + case 0x4a: // bbo { int bitnum = OP_BITNUM() ^ 0x1f; INT32 offset = OP_SIMM15(); @@ -742,7 +742,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x4c: // bcnd + case 0x4c: // bcnd { INT32 offset = OP_SIMM15(); int code = OP_RD(); @@ -760,7 +760,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x4d: // bcnd.a + case 0x4d: // bcnd.a { INT32 offset = OP_SIMM15(); int code = OP_RD(); @@ -784,7 +784,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x58: // add + case 0x58: // add { INT32 imm = OP_SIMM15(); int rd = OP_RD(); @@ -808,7 +808,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x5a: // sub + case 0x5a: // sub { INT32 imm = OP_SIMM15(); int rd = OP_RD(); @@ -821,7 +821,7 @@ void tms32082_mp_device::execute_short_imm() break; } - case 0x5b: // subu + case 0x5b: // subu { INT32 imm = OP_SIMM15(); int rd = OP_RD(); @@ -887,7 +887,7 @@ void tms32082_mp_device::execute_reg_long_imm() break; } - case 0x1c: // shift.iz + case 0x1c: // shift.iz { int r = (m_ir & (1 << 10)); int inv = (m_ir & (1 << 11)); @@ -919,7 +919,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0x22: - case 0x23: // and + case 0x23: // and { int rd = OP_RD(); int rs = OP_RS(); @@ -943,7 +943,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0x2c: - case 0x2d: // xor + case 0x2d: // xor { int rd = OP_RD(); int rs = OP_RS(); @@ -967,7 +967,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x40: case 0x41: case 0x48: - case 0x49: // ld.b + case 0x49: // ld.b { int m = m_ir & (1 << 15); @@ -977,7 +977,7 @@ void tms32082_mp_device::execute_reg_long_imm() UINT32 address = m_reg[base] + (has_imm ? imm32 : m_reg[OP_SRC1()]); UINT32 r = m_program->read_byte(address); if (r & 0x80) r |= 0xffffff00; - + if (rd) m_reg[rd] = r; @@ -989,7 +989,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x42: case 0x4a: case 0x43: - case 0x4b: // ld.h + case 0x4b: // ld.h { int shift = (m_ir & (1 << 11)) ? 1 : 0; int m = m_ir & (1 << 15); @@ -1012,7 +1012,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x4c: case 0x44: case 0x4d: - case 0x45: // ld + case 0x45: // ld { int shift = (m_ir & (1 << 11)) ? 2 : 0; int m = m_ir & (1 << 15); @@ -1033,7 +1033,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x4e: case 0x4f: case 0x46: - case 0x47: // ld.d + case 0x47: // ld.d { int shift = (m_ir & (1 << 11)) ? 3 : 0; int m = m_ir & (1 << 15); @@ -1054,7 +1054,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x58: case 0x59: case 0x50: - case 0x51: // ld.ub + case 0x51: // ld.ub { int m = m_ir & (1 << 15); int base = OP_BASE(); @@ -1074,7 +1074,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x5a: case 0x5b: case 0x52: - case 0x53: // ld.uh + case 0x53: // ld.uh { int shift = (m_ir & (1 << 11)) ? 1 : 0; int m = m_ir & (1 << 15); @@ -1095,7 +1095,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x60: case 0x61: case 0x68: - case 0x69: // st.b + case 0x69: // st.b { int m = m_ir & (1 << 15); @@ -1112,7 +1112,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x62: case 0x63: case 0x6a: - case 0x6b: // st.h + case 0x6b: // st.h { int shift = (m_ir & (1 << 11)) ? 1 : 0; int m = m_ir & (1 << 15); @@ -1130,7 +1130,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0x6c: case 0x6d: case 0x64: - case 0x65: // st + case 0x65: // st { int shift = (m_ir & (1 << 11)) ? 2 : 0; int m = m_ir & (1 << 15); @@ -1177,7 +1177,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xa0: - case 0xa1: // cmp + case 0xa1: // cmp { int rd = OP_RD(); UINT32 src1 = has_imm ? imm32 : m_reg[OP_SRC1()]; @@ -1200,7 +1200,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xb4: - case 0xb5: // sub + case 0xb5: // sub { int rd = OP_RD(); int rs = OP_RS(); @@ -1213,7 +1213,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xb6: - case 0xb7: // subu + case 0xb7: // subu { int rd = OP_RD(); int rs = OP_RS(); @@ -1226,7 +1226,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0xc4: case 0xd4: case 0xc5: - case 0xd5: // vmpy + case 0xd5: // vmpy { int p1 = m_ir & (1 << 5); int pd = m_ir & (1 << 7); @@ -1262,7 +1262,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0xc8: case 0xd8: case 0xc9: - case 0xd9: // vrnd + case 0xd9: // vrnd { int acc = OP_ACC(); int p1 = m_ir & (1 << 5); @@ -1282,7 +1282,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0: m_reg[rd] = f2u((float)source); break; - case 1: + case 1: m_fpair[rd >> 1] = d2u(source); break; case 2: @@ -1313,7 +1313,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0xcc: case 0xdc: case 0xcd: - case 0xdd: // vmac + case 0xdd: // vmac { int acc = OP_ACC(); int z = m_ir & (1 << 8); @@ -1356,7 +1356,7 @@ void tms32082_mp_device::execute_reg_long_imm() case 0xce: case 0xde: case 0xcf: - case 0xdf: // vmsc + case 0xdf: // vmsc { int acc = OP_ACC(); int z = m_ir & (1 << 8); @@ -1397,25 +1397,25 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xe0: - case 0xe1: // fadd + case 0xe1: // fadd { int rd = OP_RD(); int rs = OP_RS(); int src1 = OP_SRC1(); int precision = (m_ir >> 5) & 0x3f; - if (rd) // only calculate if destination register is valid + if (rd) // only calculate if destination register is valid { switch (precision) { - case 0x00: // SP - SP -> SP + case 0x00: // SP - SP -> SP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); float s2 = u2f(m_reg[rs]); m_reg[rd] = f2u(s1 + s2); break; } - case 0x10: // SP - SP -> DP + case 0x10: // SP - SP -> DP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); float s2 = u2f(m_reg[rs]); @@ -1423,7 +1423,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x14: // SP - DP -> DP + case 0x14: // SP - DP -> DP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); double s2 = u2d(m_fpair[rs >> 1]); @@ -1431,7 +1431,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x11: // DP - SP -> DP + case 0x11: // DP - SP -> DP { double s1 = u2d(m_fpair[src1 >> 1]); float s2 = u2f(m_reg[rs]); @@ -1439,7 +1439,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x15: // DP - DP -> DP + case 0x15: // DP - DP -> DP { double s1 = u2d(m_fpair[src1 >> 1]); double s2 = u2d(m_fpair[rs >> 1]); @@ -1455,25 +1455,25 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xe2: - case 0xe3: // fsub + case 0xe3: // fsub { int rd = OP_RD(); int rs = OP_RS(); int src1 = OP_SRC1(); int precision = (m_ir >> 5) & 0x3f; - if (rd) // only calculate if destination register is valid + if (rd) // only calculate if destination register is valid { switch (precision) { - case 0x00: // SP - SP -> SP + case 0x00: // SP - SP -> SP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); float s2 = u2f(m_reg[rs]); m_reg[rd] = f2u(s1 - s2); break; } - case 0x10: // SP - SP -> DP + case 0x10: // SP - SP -> DP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); float s2 = u2f(m_reg[rs]); @@ -1481,7 +1481,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x14: // SP - DP -> DP + case 0x14: // SP - DP -> DP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); double s2 = u2d(m_fpair[rs >> 1]); @@ -1489,7 +1489,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x11: // DP - SP -> DP + case 0x11: // DP - SP -> DP { double s1 = u2d(m_fpair[src1 >> 1]); float s2 = u2f(m_reg[rs]); @@ -1497,7 +1497,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x15: // DP - DP -> DP + case 0x15: // DP - DP -> DP { double s1 = u2d(m_fpair[src1 >> 1]); double s2 = u2d(m_fpair[rs >> 1]); @@ -1513,25 +1513,25 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xe4: - case 0xe5: // fmpy + case 0xe5: // fmpy { int rd = OP_RD(); int rs = OP_RS(); int src1 = OP_SRC1(); int precision = (m_ir >> 5) & 0x3f; - if (rd) // only calculate if destination register is valid + if (rd) // only calculate if destination register is valid { switch (precision) { - case 0x00: // SP x SP -> SP + case 0x00: // SP x SP -> SP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); float s2 = u2f(m_reg[rs]); m_reg[rd] = f2u(s1 * s2); break; } - case 0x10: // SP x SP -> DP + case 0x10: // SP x SP -> DP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); float s2 = u2f(m_reg[rs]); @@ -1539,7 +1539,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x14: // SP x DP -> DP + case 0x14: // SP x DP -> DP { float s1 = u2f(has_imm ? imm32 : m_reg[src1]); double s2 = u2d(m_fpair[rs >> 1]); @@ -1547,7 +1547,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x11: // DP x SP -> DP + case 0x11: // DP x SP -> DP { double s1 = u2d(m_fpair[src1 >> 1]); float s2 = u2f(m_reg[rs]); @@ -1555,7 +1555,7 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x15: // DP x DP -> DP + case 0x15: // DP x DP -> DP { double s1 = u2d(m_fpair[src1 >> 1]); double s2 = u2d(m_fpair[rs >> 1]); @@ -1563,12 +1563,12 @@ void tms32082_mp_device::execute_reg_long_imm() m_fpair[rd >> 1] = res; break; } - case 0x2a: // I x I -> I + case 0x2a: // I x I -> I { m_reg[rd] = (INT32)(m_reg[rs]) * (INT32)(has_imm ? imm32 : m_reg[OP_SRC1()]); break; } - case 0x3f: // U x U -> U + case 0x3f: // U x U -> U { m_reg[rd] = (UINT32)(m_reg[rs]) * (UINT32)(has_imm ? imm32 : m_reg[OP_SRC1()]); break; @@ -1581,7 +1581,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xe6: - case 0xe7: // fdiv + case 0xe7: // fdiv { int rd = OP_RD(); int p1 = m_ir & (1 << 5); @@ -1606,7 +1606,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xe8: - case 0xe9: // frnd + case 0xe9: // frnd { //int mode = (m_ir >> 7) & 3; int p1 = (m_ir >> 5) & 3; @@ -1654,9 +1654,9 @@ void tms32082_mp_device::execute_reg_long_imm() } break; } - + case 0xea: - case 0xeb: // fcmp + case 0xeb: // fcmp { int rd = OP_RD(); int p1 = m_ir & (1 << 5); @@ -1689,7 +1689,7 @@ void tms32082_mp_device::execute_reg_long_imm() } case 0xee: - case 0xef: // fsqrt + case 0xef: // fsqrt { int rd = OP_RD(); int src1 = OP_SRC1(); @@ -1709,7 +1709,7 @@ void tms32082_mp_device::execute_reg_long_imm() break; } - case 0xf2: // rmo + case 0xf2: // rmo { UINT32 source = m_reg[OP_RS()]; int rd = OP_RD(); diff --git a/src/emu/cpu/tms32082/tms32082.c b/src/emu/cpu/tms32082/tms32082.c index 914dccc8f86..b591f3fc6ac 100644 --- a/src/emu/cpu/tms32082/tms32082.c +++ b/src/emu/cpu/tms32082/tms32082.c @@ -22,7 +22,7 @@ const device_type TMS32082_PP = &device_creator<tms32082_pp_device>; // internal memory map static ADDRESS_MAP_START(mp_internal_map, AS_PROGRAM, 32, tms32082_mp_device) - AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("pp0_data0") + AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("pp0_data0") AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("pp1_data0") AM_RANGE(0x00008000, 0x00008fff) AM_RAM AM_SHARE("pp0_data1") AM_RANGE(0x00009000, 0x00009fff) AM_RAM AM_SHARE("pp1_data1") @@ -141,7 +141,7 @@ void tms32082_mp_device::device_start() save_item(NAME(m_fetchpc)); save_item(NAME(m_reg)); save_item(NAME(m_acc)); - + save_item(NAME(m_in0p)); save_item(NAME(m_in1p)); save_item(NAME(m_outp)); @@ -256,7 +256,7 @@ void tms32082_mp_device::processor_command(UINT32 command) printf("Task "); if (command & 0x00002000) printf("Msg "); - + printf("to: "); if (command & 0x00000400) @@ -300,28 +300,28 @@ UINT32 tms32082_mp_device::read_creg(int reg) { switch (reg) { - case 0x0: // EPC + case 0x0: // EPC return m_epc; - case 0x1: // EIP + case 0x1: // EIP return m_eip; - case 0x4: // INTPEN + case 0x4: // INTPEN return m_intpen; - case 0x6: // IE + case 0x6: // IE return m_ie; case 0xa: // PPERROR return 0xe0000; - case 0x4000: // IN0P + case 0x4000: // IN0P return m_in0p; - case 0x4001: // IN1P + case 0x4001: // IN1P return m_in1p; - case 0x4002: // OUTP + case 0x4002: // OUTP return m_outp; default: @@ -335,15 +335,15 @@ void tms32082_mp_device::write_creg(int reg, UINT32 data) { switch (reg) { - case 0x0: // EPC + case 0x0: // EPC m_epc = data; break; - case 0x1: // EIP + case 0x1: // EIP m_eip = data; break; - case 0x4: // INTPEN + case 0x4: // INTPEN { for (int i=0; i < 32; i++) { @@ -353,20 +353,20 @@ void tms32082_mp_device::write_creg(int reg, UINT32 data) break; } - case 0x6: // IE + case 0x6: // IE m_ie = data; printf("IE = %08X\n", data); break; - case 0x4000: // IN0P + case 0x4000: // IN0P m_in0p = data; break; - case 0x4001: // IN1P + case 0x4001: // IN1P m_in1p = data; break; - case 0x4002: // OUTP + case 0x4002: // OUTP m_outp = data; break; @@ -378,19 +378,19 @@ void tms32082_mp_device::write_creg(int reg, UINT32 data) void tms32082_mp_device::check_interrupts() { - if (m_ie & 1) // global interrupt mask + if (m_ie & 1) // global interrupt mask { for (int i=1; i < 32; i++) { if (m_ie & m_intpen & (1 << i)) { m_epc = (m_fetchpc & ~3); - m_epc |= (m_ie & 1); // save global interrupt mask + m_epc |= (m_ie & 1); // save global interrupt mask // TODO: user mode bit to EPC m_eip = m_pc; - m_ie &= ~1; // clear global interrupt mask + m_ie &= ~1; // clear global interrupt mask // get new pc from vector table m_fetchpc = m_pc = m_program->read_dword(0x01010180 + (i * 4)); @@ -445,7 +445,7 @@ void tms32082_mp_device::execute_run() while (m_icount > 0) { m_pc = m_fetchpc; - + check_interrupts(); debugger_instruction_hook(this, m_pc); @@ -466,7 +466,7 @@ void tms32082_mp_device::execute_run() // internal memory map static ADDRESS_MAP_START(pp_internal_map, AS_PROGRAM, 32, tms32082_pp_device) - AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("pp0_data0") + AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("pp0_data0") AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("pp1_data0") AM_RANGE(0x00008000, 0x00008fff) AM_RAM AM_SHARE("pp0_data1") AM_RANGE(0x00009000, 0x00009fff) AM_RAM AM_SHARE("pp1_data1") @@ -528,4 +528,4 @@ void tms32082_pp_device::execute_run() m_icount = 0; return; -}
\ No newline at end of file +} diff --git a/src/emu/cpu/tms32082/tms32082.h b/src/emu/cpu/tms32082/tms32082.h index 81dd80296fd..f791e52e157 100644 --- a/src/emu/cpu/tms32082/tms32082.h +++ b/src/emu/cpu/tms32082/tms32082.h @@ -58,10 +58,10 @@ public: enum { - INPUT_X1 = 1, - INPUT_X2 = 2, - INPUT_X3 = 3, - INPUT_X4 = 4, + INPUT_X1 = 1, + INPUT_X2 = 2, + INPUT_X3 = 3, + INPUT_X4 = 4, }; DECLARE_READ32_MEMBER(mp_param_r); diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c index 9ed68966521..06aa593bebb 100644 --- a/src/emu/cpu/tms34010/tms34010.c +++ b/src/emu/cpu/tms34010/tms34010.c @@ -1842,4 +1842,3 @@ tms34020_device::tms34020_device(const machine_config &mconfig, device_type type } const device_type TMS34020 = &legacy_device_creator<tms34020_device>; - diff --git a/src/emu/cpu/tms34010/tms34010.h b/src/emu/cpu/tms34010/tms34010.h index 4abf072789c..9240b33fa09 100644 --- a/src/emu/cpu/tms34010/tms34010.h +++ b/src/emu/cpu/tms34010/tms34010.h @@ -210,10 +210,10 @@ class tms34010_device : public legacy_cpu_device public: tms34010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock); tms34010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock, cpu_get_info_func get_info); - + UINT32 tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); UINT32 tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); -}; +}; extern const device_type TMS34010; diff --git a/src/emu/cpu/tms9900/99xxcore.h b/src/emu/cpu/tms9900/99xxcore.h index 338d206355b..e014ccda059 100644 --- a/src/emu/cpu/tms9900/99xxcore.h +++ b/src/emu/cpu/tms9900/99xxcore.h @@ -4781,7 +4781,7 @@ void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info) /* --- the following bits of info are returned as NULL-terminated strings --- */ case CPUINFO_STR_NAME: strcpy(info->s, TMS99XX_device_get_name); break; case CPUINFO_STR_SHORTNAME: strcpy(info->s, TMS99XX_device_get_shortname); break; - + case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments 9900L"); break; case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break; case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; |
