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author Aaron Giles <aaron@aarongiles.com>2007-12-17 15:19:59 +0000
committer Aaron Giles <aaron@aarongiles.com>2007-12-17 15:19:59 +0000
commit7b77f1218624ea26dbb2efd85a19f795f5d4e02e (patch)
tree19209304095572b4fd61c2a2d6a5aa75c4e471ad /src/emu/cpu/upd7810
parent3da7f476068b3ffef713218ba2fc1bd5030f2c38 (diff)
Initial checkin of MAME 0.121.mame0121
Diffstat (limited to 'src/emu/cpu/upd7810')
-rw-r--r--src/emu/cpu/upd7810/7810dasm.c4059
-rw-r--r--src/emu/cpu/upd7810/7810ops.c9341
-rw-r--r--src/emu/cpu/upd7810/7810tbl.c3513
-rw-r--r--src/emu/cpu/upd7810/upd7810.c2019
-rw-r--r--src/emu/cpu/upd7810/upd7810.h157
5 files changed, 19089 insertions, 0 deletions
diff --git a/src/emu/cpu/upd7810/7810dasm.c b/src/emu/cpu/upd7810/7810dasm.c
new file mode 100644
index 00000000000..0024992a555
--- /dev/null
+++ b/src/emu/cpu/upd7810/7810dasm.c
@@ -0,0 +1,4059 @@
+/*****************************************************************************
+ *
+ * Portable uPD7810/11, 7810H/11H, 78C10/C11/C14 disassembler
+ * Copyright (c) 2001 Juergen Buchmueller, all rights reserved.
+ *
+ * NS20030112: added 7807.
+ *
+ *****************************************************************************/
+
+#include "debugger.h"
+#include "upd7810.h"
+
+struct dasm_s {
+ UINT8 token;
+ const void *args;
+ UINT8 oplen;
+ UINT8 cycles;
+};
+
+enum
+{
+ illegal=1,
+ ACI,
+ ADC,
+ ADCW,
+ ADCX,
+ ADD,
+ ADDNC,
+ ADDNCW,
+ ADDNCX,
+ ADDW,
+ ADDX,
+ ADI,
+ ADINC,
+ ANA,
+ ANAW,
+ ANAX,
+ AND,
+ ANI,
+ ANIW,
+ BIT,
+ BLOCK,
+ CALB,
+ CALF,
+ CALL,
+ CALT,
+ CLC,
+ CLR, /* 7807 */
+ CMC, /* 7807 */
+ DAA,
+ DADC,
+ DADD,
+ DADDNC,
+ DAN,
+ DCR,
+ DCRW,
+ DCX,
+ DEQ,
+ DGT,
+ DI,
+ DIV,
+ DLT,
+ DMOV,
+ DNE,
+ DOFF,
+ DON,
+ DOR,
+ DRLL,
+ DRLR,
+ DSBB,
+ DSLL,
+ DSLR,
+ DSUB,
+ DSUBNB,
+ DXR,
+ EADD,
+ EI,
+ EQA,
+ EQAW,
+ EQAX,
+ EQI,
+ EQIW,
+ ESUB,
+ EXA,
+ EXH,
+ EXX,
+ EXR, /* 7807 */
+ GTA,
+ GTAW,
+ GTAX,
+ GTI,
+ GTIW,
+ HALT,
+ INR,
+ INRW,
+ INX,
+ JB,
+ JEA,
+ JMP,
+ JR,
+ JRE,
+ LBCD,
+ LDAW,
+ LDAX,
+ LDEAX,
+ LDED,
+ LHLD,
+ LSPD,
+ LTA,
+ LTAW,
+ LTAX,
+ LTI,
+ LTIW,
+ LXI,
+ MOV,
+ MUL,
+ MVI,
+ MVIW,
+ MVIX,
+ NEA,
+ NEAW,
+ NEAX,
+ NEGA,
+ NEI,
+ NEIW,
+ NOP,
+ NOT, /* 7807 */
+ OFFA,
+ OFFAW,
+ OFFAX,
+ OFFI,
+ OFFIW,
+ ONA,
+ ONAW,
+ ONAX,
+ ONI,
+ ONIW,
+ OR, /* 7807 */
+ ORA,
+ ORAW,
+ ORAX,
+ ORI,
+ ORIW,
+ POP,
+ PUSH,
+ RET,
+ RETI,
+ RETS,
+ RLD,
+ RLL,
+ RLR,
+ RRD,
+ SBB,
+ SBBW,
+ SBBX,
+ SBCD,
+ SBI,
+ SDED,
+ SETB, /* 7807 */
+ SHLD,
+ SK,
+ SKIT,
+ SKN,
+ SKNIT,
+ SLL,
+ SLLC,
+ SLR,
+ SLRC,
+ SOFTI,
+ SSPD,
+ STAW,
+ STAX,
+ STC,
+ STEAX,
+ STOP,
+ SUB,
+ SUBNB,
+ SUBNBW,
+ SUBNBX,
+ SUBW,
+ SUBX,
+ SUI,
+ SUINB,
+ TABLE,
+ XOR, /* 7807 */
+ XRA,
+ XRAW,
+ XRAX,
+ XRI
+};
+
+static const char* token[] =
+{
+ "",
+ "illegal",
+ "ACI",
+ "ADC",
+ "ADCW",
+ "ADCX",
+ "ADD",
+ "ADDNC",
+ "ADDNCW",
+ "ADDNCX",
+ "ADDW",
+ "ADDX",
+ "ADI",
+ "ADINC",
+ "ANA",
+ "ANAW",
+ "ANAX",
+ "AND",
+ "ANI",
+ "ANIW",
+ "BIT",
+ "BLOCK",
+ "CALB",
+ "CALF",
+ "CALL",
+ "CALT",
+ "CLC",
+ "CLR", /* 7807 */
+ "CMC", /* 7807 */
+ "DAA",
+ "DADC",
+ "DADD",
+ "DADDNC",
+ "DAN",
+ "DCR",
+ "DCRW",
+ "DCX",
+ "DEQ",
+ "DGT",
+ "DI",
+ "DIV",
+ "DLT",
+ "DMOV",
+ "DNE",
+ "DOFF",
+ "DON",
+ "DOR",
+ "DRLL",
+ "DRLR",
+ "DSBB",
+ "DSLL",
+ "DSLR",
+ "DSUB",
+ "DSUBNB",
+ "DXR",
+ "EADD",
+ "EI",
+ "EQA",
+ "EQAW",
+ "EQAX",
+ "EQI",
+ "EQIW",
+ "ESUB",
+ "EXA",
+ "EXH",
+ "EXX",
+ "EXR", /* 7807 */
+ "GTA",
+ "GTAW",
+ "GTAX",
+ "GTI",
+ "GTIW",
+ "HALT",
+ "INR",
+ "INRW",
+ "INX",
+ "JB",
+ "JEA",
+ "JMP",
+ "JR",
+ "JRE",
+ "LBCD",
+ "LDAW",
+ "LDAX",
+ "LDEAX",
+ "LDED",
+ "LHLD",
+ "LSPD",
+ "LTA",
+ "LTAW",
+ "LTAX",
+ "LTI",
+ "LTIW",
+ "LXI",
+ "MOV",
+ "MUL",
+ "MVI",
+ "MVIW",
+ "MVIX",
+ "NEA",
+ "NEAW",
+ "NEAX",
+ "NEGA",
+ "NEI",
+ "NEIW",
+ "NOP",
+ "NOT", /* 7807 */
+ "OFFA",
+ "OFFAW",
+ "OFFAX",
+ "OFFI",
+ "OFFIW",
+ "ONA",
+ "ONAW",
+ "ONAX",
+ "ONI",
+ "ONIW",
+ "OR", /* 7807 */
+ "ORA",
+ "ORAW",
+ "ORAX",
+ "ORI",
+ "ORIW",
+ "POP",
+ "PUSH",
+ "RET",
+ "RETI",
+ "RETS",
+ "RLD",
+ "RLL",
+ "RLR",
+ "RRD",
+ "SBB",
+ "SBBW",
+ "SBBX",
+ "SBCD",
+ "SBI",
+ "SDED",
+ "SETB", /* 7807 */
+ "SHLD",
+ "SK",
+ "SKIT",
+ "SKN",
+ "SKNIT",
+ "SLL",
+ "SLLC",
+ "SLR",
+ "SLRC",
+ "SOFTI",
+ "SSPD",
+ "STAW",
+ "STAX",
+ "STC",
+ "STEAX",
+ "STOP",
+ "SUB",
+ "SUBNB",
+ "SUBNBW",
+ "SUBNBX",
+ "SUBW",
+ "SUBX",
+ "SUI",
+ "SUINB",
+ "TABLE",
+ "XOR", /* 7807 */
+ "XRA",
+ "XRAW",
+ "XRAX",
+ "XRI"
+};
+
+
+/* prefix 48 */
+static struct dasm_s dasm48_7810[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0100 1000 0000 0000 */
+ {SLRC,"A", 2, 8}, /* 01: 0100 1000 0000 0001 */
+ {SLRC,"B", 2, 8}, /* 02: 0100 1000 0000 0010 */
+ {SLRC,"C", 2, 8}, /* 03: 0100 1000 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0100 1000 0000 0100 */
+ {SLLC,"A", 2, 8}, /* 05: 0100 1000 0000 0101 */
+ {SLLC,"B", 2, 8}, /* 06: 0100 1000 0000 0110 */
+ {SLLC,"C", 2, 8}, /* 07: 0100 1000 0000 0111 */
+ {SK,"NV", 2, 8}, /* 08: 0100 1000 0000 1000 */
+ {illegal,0, 2, 8}, /* 09: 0100 1000 0000 1001 */
+ {SK,"CY", 2, 8}, /* 0a: 0100 1000 0000 1010 */
+ {SK,"HC", 2, 8}, /* 0b: 0100 1000 0000 1011 */
+ {SK,"Z", 2, 8}, /* 0c: 0100 1000 0000 1100 */
+ {illegal,0, 2, 8}, /* 0d: 0100 1000 0000 1101 */
+ {illegal,0, 2, 8}, /* 0e: 0100 1000 0000 1110 */
+ {illegal,0, 2, 8}, /* 0f: 0100 1000 0000 1111 */
+
+ {illegal,0, 2, 8}, /* 10: 0100 1000 0001 0000 */
+ {illegal,0, 2, 8}, /* 11: 0100 1000 0001 0001 */
+ {illegal,0, 2, 8}, /* 12: 0100 1000 0001 0010 */
+ {illegal,0, 2, 8}, /* 13: 0100 1000 0001 0011 */
+ {illegal,0, 2, 8}, /* 14: 0100 1000 0001 0100 */
+ {illegal,0, 2, 8}, /* 15: 0100 1000 0001 0101 */
+ {illegal,0, 2, 8}, /* 16: 0100 1000 0001 0110 */
+ {illegal,0, 2, 8}, /* 17: 0100 1000 0001 0111 */
+ {SKN,"NV", 2, 8}, /* 18: 0100 1000 0001 1000 */
+ {illegal,0, 2, 8}, /* 19: 0100 1000 0001 1001 */
+ {SKN,"CY", 2, 8}, /* 1a: 0100 1000 0001 1010 */
+ {SKN,"HC", 2, 8}, /* 1b: 0100 1000 0001 1011 */
+ {SKN,"Z", 2, 8}, /* 1c: 0100 1000 0001 1100 */
+ {illegal,0, 2, 8}, /* 1d: 0100 1000 0001 1101 */
+ {illegal,0, 2, 8}, /* 1e: 0100 1000 0001 1110 */
+ {illegal,0, 2, 8}, /* 1f: 0100 1000 0001 1111 */
+
+ {illegal,0, 2, 8}, /* 20: 0100 1000 0010 0000 */
+ {SLR,"A", 2, 8}, /* 21: 0100 1000 0010 0001 */
+ {SLR,"B", 2, 8}, /* 22: 0100 1000 0010 0010 */
+ {SLR,"C", 2, 8}, /* 23: 0100 1000 0010 0011 */
+ {illegal,0, 2, 8}, /* 24: 0100 1000 0010 0100 */
+ {SLL,"A", 2, 8}, /* 25: 0100 1000 0010 0101 */
+ {SLL,"B", 2, 8}, /* 26: 0100 1000 0010 0110 */
+ {SLL,"C", 2, 8}, /* 27: 0100 1000 0010 0111 */
+ {JEA,0, 2, 8}, /* 28: 0100 1000 0010 1000 */
+ {CALB,0, 2,17}, /* 29: 0100 1000 0010 1001 */
+ {CLC,0, 2, 8}, /* 2a: 0100 1000 0010 1010 */
+ {STC,0, 2, 8}, /* 2b: 0100 1000 0010 1011 */
+ {illegal,0, 2,32}, /* 2c: 0100 1000 0010 1100 */
+ {MUL,"A", 2,32}, /* 2d: 0100 1000 0010 1101 */
+ {MUL,"B", 2,32}, /* 2e: 0100 1000 0010 1110 */
+ {MUL,"C", 2,32}, /* 2f: 0100 1000 0010 1111 */
+
+ {illegal,0, 2, 8}, /* 30: 0100 1000 0011 0000 */
+ {RLR,"A", 2, 8}, /* 31: 0100 1000 0011 0001 */
+ {RLR,"B", 2, 8}, /* 32: 0100 1000 0011 0010 */
+ {RLR,"C", 2, 8}, /* 33: 0100 1000 0011 0011 */
+ {illegal,0, 2, 8}, /* 34: 0100 1000 0011 0100 */
+ {RLL,"A", 2, 8}, /* 35: 0100 1000 0011 0101 */
+ {RLL,"B", 2, 8}, /* 36: 0100 1000 0011 0110 */
+ {RLL,"C", 2, 8}, /* 37: 0100 1000 0011 0111 */
+ {RLD,0, 2,17}, /* 38: 0100 1000 0011 1000 */
+ {RRD,0, 2,17}, /* 39: 0100 1000 0011 1001 */
+ {NEGA,0, 2, 8}, /* 3a: 0100 1000 0011 1010 */
+ {HALT,0, 2,12}, /* 3b: 0100 1000 0011 1011 */
+ {illegal,0, 2,59}, /* 3c: 0100 1000 0011 1100 */
+ {DIV,"A", 2,59}, /* 3d: 0100 1000 0011 1101 */
+ {DIV,"B", 2,59}, /* 3e: 0100 1000 0011 1110 */
+ {DIV,"C", 2,59}, /* 3f: 0100 1000 0011 1111 */
+
+ {SKIT,"NMI", 2, 8}, /* 40: 0100 1000 0100 0000 */
+ {SKIT,"FT0", 2, 8}, /* 41: 0100 1000 0100 0001 */
+ {SKIT,"FT1", 2, 8}, /* 42: 0100 1000 0100 0010 */
+ {SKIT,"F1", 2, 8}, /* 43: 0100 1000 0100 0011 */
+ {SKIT,"F2", 2, 8}, /* 44: 0100 1000 0100 0100 */
+ {SKIT,"FE0", 2, 8}, /* 45: 0100 1000 0100 0101 */
+ {SKIT,"FE1", 2, 8}, /* 46: 0100 1000 0100 0110 */
+ {SKIT,"FEIN", 2, 8}, /* 47: 0100 1000 0100 0111 */
+ {SKIT,"FAD", 2, 8}, /* 48: 0100 1000 0100 1000 */
+ {SKIT,"FSR", 2, 8}, /* 49: 0100 1000 0100 1001 */
+ {SKIT,"FST", 2, 8}, /* 4a: 0100 1000 0100 1010 */
+ {SKIT,"ER", 2, 8}, /* 4b: 0100 1000 0100 1011 */
+ {SKIT,"OV", 2, 8}, /* 4c: 0100 1000 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0100 1000 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0100 1000 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0100 1000 0100 1111 */
+
+ {SKIT,"AN4", 2, 8}, /* 50: 0100 1000 0101 0000 */
+ {SKIT,"AN5", 2, 8}, /* 51: 0100 1000 0101 0001 */
+ {SKIT,"AN6", 2, 8}, /* 52: 0100 1000 0101 0010 */
+ {SKIT,"AN7", 2, 8}, /* 53: 0100 1000 0101 0011 */
+ {SKIT,"SB", 2, 8}, /* 54: 0100 1000 0101 0100 */
+ {illegal,0, 2, 8}, /* 55: 0100 1000 0101 0101 */
+ {illegal,0, 2, 8}, /* 56: 0100 1000 0101 0110 */
+ {illegal,0, 2, 8}, /* 57: 0100 1000 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0100 1000 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0100 1000 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0100 1000 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0100 1000 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0100 1000 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0100 1000 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0100 1000 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0100 1000 0101 1111 */
+
+ {SKNIT,"NMI", 2, 8}, /* 60: 0100 1000 0110 0000 */
+ {SKNIT,"FT0", 2, 8}, /* 61: 0100 1000 0110 0001 */
+ {SKNIT,"FT1", 2, 8}, /* 62: 0100 1000 0110 0010 */
+ {SKNIT,"F1", 2, 8}, /* 63: 0100 1000 0110 0011 */
+ {SKNIT,"F2", 2, 8}, /* 64: 0100 1000 0110 0100 */
+ {SKNIT,"FE0", 2, 8}, /* 65: 0100 1000 0110 0101 */
+ {SKNIT,"FE1", 2, 8}, /* 66: 0100 1000 0110 0110 */
+ {SKNIT,"FEIN", 2, 8}, /* 67: 0100 1000 0110 0111 */
+ {SKNIT,"FAD", 2, 8}, /* 68: 0100 1000 0110 1000 */
+ {SKNIT,"FSR", 2, 8}, /* 69: 0100 1000 0110 1001 */
+ {SKNIT,"FST", 2, 8}, /* 6a: 0100 1000 0110 1010 */
+ {SKNIT,"ER", 2, 8}, /* 6b: 0100 1000 0110 1011 */
+ {SKNIT,"OV", 2, 8}, /* 6c: 0100 1000 0110 1100 */
+ {illegal,0, 2, 8}, /* 6d: 0100 1000 0110 1101 */
+ {illegal,0, 2, 8}, /* 6e: 0100 1000 0110 1110 */
+ {illegal,0, 2, 8}, /* 6f: 0100 1000 0110 1111 */
+
+ {SKNIT,"AN4", 2, 8}, /* 70: 0100 1000 0111 0000 */
+ {SKNIT,"AN5", 2, 8}, /* 71: 0100 1000 0111 0001 */
+ {SKNIT,"AN6", 2, 8}, /* 72: 0100 1000 0111 0010 */
+ {SKNIT,"AN7", 2, 8}, /* 73: 0100 1000 0111 0011 */
+ {SKNIT,"SB", 2, 8}, /* 74: 0100 1000 0111 0100 */
+ {illegal,0, 2, 8}, /* 75: 0100 1000 0111 0101 */
+ {illegal,0, 2, 8}, /* 76: 0100 1000 0111 0110 */
+ {illegal,0, 2, 8}, /* 77: 0100 1000 0111 0111 */
+ {illegal,0, 2, 8}, /* 78: 0100 1000 0111 1000 */
+ {illegal,0, 2, 8}, /* 79: 0100 1000 0111 1001 */
+ {illegal,0, 2, 8}, /* 7a: 0100 1000 0111 1010 */
+ {illegal,0, 2, 8}, /* 7b: 0100 1000 0111 1011 */
+ {illegal,0, 2, 8}, /* 7c: 0100 1000 0111 1100 */
+ {illegal,0, 2, 8}, /* 7d: 0100 1000 0111 1101 */
+ {illegal,0, 2, 8}, /* 7e: 0100 1000 0111 1110 */
+ {illegal,0, 2, 8}, /* 7f: 0100 1000 0111 1111 */
+
+ {illegal,0, 2, 8}, /* 80: 0100 1000 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0100 1000 1000 0001 */
+ {LDEAX,"(DE)", 2,14}, /* 82: 0100 1000 1000 0010 */
+ {LDEAX,"(HL)", 2,14}, /* 83: 0100 1000 1000 0011 */
+ {LDEAX,"(DE++)", 2,14}, /* 84: 0100 1000 1000 0100 */
+ {LDEAX,"(HL++)", 2,14}, /* 85: 0100 1000 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0100 1000 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0100 1000 1000 0111 */
+ {illegal,0, 2, 8}, /* 88: 0100 1000 1000 1000 */
+ {illegal,0, 2, 8}, /* 89: 0100 1000 1000 1001 */
+ {illegal,0, 2, 8}, /* 8a: 0100 1000 1000 1010 */
+ {LDEAX,"(DE+%b)",3,20}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */
+ {LDEAX,"(HL+A)", 2,20}, /* 8c: 0100 1000 1000 1100 */
+ {LDEAX,"(HL+B)", 2,20}, /* 8d: 0100 1000 1000 1101 */
+ {LDEAX,"(HL+EA)",2,20}, /* 8e: 0100 1000 1000 1110 */
+ {LDEAX,"(HL+%b)",3,20}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {illegal,0, 2, 8}, /* 90: 0100 1000 1000 0000 */
+ {illegal,0, 2, 8}, /* 91: 0100 1000 1000 0001 */
+ {STEAX,"(DE)", 2,14}, /* 92: 0100 1000 1000 0010 */
+ {STEAX,"(HL)", 2,14}, /* 93: 0100 1000 1000 0011 */
+ {STEAX,"(DE++)", 2,14}, /* 94: 0100 1000 1000 0100 */
+ {STEAX,"(HL++)", 2,14}, /* 95: 0100 1000 1000 0101 */
+ {illegal,0, 2, 8}, /* 96: 0100 1000 1000 0110 */
+ {illegal,0, 2, 8}, /* 97: 0100 1000 1000 0111 */
+ {illegal,0, 2, 8}, /* 98: 0100 1000 1000 1000 */
+ {illegal,0, 2, 8}, /* 99: 0100 1000 1000 1001 */
+ {illegal,0, 2, 8}, /* 9a: 0100 1000 1000 1010 */
+ {STEAX,"(DE+%b)",3,20}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */
+ {STEAX,"(HL+A)", 2,20}, /* 9c: 0100 1000 1000 1100 */
+ {STEAX,"(HL+B)", 2,20}, /* 9d: 0100 1000 1000 1101 */
+ {STEAX,"(HL+EA)",2,20}, /* 9e: 0100 1000 1000 1110 */
+ {STEAX,"(HL+%b)",3,20}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {DSLR,"EA", 2, 8}, /* a0: 0100 1000 1010 0000 */
+ {illegal,0, 2, 8}, /* a1: 0100 1000 1010 0001 */
+ {illegal,0, 2, 8}, /* a2: 0100 1000 1010 0010 */
+ {illegal,0, 2, 8}, /* a3: 0100 1000 1010 0011 */
+ {DSLL,"EA", 2, 8}, /* a4: 0100 1000 1010 0100 */
+ {illegal,0, 2, 8}, /* a5: 0100 1000 1010 0101 */
+ {illegal,0, 2, 8}, /* a6: 0100 1000 1010 0110 */
+ {illegal,0, 2, 8}, /* a7: 0100 1000 1010 0111 */
+ {TABLE,0, 2,17}, /* a8: 0100 1000 1010 1000 */
+ {illegal,0, 2, 8}, /* a9: 0100 1000 1010 1001 */
+ {illegal,0, 2, 8}, /* aa: 0100 1000 1010 1010 */
+ {illegal,0, 2, 8}, /* ab: 0100 1000 1010 1011 */
+ {illegal,0, 2, 8}, /* ac: 0100 1000 1010 1100 */
+ {illegal,0, 2, 8}, /* ad: 0100 1000 1010 1101 */
+ {illegal,0, 2, 8}, /* ae: 0100 1000 1010 1110 */
+ {illegal,0, 2, 8}, /* af: 0100 1000 1010 1111 */
+
+ {DRLR,"EA", 2, 8}, /* b0: 0100 1000 1011 0000 */
+ {illegal,0, 2, 8}, /* b1: 0100 1000 1011 0001 */
+ {illegal,0, 2, 8}, /* b2: 0100 1000 1011 0010 */
+ {illegal,0, 2, 8}, /* b3: 0100 1000 1011 0011 */
+ {DRLL,"EA", 2, 8}, /* b4: 0100 1000 1011 0100 */
+ {illegal,0, 2, 8}, /* b5: 0100 1000 1011 0101 */
+ {illegal,0, 2, 8}, /* b6: 0100 1000 1011 0110 */
+ {illegal,0, 2, 8}, /* b7: 0100 1000 1011 0111 */
+ {illegal,0, 2, 8}, /* b8: 0100 1000 1011 1000 */
+ {illegal,0, 2, 8}, /* b9: 0100 1000 1011 1001 */
+ {illegal,0, 2, 8}, /* ba: 0100 1000 1011 1010 */
+ {STOP,0, 2,12}, /* bb: 0100 1000 1011 1011 */ /* 7810 */
+ {illegal,0, 2, 8}, /* bc: 0100 1000 1011 1100 */
+ {illegal,0, 2, 8}, /* bd: 0100 1000 1011 1101 */
+ {illegal,0, 2, 8}, /* be: 0100 1000 1011 1110 */
+ {illegal,0, 2, 8}, /* bf: 0100 1000 1011 1111 */
+
+ {DMOV,"EA,ECNT", 2,14}, /* c0: 0100 1000 1100 0000 */
+ {DMOV,"EA,ECPT", 2,14}, /* c1: 0100 1000 1100 0001 */ /* 7810 */
+ {illegal,0, 2, 8}, /* c2: 0100 1000 1100 0010 */
+ {illegal,0, 2, 8}, /* c3: 0100 1000 1100 0011 */
+ {illegal,0, 2, 8}, /* c4: 0100 1000 1100 0100 */
+ {illegal,0, 2, 8}, /* c5: 0100 1000 1100 0101 */
+ {illegal,0, 2, 8}, /* c6: 0100 1000 1100 0110 */
+ {illegal,0, 2, 8}, /* c7: 0100 1000 1100 0111 */
+ {illegal,0, 2, 8}, /* c8: 0100 1000 1100 1000 */
+ {illegal,0, 2, 8}, /* c9: 0100 1000 1100 1001 */
+ {illegal,0, 2, 8}, /* ca: 0100 1000 1100 1010 */
+ {illegal,0, 2, 8}, /* cb: 0100 1000 1100 1011 */
+ {illegal,0, 2, 8}, /* cc: 0100 1000 1100 1100 */
+ {illegal,0, 2, 8}, /* cd: 0100 1000 1100 1101 */
+ {illegal,0, 2, 8}, /* ce: 0100 1000 1100 1110 */
+ {illegal,0, 2, 8}, /* cf: 0100 1000 1100 1111 */
+
+ {illegal,0, 2, 8}, /* d0: 0100 1000 1101 0000 */
+ {illegal,0, 2, 8}, /* d1: 0100 1000 1101 0001 */
+ {DMOV,"ETM0,EA", 2,14}, /* d2: 0100 1000 1101 0010 */
+ {DMOV,"ETM1,EA", 2,14}, /* d3: 0100 1000 1101 0011 */
+ {illegal,0, 2, 8}, /* d4: 0100 1000 1101 0100 */
+ {illegal,0, 2, 8}, /* d5: 0100 1000 1101 0101 */
+ {illegal,0, 2, 8}, /* d6: 0100 1000 1101 0110 */
+ {illegal,0, 2, 8}, /* d7: 0100 1000 1101 0111 */
+ {illegal,0, 2, 8}, /* d8: 0100 1000 1101 1000 */
+ {illegal,0, 2, 8}, /* d9: 0100 1000 1101 1001 */
+ {illegal,0, 2, 8}, /* da: 0100 1000 1101 1010 */
+ {illegal,0, 2, 8}, /* db: 0100 1000 1101 1011 */
+ {illegal,0, 2, 8}, /* dc: 0100 1000 1101 1100 */
+ {illegal,0, 2, 8}, /* dd: 0100 1000 1101 1101 */
+ {illegal,0, 2, 8}, /* de: 0100 1000 1101 1110 */
+ {illegal,0, 2, 8}, /* df: 0100 1000 1101 1111 */
+
+ {illegal,0, 2, 8}, /* e0: 0100 1000 1110 0000 */
+ {illegal,0, 2, 8}, /* e1: 0100 1000 1110 0001 */
+ {illegal,0, 2, 8}, /* e2: 0100 1000 1110 0010 */
+ {illegal,0, 2, 8}, /* e3: 0100 1000 1110 0011 */
+ {illegal,0, 2, 8}, /* e4: 0100 1000 1110 0100 */
+ {illegal,0, 2, 8}, /* e5: 0100 1000 1110 0101 */
+ {illegal,0, 2, 8}, /* e6: 0100 1000 1110 0110 */
+ {illegal,0, 2, 8}, /* e7: 0100 1000 1110 0111 */
+ {illegal,0, 2, 8}, /* e8: 0100 1000 1110 1000 */
+ {illegal,0, 2, 8}, /* e9: 0100 1000 1110 1001 */
+ {illegal,0, 2, 8}, /* ea: 0100 1000 1110 1010 */
+ {illegal,0, 2, 8}, /* eb: 0100 1000 1110 1011 */
+ {illegal,0, 2, 8}, /* ec: 0100 1000 1110 1100 */
+ {illegal,0, 2, 8}, /* ed: 0100 1000 1110 1101 */
+ {illegal,0, 2, 8}, /* ee: 0100 1000 1110 1110 */
+ {illegal,0, 2, 8}, /* ef: 0100 1000 1110 1111 */
+
+ {illegal,0, 2, 8}, /* f0: 0100 1000 1111 0000 */
+ {illegal,0, 2, 8}, /* f1: 0100 1000 1111 0001 */
+ {illegal,0, 2, 8}, /* f2: 0100 1000 1111 0010 */
+ {illegal,0, 2, 8}, /* f3: 0100 1000 1111 0011 */
+ {illegal,0, 2, 8}, /* f4: 0100 1000 1111 0100 */
+ {illegal,0, 2, 8}, /* f5: 0100 1000 1111 0101 */
+ {illegal,0, 2, 8}, /* f6: 0100 1000 1111 0110 */
+ {illegal,0, 2, 8}, /* f7: 0100 1000 1111 0111 */
+ {illegal,0, 2, 8}, /* f8: 0100 1000 1111 1000 */
+ {illegal,0, 2, 8}, /* f9: 0100 1000 1111 1001 */
+ {illegal,0, 2, 8}, /* fa: 0100 1000 1111 1010 */
+ {illegal,0, 2, 8}, /* fb: 0100 1000 1111 1011 */
+ {illegal,0, 2, 8}, /* fc: 0100 1000 1111 1100 */
+ {illegal,0, 2, 8}, /* fd: 0100 1000 1111 1101 */
+ {illegal,0, 2, 8}, /* fe: 0100 1000 1111 1110 */
+ {illegal,0, 2, 8} /* ff: 0100 1000 1111 1111 */
+};
+
+static struct dasm_s dasm48_7807[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0100 1000 0000 0000 */
+ {SLRC,"A", 2, 8}, /* 01: 0100 1000 0000 0001 */
+ {SLRC,"B", 2, 8}, /* 02: 0100 1000 0000 0010 */
+ {SLRC,"C", 2, 8}, /* 03: 0100 1000 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0100 1000 0000 0100 */
+ {SLLC,"A", 2, 8}, /* 05: 0100 1000 0000 0101 */
+ {SLLC,"B", 2, 8}, /* 06: 0100 1000 0000 0110 */
+ {SLLC,"C", 2, 8}, /* 07: 0100 1000 0000 0111 */
+ {SK,"NV", 2, 8}, /* 08: 0100 1000 0000 1000 */
+ {illegal,0, 2, 8}, /* 09: 0100 1000 0000 1001 */
+ {SK,"CY", 2, 8}, /* 0a: 0100 1000 0000 1010 */
+ {SK,"HC", 2, 8}, /* 0b: 0100 1000 0000 1011 */
+ {SK,"Z", 2, 8}, /* 0c: 0100 1000 0000 1100 */
+ {illegal,0, 2, 8}, /* 0d: 0100 1000 0000 1101 */
+ {illegal,0, 2, 8}, /* 0e: 0100 1000 0000 1110 */
+ {illegal,0, 2, 8}, /* 0f: 0100 1000 0000 1111 */
+
+ {illegal,0, 2, 8}, /* 10: 0100 1000 0001 0000 */
+ {illegal,0, 2, 8}, /* 11: 0100 1000 0001 0001 */
+ {illegal,0, 2, 8}, /* 12: 0100 1000 0001 0010 */
+ {illegal,0, 2, 8}, /* 13: 0100 1000 0001 0011 */
+ {illegal,0, 2, 8}, /* 14: 0100 1000 0001 0100 */
+ {illegal,0, 2, 8}, /* 15: 0100 1000 0001 0101 */
+ {illegal,0, 2, 8}, /* 16: 0100 1000 0001 0110 */
+ {illegal,0, 2, 8}, /* 17: 0100 1000 0001 0111 */
+ {SKN,"NV", 2, 8}, /* 18: 0100 1000 0001 1000 */
+ {illegal,0, 2, 8}, /* 19: 0100 1000 0001 1001 */
+ {SKN,"CY", 2, 8}, /* 1a: 0100 1000 0001 1010 */
+ {SKN,"HC", 2, 8}, /* 1b: 0100 1000 0001 1011 */
+ {SKN,"Z", 2, 8}, /* 1c: 0100 1000 0001 1100 */
+ {illegal,0, 2, 8}, /* 1d: 0100 1000 0001 1101 */
+ {illegal,0, 2, 8}, /* 1e: 0100 1000 0001 1110 */
+ {illegal,0, 2, 8}, /* 1f: 0100 1000 0001 1111 */
+
+ {illegal,0, 2, 8}, /* 20: 0100 1000 0010 0000 */
+ {SLR,"A", 2, 8}, /* 21: 0100 1000 0010 0001 */
+ {SLR,"B", 2, 8}, /* 22: 0100 1000 0010 0010 */
+ {SLR,"C", 2, 8}, /* 23: 0100 1000 0010 0011 */
+ {illegal,0, 2, 8}, /* 24: 0100 1000 0010 0100 */
+ {SLL,"A", 2, 8}, /* 25: 0100 1000 0010 0101 */
+ {SLL,"B", 2, 8}, /* 26: 0100 1000 0010 0110 */
+ {SLL,"C", 2, 8}, /* 27: 0100 1000 0010 0111 */
+ {JEA,0, 2, 8}, /* 28: 0100 1000 0010 1000 */
+ {CALB,0, 2,17}, /* 29: 0100 1000 0010 1001 */
+ {CLC,0, 2, 8}, /* 2a: 0100 1000 0010 1010 */
+ {STC,0, 2, 8}, /* 2b: 0100 1000 0010 1011 */
+ {illegal,0, 2,32}, /* 2c: 0100 1000 0010 1100 */
+ {MUL,"A", 2,32}, /* 2d: 0100 1000 0010 1101 */
+ {MUL,"B", 2,32}, /* 2e: 0100 1000 0010 1110 */
+ {MUL,"C", 2,32}, /* 2f: 0100 1000 0010 1111 */
+
+ {illegal,0, 2, 8}, /* 30: 0100 1000 0011 0000 */
+ {RLR,"A", 2, 8}, /* 31: 0100 1000 0011 0001 */
+ {RLR,"B", 2, 8}, /* 32: 0100 1000 0011 0010 */
+ {RLR,"C", 2, 8}, /* 33: 0100 1000 0011 0011 */
+ {illegal,0, 2, 8}, /* 34: 0100 1000 0011 0100 */
+ {RLL,"A", 2, 8}, /* 35: 0100 1000 0011 0101 */
+ {RLL,"B", 2, 8}, /* 36: 0100 1000 0011 0110 */
+ {RLL,"C", 2, 8}, /* 37: 0100 1000 0011 0111 */
+ {RLD,0, 2,17}, /* 38: 0100 1000 0011 1000 */
+ {RRD,0, 2,17}, /* 39: 0100 1000 0011 1001 */
+ {NEGA,0, 2, 8}, /* 3a: 0100 1000 0011 1010 */
+ {HALT,0, 2,12}, /* 3b: 0100 1000 0011 1011 */
+ {illegal,0, 2,59}, /* 3c: 0100 1000 0011 1100 */
+ {DIV,"A", 2,59}, /* 3d: 0100 1000 0011 1101 */
+ {DIV,"B", 2,59}, /* 3e: 0100 1000 0011 1110 */
+ {DIV,"C", 2,59}, /* 3f: 0100 1000 0011 1111 */
+
+ {SKIT,"NMI", 2, 8}, /* 40: 0100 1000 0100 0000 */
+ {SKIT,"FT0", 2, 8}, /* 41: 0100 1000 0100 0001 */
+ {SKIT,"FT1", 2, 8}, /* 42: 0100 1000 0100 0010 */
+ {SKIT,"F1", 2, 8}, /* 43: 0100 1000 0100 0011 */
+ {SKIT,"F2", 2, 8}, /* 44: 0100 1000 0100 0100 */
+ {SKIT,"FE0", 2, 8}, /* 45: 0100 1000 0100 0101 */
+ {SKIT,"FE1", 2, 8}, /* 46: 0100 1000 0100 0110 */
+ {SKIT,"FEIN", 2, 8}, /* 47: 0100 1000 0100 0111 */
+ {SKIT,"FAD", 2, 8}, /* 48: 0100 1000 0100 1000 */
+ {SKIT,"FSR", 2, 8}, /* 49: 0100 1000 0100 1001 */
+ {SKIT,"FST", 2, 8}, /* 4a: 0100 1000 0100 1010 */
+ {SKIT,"ER", 2, 8}, /* 4b: 0100 1000 0100 1011 */
+ {SKIT,"OV", 2, 8}, /* 4c: 0100 1000 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0100 1000 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0100 1000 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0100 1000 0100 1111 */
+
+ {SKIT,"AN4", 2, 8}, /* 50: 0100 1000 0101 0000 */
+ {SKIT,"AN5", 2, 8}, /* 51: 0100 1000 0101 0001 */
+ {SKIT,"AN6", 2, 8}, /* 52: 0100 1000 0101 0010 */
+ {SKIT,"AN7", 2, 8}, /* 53: 0100 1000 0101 0011 */
+ {SKIT,"SB", 2, 8}, /* 54: 0100 1000 0101 0100 */
+ {illegal,0, 2, 8}, /* 55: 0100 1000 0101 0101 */
+ {illegal,0, 2, 8}, /* 56: 0100 1000 0101 0110 */
+ {illegal,0, 2, 8}, /* 57: 0100 1000 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0100 1000 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0100 1000 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0100 1000 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0100 1000 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0100 1000 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0100 1000 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0100 1000 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0100 1000 0101 1111 */
+
+ {SKNIT,"NMI", 2, 8}, /* 60: 0100 1000 0110 0000 */
+ {SKNIT,"FT0", 2, 8}, /* 61: 0100 1000 0110 0001 */
+ {SKNIT,"FT1", 2, 8}, /* 62: 0100 1000 0110 0010 */
+ {SKNIT,"F1", 2, 8}, /* 63: 0100 1000 0110 0011 */
+ {SKNIT,"F2", 2, 8}, /* 64: 0100 1000 0110 0100 */
+ {SKNIT,"FE0", 2, 8}, /* 65: 0100 1000 0110 0101 */
+ {SKNIT,"FE1", 2, 8}, /* 66: 0100 1000 0110 0110 */
+ {SKNIT,"FEIN", 2, 8}, /* 67: 0100 1000 0110 0111 */
+ {SKNIT,"FAD", 2, 8}, /* 68: 0100 1000 0110 1000 */
+ {SKNIT,"FSR", 2, 8}, /* 69: 0100 1000 0110 1001 */
+ {SKNIT,"FST", 2, 8}, /* 6a: 0100 1000 0110 1010 */
+ {SKNIT,"ER", 2, 8}, /* 6b: 0100 1000 0110 1011 */
+ {SKNIT,"OV", 2, 8}, /* 6c: 0100 1000 0110 1100 */
+ {illegal,0, 2, 8}, /* 6d: 0100 1000 0110 1101 */
+ {illegal,0, 2, 8}, /* 6e: 0100 1000 0110 1110 */
+ {illegal,0, 2, 8}, /* 6f: 0100 1000 0110 1111 */
+
+ {SKNIT,"AN4", 2, 8}, /* 70: 0100 1000 0111 0000 */
+ {SKNIT,"AN5", 2, 8}, /* 71: 0100 1000 0111 0001 */
+ {SKNIT,"AN6", 2, 8}, /* 72: 0100 1000 0111 0010 */
+ {SKNIT,"AN7", 2, 8}, /* 73: 0100 1000 0111 0011 */
+ {SKNIT,"SB", 2, 8}, /* 74: 0100 1000 0111 0100 */
+ {illegal,0, 2, 8}, /* 75: 0100 1000 0111 0101 */
+ {illegal,0, 2, 8}, /* 76: 0100 1000 0111 0110 */
+ {illegal,0, 2, 8}, /* 77: 0100 1000 0111 0111 */
+ {illegal,0, 2, 8}, /* 78: 0100 1000 0111 1000 */
+ {illegal,0, 2, 8}, /* 79: 0100 1000 0111 1001 */
+ {illegal,0, 2, 8}, /* 7a: 0100 1000 0111 1010 */
+ {illegal,0, 2, 8}, /* 7b: 0100 1000 0111 1011 */
+ {illegal,0, 2, 8}, /* 7c: 0100 1000 0111 1100 */
+ {illegal,0, 2, 8}, /* 7d: 0100 1000 0111 1101 */
+ {illegal,0, 2, 8}, /* 7e: 0100 1000 0111 1110 */
+ {illegal,0, 2, 8}, /* 7f: 0100 1000 0111 1111 */
+
+ {illegal,0, 2, 8}, /* 80: 0100 1000 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0100 1000 1000 0001 */
+ {LDEAX,"(DE)", 2,14}, /* 82: 0100 1000 1000 0010 */
+ {LDEAX,"(HL)", 2,14}, /* 83: 0100 1000 1000 0011 */
+ {LDEAX,"(DE++)", 2,14}, /* 84: 0100 1000 1000 0100 */
+ {LDEAX,"(HL++)", 2,14}, /* 85: 0100 1000 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0100 1000 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0100 1000 1000 0111 */
+ {illegal,0, 2, 8}, /* 88: 0100 1000 1000 1000 */
+ {illegal,0, 2, 8}, /* 89: 0100 1000 1000 1001 */
+ {illegal,0, 2, 8}, /* 8a: 0100 1000 1000 1010 */
+ {LDEAX,"(DE+%b)",3,20}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */
+ {LDEAX,"(HL+A)", 2,20}, /* 8c: 0100 1000 1000 1100 */
+ {LDEAX,"(HL+B)", 2,20}, /* 8d: 0100 1000 1000 1101 */
+ {LDEAX,"(HL+EA)",2,20}, /* 8e: 0100 1000 1000 1110 */
+ {LDEAX,"(HL+%b)",3,20}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {illegal,0, 2, 8}, /* 90: 0100 1000 1000 0000 */
+ {illegal,0, 2, 8}, /* 91: 0100 1000 1000 0001 */
+ {STEAX,"(DE)", 2,14}, /* 92: 0100 1000 1000 0010 */
+ {STEAX,"(HL)", 2,14}, /* 93: 0100 1000 1000 0011 */
+ {STEAX,"(DE++)", 2,14}, /* 94: 0100 1000 1000 0100 */
+ {STEAX,"(HL++)", 2,14}, /* 95: 0100 1000 1000 0101 */
+ {illegal,0, 2, 8}, /* 96: 0100 1000 1000 0110 */
+ {illegal,0, 2, 8}, /* 97: 0100 1000 1000 0111 */
+ {illegal,0, 2, 8}, /* 98: 0100 1000 1000 1000 */
+ {illegal,0, 2, 8}, /* 99: 0100 1000 1000 1001 */
+ {illegal,0, 2, 8}, /* 9a: 0100 1000 1000 1010 */
+ {STEAX,"(DE+%b)",3,20}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */
+ {STEAX,"(HL+A)", 2,20}, /* 9c: 0100 1000 1000 1100 */
+ {STEAX,"(HL+B)", 2,20}, /* 9d: 0100 1000 1000 1101 */
+ {STEAX,"(HL+EA)",2,20}, /* 9e: 0100 1000 1000 1110 */
+ {STEAX,"(HL+%b)",3,20}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {DSLR,"EA", 2, 8}, /* a0: 0100 1000 1010 0000 */
+ {illegal,0, 2, 8}, /* a1: 0100 1000 1010 0001 */
+ {illegal,0, 2, 8}, /* a2: 0100 1000 1010 0010 */
+ {illegal,0, 2, 8}, /* a3: 0100 1000 1010 0011 */
+ {DSLL,"EA", 2, 8}, /* a4: 0100 1000 1010 0100 */
+ {illegal,0, 2, 8}, /* a5: 0100 1000 1010 0101 */
+ {illegal,0, 2, 8}, /* a6: 0100 1000 1010 0110 */
+ {illegal,0, 2, 8}, /* a7: 0100 1000 1010 0111 */
+ {TABLE,0, 2,17}, /* a8: 0100 1000 1010 1000 */
+ {illegal,0, 2, 8}, /* a9: 0100 1000 1010 1001 */
+ {CMC,0, 2, 8}, /* aa: 0100 1000 1010 1010 */ /* 7807 */
+ {illegal,0, 2, 8}, /* ab: 0100 1000 1010 1011 */
+ {EXA,0, 2, 8}, /* ac: 0100 1000 1010 1100 */ /* 7807 */
+ {EXR,0, 2, 8}, /* ad: 0100 1000 1010 1101 */ /* 7807 */
+ {EXH,0, 2, 8}, /* ae: 0100 1000 1010 1110 */ /* 7807 */
+ {EXX,0, 2, 8}, /* af: 0100 1000 1010 1111 */ /* 7807 */
+
+ {DRLR,"EA", 2, 8}, /* b0: 0100 1000 1011 0000 */
+ {illegal,0, 2, 8}, /* b1: 0100 1000 1011 0001 */
+ {illegal,0, 2, 8}, /* b2: 0100 1000 1011 0010 */
+ {illegal,0, 2, 8}, /* b3: 0100 1000 1011 0011 */
+ {DRLL,"EA", 2, 8}, /* b4: 0100 1000 1011 0100 */
+ {illegal,0, 2, 8}, /* b5: 0100 1000 1011 0101 */
+ {illegal,0, 2, 8}, /* b6: 0100 1000 1011 0110 */
+ {illegal,0, 2, 8}, /* b7: 0100 1000 1011 0111 */
+ {illegal,0, 2, 8}, /* b8: 0100 1000 1011 1000 */
+ {illegal,0, 2, 8}, /* b9: 0100 1000 1011 1001 */
+ {illegal,0, 2, 8}, /* ba: 0100 1000 1011 1010 */
+ {illegal,0, 2, 8}, /* bb: 0100 1000 1011 1011 */
+ {illegal,0, 2, 8}, /* bc: 0100 1000 1011 1100 */
+ {illegal,0, 2, 8}, /* bd: 0100 1000 1011 1101 */
+ {illegal,0, 2, 8}, /* be: 0100 1000 1011 1110 */
+ {illegal,0, 2, 8}, /* bf: 0100 1000 1011 1111 */
+
+ {DMOV,"EA,ECNT", 2,14}, /* c0: 0100 1000 1100 0000 */
+ {DMOV,"EA,ECPT0",2,14}, /* c1: 0100 1000 1100 0001 */ /* 7807 */
+ {DMOV,"EA,ECPT1",2,14}, /* c2: 0100 1000 1100 0010 */ /* 7807 */
+ {illegal,0, 2, 8}, /* c3: 0100 1000 1100 0011 */
+ {illegal,0, 2, 8}, /* c4: 0100 1000 1100 0100 */
+ {illegal,0, 2, 8}, /* c5: 0100 1000 1100 0101 */
+ {illegal,0, 2, 8}, /* c6: 0100 1000 1100 0110 */
+ {illegal,0, 2, 8}, /* c7: 0100 1000 1100 0111 */
+ {illegal,0, 2, 8}, /* c8: 0100 1000 1100 1000 */
+ {illegal,0, 2, 8}, /* c9: 0100 1000 1100 1001 */
+ {illegal,0, 2, 8}, /* ca: 0100 1000 1100 1010 */
+ {illegal,0, 2, 8}, /* cb: 0100 1000 1100 1011 */
+ {illegal,0, 2, 8}, /* cc: 0100 1000 1100 1100 */
+ {illegal,0, 2, 8}, /* cd: 0100 1000 1100 1101 */
+ {illegal,0, 2, 8}, /* ce: 0100 1000 1100 1110 */
+ {illegal,0, 2, 8}, /* cf: 0100 1000 1100 1111 */
+
+ {illegal,0, 2, 8}, /* d0: 0100 1000 1101 0000 */
+ {illegal,0, 2, 8}, /* d1: 0100 1000 1101 0001 */
+ {DMOV,"ETM0,EA", 2,14}, /* d2: 0100 1000 1101 0010 */
+ {DMOV,"ETM1,EA", 2,14}, /* d3: 0100 1000 1101 0011 */
+ {illegal,0, 2, 8}, /* d4: 0100 1000 1101 0100 */
+ {illegal,0, 2, 8}, /* d5: 0100 1000 1101 0101 */
+ {illegal,0, 2, 8}, /* d6: 0100 1000 1101 0110 */
+ {illegal,0, 2, 8}, /* d7: 0100 1000 1101 0111 */
+ {illegal,0, 2, 8}, /* d8: 0100 1000 1101 1000 */
+ {illegal,0, 2, 8}, /* d9: 0100 1000 1101 1001 */
+ {illegal,0, 2, 8}, /* da: 0100 1000 1101 1010 */
+ {illegal,0, 2, 8}, /* db: 0100 1000 1101 1011 */
+ {illegal,0, 2, 8}, /* dc: 0100 1000 1101 1100 */
+ {illegal,0, 2, 8}, /* dd: 0100 1000 1101 1101 */
+ {illegal,0, 2, 8}, /* de: 0100 1000 1101 1110 */
+ {illegal,0, 2, 8}, /* df: 0100 1000 1101 1111 */
+
+ {illegal,0, 2, 8}, /* e0: 0100 1000 1110 0000 */
+ {illegal,0, 2, 8}, /* e1: 0100 1000 1110 0001 */
+ {illegal,0, 2, 8}, /* e2: 0100 1000 1110 0010 */
+ {illegal,0, 2, 8}, /* e3: 0100 1000 1110 0011 */
+ {illegal,0, 2, 8}, /* e4: 0100 1000 1110 0100 */
+ {illegal,0, 2, 8}, /* e5: 0100 1000 1110 0101 */
+ {illegal,0, 2, 8}, /* e6: 0100 1000 1110 0110 */
+ {illegal,0, 2, 8}, /* e7: 0100 1000 1110 0111 */
+ {illegal,0, 2, 8}, /* e8: 0100 1000 1110 1000 */
+ {illegal,0, 2, 8}, /* e9: 0100 1000 1110 1001 */
+ {illegal,0, 2, 8}, /* ea: 0100 1000 1110 1010 */
+ {illegal,0, 2, 8}, /* eb: 0100 1000 1110 1011 */
+ {illegal,0, 2, 8}, /* ec: 0100 1000 1110 1100 */
+ {illegal,0, 2, 8}, /* ed: 0100 1000 1110 1101 */
+ {illegal,0, 2, 8}, /* ee: 0100 1000 1110 1110 */
+ {illegal,0, 2, 8}, /* ef: 0100 1000 1110 1111 */
+
+ {illegal,0, 2, 8}, /* f0: 0100 1000 1111 0000 */
+ {illegal,0, 2, 8}, /* f1: 0100 1000 1111 0001 */
+ {illegal,0, 2, 8}, /* f2: 0100 1000 1111 0010 */
+ {illegal,0, 2, 8}, /* f3: 0100 1000 1111 0011 */
+ {illegal,0, 2, 8}, /* f4: 0100 1000 1111 0100 */
+ {illegal,0, 2, 8}, /* f5: 0100 1000 1111 0101 */
+ {illegal,0, 2, 8}, /* f6: 0100 1000 1111 0110 */
+ {illegal,0, 2, 8}, /* f7: 0100 1000 1111 0111 */
+ {illegal,0, 2, 8}, /* f8: 0100 1000 1111 1000 */
+ {illegal,0, 2, 8}, /* f9: 0100 1000 1111 1001 */
+ {illegal,0, 2, 8}, /* fa: 0100 1000 1111 1010 */
+ {illegal,0, 2, 8}, /* fb: 0100 1000 1111 1011 */
+ {illegal,0, 2, 8}, /* fc: 0100 1000 1111 1100 */
+ {illegal,0, 2, 8}, /* fd: 0100 1000 1111 1101 */
+ {illegal,0, 2, 8}, /* fe: 0100 1000 1111 1110 */
+ {illegal,0, 2, 8} /* ff: 0100 1000 1111 1111 */
+};
+
+/* prefix 4C */
+static struct dasm_s dasm4C_7810[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0100 1100 0000 0000 */
+ {illegal,0, 2, 8}, /* 01: 0100 1100 0000 0001 */
+ {illegal,0, 2, 8}, /* 02: 0100 1100 0000 0010 */
+ {illegal,0, 2, 8}, /* 03: 0100 1100 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0100 1100 0000 0100 */
+ {illegal,0, 2, 8}, /* 05: 0100 1100 0000 0101 */
+ {illegal,0, 2, 8}, /* 06: 0100 1100 0000 0110 */
+ {illegal,0, 2, 8}, /* 07: 0100 1100 0000 0111 */
+ {illegal,0, 2, 8}, /* 08: 0100 1100 0000 1000 */
+ {illegal,0, 2, 8}, /* 09: 0100 1100 0000 1001 */
+ {illegal,0, 2, 8}, /* 0a: 0100 1100 0000 1010 */
+ {illegal,0, 2, 8}, /* 0b: 0100 1100 0000 1011 */
+ {illegal,0, 2, 8}, /* 0c: 0100 1100 0000 1100 */
+ {illegal,0, 2, 8}, /* 0d: 0100 1100 0000 1101 */
+ {illegal,0, 2, 8}, /* 0e: 0100 1100 0000 1110 */
+ {illegal,0, 2, 8}, /* 0f: 0100 1100 0000 1111 */
+
+ {illegal,0, 2, 8}, /* 10: 0100 1100 0001 0000 */
+ {illegal,0, 2, 8}, /* 11: 0100 1100 0001 0001 */
+ {illegal,0, 2, 8}, /* 12: 0100 1100 0001 0010 */
+ {illegal,0, 2, 8}, /* 13: 0100 1100 0001 0011 */
+ {illegal,0, 2, 8}, /* 14: 0100 1100 0001 0100 */
+ {illegal,0, 2, 8}, /* 15: 0100 1100 0001 0101 */
+ {illegal,0, 2, 8}, /* 16: 0100 1100 0001 0110 */
+ {illegal,0, 2, 8}, /* 17: 0100 1100 0001 0111 */
+ {illegal,0, 2, 8}, /* 18: 0100 1100 0001 1000 */
+ {illegal,0, 2, 8}, /* 19: 0100 1100 0001 1001 */
+ {illegal,0, 2, 8}, /* 1a: 0100 1100 0001 1010 */
+ {illegal,0, 2, 8}, /* 1b: 0100 1100 0001 1011 */
+ {illegal,0, 2, 8}, /* 1c: 0100 1100 0001 1100 */
+ {illegal,0, 2, 8}, /* 1d: 0100 1100 0001 1101 */
+ {illegal,0, 2, 8}, /* 1e: 0100 1100 0001 1110 */
+ {illegal,0, 2, 8}, /* 1f: 0100 1100 0001 1111 */
+
+ {illegal,0, 2, 8}, /* 20: 0100 1100 0010 0000 */
+ {illegal,0, 2, 8}, /* 21: 0100 1100 0010 0001 */
+ {illegal,0, 2, 8}, /* 22: 0100 1100 0010 0010 */
+ {illegal,0, 2, 8}, /* 23: 0100 1100 0010 0011 */
+ {illegal,0, 2, 8}, /* 24: 0100 1100 0010 0100 */
+ {illegal,0, 2, 8}, /* 25: 0100 1100 0010 0101 */
+ {illegal,0, 2, 8}, /* 26: 0100 1100 0010 0110 */
+ {illegal,0, 2, 8}, /* 27: 0100 1100 0010 0111 */
+ {illegal,0, 2, 8}, /* 28: 0100 1100 0010 1000 */
+ {illegal,0, 2, 8}, /* 29: 0100 1100 0010 1001 */
+ {illegal,0, 2, 8}, /* 2a: 0100 1100 0010 1010 */
+ {illegal,0, 2, 8}, /* 2b: 0100 1100 0010 1011 */
+ {illegal,0, 2, 8}, /* 2c: 0100 1100 0010 1100 */
+ {illegal,0, 2, 8}, /* 2d: 0100 1100 0010 1101 */
+ {illegal,0, 2, 8}, /* 2e: 0100 1100 0010 1110 */
+ {illegal,0, 2, 8}, /* 2f: 0100 1100 0010 1111 */
+
+ {illegal,0, 2, 8}, /* 30: 0100 1100 0011 0000 */
+ {illegal,0, 2, 8}, /* 31: 0100 1100 0011 0001 */
+ {illegal,0, 2, 8}, /* 32: 0100 1100 0011 0010 */
+ {illegal,0, 2, 8}, /* 33: 0100 1100 0011 0011 */
+ {illegal,0, 2, 8}, /* 34: 0100 1100 0011 0100 */
+ {illegal,0, 2, 8}, /* 35: 0100 1100 0011 0101 */
+ {illegal,0, 2, 8}, /* 36: 0100 1100 0011 0110 */
+ {illegal,0, 2, 8}, /* 37: 0100 1100 0011 0111 */
+ {illegal,0, 2, 8}, /* 38: 0100 1100 0011 1000 */
+ {illegal,0, 2, 8}, /* 39: 0100 1100 0011 1001 */
+ {illegal,0, 2, 8}, /* 3a: 0100 1100 0011 1010 */
+ {illegal,0, 2, 8}, /* 3b: 0100 1100 0011 1011 */
+ {illegal,0, 2, 8}, /* 3c: 0100 1100 0011 1100 */
+ {illegal,0, 2, 8}, /* 3d: 0100 1100 0011 1101 */
+ {illegal,0, 2, 8}, /* 3e: 0100 1100 0011 1110 */
+ {illegal,0, 2, 8}, /* 3f: 0100 1100 0011 1111 */
+
+ {illegal,0, 2, 8}, /* 40: 0100 1100 0100 0000 */
+ {illegal,0, 2, 8}, /* 41: 0100 1100 0100 0001 */
+ {illegal,0, 2, 8}, /* 42: 0100 1100 0100 0010 */
+ {illegal,0, 2, 8}, /* 43: 0100 1100 0100 0011 */
+ {illegal,0, 2, 8}, /* 44: 0100 1100 0100 0100 */
+ {illegal,0, 2, 8}, /* 45: 0100 1100 0100 0101 */
+ {illegal,0, 2, 8}, /* 46: 0100 1100 0100 0110 */
+ {illegal,0, 2, 8}, /* 47: 0100 1100 0100 0111 */
+ {illegal,0, 2, 8}, /* 48: 0100 1100 0100 1000 */
+ {illegal,0, 2, 8}, /* 49: 0100 1100 0100 1001 */
+ {illegal,0, 2, 8}, /* 4a: 0100 1100 0100 1010 */
+ {illegal,0, 2, 8}, /* 4b: 0100 1100 0100 1011 */
+ {illegal,0, 2, 8}, /* 4c: 0100 1100 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0100 1100 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0100 1100 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0100 1100 0100 1111 */
+
+ {illegal,0, 2, 8}, /* 50: 0100 1100 0101 0000 */
+ {illegal,0, 2, 8}, /* 51: 0100 1100 0101 0001 */
+ {illegal,0, 2, 8}, /* 52: 0100 1100 0101 0010 */
+ {illegal,0, 2, 8}, /* 53: 0100 1100 0101 0011 */
+ {illegal,0, 2, 8}, /* 54: 0100 1100 0101 0100 */
+ {illegal,0, 2, 8}, /* 55: 0100 1100 0101 0101 */
+ {illegal,0, 2, 8}, /* 56: 0100 1100 0101 0110 */
+ {illegal,0, 2, 8}, /* 57: 0100 1100 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0100 1100 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0100 1100 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0100 1100 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0100 1100 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0100 1100 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0100 1100 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0100 1100 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0100 1100 0101 1111 */
+
+ {illegal,0, 2, 8}, /* 60: 0100 1100 0110 0000 */
+ {illegal,0, 2, 8}, /* 61: 0100 1100 0110 0001 */
+ {illegal,0, 2, 8}, /* 62: 0100 1100 0110 0010 */
+ {illegal,0, 2, 8}, /* 63: 0100 1100 0110 0011 */
+ {illegal,0, 2, 8}, /* 64: 0100 1100 0110 0100 */
+ {illegal,0, 2, 8}, /* 65: 0100 1100 0110 0101 */
+ {illegal,0, 2, 8}, /* 66: 0100 1100 0110 0110 */
+ {illegal,0, 2, 8}, /* 67: 0100 1100 0110 0111 */
+ {illegal,0, 2, 8}, /* 68: 0100 1100 0110 1000 */
+ {illegal,0, 2, 8}, /* 69: 0100 1100 0110 1001 */
+ {illegal,0, 2, 8}, /* 6a: 0100 1100 0110 1010 */
+ {illegal,0, 2, 8}, /* 6b: 0100 1100 0110 1011 */
+ {illegal,0, 2, 8}, /* 6c: 0100 1100 0110 1100 */
+ {illegal,0, 2, 8}, /* 6d: 0100 1100 0110 1101 */
+ {illegal,0, 2, 8}, /* 6e: 0100 1100 0110 1110 */
+ {illegal,0, 2, 8}, /* 6f: 0100 1100 0110 1111 */
+
+ {illegal,0, 2, 8}, /* 70: 0100 1100 0111 0000 */
+ {illegal,0, 2, 8}, /* 71: 0100 1100 0111 0001 */
+ {illegal,0, 2, 8}, /* 72: 0100 1100 0111 0010 */
+ {illegal,0, 2, 8}, /* 73: 0100 1100 0111 0011 */
+ {illegal,0, 2, 8}, /* 74: 0100 1100 0111 0100 */
+ {illegal,0, 2, 8}, /* 75: 0100 1100 0111 0101 */
+ {illegal,0, 2, 8}, /* 76: 0100 1100 0111 0110 */
+ {illegal,0, 2, 8}, /* 77: 0100 1100 0111 0111 */
+ {illegal,0, 2, 8}, /* 78: 0100 1100 0111 1000 */
+ {illegal,0, 2, 8}, /* 79: 0100 1100 0111 1001 */
+ {illegal,0, 2, 8}, /* 7a: 0100 1100 0111 1010 */
+ {illegal,0, 2, 8}, /* 7b: 0100 1100 0111 1011 */
+ {illegal,0, 2, 8}, /* 7c: 0100 1100 0111 1100 */
+ {illegal,0, 2, 8}, /* 7d: 0100 1100 0111 1101 */
+ {illegal,0, 2, 8}, /* 7e: 0100 1100 0111 1110 */
+ {illegal,0, 2, 8}, /* 7f: 0100 1100 0111 1111 */
+
+ {illegal,0, 2, 8}, /* 80: 0100 1100 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0100 1100 1000 0001 */
+ {illegal,0, 2, 8}, /* 82: 0100 1100 1000 0010 */
+ {illegal,0, 2, 8}, /* 83: 0100 1100 1000 0011 */
+ {illegal,0, 2, 8}, /* 84: 0100 1100 1000 0100 */
+ {illegal,0, 2, 8}, /* 85: 0100 1100 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0100 1100 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0100 1100 1000 0111 */
+ {illegal,0, 2, 8}, /* 88: 0100 1100 1000 1000 */
+ {illegal,0, 2, 8}, /* 89: 0100 1100 1000 1001 */
+ {illegal,0, 2, 8}, /* 8a: 0100 1100 1000 1010 */
+ {illegal,0, 2, 8}, /* 8b: 0100 1100 1000 1011 */
+ {illegal,0, 2, 8}, /* 8c: 0100 1100 1000 1100 */
+ {illegal,0, 2, 8}, /* 8d: 0100 1100 1000 1101 */
+ {illegal,0, 2, 8}, /* 8e: 0100 1100 1000 1110 */
+ {illegal,0, 2, 8}, /* 8f: 0100 1100 1000 1111 */
+
+ {illegal,0, 2, 8}, /* 90: 0100 1100 1001 0000 */
+ {illegal,0, 2, 8}, /* 91: 0100 1100 1001 0001 */
+ {illegal,0, 2, 8}, /* 92: 0100 1100 1001 0010 */
+ {illegal,0, 2, 8}, /* 93: 0100 1100 1001 0011 */
+ {illegal,0, 2, 8}, /* 94: 0100 1100 1001 0100 */
+ {illegal,0, 2, 8}, /* 95: 0100 1100 1001 0101 */
+ {illegal,0, 2, 8}, /* 96: 0100 1100 1001 0110 */
+ {illegal,0, 2, 8}, /* 97: 0100 1100 1001 0111 */
+ {illegal,0, 2, 8}, /* 98: 0100 1100 1001 1000 */
+ {illegal,0, 2, 8}, /* 99: 0100 1100 1001 1001 */
+ {illegal,0, 2, 8}, /* 9a: 0100 1100 1001 1010 */
+ {illegal,0, 2, 8}, /* 9b: 0100 1100 1001 1011 */
+ {illegal,0, 2, 8}, /* 9c: 0100 1100 1001 1100 */
+ {illegal,0, 2, 8}, /* 9d: 0100 1100 1001 1101 */
+ {illegal,0, 2, 8}, /* 9e: 0100 1100 1001 1110 */
+ {illegal,0, 2, 8}, /* 9f: 0100 1100 1001 1111 */
+
+ {illegal,0, 2, 8}, /* a0: 0100 1100 1010 0000 */
+ {illegal,0, 2, 8}, /* a1: 0100 1100 1010 0001 */
+ {illegal,0, 2, 8}, /* a2: 0100 1100 1010 0010 */
+ {illegal,0, 2, 8}, /* a3: 0100 1100 1010 0011 */
+ {illegal,0, 2, 8}, /* a4: 0100 1100 1010 0100 */
+ {illegal,0, 2, 8}, /* a5: 0100 1100 1010 0101 */
+ {illegal,0, 2, 8}, /* a6: 0100 1100 1010 0110 */
+ {illegal,0, 2, 8}, /* a7: 0100 1100 1010 0111 */
+ {illegal,0, 2, 8}, /* a8: 0100 1100 1010 1000 */
+ {illegal,0, 2, 8}, /* a9: 0100 1100 1010 1001 */
+ {illegal,0, 2, 8}, /* aa: 0100 1100 1010 1010 */
+ {illegal,0, 2, 8}, /* ab: 0100 1100 1010 1011 */
+ {illegal,0, 2, 8}, /* ac: 0100 1100 1010 1100 */
+ {illegal,0, 2, 8}, /* ad: 0100 1100 1010 1101 */
+ {illegal,0, 2, 8}, /* ae: 0100 1100 1010 1110 */
+ {illegal,0, 2, 8}, /* af: 0100 1100 1010 1111 */
+
+ {illegal,0, 2, 8}, /* b0: 0100 1100 1011 0000 */
+ {illegal,0, 2, 8}, /* b1: 0100 1100 1011 0001 */
+ {illegal,0, 2, 8}, /* b2: 0100 1100 1011 0010 */
+ {illegal,0, 2, 8}, /* b3: 0100 1100 1011 0011 */
+ {illegal,0, 2, 8}, /* b4: 0100 1100 1011 0100 */
+ {illegal,0, 2, 8}, /* b5: 0100 1100 1011 0101 */
+ {illegal,0, 2, 8}, /* b6: 0100 1100 1011 0110 */
+ {illegal,0, 2, 8}, /* b7: 0100 1100 1011 0111 */
+ {illegal,0, 2, 8}, /* b8: 0100 1100 1011 1000 */
+ {illegal,0, 2, 8}, /* b9: 0100 1100 1011 1001 */
+ {illegal,0, 2, 8}, /* ba: 0100 1100 1011 1010 */
+ {illegal,0, 2, 8}, /* bb: 0100 1100 1011 1011 */
+ {illegal,0, 2, 8}, /* bc: 0100 1100 1011 1100 */
+ {illegal,0, 2, 8}, /* bd: 0100 1100 1011 1101 */
+ {illegal,0, 2, 8}, /* be: 0100 1100 1011 1110 */
+ {illegal,0, 2, 8}, /* bf: 0100 1100 1011 1111 */
+
+ {MOV,"A,PA", 2,10}, /* c0: 0100 1100 1100 0000 */
+ {MOV,"A,PB", 2,10}, /* c1: 0100 1100 1100 0001 */
+ {MOV,"A,PC", 2,10}, /* c2: 0100 1100 1100 0010 */
+ {MOV,"A,PD", 2,10}, /* c3: 0100 1100 1100 0011 */
+ {illegal,0, 2,10}, /* c4: 0100 1100 1100 0100 */
+ {MOV,"A,PF", 2,10}, /* c5: 0100 1100 1100 0101 */
+ {MOV,"A,MKH", 2,10}, /* c6: 0100 1100 1100 0110 */
+ {MOV,"A,MKL", 2,10}, /* c7: 0100 1100 1100 0111 */
+ {MOV,"A,ANM", 2,10}, /* c8: 0100 1100 1100 1000 */ /* 7810 */
+ {MOV,"A,SMH", 2,10}, /* c9: 0100 1100 1100 1001 */
+ {illegal,0, 2,10}, /* ca: 0100 1100 1100 1010 */
+ {MOV,"A,EOM", 2,10}, /* cb: 0100 1100 1100 1011 */
+ {illegal,0, 2,10}, /* cc: 0100 1100 1100 1100 */
+ {MOV,"A,TMM", 2,10}, /* cd: 0100 1100 1100 1101 */
+ {illegal,0, 2,10}, /* ce: 0100 1100 1100 1110 */
+ {illegal,0, 2,10}, /* cf: 0100 1100 1100 1111 */
+
+ {illegal,0, 2,10}, /* d0: 0100 1100 1101 0000 */
+ {illegal,0, 2,10}, /* d1: 0100 1100 1101 0001 */
+ {illegal,0, 2,10}, /* d2: 0100 1100 1101 0010 */
+ {illegal,0, 2,10}, /* d3: 0100 1100 1101 0011 */
+ {illegal,0, 2,10}, /* d4: 0100 1100 1101 0100 */
+ {illegal,0, 2,10}, /* d5: 0100 1100 1101 0101 */
+ {illegal,0, 2,10}, /* d6: 0100 1100 1101 0110 */
+ {illegal,0, 2,10}, /* d7: 0100 1100 1101 0111 */
+ {illegal,0, 2,10}, /* d8: 0100 1100 1101 1000 */
+ {MOV,"A,RXB", 2,10}, /* d9: 0100 1100 1101 1001 */
+ {illegal,0, 2,10}, /* da: 0100 1100 1101 1010 */
+ {illegal,0, 2,10}, /* db: 0100 1100 1101 1011 */
+ {illegal,0, 2,10}, /* dc: 0100 1100 1101 1100 */
+ {illegal,0, 2,10}, /* dd: 0100 1100 1101 1101 */
+ {illegal,0, 2,10}, /* de: 0100 1100 1101 1110 */
+ {illegal,0, 2,10}, /* df: 0100 1100 1101 1111 */
+
+ {MOV,"A,CR0", 2,10}, /* e0: 0100 1100 1110 0000 */ /* 7810 */
+ {MOV,"A,CR1", 2,10}, /* e1: 0100 1100 1110 0001 */ /* 7810 */
+ {MOV,"A,CR2", 2,10}, /* e2: 0100 1100 1110 0010 */ /* 7810 */
+ {MOV,"A,CR3", 2,10}, /* e3: 0100 1100 1110 0011 */ /* 7810 */
+ {illegal,0, 2,10}, /* e4: 0100 1100 1110 0100 */
+ {illegal,0, 2,10}, /* e5: 0100 1100 1110 0101 */
+ {illegal,0, 2,10}, /* e6: 0100 1100 1110 0110 */
+ {illegal,0, 2,10}, /* e7: 0100 1100 1110 0111 */
+ {illegal,0, 2,10}, /* e8: 0100 1100 1110 1000 */
+ {illegal,0, 2,10}, /* e9: 0100 1100 1110 1001 */
+ {illegal,0, 2,10}, /* ea: 0100 1100 1110 1010 */
+ {illegal,0, 2,10}, /* eb: 0100 1100 1110 1011 */
+ {illegal,0, 2,10}, /* ec: 0100 1100 1110 1100 */
+ {illegal,0, 2,10}, /* ed: 0100 1100 1110 1101 */
+ {illegal,0, 2,10}, /* ee: 0100 1100 1110 1110 */
+ {illegal,0, 2,10}, /* ef: 0100 1100 1110 1111 */
+
+ {illegal,0, 2,10}, /* f0: 0100 1100 1111 0000 */
+ {illegal,0, 2,10}, /* f1: 0100 1100 1111 0001 */
+ {illegal,0, 2,10}, /* f2: 0100 1100 1111 0010 */
+ {illegal,0, 2,10}, /* f3: 0100 1100 1111 0011 */
+ {illegal,0, 2,10}, /* f4: 0100 1100 1111 0100 */
+ {illegal,0, 2,10}, /* f5: 0100 1100 1111 0101 */
+ {illegal,0, 2,10}, /* f6: 0100 1100 1111 0110 */
+ {illegal,0, 2,10}, /* f7: 0100 1100 1111 0111 */
+ {illegal,0, 2,10}, /* f8: 0100 1100 1111 1000 */
+ {illegal,0, 2,10}, /* f9: 0100 1100 1111 1001 */
+ {illegal,0, 2,10}, /* fa: 0100 1100 1111 1010 */
+ {illegal,0, 2,10}, /* fb: 0100 1100 1111 1011 */
+ {illegal,0, 2,10}, /* fc: 0100 1100 1111 1100 */
+ {illegal,0, 2,10}, /* fd: 0100 1100 1111 1101 */
+ {illegal,0, 2,10}, /* fe: 0100 1100 1111 1110 */
+ {illegal,0, 2,10} /* ff: 0100 1100 1111 1111 */
+};
+
+static struct dasm_s dasm4C_7807[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0100 1100 0000 0000 */
+ {illegal,0, 2, 8}, /* 01: 0100 1100 0000 0001 */
+ {illegal,0, 2, 8}, /* 02: 0100 1100 0000 0010 */
+ {illegal,0, 2, 8}, /* 03: 0100 1100 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0100 1100 0000 0100 */
+ {illegal,0, 2, 8}, /* 05: 0100 1100 0000 0101 */
+ {illegal,0, 2, 8}, /* 06: 0100 1100 0000 0110 */
+ {illegal,0, 2, 8}, /* 07: 0100 1100 0000 0111 */
+ {illegal,0, 2, 8}, /* 08: 0100 1100 0000 1000 */
+ {illegal,0, 2, 8}, /* 09: 0100 1100 0000 1001 */
+ {illegal,0, 2, 8}, /* 0a: 0100 1100 0000 1010 */
+ {illegal,0, 2, 8}, /* 0b: 0100 1100 0000 1011 */
+ {illegal,0, 2, 8}, /* 0c: 0100 1100 0000 1100 */
+ {illegal,0, 2, 8}, /* 0d: 0100 1100 0000 1101 */
+ {illegal,0, 2, 8}, /* 0e: 0100 1100 0000 1110 */
+ {illegal,0, 2, 8}, /* 0f: 0100 1100 0000 1111 */
+
+ {illegal,0, 2, 8}, /* 10: 0100 1100 0001 0000 */
+ {illegal,0, 2, 8}, /* 11: 0100 1100 0001 0001 */
+ {illegal,0, 2, 8}, /* 12: 0100 1100 0001 0010 */
+ {illegal,0, 2, 8}, /* 13: 0100 1100 0001 0011 */
+ {illegal,0, 2, 8}, /* 14: 0100 1100 0001 0100 */
+ {illegal,0, 2, 8}, /* 15: 0100 1100 0001 0101 */
+ {illegal,0, 2, 8}, /* 16: 0100 1100 0001 0110 */
+ {illegal,0, 2, 8}, /* 17: 0100 1100 0001 0111 */
+ {illegal,0, 2, 8}, /* 18: 0100 1100 0001 1000 */
+ {illegal,0, 2, 8}, /* 19: 0100 1100 0001 1001 */
+ {illegal,0, 2, 8}, /* 1a: 0100 1100 0001 1010 */
+ {illegal,0, 2, 8}, /* 1b: 0100 1100 0001 1011 */
+ {illegal,0, 2, 8}, /* 1c: 0100 1100 0001 1100 */
+ {illegal,0, 2, 8}, /* 1d: 0100 1100 0001 1101 */
+ {illegal,0, 2, 8}, /* 1e: 0100 1100 0001 1110 */
+ {illegal,0, 2, 8}, /* 1f: 0100 1100 0001 1111 */
+
+ {illegal,0, 2, 8}, /* 20: 0100 1100 0010 0000 */
+ {illegal,0, 2, 8}, /* 21: 0100 1100 0010 0001 */
+ {illegal,0, 2, 8}, /* 22: 0100 1100 0010 0010 */
+ {illegal,0, 2, 8}, /* 23: 0100 1100 0010 0011 */
+ {illegal,0, 2, 8}, /* 24: 0100 1100 0010 0100 */
+ {illegal,0, 2, 8}, /* 25: 0100 1100 0010 0101 */
+ {illegal,0, 2, 8}, /* 26: 0100 1100 0010 0110 */
+ {illegal,0, 2, 8}, /* 27: 0100 1100 0010 0111 */
+ {illegal,0, 2, 8}, /* 28: 0100 1100 0010 1000 */
+ {illegal,0, 2, 8}, /* 29: 0100 1100 0010 1001 */
+ {illegal,0, 2, 8}, /* 2a: 0100 1100 0010 1010 */
+ {illegal,0, 2, 8}, /* 2b: 0100 1100 0010 1011 */
+ {illegal,0, 2, 8}, /* 2c: 0100 1100 0010 1100 */
+ {illegal,0, 2, 8}, /* 2d: 0100 1100 0010 1101 */
+ {illegal,0, 2, 8}, /* 2e: 0100 1100 0010 1110 */
+ {illegal,0, 2, 8}, /* 2f: 0100 1100 0010 1111 */
+
+ {illegal,0, 2, 8}, /* 30: 0100 1100 0011 0000 */
+ {illegal,0, 2, 8}, /* 31: 0100 1100 0011 0001 */
+ {illegal,0, 2, 8}, /* 32: 0100 1100 0011 0010 */
+ {illegal,0, 2, 8}, /* 33: 0100 1100 0011 0011 */
+ {illegal,0, 2, 8}, /* 34: 0100 1100 0011 0100 */
+ {illegal,0, 2, 8}, /* 35: 0100 1100 0011 0101 */
+ {illegal,0, 2, 8}, /* 36: 0100 1100 0011 0110 */
+ {illegal,0, 2, 8}, /* 37: 0100 1100 0011 0111 */
+ {illegal,0, 2, 8}, /* 38: 0100 1100 0011 1000 */
+ {illegal,0, 2, 8}, /* 39: 0100 1100 0011 1001 */
+ {illegal,0, 2, 8}, /* 3a: 0100 1100 0011 1010 */
+ {illegal,0, 2, 8}, /* 3b: 0100 1100 0011 1011 */
+ {illegal,0, 2, 8}, /* 3c: 0100 1100 0011 1100 */
+ {illegal,0, 2, 8}, /* 3d: 0100 1100 0011 1101 */
+ {illegal,0, 2, 8}, /* 3e: 0100 1100 0011 1110 */
+ {illegal,0, 2, 8}, /* 3f: 0100 1100 0011 1111 */
+
+ {illegal,0, 2, 8}, /* 40: 0100 1100 0100 0000 */
+ {illegal,0, 2, 8}, /* 41: 0100 1100 0100 0001 */
+ {illegal,0, 2, 8}, /* 42: 0100 1100 0100 0010 */
+ {illegal,0, 2, 8}, /* 43: 0100 1100 0100 0011 */
+ {illegal,0, 2, 8}, /* 44: 0100 1100 0100 0100 */
+ {illegal,0, 2, 8}, /* 45: 0100 1100 0100 0101 */
+ {illegal,0, 2, 8}, /* 46: 0100 1100 0100 0110 */
+ {illegal,0, 2, 8}, /* 47: 0100 1100 0100 0111 */
+ {illegal,0, 2, 8}, /* 48: 0100 1100 0100 1000 */
+ {illegal,0, 2, 8}, /* 49: 0100 1100 0100 1001 */
+ {illegal,0, 2, 8}, /* 4a: 0100 1100 0100 1010 */
+ {illegal,0, 2, 8}, /* 4b: 0100 1100 0100 1011 */
+ {illegal,0, 2, 8}, /* 4c: 0100 1100 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0100 1100 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0100 1100 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0100 1100 0100 1111 */
+
+ {illegal,0, 2, 8}, /* 50: 0100 1100 0101 0000 */
+ {illegal,0, 2, 8}, /* 51: 0100 1100 0101 0001 */
+ {illegal,0, 2, 8}, /* 52: 0100 1100 0101 0010 */
+ {illegal,0, 2, 8}, /* 53: 0100 1100 0101 0011 */
+ {illegal,0, 2, 8}, /* 54: 0100 1100 0101 0100 */
+ {illegal,0, 2, 8}, /* 55: 0100 1100 0101 0101 */
+ {illegal,0, 2, 8}, /* 56: 0100 1100 0101 0110 */
+ {illegal,0, 2, 8}, /* 57: 0100 1100 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0100 1100 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0100 1100 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0100 1100 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0100 1100 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0100 1100 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0100 1100 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0100 1100 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0100 1100 0101 1111 */
+
+ {illegal,0, 2, 8}, /* 60: 0100 1100 0110 0000 */
+ {illegal,0, 2, 8}, /* 61: 0100 1100 0110 0001 */
+ {illegal,0, 2, 8}, /* 62: 0100 1100 0110 0010 */
+ {illegal,0, 2, 8}, /* 63: 0100 1100 0110 0011 */
+ {illegal,0, 2, 8}, /* 64: 0100 1100 0110 0100 */
+ {illegal,0, 2, 8}, /* 65: 0100 1100 0110 0101 */
+ {illegal,0, 2, 8}, /* 66: 0100 1100 0110 0110 */
+ {illegal,0, 2, 8}, /* 67: 0100 1100 0110 0111 */
+ {illegal,0, 2, 8}, /* 68: 0100 1100 0110 1000 */
+ {illegal,0, 2, 8}, /* 69: 0100 1100 0110 1001 */
+ {illegal,0, 2, 8}, /* 6a: 0100 1100 0110 1010 */
+ {illegal,0, 2, 8}, /* 6b: 0100 1100 0110 1011 */
+ {illegal,0, 2, 8}, /* 6c: 0100 1100 0110 1100 */
+ {illegal,0, 2, 8}, /* 6d: 0100 1100 0110 1101 */
+ {illegal,0, 2, 8}, /* 6e: 0100 1100 0110 1110 */
+ {illegal,0, 2, 8}, /* 6f: 0100 1100 0110 1111 */
+
+ {illegal,0, 2, 8}, /* 70: 0100 1100 0111 0000 */
+ {illegal,0, 2, 8}, /* 71: 0100 1100 0111 0001 */
+ {illegal,0, 2, 8}, /* 72: 0100 1100 0111 0010 */
+ {illegal,0, 2, 8}, /* 73: 0100 1100 0111 0011 */
+ {illegal,0, 2, 8}, /* 74: 0100 1100 0111 0100 */
+ {illegal,0, 2, 8}, /* 75: 0100 1100 0111 0101 */
+ {illegal,0, 2, 8}, /* 76: 0100 1100 0111 0110 */
+ {illegal,0, 2, 8}, /* 77: 0100 1100 0111 0111 */
+ {illegal,0, 2, 8}, /* 78: 0100 1100 0111 1000 */
+ {illegal,0, 2, 8}, /* 79: 0100 1100 0111 1001 */
+ {illegal,0, 2, 8}, /* 7a: 0100 1100 0111 1010 */
+ {illegal,0, 2, 8}, /* 7b: 0100 1100 0111 1011 */
+ {illegal,0, 2, 8}, /* 7c: 0100 1100 0111 1100 */
+ {illegal,0, 2, 8}, /* 7d: 0100 1100 0111 1101 */
+ {illegal,0, 2, 8}, /* 7e: 0100 1100 0111 1110 */
+ {illegal,0, 2, 8}, /* 7f: 0100 1100 0111 1111 */
+
+ {illegal,0, 2, 8}, /* 80: 0100 1100 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0100 1100 1000 0001 */
+ {illegal,0, 2, 8}, /* 82: 0100 1100 1000 0010 */
+ {illegal,0, 2, 8}, /* 83: 0100 1100 1000 0011 */
+ {illegal,0, 2, 8}, /* 84: 0100 1100 1000 0100 */
+ {illegal,0, 2, 8}, /* 85: 0100 1100 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0100 1100 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0100 1100 1000 0111 */
+ {illegal,0, 2, 8}, /* 88: 0100 1100 1000 1000 */
+ {illegal,0, 2, 8}, /* 89: 0100 1100 1000 1001 */
+ {illegal,0, 2, 8}, /* 8a: 0100 1100 1000 1010 */
+ {illegal,0, 2, 8}, /* 8b: 0100 1100 1000 1011 */
+ {illegal,0, 2, 8}, /* 8c: 0100 1100 1000 1100 */
+ {illegal,0, 2, 8}, /* 8d: 0100 1100 1000 1101 */
+ {illegal,0, 2, 8}, /* 8e: 0100 1100 1000 1110 */
+ {illegal,0, 2, 8}, /* 8f: 0100 1100 1000 1111 */
+
+ {illegal,0, 2, 8}, /* 90: 0100 1100 1001 0000 */
+ {illegal,0, 2, 8}, /* 91: 0100 1100 1001 0001 */
+ {illegal,0, 2, 8}, /* 92: 0100 1100 1001 0010 */
+ {illegal,0, 2, 8}, /* 93: 0100 1100 1001 0011 */
+ {illegal,0, 2, 8}, /* 94: 0100 1100 1001 0100 */
+ {illegal,0, 2, 8}, /* 95: 0100 1100 1001 0101 */
+ {illegal,0, 2, 8}, /* 96: 0100 1100 1001 0110 */
+ {illegal,0, 2, 8}, /* 97: 0100 1100 1001 0111 */
+ {illegal,0, 2, 8}, /* 98: 0100 1100 1001 1000 */
+ {illegal,0, 2, 8}, /* 99: 0100 1100 1001 1001 */
+ {illegal,0, 2, 8}, /* 9a: 0100 1100 1001 1010 */
+ {illegal,0, 2, 8}, /* 9b: 0100 1100 1001 1011 */
+ {illegal,0, 2, 8}, /* 9c: 0100 1100 1001 1100 */
+ {illegal,0, 2, 8}, /* 9d: 0100 1100 1001 1101 */
+ {illegal,0, 2, 8}, /* 9e: 0100 1100 1001 1110 */
+ {illegal,0, 2, 8}, /* 9f: 0100 1100 1001 1111 */
+
+ {illegal,0, 2, 8}, /* a0: 0100 1100 1010 0000 */
+ {illegal,0, 2, 8}, /* a1: 0100 1100 1010 0001 */
+ {illegal,0, 2, 8}, /* a2: 0100 1100 1010 0010 */
+ {illegal,0, 2, 8}, /* a3: 0100 1100 1010 0011 */
+ {illegal,0, 2, 8}, /* a4: 0100 1100 1010 0100 */
+ {illegal,0, 2, 8}, /* a5: 0100 1100 1010 0101 */
+ {illegal,0, 2, 8}, /* a6: 0100 1100 1010 0110 */
+ {illegal,0, 2, 8}, /* a7: 0100 1100 1010 0111 */
+ {illegal,0, 2, 8}, /* a8: 0100 1100 1010 1000 */
+ {illegal,0, 2, 8}, /* a9: 0100 1100 1010 1001 */
+ {illegal,0, 2, 8}, /* aa: 0100 1100 1010 1010 */
+ {illegal,0, 2, 8}, /* ab: 0100 1100 1010 1011 */
+ {illegal,0, 2, 8}, /* ac: 0100 1100 1010 1100 */
+ {illegal,0, 2, 8}, /* ad: 0100 1100 1010 1101 */
+ {illegal,0, 2, 8}, /* ae: 0100 1100 1010 1110 */
+ {illegal,0, 2, 8}, /* af: 0100 1100 1010 1111 */
+
+ {illegal,0, 2, 8}, /* b0: 0100 1100 1011 0000 */
+ {illegal,0, 2, 8}, /* b1: 0100 1100 1011 0001 */
+ {illegal,0, 2, 8}, /* b2: 0100 1100 1011 0010 */
+ {illegal,0, 2, 8}, /* b3: 0100 1100 1011 0011 */
+ {illegal,0, 2, 8}, /* b4: 0100 1100 1011 0100 */
+ {illegal,0, 2, 8}, /* b5: 0100 1100 1011 0101 */
+ {illegal,0, 2, 8}, /* b6: 0100 1100 1011 0110 */
+ {illegal,0, 2, 8}, /* b7: 0100 1100 1011 0111 */
+ {illegal,0, 2, 8}, /* b8: 0100 1100 1011 1000 */
+ {illegal,0, 2, 8}, /* b9: 0100 1100 1011 1001 */
+ {illegal,0, 2, 8}, /* ba: 0100 1100 1011 1010 */
+ {illegal,0, 2, 8}, /* bb: 0100 1100 1011 1011 */
+ {illegal,0, 2, 8}, /* bc: 0100 1100 1011 1100 */
+ {illegal,0, 2, 8}, /* bd: 0100 1100 1011 1101 */
+ {illegal,0, 2, 8}, /* be: 0100 1100 1011 1110 */
+ {illegal,0, 2, 8}, /* bf: 0100 1100 1011 1111 */
+
+ {MOV,"A,PA", 2,10}, /* c0: 0100 1100 1100 0000 */
+ {MOV,"A,PB", 2,10}, /* c1: 0100 1100 1100 0001 */
+ {MOV,"A,PC", 2,10}, /* c2: 0100 1100 1100 0010 */
+ {MOV,"A,PD", 2,10}, /* c3: 0100 1100 1100 0011 */
+ {illegal,0, 2,10}, /* c4: 0100 1100 1100 0100 */
+ {MOV,"A,PF", 2,10}, /* c5: 0100 1100 1100 0101 */
+ {MOV,"A,MKH", 2,10}, /* c6: 0100 1100 1100 0110 */
+ {MOV,"A,MKL", 2,10}, /* c7: 0100 1100 1100 0111 */
+ {illegal,0, 2,10}, /* c8: 0100 1100 1100 1000 */
+ {MOV,"A,SMH", 2,10}, /* c9: 0100 1100 1100 1001 */
+ {illegal,0, 2,10}, /* ca: 0100 1100 1100 1010 */
+ {MOV,"A,EOM", 2,10}, /* cb: 0100 1100 1100 1011 */
+ {illegal,0, 2,10}, /* cc: 0100 1100 1100 1100 */
+ {MOV,"A,TMM", 2,10}, /* cd: 0100 1100 1100 1101 */
+ {MOV,"A,PT", 2,10}, /* ce: 0100 1100 1100 1110 */ /* 7807 */
+ {illegal,0, 2,10}, /* cf: 0100 1100 1100 1111 */
+
+ {illegal,0, 2,10}, /* d0: 0100 1100 1101 0000 */
+ {illegal,0, 2,10}, /* d1: 0100 1100 1101 0001 */
+ {illegal,0, 2,10}, /* d2: 0100 1100 1101 0010 */
+ {illegal,0, 2,10}, /* d3: 0100 1100 1101 0011 */
+ {illegal,0, 2,10}, /* d4: 0100 1100 1101 0100 */
+ {illegal,0, 2,10}, /* d5: 0100 1100 1101 0101 */
+ {illegal,0, 2,10}, /* d6: 0100 1100 1101 0110 */
+ {illegal,0, 2,10}, /* d7: 0100 1100 1101 0111 */
+ {illegal,0, 2,10}, /* d8: 0100 1100 1101 1000 */
+ {MOV,"A,RXB", 2,10}, /* d9: 0100 1100 1101 1001 */
+ {illegal,0, 2,10}, /* da: 0100 1100 1101 1010 */
+ {illegal,0, 2,10}, /* db: 0100 1100 1101 1011 */
+ {illegal,0, 2,10}, /* dc: 0100 1100 1101 1100 */
+ {illegal,0, 2,10}, /* dd: 0100 1100 1101 1101 */
+ {illegal,0, 2,10}, /* de: 0100 1100 1101 1110 */
+ {illegal,0, 2,10}, /* df: 0100 1100 1101 1111 */
+
+ {illegal,0, 2,10}, /* e0: 0100 1100 1110 0000 */
+ {illegal,0, 2,10}, /* e1: 0100 1100 1110 0001 */
+ {illegal,0, 2,10}, /* e2: 0100 1100 1110 0010 */
+ {illegal,0, 2,10}, /* e3: 0100 1100 1110 0011 */
+ {illegal,0, 2,10}, /* e4: 0100 1100 1110 0100 */
+ {illegal,0, 2,10}, /* e5: 0100 1100 1110 0101 */
+ {illegal,0, 2,10}, /* e6: 0100 1100 1110 0110 */
+ {illegal,0, 2,10}, /* e7: 0100 1100 1110 0111 */
+ {illegal,0, 2,10}, /* e8: 0100 1100 1110 1000 */
+ {illegal,0, 2,10}, /* e9: 0100 1100 1110 1001 */
+ {illegal,0, 2,10}, /* ea: 0100 1100 1110 1010 */
+ {illegal,0, 2,10}, /* eb: 0100 1100 1110 1011 */
+ {illegal,0, 2,10}, /* ec: 0100 1100 1110 1100 */
+ {illegal,0, 2,10}, /* ed: 0100 1100 1110 1101 */
+ {illegal,0, 2,10}, /* ee: 0100 1100 1110 1110 */
+ {illegal,0, 2,10}, /* ef: 0100 1100 1110 1111 */
+
+ {illegal,0, 2,10}, /* f0: 0100 1100 1111 0000 */
+ {illegal,0, 2,10}, /* f1: 0100 1100 1111 0001 */
+ {illegal,0, 2,10}, /* f2: 0100 1100 1111 0010 */
+ {illegal,0, 2,10}, /* f3: 0100 1100 1111 0011 */
+ {illegal,0, 2,10}, /* f4: 0100 1100 1111 0100 */
+ {illegal,0, 2,10}, /* f5: 0100 1100 1111 0101 */
+ {illegal,0, 2,10}, /* f6: 0100 1100 1111 0110 */
+ {illegal,0, 2,10}, /* f7: 0100 1100 1111 0111 */
+ {illegal,0, 2,10}, /* f8: 0100 1100 1111 1000 */
+ {illegal,0, 2,10}, /* f9: 0100 1100 1111 1001 */
+ {illegal,0, 2,10}, /* fa: 0100 1100 1111 1010 */
+ {illegal,0, 2,10}, /* fb: 0100 1100 1111 1011 */
+ {illegal,0, 2,10}, /* fc: 0100 1100 1111 1100 */
+ {illegal,0, 2,10}, /* fd: 0100 1100 1111 1101 */
+ {illegal,0, 2,10}, /* fe: 0100 1100 1111 1110 */
+ {illegal,0, 2,10} /* ff: 0100 1100 1111 1111 */
+};
+
+/* prefix 4D */
+static struct dasm_s dasm4D_7810[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0100 1101 0000 0000 */
+ {illegal,0, 2, 8}, /* 01: 0100 1101 0000 0001 */
+ {illegal,0, 2, 8}, /* 02: 0100 1101 0000 0010 */
+ {illegal,0, 2, 8}, /* 03: 0100 1101 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0100 1101 0000 0100 */
+ {illegal,0, 2, 8}, /* 05: 0100 1101 0000 0101 */
+ {illegal,0, 2, 8}, /* 06: 0100 1101 0000 0110 */
+ {illegal,0, 2, 8}, /* 07: 0100 1101 0000 0111 */
+ {illegal,0, 2, 8}, /* 08: 0100 1101 0000 1000 */
+ {illegal,0, 2, 8}, /* 09: 0100 1101 0000 1001 */
+ {illegal,0, 2, 8}, /* 0a: 0100 1101 0000 1010 */
+ {illegal,0, 2, 8}, /* 0b: 0100 1101 0000 1011 */
+ {illegal,0, 2, 8}, /* 0c: 0100 1101 0000 1100 */
+ {illegal,0, 2, 8}, /* 0d: 0100 1101 0000 1101 */
+ {illegal,0, 2, 8}, /* 0e: 0100 1101 0000 1110 */
+ {illegal,0, 2, 8}, /* 0f: 0100 1101 0000 1111 */
+
+ {illegal,0, 2, 8}, /* 10: 0100 1101 0001 0000 */
+ {illegal,0, 2, 8}, /* 11: 0100 1101 0001 0001 */
+ {illegal,0, 2, 8}, /* 12: 0100 1101 0001 0010 */
+ {illegal,0, 2, 8}, /* 13: 0100 1101 0001 0011 */
+ {illegal,0, 2, 8}, /* 14: 0100 1101 0001 0100 */
+ {illegal,0, 2, 8}, /* 15: 0100 1101 0001 0101 */
+ {illegal,0, 2, 8}, /* 16: 0100 1101 0001 0110 */
+ {illegal,0, 2, 8}, /* 17: 0100 1101 0001 0111 */
+ {illegal,0, 2, 8}, /* 18: 0100 1101 0001 1000 */
+ {illegal,0, 2, 8}, /* 19: 0100 1101 0001 1001 */
+ {illegal,0, 2, 8}, /* 1a: 0100 1101 0001 1010 */
+ {illegal,0, 2, 8}, /* 1b: 0100 1101 0001 1011 */
+ {illegal,0, 2, 8}, /* 1c: 0100 1101 0001 1100 */
+ {illegal,0, 2, 8}, /* 1d: 0100 1101 0001 1101 */
+ {illegal,0, 2, 8}, /* 1e: 0100 1101 0001 1110 */
+ {illegal,0, 2, 8}, /* 1f: 0100 1101 0001 1111 */
+
+ {illegal,0, 2, 8}, /* 20: 0100 1101 0010 0000 */
+ {illegal,0, 2, 8}, /* 21: 0100 1101 0010 0001 */
+ {illegal,0, 2, 8}, /* 22: 0100 1101 0010 0010 */
+ {illegal,0, 2, 8}, /* 23: 0100 1101 0010 0011 */
+ {illegal,0, 2, 8}, /* 24: 0100 1101 0010 0100 */
+ {illegal,0, 2, 8}, /* 25: 0100 1101 0010 0101 */
+ {illegal,0, 2, 8}, /* 26: 0100 1101 0010 0110 */
+ {illegal,0, 2, 8}, /* 27: 0100 1101 0010 0111 */
+ {illegal,0, 2, 8}, /* 28: 0100 1101 0010 1000 */
+ {illegal,0, 2, 8}, /* 29: 0100 1101 0010 1001 */
+ {illegal,0, 2, 8}, /* 2a: 0100 1101 0010 1010 */
+ {illegal,0, 2, 8}, /* 2b: 0100 1101 0010 1011 */
+ {illegal,0, 2, 8}, /* 2c: 0100 1101 0010 1100 */
+ {illegal,0, 2, 8}, /* 2d: 0100 1101 0010 1101 */
+ {illegal,0, 2, 8}, /* 2e: 0100 1101 0010 1110 */
+ {illegal,0, 2, 8}, /* 2f: 0100 1101 0010 1111 */
+
+ {illegal,0, 2, 8}, /* 30: 0100 1101 0011 0000 */
+ {illegal,0, 2, 8}, /* 31: 0100 1101 0011 0001 */
+ {illegal,0, 2, 8}, /* 32: 0100 1101 0011 0010 */
+ {illegal,0, 2, 8}, /* 33: 0100 1101 0011 0011 */
+ {illegal,0, 2, 8}, /* 34: 0100 1101 0011 0100 */
+ {illegal,0, 2, 8}, /* 35: 0100 1101 0011 0101 */
+ {illegal,0, 2, 8}, /* 36: 0100 1101 0011 0110 */
+ {illegal,0, 2, 8}, /* 37: 0100 1101 0011 0111 */
+ {illegal,0, 2, 8}, /* 38: 0100 1101 0011 1000 */
+ {illegal,0, 2, 8}, /* 39: 0100 1101 0011 1001 */
+ {illegal,0, 2, 8}, /* 3a: 0100 1101 0011 1010 */
+ {illegal,0, 2, 8}, /* 3b: 0100 1101 0011 1011 */
+ {illegal,0, 2, 8}, /* 3c: 0100 1101 0011 1100 */
+ {illegal,0, 2, 8}, /* 3d: 0100 1101 0011 1101 */
+ {illegal,0, 2, 8}, /* 3e: 0100 1101 0011 1110 */
+ {illegal,0, 2, 8}, /* 3f: 0100 1101 0011 1111 */
+
+ {illegal,0, 2, 8}, /* 40: 0100 1101 0100 0000 */
+ {illegal,0, 2, 8}, /* 41: 0100 1101 0100 0001 */
+ {illegal,0, 2, 8}, /* 42: 0100 1101 0100 0010 */
+ {illegal,0, 2, 8}, /* 43: 0100 1101 0100 0011 */
+ {illegal,0, 2, 8}, /* 44: 0100 1101 0100 0100 */
+ {illegal,0, 2, 8}, /* 45: 0100 1101 0100 0101 */
+ {illegal,0, 2, 8}, /* 46: 0100 1101 0100 0110 */
+ {illegal,0, 2, 8}, /* 47: 0100 1101 0100 0111 */
+ {illegal,0, 2, 8}, /* 48: 0100 1101 0100 1000 */
+ {illegal,0, 2, 8}, /* 49: 0100 1101 0100 1001 */
+ {illegal,0, 2, 8}, /* 4a: 0100 1101 0100 1010 */
+ {illegal,0, 2, 8}, /* 4b: 0100 1101 0100 1011 */
+ {illegal,0, 2, 8}, /* 4c: 0100 1101 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0100 1101 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0100 1101 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0100 1101 0100 1111 */
+
+ {illegal,0, 2, 8}, /* 50: 0100 1101 0101 0000 */
+ {illegal,0, 2, 8}, /* 51: 0100 1101 0101 0001 */
+ {illegal,0, 2, 8}, /* 52: 0100 1101 0101 0010 */
+ {illegal,0, 2, 8}, /* 53: 0100 1101 0101 0011 */
+ {illegal,0, 2, 8}, /* 54: 0100 1101 0101 0100 */
+ {illegal,0, 2, 8}, /* 55: 0100 1101 0101 0101 */
+ {illegal,0, 2, 8}, /* 56: 0100 1101 0101 0110 */
+ {illegal,0, 2, 8}, /* 57: 0100 1101 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0100 1101 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0100 1101 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0100 1101 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0100 1101 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0100 1101 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0100 1101 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0100 1101 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0100 1101 0101 1111 */
+
+ {illegal,0, 2, 8}, /* 60: 0100 1101 0110 0000 */
+ {illegal,0, 2, 8}, /* 61: 0100 1101 0110 0001 */
+ {illegal,0, 2, 8}, /* 62: 0100 1101 0110 0010 */
+ {illegal,0, 2, 8}, /* 63: 0100 1101 0110 0011 */
+ {illegal,0, 2, 8}, /* 64: 0100 1101 0110 0100 */
+ {illegal,0, 2, 8}, /* 65: 0100 1101 0110 0101 */
+ {illegal,0, 2, 8}, /* 66: 0100 1101 0110 0110 */
+ {illegal,0, 2, 8}, /* 67: 0100 1101 0110 0111 */
+ {illegal,0, 2, 8}, /* 68: 0100 1101 0110 1000 */
+ {illegal,0, 2, 8}, /* 69: 0100 1101 0110 1001 */
+ {illegal,0, 2, 8}, /* 6a: 0100 1101 0110 1010 */
+ {illegal,0, 2, 8}, /* 6b: 0100 1101 0110 1011 */
+ {illegal,0, 2, 8}, /* 6c: 0100 1101 0110 1100 */
+ {illegal,0, 2, 8}, /* 6d: 0100 1101 0110 1101 */
+ {illegal,0, 2, 8}, /* 6e: 0100 1101 0110 1110 */
+ {illegal,0, 2, 8}, /* 6f: 0100 1101 0110 1111 */
+
+ {illegal,0, 2, 8}, /* 70: 0100 1101 0111 0000 */
+ {illegal,0, 2, 8}, /* 71: 0100 1101 0111 0001 */
+ {illegal,0, 2, 8}, /* 72: 0100 1101 0111 0010 */
+ {illegal,0, 2, 8}, /* 73: 0100 1101 0111 0011 */
+ {illegal,0, 2, 8}, /* 74: 0100 1101 0111 0100 */
+ {illegal,0, 2, 8}, /* 75: 0100 1101 0111 0101 */
+ {illegal,0, 2, 8}, /* 76: 0100 1101 0111 0110 */
+ {illegal,0, 2, 8}, /* 77: 0100 1101 0111 0111 */
+ {illegal,0, 2, 8}, /* 78: 0100 1101 0111 1000 */
+ {illegal,0, 2, 8}, /* 79: 0100 1101 0111 1001 */
+ {illegal,0, 2, 8}, /* 7a: 0100 1101 0111 1010 */
+ {illegal,0, 2, 8}, /* 7b: 0100 1101 0111 1011 */
+ {illegal,0, 2, 8}, /* 7c: 0100 1101 0111 1100 */
+ {illegal,0, 2, 8}, /* 7d: 0100 1101 0111 1101 */
+ {illegal,0, 2, 8}, /* 7e: 0100 1101 0111 1110 */
+ {illegal,0, 2, 8}, /* 7f: 0100 1101 0111 1111 */
+
+ {illegal,0, 2, 8}, /* 80: 0100 1101 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0100 1101 1000 0001 */
+ {illegal,0, 2, 8}, /* 82: 0100 1101 1000 0010 */
+ {illegal,0, 2, 8}, /* 83: 0100 1101 1000 0011 */
+ {illegal,0, 2, 8}, /* 84: 0100 1101 1000 0100 */
+ {illegal,0, 2, 8}, /* 85: 0100 1101 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0100 1101 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0100 1101 1000 0111 */
+ {illegal,0, 2, 8}, /* 88: 0100 1101 1000 1000 */
+ {illegal,0, 2, 8}, /* 89: 0100 1101 1000 1001 */
+ {illegal,0, 2, 8}, /* 8a: 0100 1101 1000 1010 */
+ {illegal,0, 2, 8}, /* 8b: 0100 1101 1000 1011 */
+ {illegal,0, 2, 8}, /* 8c: 0100 1101 1000 1100 */
+ {illegal,0, 2, 8}, /* 8d: 0100 1101 1000 1101 */
+ {illegal,0, 2, 8}, /* 8e: 0100 1101 1000 1110 */
+ {illegal,0, 2, 8}, /* 8f: 0100 1101 1000 1111 */
+
+ {illegal,0, 2, 8}, /* 90: 0100 1101 1001 0000 */
+ {illegal,0, 2, 8}, /* 91: 0100 1101 1001 0001 */
+ {illegal,0, 2, 8}, /* 92: 0100 1101 1001 0010 */
+ {illegal,0, 2, 8}, /* 93: 0100 1101 1001 0011 */
+ {illegal,0, 2, 8}, /* 94: 0100 1101 1001 0100 */
+ {illegal,0, 2, 8}, /* 95: 0100 1101 1001 0101 */
+ {illegal,0, 2, 8}, /* 96: 0100 1101 1001 0110 */
+ {illegal,0, 2, 8}, /* 97: 0100 1101 1001 0111 */
+ {illegal,0, 2, 8}, /* 98: 0100 1101 1001 1000 */
+ {illegal,0, 2, 8}, /* 99: 0100 1101 1001 1001 */
+ {illegal,0, 2, 8}, /* 9a: 0100 1101 1001 1010 */
+ {illegal,0, 2, 8}, /* 9b: 0100 1101 1001 1011 */
+ {illegal,0, 2, 8}, /* 9c: 0100 1101 1001 1100 */
+ {illegal,0, 2, 8}, /* 9d: 0100 1101 1001 1101 */
+ {illegal,0, 2, 8}, /* 9e: 0100 1101 1001 1110 */
+ {illegal,0, 2, 8}, /* 9f: 0100 1101 1001 1111 */
+
+ {illegal,0, 2, 8}, /* a0: 0100 1101 1010 0000 */
+ {illegal,0, 2, 8}, /* a1: 0100 1101 1010 0001 */
+ {illegal,0, 2, 8}, /* a2: 0100 1101 1010 0010 */
+ {illegal,0, 2, 8}, /* a3: 0100 1101 1010 0011 */
+ {illegal,0, 2, 8}, /* a4: 0100 1101 1010 0100 */
+ {illegal,0, 2, 8}, /* a5: 0100 1101 1010 0101 */
+ {illegal,0, 2, 8}, /* a6: 0100 1101 1010 0110 */
+ {illegal,0, 2, 8}, /* a7: 0100 1101 1010 0111 */
+ {illegal,0, 2, 8}, /* a8: 0100 1101 1010 1000 */
+ {illegal,0, 2, 8}, /* a9: 0100 1101 1010 1001 */
+ {illegal,0, 2, 8}, /* aa: 0100 1101 1010 1010 */
+ {illegal,0, 2, 8}, /* ab: 0100 1101 1010 1011 */
+ {illegal,0, 2, 8}, /* ac: 0100 1101 1010 1100 */
+ {illegal,0, 2, 8}, /* ad: 0100 1101 1010 1101 */
+ {illegal,0, 2, 8}, /* ae: 0100 1101 1010 1110 */
+ {illegal,0, 2, 8}, /* af: 0100 1101 1010 1111 */
+
+ {illegal,0, 2, 8}, /* b0: 0100 1101 1011 0000 */
+ {illegal,0, 2, 8}, /* b1: 0100 1101 1011 0001 */
+ {illegal,0, 2, 8}, /* b2: 0100 1101 1011 0010 */
+ {illegal,0, 2, 8}, /* b3: 0100 1101 1011 0011 */
+ {illegal,0, 2, 8}, /* b4: 0100 1101 1011 0100 */
+ {illegal,0, 2, 8}, /* b5: 0100 1101 1011 0101 */
+ {illegal,0, 2, 8}, /* b6: 0100 1101 1011 0110 */
+ {illegal,0, 2, 8}, /* b7: 0100 1101 1011 0111 */
+ {illegal,0, 2, 8}, /* b8: 0100 1101 1011 1000 */
+ {illegal,0, 2, 8}, /* b9: 0100 1101 1011 1001 */
+ {illegal,0, 2, 8}, /* ba: 0100 1101 1011 1010 */
+ {illegal,0, 2, 8}, /* bb: 0100 1101 1011 1011 */
+ {illegal,0, 2, 8}, /* bc: 0100 1101 1011 1100 */
+ {illegal,0, 2, 8}, /* bd: 0100 1101 1011 1101 */
+ {illegal,0, 2, 8}, /* be: 0100 1101 1011 1110 */
+ {illegal,0, 2, 8}, /* bf: 0100 1101 1011 1111 */
+
+ {MOV,"PA,A", 2,10}, /* c0: 0100 1101 1100 0000 */
+ {MOV,"PB,A", 2,10}, /* c1: 0100 1101 1100 0001 */
+ {MOV,"PC,A", 2,10}, /* c2: 0100 1101 1100 0010 */
+ {MOV,"PD,A", 2,10}, /* c3: 0100 1101 1100 0011 */
+ {illegal,0, 2,10}, /* c4: 0100 1101 1100 0100 */
+ {MOV,"PF,A", 2,10}, /* c5: 0100 1101 1100 0101 */
+ {MOV,"MKH,A", 2,10}, /* c6: 0100 1101 1100 0110 */
+ {MOV,"MKL,A", 2,10}, /* c7: 0100 1101 1100 0111 */
+ {MOV,"ANM,A", 2,10}, /* c8: 0100 1101 1100 1000 */ /* 7810 */
+ {MOV,"SMH,A", 2,10}, /* c9: 0100 1101 1100 1001 */
+ {MOV,"SML,A", 2,10}, /* ca: 0100 1101 1100 1010 */
+ {MOV,"EOM,A", 2,10}, /* cb: 0100 1101 1100 1011 */
+ {MOV,"ETMM,A", 2,10}, /* cc: 0100 1101 1100 1100 */
+ {MOV,"TMM,A", 2,10}, /* cd: 0100 1101 1100 1101 */
+ {illegal,0, 2,10}, /* ce: 0100 1101 1100 1110 */
+ {illegal,0, 2,10}, /* cf: 0100 1101 1100 1111 */
+
+ {MOV,"MM,A", 2,10}, /* d0: 0100 1101 1101 0000 */
+ {MOV,"MCC,A", 2,10}, /* d1: 0100 1101 1101 0001 */
+ {MOV,"MA,A", 2,10}, /* d2: 0100 1101 1101 0010 */
+ {MOV,"MB,A", 2,10}, /* d3: 0100 1101 1101 0011 */
+ {MOV,"MC,A", 2,10}, /* d4: 0100 1101 1101 0100 */
+ {illegal,0, 2,10}, /* d5: 0100 1101 1101 0101 */
+ {illegal,0, 2,10}, /* d6: 0100 1101 1101 0110 */
+ {MOV,"MF,A", 2,10}, /* d7: 0100 1101 1101 0111 */
+ {MOV,"TXB,A", 2,10}, /* d8: 0100 1101 1101 1000 */
+ {illegal,0, 2,10}, /* d9: 0100 1101 1101 1001 */
+ {MOV,"TM0,A", 2,10}, /* da: 0100 1101 1101 1010 */
+ {MOV,"TM1,A", 2,10}, /* db: 0100 1101 1101 1011 */
+ {illegal,0, 2,10}, /* dc: 0100 1101 1101 1100 */
+ {illegal,0, 2,10}, /* dd: 0100 1101 1101 1101 */
+ {illegal,0, 2,10}, /* de: 0100 1101 1101 1110 */
+ {illegal,0, 2,10}, /* df: 0100 1101 1101 1111 */
+
+ {illegal,0, 2,10}, /* e0: 0100 1101 1110 0000 */
+ {illegal,0, 2,10}, /* e1: 0100 1101 1110 0001 */
+ {illegal,0, 2,10}, /* e2: 0100 1101 1110 0010 */
+ {illegal,0, 2,10}, /* e3: 0100 1101 1110 0011 */
+ {illegal,0, 2,10}, /* e4: 0100 1101 1110 0100 */
+ {illegal,0, 2,10}, /* e5: 0100 1101 1110 0101 */
+ {illegal,0, 2,10}, /* e6: 0100 1101 1110 0110 */
+ {illegal,0, 2,10}, /* e7: 0100 1101 1110 0111 */
+ {MOV,"ZCM,A", 2,10}, /* e8: 0100 1101 1110 1000 */ /* 7810 */
+ {illegal,0, 2,10}, /* e9: 0100 1101 1110 1001 */
+ {illegal,0, 2,10}, /* ea: 0100 1101 1110 1010 */
+ {illegal,0, 2,10}, /* eb: 0100 1101 1110 1011 */
+ {illegal,0, 2,10}, /* ec: 0100 1101 1110 1100 */
+ {illegal,0, 2,10}, /* ed: 0100 1101 1110 1101 */
+ {illegal,0, 2,10}, /* ee: 0100 1101 1110 1110 */
+ {illegal,0, 2,10}, /* ef: 0100 1101 1110 1111 */
+
+ {illegal,0, 2,10}, /* f0: 0100 1101 1111 0000 */
+ {illegal,0, 2,10}, /* f1: 0100 1101 1111 0001 */
+ {illegal,0, 2,10}, /* f2: 0100 1101 1111 0010 */
+ {illegal,0, 2,10}, /* f3: 0100 1101 1111 0011 */
+ {illegal,0, 2,10}, /* f4: 0100 1101 1111 0100 */
+ {illegal,0, 2,10}, /* f5: 0100 1101 1111 0101 */
+ {illegal,0, 2,10}, /* f6: 0100 1101 1111 0110 */
+ {illegal,0, 2,10}, /* f7: 0100 1101 1111 0111 */
+ {illegal,0, 2,10}, /* f8: 0100 1101 1111 1000 */
+ {illegal,0, 2,10}, /* f9: 0100 1101 1111 1001 */
+ {illegal,0, 2,10}, /* fa: 0100 1101 1111 1010 */
+ {illegal,0, 2,10}, /* fb: 0100 1101 1111 1011 */
+ {illegal,0, 2,10}, /* fc: 0100 1101 1111 1100 */
+ {illegal,0, 2,10}, /* fd: 0100 1101 1111 1101 */
+ {illegal,0, 2,10}, /* fe: 0100 1101 1111 1110 */
+ {illegal,0, 2,10} /* ff: 0100 1101 1111 1111 */
+};
+
+static struct dasm_s dasm4D_7807[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0100 1101 0000 0000 */
+ {illegal,0, 2, 8}, /* 01: 0100 1101 0000 0001 */
+ {illegal,0, 2, 8}, /* 02: 0100 1101 0000 0010 */
+ {illegal,0, 2, 8}, /* 03: 0100 1101 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0100 1101 0000 0100 */
+ {illegal,0, 2, 8}, /* 05: 0100 1101 0000 0101 */
+ {illegal,0, 2, 8}, /* 06: 0100 1101 0000 0110 */
+ {illegal,0, 2, 8}, /* 07: 0100 1101 0000 0111 */
+ {illegal,0, 2, 8}, /* 08: 0100 1101 0000 1000 */
+ {illegal,0, 2, 8}, /* 09: 0100 1101 0000 1001 */
+ {illegal,0, 2, 8}, /* 0a: 0100 1101 0000 1010 */
+ {illegal,0, 2, 8}, /* 0b: 0100 1101 0000 1011 */
+ {illegal,0, 2, 8}, /* 0c: 0100 1101 0000 1100 */
+ {illegal,0, 2, 8}, /* 0d: 0100 1101 0000 1101 */
+ {illegal,0, 2, 8}, /* 0e: 0100 1101 0000 1110 */
+ {illegal,0, 2, 8}, /* 0f: 0100 1101 0000 1111 */
+
+ {illegal,0, 2, 8}, /* 10: 0100 1101 0001 0000 */
+ {illegal,0, 2, 8}, /* 11: 0100 1101 0001 0001 */
+ {illegal,0, 2, 8}, /* 12: 0100 1101 0001 0010 */
+ {illegal,0, 2, 8}, /* 13: 0100 1101 0001 0011 */
+ {illegal,0, 2, 8}, /* 14: 0100 1101 0001 0100 */
+ {illegal,0, 2, 8}, /* 15: 0100 1101 0001 0101 */
+ {illegal,0, 2, 8}, /* 16: 0100 1101 0001 0110 */
+ {illegal,0, 2, 8}, /* 17: 0100 1101 0001 0111 */
+ {illegal,0, 2, 8}, /* 18: 0100 1101 0001 1000 */
+ {illegal,0, 2, 8}, /* 19: 0100 1101 0001 1001 */
+ {illegal,0, 2, 8}, /* 1a: 0100 1101 0001 1010 */
+ {illegal,0, 2, 8}, /* 1b: 0100 1101 0001 1011 */
+ {illegal,0, 2, 8}, /* 1c: 0100 1101 0001 1100 */
+ {illegal,0, 2, 8}, /* 1d: 0100 1101 0001 1101 */
+ {illegal,0, 2, 8}, /* 1e: 0100 1101 0001 1110 */
+ {illegal,0, 2, 8}, /* 1f: 0100 1101 0001 1111 */
+
+ {illegal,0, 2, 8}, /* 20: 0100 1101 0010 0000 */
+ {illegal,0, 2, 8}, /* 21: 0100 1101 0010 0001 */
+ {illegal,0, 2, 8}, /* 22: 0100 1101 0010 0010 */
+ {illegal,0, 2, 8}, /* 23: 0100 1101 0010 0011 */
+ {illegal,0, 2, 8}, /* 24: 0100 1101 0010 0100 */
+ {illegal,0, 2, 8}, /* 25: 0100 1101 0010 0101 */
+ {illegal,0, 2, 8}, /* 26: 0100 1101 0010 0110 */
+ {illegal,0, 2, 8}, /* 27: 0100 1101 0010 0111 */
+ {illegal,0, 2, 8}, /* 28: 0100 1101 0010 1000 */
+ {illegal,0, 2, 8}, /* 29: 0100 1101 0010 1001 */
+ {illegal,0, 2, 8}, /* 2a: 0100 1101 0010 1010 */
+ {illegal,0, 2, 8}, /* 2b: 0100 1101 0010 1011 */
+ {illegal,0, 2, 8}, /* 2c: 0100 1101 0010 1100 */
+ {illegal,0, 2, 8}, /* 2d: 0100 1101 0010 1101 */
+ {illegal,0, 2, 8}, /* 2e: 0100 1101 0010 1110 */
+ {illegal,0, 2, 8}, /* 2f: 0100 1101 0010 1111 */
+
+ {illegal,0, 2, 8}, /* 30: 0100 1101 0011 0000 */
+ {illegal,0, 2, 8}, /* 31: 0100 1101 0011 0001 */
+ {illegal,0, 2, 8}, /* 32: 0100 1101 0011 0010 */
+ {illegal,0, 2, 8}, /* 33: 0100 1101 0011 0011 */
+ {illegal,0, 2, 8}, /* 34: 0100 1101 0011 0100 */
+ {illegal,0, 2, 8}, /* 35: 0100 1101 0011 0101 */
+ {illegal,0, 2, 8}, /* 36: 0100 1101 0011 0110 */
+ {illegal,0, 2, 8}, /* 37: 0100 1101 0011 0111 */
+ {illegal,0, 2, 8}, /* 38: 0100 1101 0011 1000 */
+ {illegal,0, 2, 8}, /* 39: 0100 1101 0011 1001 */
+ {illegal,0, 2, 8}, /* 3a: 0100 1101 0011 1010 */
+ {illegal,0, 2, 8}, /* 3b: 0100 1101 0011 1011 */
+ {illegal,0, 2, 8}, /* 3c: 0100 1101 0011 1100 */
+ {illegal,0, 2, 8}, /* 3d: 0100 1101 0011 1101 */
+ {illegal,0, 2, 8}, /* 3e: 0100 1101 0011 1110 */
+ {illegal,0, 2, 8}, /* 3f: 0100 1101 0011 1111 */
+
+ {illegal,0, 2, 8}, /* 40: 0100 1101 0100 0000 */
+ {illegal,0, 2, 8}, /* 41: 0100 1101 0100 0001 */
+ {illegal,0, 2, 8}, /* 42: 0100 1101 0100 0010 */
+ {illegal,0, 2, 8}, /* 43: 0100 1101 0100 0011 */
+ {illegal,0, 2, 8}, /* 44: 0100 1101 0100 0100 */
+ {illegal,0, 2, 8}, /* 45: 0100 1101 0100 0101 */
+ {illegal,0, 2, 8}, /* 46: 0100 1101 0100 0110 */
+ {illegal,0, 2, 8}, /* 47: 0100 1101 0100 0111 */
+ {illegal,0, 2, 8}, /* 48: 0100 1101 0100 1000 */
+ {illegal,0, 2, 8}, /* 49: 0100 1101 0100 1001 */
+ {illegal,0, 2, 8}, /* 4a: 0100 1101 0100 1010 */
+ {illegal,0, 2, 8}, /* 4b: 0100 1101 0100 1011 */
+ {illegal,0, 2, 8}, /* 4c: 0100 1101 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0100 1101 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0100 1101 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0100 1101 0100 1111 */
+
+ {illegal,0, 2, 8}, /* 50: 0100 1101 0101 0000 */
+ {illegal,0, 2, 8}, /* 51: 0100 1101 0101 0001 */
+ {illegal,0, 2, 8}, /* 52: 0100 1101 0101 0010 */
+ {illegal,0, 2, 8}, /* 53: 0100 1101 0101 0011 */
+ {illegal,0, 2, 8}, /* 54: 0100 1101 0101 0100 */
+ {illegal,0, 2, 8}, /* 55: 0100 1101 0101 0101 */
+ {illegal,0, 2, 8}, /* 56: 0100 1101 0101 0110 */
+ {illegal,0, 2, 8}, /* 57: 0100 1101 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0100 1101 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0100 1101 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0100 1101 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0100 1101 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0100 1101 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0100 1101 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0100 1101 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0100 1101 0101 1111 */
+
+ {illegal,0, 2, 8}, /* 60: 0100 1101 0110 0000 */
+ {illegal,0, 2, 8}, /* 61: 0100 1101 0110 0001 */
+ {illegal,0, 2, 8}, /* 62: 0100 1101 0110 0010 */
+ {illegal,0, 2, 8}, /* 63: 0100 1101 0110 0011 */
+ {illegal,0, 2, 8}, /* 64: 0100 1101 0110 0100 */
+ {illegal,0, 2, 8}, /* 65: 0100 1101 0110 0101 */
+ {illegal,0, 2, 8}, /* 66: 0100 1101 0110 0110 */
+ {illegal,0, 2, 8}, /* 67: 0100 1101 0110 0111 */
+ {illegal,0, 2, 8}, /* 68: 0100 1101 0110 1000 */
+ {illegal,0, 2, 8}, /* 69: 0100 1101 0110 1001 */
+ {illegal,0, 2, 8}, /* 6a: 0100 1101 0110 1010 */
+ {illegal,0, 2, 8}, /* 6b: 0100 1101 0110 1011 */
+ {illegal,0, 2, 8}, /* 6c: 0100 1101 0110 1100 */
+ {illegal,0, 2, 8}, /* 6d: 0100 1101 0110 1101 */
+ {illegal,0, 2, 8}, /* 6e: 0100 1101 0110 1110 */
+ {illegal,0, 2, 8}, /* 6f: 0100 1101 0110 1111 */
+
+ {illegal,0, 2, 8}, /* 70: 0100 1101 0111 0000 */
+ {illegal,0, 2, 8}, /* 71: 0100 1101 0111 0001 */
+ {illegal,0, 2, 8}, /* 72: 0100 1101 0111 0010 */
+ {illegal,0, 2, 8}, /* 73: 0100 1101 0111 0011 */
+ {illegal,0, 2, 8}, /* 74: 0100 1101 0111 0100 */
+ {illegal,0, 2, 8}, /* 75: 0100 1101 0111 0101 */
+ {illegal,0, 2, 8}, /* 76: 0100 1101 0111 0110 */
+ {illegal,0, 2, 8}, /* 77: 0100 1101 0111 0111 */
+ {illegal,0, 2, 8}, /* 78: 0100 1101 0111 1000 */
+ {illegal,0, 2, 8}, /* 79: 0100 1101 0111 1001 */
+ {illegal,0, 2, 8}, /* 7a: 0100 1101 0111 1010 */
+ {illegal,0, 2, 8}, /* 7b: 0100 1101 0111 1011 */
+ {illegal,0, 2, 8}, /* 7c: 0100 1101 0111 1100 */
+ {illegal,0, 2, 8}, /* 7d: 0100 1101 0111 1101 */
+ {illegal,0, 2, 8}, /* 7e: 0100 1101 0111 1110 */
+ {illegal,0, 2, 8}, /* 7f: 0100 1101 0111 1111 */
+
+ {illegal,0, 2, 8}, /* 80: 0100 1101 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0100 1101 1000 0001 */
+ {illegal,0, 2, 8}, /* 82: 0100 1101 1000 0010 */
+ {illegal,0, 2, 8}, /* 83: 0100 1101 1000 0011 */
+ {illegal,0, 2, 8}, /* 84: 0100 1101 1000 0100 */
+ {illegal,0, 2, 8}, /* 85: 0100 1101 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0100 1101 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0100 1101 1000 0111 */
+ {illegal,0, 2, 8}, /* 88: 0100 1101 1000 1000 */
+ {illegal,0, 2, 8}, /* 89: 0100 1101 1000 1001 */
+ {illegal,0, 2, 8}, /* 8a: 0100 1101 1000 1010 */
+ {illegal,0, 2, 8}, /* 8b: 0100 1101 1000 1011 */
+ {illegal,0, 2, 8}, /* 8c: 0100 1101 1000 1100 */
+ {illegal,0, 2, 8}, /* 8d: 0100 1101 1000 1101 */
+ {illegal,0, 2, 8}, /* 8e: 0100 1101 1000 1110 */
+ {illegal,0, 2, 8}, /* 8f: 0100 1101 1000 1111 */
+
+ {illegal,0, 2, 8}, /* 90: 0100 1101 1001 0000 */
+ {illegal,0, 2, 8}, /* 91: 0100 1101 1001 0001 */
+ {illegal,0, 2, 8}, /* 92: 0100 1101 1001 0010 */
+ {illegal,0, 2, 8}, /* 93: 0100 1101 1001 0011 */
+ {illegal,0, 2, 8}, /* 94: 0100 1101 1001 0100 */
+ {illegal,0, 2, 8}, /* 95: 0100 1101 1001 0101 */
+ {illegal,0, 2, 8}, /* 96: 0100 1101 1001 0110 */
+ {illegal,0, 2, 8}, /* 97: 0100 1101 1001 0111 */
+ {illegal,0, 2, 8}, /* 98: 0100 1101 1001 1000 */
+ {illegal,0, 2, 8}, /* 99: 0100 1101 1001 1001 */
+ {illegal,0, 2, 8}, /* 9a: 0100 1101 1001 1010 */
+ {illegal,0, 2, 8}, /* 9b: 0100 1101 1001 1011 */
+ {illegal,0, 2, 8}, /* 9c: 0100 1101 1001 1100 */
+ {illegal,0, 2, 8}, /* 9d: 0100 1101 1001 1101 */
+ {illegal,0, 2, 8}, /* 9e: 0100 1101 1001 1110 */
+ {illegal,0, 2, 8}, /* 9f: 0100 1101 1001 1111 */
+
+ {illegal,0, 2, 8}, /* a0: 0100 1101 1010 0000 */
+ {illegal,0, 2, 8}, /* a1: 0100 1101 1010 0001 */
+ {illegal,0, 2, 8}, /* a2: 0100 1101 1010 0010 */
+ {illegal,0, 2, 8}, /* a3: 0100 1101 1010 0011 */
+ {illegal,0, 2, 8}, /* a4: 0100 1101 1010 0100 */
+ {illegal,0, 2, 8}, /* a5: 0100 1101 1010 0101 */
+ {illegal,0, 2, 8}, /* a6: 0100 1101 1010 0110 */
+ {illegal,0, 2, 8}, /* a7: 0100 1101 1010 0111 */
+ {illegal,0, 2, 8}, /* a8: 0100 1101 1010 1000 */
+ {illegal,0, 2, 8}, /* a9: 0100 1101 1010 1001 */
+ {illegal,0, 2, 8}, /* aa: 0100 1101 1010 1010 */
+ {illegal,0, 2, 8}, /* ab: 0100 1101 1010 1011 */
+ {illegal,0, 2, 8}, /* ac: 0100 1101 1010 1100 */
+ {illegal,0, 2, 8}, /* ad: 0100 1101 1010 1101 */
+ {illegal,0, 2, 8}, /* ae: 0100 1101 1010 1110 */
+ {illegal,0, 2, 8}, /* af: 0100 1101 1010 1111 */
+
+ {illegal,0, 2, 8}, /* b0: 0100 1101 1011 0000 */
+ {illegal,0, 2, 8}, /* b1: 0100 1101 1011 0001 */
+ {illegal,0, 2, 8}, /* b2: 0100 1101 1011 0010 */
+ {illegal,0, 2, 8}, /* b3: 0100 1101 1011 0011 */
+ {illegal,0, 2, 8}, /* b4: 0100 1101 1011 0100 */
+ {illegal,0, 2, 8}, /* b5: 0100 1101 1011 0101 */
+ {illegal,0, 2, 8}, /* b6: 0100 1101 1011 0110 */
+ {illegal,0, 2, 8}, /* b7: 0100 1101 1011 0111 */
+ {illegal,0, 2, 8}, /* b8: 0100 1101 1011 1000 */
+ {illegal,0, 2, 8}, /* b9: 0100 1101 1011 1001 */
+ {illegal,0, 2, 8}, /* ba: 0100 1101 1011 1010 */
+ {illegal,0, 2, 8}, /* bb: 0100 1101 1011 1011 */
+ {illegal,0, 2, 8}, /* bc: 0100 1101 1011 1100 */
+ {illegal,0, 2, 8}, /* bd: 0100 1101 1011 1101 */
+ {illegal,0, 2, 8}, /* be: 0100 1101 1011 1110 */
+ {illegal,0, 2, 8}, /* bf: 0100 1101 1011 1111 */
+
+ {MOV,"PA,A", 2,10}, /* c0: 0100 1101 1100 0000 */
+ {MOV,"PB,A", 2,10}, /* c1: 0100 1101 1100 0001 */
+ {MOV,"PC,A", 2,10}, /* c2: 0100 1101 1100 0010 */
+ {MOV,"PD,A", 2,10}, /* c3: 0100 1101 1100 0011 */
+ {illegal,0, 2,10}, /* c4: 0100 1101 1100 0100 */
+ {MOV,"PF,A", 2,10}, /* c5: 0100 1101 1100 0101 */
+ {MOV,"MKH,A", 2,10}, /* c6: 0100 1101 1100 0110 */
+ {MOV,"MKL,A", 2,10}, /* c7: 0100 1101 1100 0111 */
+ {illegal,0, 2,10}, /* c8: 0100 1101 1100 1000 */
+ {MOV,"SMH,A", 2,10}, /* c9: 0100 1101 1100 1001 */
+ {MOV,"SML,A", 2,10}, /* ca: 0100 1101 1100 1010 */
+ {MOV,"EOM,A", 2,10}, /* cb: 0100 1101 1100 1011 */
+ {MOV,"ETMM,A", 2,10}, /* cc: 0100 1101 1100 1100 */
+ {MOV,"TMM,A", 2,10}, /* cd: 0100 1101 1100 1101 */
+ {illegal,0, 2,10}, /* ce: 0100 1101 1100 1110 */
+ {illegal,0, 2,10}, /* cf: 0100 1101 1100 1111 */
+
+ {MOV,"MM,A", 2,10}, /* d0: 0100 1101 1101 0000 */
+ {MOV,"MCC,A", 2,10}, /* d1: 0100 1101 1101 0001 */
+ {MOV,"MA,A", 2,10}, /* d2: 0100 1101 1101 0010 */
+ {MOV,"MB,A", 2,10}, /* d3: 0100 1101 1101 0011 */
+ {MOV,"MC,A", 2,10}, /* d4: 0100 1101 1101 0100 */
+ {illegal,0, 2,10}, /* d5: 0100 1101 1101 0101 */
+ {illegal,0, 2,10}, /* d6: 0100 1101 1101 0110 */
+ {MOV,"MF,A", 2,10}, /* d7: 0100 1101 1101 0111 */
+ {MOV,"TXB,A", 2,10}, /* d8: 0100 1101 1101 1000 */
+ {illegal,0, 2,10}, /* d9: 0100 1101 1101 1001 */
+ {MOV,"TM0,A", 2,10}, /* da: 0100 1101 1101 1010 */
+ {MOV,"TM1,A", 2,10}, /* db: 0100 1101 1101 1011 */
+ {illegal,0, 2,10}, /* dc: 0100 1101 1101 1100 */
+ {illegal,0, 2,10}, /* dd: 0100 1101 1101 1101 */
+ {illegal,0, 2,10}, /* de: 0100 1101 1101 1110 */
+ {illegal,0, 2,10}, /* df: 0100 1101 1101 1111 */
+
+ {illegal,0, 2,10}, /* e0: 0100 1101 1110 0000 */
+ {illegal,0, 2,10}, /* e1: 0100 1101 1110 0001 */
+ {illegal,0, 2,10}, /* e2: 0100 1101 1110 0010 */
+ {illegal,0, 2,10}, /* e3: 0100 1101 1110 0011 */
+ {illegal,0, 2,10}, /* e4: 0100 1101 1110 0100 */
+ {MOV,"MT,A", 2,10}, /* e5: 0100 1101 1110 0101 */ /* 7807 */
+ {illegal,0, 2,10}, /* e6: 0100 1101 1110 0110 */
+ {illegal,0, 2,10}, /* e7: 0100 1101 1110 0111 */
+ {illegal,0, 2,10}, /* e8: 0100 1101 1110 1000 */
+ {illegal,0, 2,10}, /* e9: 0100 1101 1110 1001 */
+ {illegal,0, 2,10}, /* ea: 0100 1101 1110 1010 */
+ {illegal,0, 2,10}, /* eb: 0100 1101 1110 1011 */
+ {illegal,0, 2,10}, /* ec: 0100 1101 1110 1100 */
+ {illegal,0, 2,10}, /* ed: 0100 1101 1110 1101 */
+ {illegal,0, 2,10}, /* ee: 0100 1101 1110 1110 */
+ {illegal,0, 2,10}, /* ef: 0100 1101 1110 1111 */
+
+ {illegal,0, 2,10}, /* f0: 0100 1101 1111 0000 */
+ {illegal,0, 2,10}, /* f1: 0100 1101 1111 0001 */
+ {illegal,0, 2,10}, /* f2: 0100 1101 1111 0010 */
+ {illegal,0, 2,10}, /* f3: 0100 1101 1111 0011 */
+ {illegal,0, 2,10}, /* f4: 0100 1101 1111 0100 */
+ {illegal,0, 2,10}, /* f5: 0100 1101 1111 0101 */
+ {illegal,0, 2,10}, /* f6: 0100 1101 1111 0110 */
+ {illegal,0, 2,10}, /* f7: 0100 1101 1111 0111 */
+ {illegal,0, 2,10}, /* f8: 0100 1101 1111 1000 */
+ {illegal,0, 2,10}, /* f9: 0100 1101 1111 1001 */
+ {illegal,0, 2,10}, /* fa: 0100 1101 1111 1010 */
+ {illegal,0, 2,10}, /* fb: 0100 1101 1111 1011 */
+ {illegal,0, 2,10}, /* fc: 0100 1101 1111 1100 */
+ {illegal,0, 2,10}, /* fd: 0100 1101 1111 1101 */
+ {illegal,0, 2,10}, /* fe: 0100 1101 1111 1110 */
+ {illegal,0, 2,10} /* ff: 0100 1101 1111 1111 */
+};
+
+/* prefix 60 */
+static struct dasm_s dasm60[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0110 0000 0000 0000 */
+ {illegal,0, 2, 8}, /* 01: 0110 0000 0000 0001 */
+ {illegal,0, 2, 8}, /* 02: 0110 0000 0000 0010 */
+ {illegal,0, 2, 8}, /* 03: 0110 0000 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0110 0000 0000 0100 */
+ {illegal,0, 2, 8}, /* 05: 0110 0000 0000 0101 */
+ {illegal,0, 2, 8}, /* 06: 0110 0000 0000 0110 */
+ {illegal,0, 2, 8}, /* 07: 0110 0000 0000 0111 */
+ {ANA,"V,A", 2, 8}, /* 08: 0110 0000 0000 1000 */
+ {ANA,"A,A", 2, 8}, /* 09: 0110 0000 0000 1001 */
+ {ANA,"B,A", 2, 8}, /* 0a: 0110 0000 0000 1010 */
+ {ANA,"C,A", 2, 8}, /* 0b: 0110 0000 0000 1011 */
+ {ANA,"D,A", 2, 8}, /* 0c: 0110 0000 0000 1100 */
+ {ANA,"E,A", 2, 8}, /* 0d: 0110 0000 0000 1101 */
+ {ANA,"H,A", 2, 8}, /* 0e: 0110 0000 0000 1110 */
+ {ANA,"L,A", 2, 8}, /* 0f: 0110 0000 0000 1111 */
+
+ {XRA,"V,A", 2, 8}, /* 10: 0110 0000 0001 0000 */
+ {XRA,"A,A", 2, 8}, /* 11: 0110 0000 0001 0001 */
+ {XRA,"B,A", 2, 8}, /* 12: 0110 0000 0001 0010 */
+ {XRA,"C,A", 2, 8}, /* 13: 0110 0000 0001 0011 */
+ {XRA,"D,A", 2, 8}, /* 14: 0110 0000 0001 0100 */
+ {XRA,"E,A", 2, 8}, /* 15: 0110 0000 0001 0101 */
+ {XRA,"H,A", 2, 8}, /* 16: 0110 0000 0001 0110 */
+ {XRA,"L,A", 2, 8}, /* 17: 0110 0000 0001 0111 */
+ {ORA,"V,A", 2, 8}, /* 18: 0110 0000 0001 1000 */
+ {ORA,"A,A", 2, 8}, /* 19: 0110 0000 0001 1001 */
+ {ORA,"B,A", 2, 8}, /* 1a: 0110 0000 0001 1010 */
+ {ORA,"C,A", 2, 8}, /* 1b: 0110 0000 0001 1011 */
+ {ORA,"D,A", 2, 8}, /* 1c: 0110 0000 0001 1100 */
+ {ORA,"E,A", 2, 8}, /* 1d: 0110 0000 0001 1101 */
+ {ORA,"H,A", 2, 8}, /* 1e: 0110 0000 0001 1110 */
+ {ORA,"L,A", 2, 8}, /* 1f: 0110 0000 0001 1111 */
+
+ {ADDNC,"V,A", 2, 8}, /* 20: 0110 0000 0010 0000 */
+ {ADDNC,"A,A", 2, 8}, /* 21: 0110 0000 0010 0001 */
+ {ADDNC,"B,A", 2, 8}, /* 22: 0110 0000 0010 0010 */
+ {ADDNC,"C,A", 2, 8}, /* 23: 0110 0000 0010 0011 */
+ {ADDNC,"D,A", 2, 8}, /* 24: 0110 0000 0010 0100 */
+ {ADDNC,"E,A", 2, 8}, /* 25: 0110 0000 0010 0101 */
+ {ADDNC,"H,A", 2, 8}, /* 26: 0110 0000 0010 0110 */
+ {ADDNC,"L,A", 2, 8}, /* 27: 0110 0000 0010 0111 */
+ {GTA,"V,A", 2, 8}, /* 28: 0110 0000 0010 1000 */
+ {GTA,"A,A", 2, 8}, /* 29: 0110 0000 0010 1001 */
+ {GTA,"B,A", 2, 8}, /* 2a: 0110 0000 0010 1010 */
+ {GTA,"C,A", 2, 8}, /* 2b: 0110 0000 0010 1011 */
+ {GTA,"D,A", 2, 8}, /* 2c: 0110 0000 0010 1100 */
+ {GTA,"E,A", 2, 8}, /* 2d: 0110 0000 0010 1101 */
+ {GTA,"H,A", 2, 8}, /* 2e: 0110 0000 0010 1110 */
+ {GTA,"L,A", 2, 8}, /* 2f: 0110 0000 0010 1111 */
+
+ {SUBNB,"V,A", 2, 8}, /* 30: 0110 0000 0011 0000 */
+ {SUBNB,"A,A", 2, 8}, /* 31: 0110 0000 0011 0001 */
+ {SUBNB,"B,A", 2, 8}, /* 32: 0110 0000 0011 0010 */
+ {SUBNB,"C,A", 2, 8}, /* 33: 0110 0000 0011 0011 */
+ {SUBNB,"D,A", 2, 8}, /* 34: 0110 0000 0011 0100 */
+ {SUBNB,"E,A", 2, 8}, /* 35: 0110 0000 0011 0101 */
+ {SUBNB,"H,A", 2, 8}, /* 36: 0110 0000 0011 0110 */
+ {SUBNB,"L,A", 2, 8}, /* 37: 0110 0000 0011 0111 */
+ {LTA,"V,A", 2, 8}, /* 38: 0110 0000 0011 1000 */
+ {LTA,"A,A", 2, 8}, /* 39: 0110 0000 0011 1001 */
+ {LTA,"B,A", 2, 8}, /* 3a: 0110 0000 0011 1010 */
+ {LTA,"C,A", 2, 8}, /* 3b: 0110 0000 0011 1011 */
+ {LTA,"D,A", 2, 8}, /* 3c: 0110 0000 0011 1100 */
+ {LTA,"E,A", 2, 8}, /* 3d: 0110 0000 0011 1101 */
+ {LTA,"H,A", 2, 8}, /* 3e: 0110 0000 0011 1110 */
+ {LTA,"L,A", 2, 8}, /* 3f: 0110 0000 0011 1111 */
+
+ {ADD,"V,A", 2, 8}, /* 40: 0110 0000 0100 0000 */
+ {ADD,"A,A", 2, 8}, /* 41: 0110 0000 0100 0001 */
+ {ADD,"B,A", 2, 8}, /* 42: 0110 0000 0100 0010 */
+ {ADD,"C,A", 2, 8}, /* 43: 0110 0000 0100 0011 */
+ {ADD,"D,A", 2, 8}, /* 44: 0110 0000 0100 0100 */
+ {ADD,"E,A", 2, 8}, /* 45: 0110 0000 0100 0101 */
+ {ADD,"H,A", 2, 8}, /* 46: 0110 0000 0100 0110 */
+ {ADD,"L,A", 2, 8}, /* 47: 0110 0000 0100 0111 */
+ {illegal,0, 2, 8}, /* 48: 0110 0000 0100 1000 */
+ {illegal,0, 2, 8}, /* 49: 0110 0000 0100 1001 */
+ {illegal,0, 2, 8}, /* 4a: 0110 0000 0100 1010 */
+ {illegal,0, 2, 8}, /* 4b: 0110 0000 0100 1011 */
+ {illegal,0, 2, 8}, /* 4c: 0110 0000 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0110 0000 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0110 0000 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0110 0000 0100 1111 */
+
+ {ADC,"V,A", 2, 8}, /* 50: 0110 0000 0101 0000 */
+ {ADC,"A,A", 2, 8}, /* 51: 0110 0000 0101 0001 */
+ {ADC,"B,A", 2, 8}, /* 52: 0110 0000 0101 0010 */
+ {ADC,"C,A", 2, 8}, /* 53: 0110 0000 0101 0011 */
+ {ADC,"D,A", 2, 8}, /* 54: 0110 0000 0101 0100 */
+ {ADC,"E,A", 2, 8}, /* 55: 0110 0000 0101 0101 */
+ {ADC,"H,A", 2, 8}, /* 56: 0110 0000 0101 0110 */
+ {ADC,"L,A", 2, 8}, /* 57: 0110 0000 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0110 0000 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0110 0000 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0110 0000 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0110 0000 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0110 0000 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0110 0000 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0110 0000 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0110 0000 0101 1111 */
+
+ {SUB,"V,A", 2, 8}, /* 60: 0110 0000 0110 0000 */
+ {SUB,"A,A", 2, 8}, /* 61: 0110 0000 0110 0001 */
+ {SUB,"B,A", 2, 8}, /* 62: 0110 0000 0110 0010 */
+ {SUB,"C,A", 2, 8}, /* 63: 0110 0000 0110 0011 */
+ {SUB,"D,A", 2, 8}, /* 64: 0110 0000 0110 0100 */
+ {SUB,"E,A", 2, 8}, /* 65: 0110 0000 0110 0101 */
+ {SUB,"H,A", 2, 8}, /* 66: 0110 0000 0110 0110 */
+ {SUB,"L,A", 2, 8}, /* 67: 0110 0000 0110 0111 */
+ {NEA,"V,A", 2, 8}, /* 68: 0110 0000 0110 1000 */
+ {NEA,"A,A", 2, 8}, /* 69: 0110 0000 0110 1001 */
+ {NEA,"B,A", 2, 8}, /* 6a: 0110 0000 0110 1010 */
+ {NEA,"C,A", 2, 8}, /* 6b: 0110 0000 0110 1011 */
+ {NEA,"D,A", 2, 8}, /* 6c: 0110 0000 0110 1100 */
+ {NEA,"E,A", 2, 8}, /* 6d: 0110 0000 0110 1101 */
+ {NEA,"H,A", 2, 8}, /* 6e: 0110 0000 0110 1110 */
+ {NEA,"L,A", 2, 8}, /* 6f: 0110 0000 0110 1111 */
+
+ {SBB,"V,A", 2, 8}, /* 70: 0110 0000 0111 0000 */
+ {SBB,"A,A", 2, 8}, /* 71: 0110 0000 0111 0001 */
+ {SBB,"B,A", 2, 8}, /* 72: 0110 0000 0111 0010 */
+ {SBB,"C,A", 2, 8}, /* 73: 0110 0000 0111 0011 */
+ {SBB,"D,A", 2, 8}, /* 74: 0110 0000 0111 0100 */
+ {SBB,"E,A", 2, 8}, /* 75: 0110 0000 0111 0101 */
+ {SBB,"H,A", 2, 8}, /* 76: 0110 0000 0111 0110 */
+ {SBB,"L,A", 2, 8}, /* 77: 0110 0000 0111 0111 */
+ {EQA,"V,A", 2, 8}, /* 78: 0110 0000 0111 1000 */
+ {EQA,"A,A", 2, 8}, /* 79: 0110 0000 0111 1001 */
+ {EQA,"B,A", 2, 8}, /* 7a: 0110 0000 0111 1010 */
+ {EQA,"C,A", 2, 8}, /* 7b: 0110 0000 0111 1011 */
+ {EQA,"D,A", 2, 8}, /* 7c: 0110 0000 0111 1100 */
+ {EQA,"E,A", 2, 8}, /* 7d: 0110 0000 0111 1101 */
+ {EQA,"H,A", 2, 8}, /* 7e: 0110 0000 0111 1110 */
+ {EQA,"L,A", 2, 8}, /* 7f: 0110 0000 0111 1111 */
+
+ {illegal,0, 2, 8}, /* 80: 0110 0000 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0110 0000 1000 0001 */
+ {illegal,0, 2, 8}, /* 82: 0110 0000 1000 0010 */
+ {illegal,0, 2, 8}, /* 83: 0110 0000 1000 0011 */
+ {illegal,0, 2, 8}, /* 84: 0110 0000 1000 0100 */
+ {illegal,0, 2, 8}, /* 85: 0110 0000 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0110 0000 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0110 0000 1000 0111 */
+ {ANA,"A,V", 2, 8}, /* 88: 0110 0000 1000 1000 */
+ {ANA,"A,A", 2, 8}, /* 89: 0110 0000 1000 1001 */
+ {ANA,"A,B", 2, 8}, /* 8a: 0110 0000 1000 1010 */
+ {ANA,"A,C", 2, 8}, /* 8b: 0110 0000 1000 1011 */
+ {ANA,"A,D", 2, 8}, /* 8c: 0110 0000 1000 1100 */
+ {ANA,"A,E", 2, 8}, /* 8d: 0110 0000 1000 1101 */
+ {ANA,"A,H", 2, 8}, /* 8e: 0110 0000 1000 1110 */
+ {ANA,"A,L", 2, 8}, /* 8f: 0110 0000 1000 1111 */
+
+ {XRA,"A,V", 2, 8}, /* 90: 0110 0000 1001 0000 */
+ {XRA,"A,A", 2, 8}, /* 91: 0110 0000 1001 0001 */
+ {XRA,"A,B", 2, 8}, /* 92: 0110 0000 1001 0010 */
+ {XRA,"A,C", 2, 8}, /* 93: 0110 0000 1001 0011 */
+ {XRA,"A,D", 2, 8}, /* 94: 0110 0000 1001 0100 */
+ {XRA,"A,E", 2, 8}, /* 95: 0110 0000 1001 0101 */
+ {XRA,"A,H", 2, 8}, /* 96: 0110 0000 1001 0110 */
+ {XRA,"A,L", 2, 8}, /* 97: 0110 0000 1001 0111 */
+ {ORA,"A,V", 2, 8}, /* 98: 0110 0000 1001 1000 */
+ {ORA,"A,A", 2, 8}, /* 99: 0110 0000 1001 1001 */
+ {ORA,"A,B", 2, 8}, /* 9a: 0110 0000 1001 1010 */
+ {ORA,"A,C", 2, 8}, /* 9b: 0110 0000 1001 1011 */
+ {ORA,"A,D", 2, 8}, /* 9c: 0110 0000 1001 1100 */
+ {ORA,"A,E", 2, 8}, /* 9d: 0110 0000 1001 1101 */
+ {ORA,"A,H", 2, 8}, /* 9e: 0110 0000 1001 1110 */
+ {ORA,"A,L", 2, 8}, /* 9f: 0110 0000 1001 1111 */
+
+ {ADDNC,"A,V", 2, 8}, /* a0: 0110 0000 1010 0000 */
+ {ADDNC,"A,A", 2, 8}, /* a1: 0110 0000 1010 0001 */
+ {ADDNC,"A,B", 2, 8}, /* a2: 0110 0000 1010 0010 */
+ {ADDNC,"A,C", 2, 8}, /* a3: 0110 0000 1010 0011 */
+ {ADDNC,"A,D", 2, 8}, /* a4: 0110 0000 1010 0100 */
+ {ADDNC,"A,E", 2, 8}, /* a5: 0110 0000 1010 0101 */
+ {ADDNC,"A,H", 2, 8}, /* a6: 0110 0000 1010 0110 */
+ {ADDNC,"A,L", 2, 8}, /* a7: 0110 0000 1010 0111 */
+ {GTA,"A,V", 2, 8}, /* a8: 0110 0000 1010 1000 */
+ {GTA,"A,A", 2, 8}, /* a9: 0110 0000 1010 1001 */
+ {GTA,"A,B", 2, 8}, /* aa: 0110 0000 1010 1010 */
+ {GTA,"A,C", 2, 8}, /* ab: 0110 0000 1010 1011 */
+ {GTA,"A,D", 2, 8}, /* ac: 0110 0000 1010 1100 */
+ {GTA,"A,E", 2, 8}, /* ad: 0110 0000 1010 1101 */
+ {GTA,"A,H", 2, 8}, /* ae: 0110 0000 1010 1110 */
+ {GTA,"A,L", 2, 8}, /* af: 0110 0000 1010 1111 */
+
+ {SUBNB,"A,V", 2, 8}, /* b0: 0110 0000 1011 0000 */
+ {SUBNB,"A,A", 2, 8}, /* b1: 0110 0000 1011 0001 */
+ {SUBNB,"A,B", 2, 8}, /* b2: 0110 0000 1011 0010 */
+ {SUBNB,"A,C", 2, 8}, /* b3: 0110 0000 1011 0011 */
+ {SUBNB,"A,D", 2, 8}, /* b4: 0110 0000 1011 0100 */
+ {SUBNB,"A,E", 2, 8}, /* b5: 0110 0000 1011 0101 */
+ {SUBNB,"A,H", 2, 8}, /* b6: 0110 0000 1011 0110 */
+ {SUBNB,"A,L", 2, 8}, /* b7: 0110 0000 1011 0111 */
+ {LTA,"A,V", 2, 8}, /* b8: 0110 0000 1011 1000 */
+ {LTA,"A,A", 2, 8}, /* b9: 0110 0000 1011 1001 */
+ {LTA,"A,B", 2, 8}, /* ba: 0110 0000 1011 1010 */
+ {LTA,"A,C", 2, 8}, /* bb: 0110 0000 1011 1011 */
+ {LTA,"A,D", 2, 8}, /* bc: 0110 0000 1011 1100 */
+ {LTA,"A,E", 2, 8}, /* bd: 0110 0000 1011 1101 */
+ {LTA,"A,H", 2, 8}, /* be: 0110 0000 1011 1110 */
+ {LTA,"A,L", 2, 8}, /* bf: 0110 0000 1011 1111 */
+
+ {ADD,"A,V", 2, 8}, /* c0: 0110 0000 1100 0000 */
+ {ADD,"A,A", 2, 8}, /* c1: 0110 0000 1100 0001 */
+ {ADD,"A,B", 2, 8}, /* c2: 0110 0000 1100 0010 */
+ {ADD,"A,C", 2, 8}, /* c3: 0110 0000 1100 0011 */
+ {ADD,"A,D", 2, 8}, /* c4: 0110 0000 1100 0100 */
+ {ADD,"A,E", 2, 8}, /* c5: 0110 0000 1100 0101 */
+ {ADD,"A,H", 2, 8}, /* c6: 0110 0000 1100 0110 */
+ {ADD,"A,L", 2, 8}, /* c7: 0110 0000 1100 0111 */
+ {ONA,"A,V", 2, 8}, /* c8: 0110 0000 1100 1000 */
+ {ONA,"A,A", 2, 8}, /* c9: 0110 0000 1100 1001 */
+ {ONA,"A,B", 2, 8}, /* ca: 0110 0000 1100 1010 */
+ {ONA,"A,C", 2, 8}, /* cb: 0110 0000 1100 1011 */
+ {ONA,"A,D", 2, 8}, /* cc: 0110 0000 1100 1100 */
+ {ONA,"A,E", 2, 8}, /* cd: 0110 0000 1100 1101 */
+ {ONA,"A,H", 2, 8}, /* ce: 0110 0000 1100 1110 */
+ {ONA,"A,L", 2, 8}, /* cf: 0110 0000 1100 1111 */
+
+ {ADC,"A,V", 2, 8}, /* d0: 0110 0000 1101 0000 */
+ {ADC,"A,A", 2, 8}, /* d1: 0110 0000 1101 0001 */
+ {ADC,"A,B", 2, 8}, /* d2: 0110 0000 1101 0010 */
+ {ADC,"A,C", 2, 8}, /* d3: 0110 0000 1101 0011 */
+ {ADC,"A,D", 2, 8}, /* d4: 0110 0000 1101 0100 */
+ {ADC,"A,E", 2, 8}, /* d5: 0110 0000 1101 0101 */
+ {ADC,"A,H", 2, 8}, /* d6: 0110 0000 1101 0110 */
+ {ADC,"A,L", 2, 8}, /* d7: 0110 0000 1101 0111 */
+ {OFFA,"A,V", 2, 8}, /* d8: 0110 0000 1101 1000 */
+ {OFFA,"A,A", 2, 8}, /* d9: 0110 0000 1101 1001 */
+ {OFFA,"A,B", 2, 8}, /* da: 0110 0000 1101 1010 */
+ {OFFA,"A,C", 2, 8}, /* db: 0110 0000 1101 1011 */
+ {OFFA,"A,D", 2, 8}, /* dc: 0110 0000 1101 1100 */
+ {OFFA,"A,E", 2, 8}, /* dd: 0110 0000 1101 1101 */
+ {OFFA,"A,H", 2, 8}, /* de: 0110 0000 1101 1110 */
+ {OFFA,"A,L", 2, 8}, /* df: 0110 0000 1101 1111 */
+
+ {SUB,"A,V", 2, 8}, /* e0: 0110 0000 1110 0000 */
+ {SUB,"A,A", 2, 8}, /* e1: 0110 0000 1110 0001 */
+ {SUB,"A,B", 2, 8}, /* e2: 0110 0000 1110 0010 */
+ {SUB,"A,C", 2, 8}, /* e3: 0110 0000 1110 0011 */
+ {SUB,"A,D", 2, 8}, /* e4: 0110 0000 1110 0100 */
+ {SUB,"A,E", 2, 8}, /* e5: 0110 0000 1110 0101 */
+ {SUB,"A,H", 2, 8}, /* e6: 0110 0000 1110 0110 */
+ {SUB,"A,L", 2, 8}, /* e7: 0110 0000 1110 0111 */
+ {NEA,"A,V", 2, 8}, /* e8: 0110 0000 1110 1000 */
+ {NEA,"A,A", 2, 8}, /* e9: 0110 0000 1110 1001 */
+ {NEA,"A,B", 2, 8}, /* ea: 0110 0000 1110 1010 */
+ {NEA,"A,C", 2, 8}, /* eb: 0110 0000 1110 1011 */
+ {NEA,"A,D", 2, 8}, /* ec: 0110 0000 1110 1100 */
+ {NEA,"A,E", 2, 8}, /* ed: 0110 0000 1110 1101 */
+ {NEA,"A,H", 2, 8}, /* ee: 0110 0000 1110 1110 */
+ {NEA,"A,L", 2, 8}, /* ef: 0110 0000 1110 1111 */
+
+ {SBB,"A,V", 2, 8}, /* f0: 0110 0000 1111 0000 */
+ {SBB,"A,A", 2, 8}, /* f1: 0110 0000 1111 0001 */
+ {SBB,"A,B", 2, 8}, /* f2: 0110 0000 1111 0010 */
+ {SBB,"A,C", 2, 8}, /* f3: 0110 0000 1111 0011 */
+ {SBB,"A,D", 2, 8}, /* f4: 0110 0000 1111 0100 */
+ {SBB,"A,E", 2, 8}, /* f5: 0110 0000 1111 0101 */
+ {SBB,"A,H", 2, 8}, /* f6: 0110 0000 1111 0110 */
+ {SBB,"A,L", 2, 8}, /* f7: 0110 0000 1111 0111 */
+ {EQA,"A,V", 2, 8}, /* f8: 0110 0000 1111 1000 */
+ {EQA,"A,A", 2, 8}, /* f9: 0110 0000 1111 1001 */
+ {EQA,"A,B", 2, 8}, /* fa: 0110 0000 1111 1010 */
+ {EQA,"A,C", 2, 8}, /* fb: 0110 0000 1111 1011 */
+ {EQA,"A,D", 2, 8}, /* fc: 0110 0000 1111 1100 */
+ {EQA,"A,E", 2, 8}, /* fd: 0110 0000 1111 1101 */
+ {EQA,"A,H", 2, 8}, /* fe: 0110 0000 1111 1110 */
+ {EQA,"A,L", 2, 8} /* ff: 0110 0000 1111 1111 */
+};
+
+/* prefix 64 */
+static struct dasm_s dasm64_7810[256] =
+{
+ {MVI,"PA,%b", 3,14}, /* 00: 0110 0100 0000 0000 xxxx xxxx */
+ {MVI,"PB,%b", 3,14}, /* 01: 0110 0100 0000 0001 xxxx xxxx */
+ {MVI,"PC,%b", 3,14}, /* 02: 0110 0100 0000 0010 xxxx xxxx */
+ {MVI,"PD,%b", 3,14}, /* 03: 0110 0100 0000 0011 xxxx xxxx */
+ {illegal,0, 3,14}, /* 04: 0110 0100 0000 0100 xxxx xxxx */
+ {MVI,"PF,%b", 3,14}, /* 05: 0110 0100 0000 0101 xxxx xxxx */
+ {MVI,"MKH,%b", 3,14}, /* 06: 0110 0100 0000 0110 xxxx xxxx */
+ {MVI,"MKL,%b", 3,14}, /* 07: 0110 0100 0000 0111 xxxx xxxx */
+ {ANI,"PA,%b", 3,20}, /* 08: 0110 0100 0000 1000 xxxx xxxx */
+ {ANI,"PB,%b", 3,20}, /* 09: 0110 0100 0000 1001 xxxx xxxx */
+ {ANI,"PC,%b", 3,20}, /* 0a: 0110 0100 0000 1010 xxxx xxxx */
+ {ANI,"PD,%b", 3,20}, /* 0b: 0110 0100 0000 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
+ {ANI,"PF,%b", 3,20}, /* 0d: 0110 0100 0000 1101 xxxx xxxx */
+ {ANI,"MKH,%b", 3,20}, /* 0e: 0110 0100 0000 1110 xxxx xxxx */
+ {ANI,"MKL,%b", 3,20}, /* 0f: 0110 0100 0000 1111 xxxx xxxx */
+
+ {XRI,"PA,%b", 3,20}, /* 10: 0110 0100 0001 0000 xxxx xxxx */
+ {XRI,"PB,%b", 3,20}, /* 11: 0110 0100 0001 0001 xxxx xxxx */
+ {XRI,"PC,%b", 3,20}, /* 12: 0110 0100 0001 0010 xxxx xxxx */
+ {XRI,"PD,%b", 3,20}, /* 13: 0110 0100 0001 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 14: 0110 0100 0001 0100 xxxx xxxx */
+ {XRI,"PF,%b", 3,20}, /* 15: 0110 0100 0001 0101 xxxx xxxx */
+ {XRI,"MKH,%b", 3,20}, /* 16: 0110 0100 0001 0110 xxxx xxxx */
+ {XRI,"MKL,%b", 3,20}, /* 17: 0110 0100 0001 0111 xxxx xxxx */
+ {ORI,"PA,%b", 3,20}, /* 18: 0110 0100 0001 1000 xxxx xxxx */
+ {ORI,"PB,%b", 3,20}, /* 19: 0110 0100 0001 1001 xxxx xxxx */
+ {ORI,"PC,%b", 3,20}, /* 1a: 0110 0100 0001 1010 xxxx xxxx */
+ {ORI,"PD,%b", 3,20}, /* 1b: 0110 0100 0001 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
+ {ORI,"PF,%b", 3,20}, /* 1d: 0110 0100 0001 1101 xxxx xxxx */
+ {ORI,"MKH,%b", 3,20}, /* 1e: 0110 0100 0001 1110 xxxx xxxx */
+ {ORI,"MKL,%b", 3,20}, /* 1f: 0110 0100 0001 1111 xxxx xxxx */
+
+ {ADINC,"PA,%b", 3,20}, /* 20: 0110 0100 0010 0000 xxxx xxxx */
+ {ADINC,"PB,%b", 3,20}, /* 21: 0110 0100 0010 0001 xxxx xxxx */
+ {ADINC,"PC,%b", 3,20}, /* 22: 0110 0100 0010 0010 xxxx xxxx */
+ {ADINC,"PD,%b", 3,20}, /* 23: 0110 0100 0010 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 24: 0110 0100 0010 0100 xxxx xxxx */
+ {ADINC,"PF,%b", 3,20}, /* 25: 0110 0100 0010 0101 xxxx xxxx */
+ {ADINC,"MKH,%b", 3,20}, /* 26: 0110 0100 0010 0110 xxxx xxxx */
+ {ADINC,"MKL,%b", 3,20}, /* 27: 0110 0100 0010 0111 xxxx xxxx */
+ {GTI,"PA,%b", 3,20}, /* 28: 0110 0100 0010 1000 xxxx xxxx */
+ {GTI,"PB,%b", 3,20}, /* 29: 0110 0100 0010 1001 xxxx xxxx */
+ {GTI,"PC,%b", 3,20}, /* 2a: 0110 0100 0010 1010 xxxx xxxx */
+ {GTI,"PD,%b", 3,20}, /* 2b: 0110 0100 0010 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
+ {GTI,"PF,%b", 3,20}, /* 2d: 0110 0100 0010 1101 xxxx xxxx */
+ {GTI,"MKH,%b", 3,20}, /* 2e: 0110 0100 0010 1110 xxxx xxxx */
+ {GTI,"MKL,%b", 3,20}, /* 2f: 0110 0100 0010 1111 xxxx xxxx */
+
+ {SUINB,"PA,%b", 3,20}, /* 30: 0110 0100 0011 0000 xxxx xxxx */
+ {SUINB,"PB,%b", 3,20}, /* 31: 0110 0100 0011 0001 xxxx xxxx */
+ {SUINB,"PC,%b", 3,20}, /* 32: 0110 0100 0011 0010 xxxx xxxx */
+ {SUINB,"PD,%b", 3,20}, /* 33: 0110 0100 0011 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 34: 0110 0100 0011 0100 xxxx xxxx */
+ {SUINB,"PF,%b", 3,20}, /* 35: 0110 0100 0011 0101 xxxx xxxx */
+ {SUINB,"MKH,%b", 3,20}, /* 36: 0110 0100 0011 0110 xxxx xxxx */
+ {SUINB,"MKL,%b", 3,20}, /* 37: 0110 0100 0011 0111 xxxx xxxx */
+ {LTI,"PA,%b", 3,20}, /* 38: 0110 0100 0011 1000 xxxx xxxx */
+ {LTI,"PB,%b", 3,20}, /* 39: 0110 0100 0011 1001 xxxx xxxx */
+ {LTI,"PC,%b", 3,20}, /* 3a: 0110 0100 0011 1010 xxxx xxxx */
+ {LTI,"PD,%b", 3,20}, /* 3b: 0110 0100 0011 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
+ {LTI,"PF,%b", 3,20}, /* 3d: 0110 0100 0011 1101 xxxx xxxx */
+ {LTI,"MKH,%b", 3,20}, /* 3e: 0110 0100 0011 1110 xxxx xxxx */
+ {LTI,"MKL,%b", 3,20}, /* 3f: 0110 0100 0011 1111 xxxx xxxx */
+
+ {ADI,"PA,%b", 3,20}, /* 40: 0110 0100 0100 0000 xxxx xxxx */
+ {ADI,"PB,%b", 3,20}, /* 41: 0110 0100 0100 0001 xxxx xxxx */
+ {ADI,"PC,%b", 3,20}, /* 42: 0110 0100 0100 0010 xxxx xxxx */
+ {ADI,"PD,%b", 3,20}, /* 43: 0110 0100 0100 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 44: 0110 0100 0100 0100 xxxx xxxx */
+ {ADI,"PF,%b", 3,20}, /* 45: 0110 0100 0100 0101 xxxx xxxx */
+ {ADI,"MKH,%b", 3,20}, /* 46: 0110 0100 0100 0110 xxxx xxxx */
+ {ADI,"MKL,%b", 3,20}, /* 47: 0110 0100 0100 0111 xxxx xxxx */
+ {ONI,"PA,%b", 3,20}, /* 48: 0110 0100 0100 1000 xxxx xxxx */
+ {ONI,"PB,%b", 3,20}, /* 49: 0110 0100 0100 1001 xxxx xxxx */
+ {ONI,"PC,%b", 3,20}, /* 4a: 0110 0100 0100 1010 xxxx xxxx */
+ {ONI,"PD,%b", 3,20}, /* 4b: 0110 0100 0100 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
+ {ONI,"PF,%b", 3,20}, /* 4d: 0110 0100 0100 1101 xxxx xxxx */
+ {ONI,"MKH,%b", 3,20}, /* 4e: 0110 0100 0100 1110 xxxx xxxx */
+ {ONI,"MKL,%b", 3,20}, /* 4f: 0110 0100 0100 1111 xxxx xxxx */
+
+ {ACI,"PA,%b", 3,20}, /* 50: 0110 0100 0101 0000 xxxx xxxx */
+ {ACI,"PB,%b", 3,20}, /* 51: 0110 0100 0101 0001 xxxx xxxx */
+ {ACI,"PC,%b", 3,20}, /* 52: 0110 0100 0101 0010 xxxx xxxx */
+ {ACI,"PD,%b", 3,20}, /* 53: 0110 0100 0101 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 54: 0110 0100 0101 0100 xxxx xxxx */
+ {ACI,"PF,%b", 3,20}, /* 55: 0110 0100 0101 0101 xxxx xxxx */
+ {ACI,"MKH,%b", 3,20}, /* 56: 0110 0100 0101 0110 xxxx xxxx */
+ {ACI,"MKL,%b", 3,20}, /* 57: 0110 0100 0101 0111 xxxx xxxx */
+ {OFFI,"PA,%b", 3,20}, /* 58: 0110 0100 0101 1000 xxxx xxxx */
+ {OFFI,"PB,%b", 3,20}, /* 59: 0110 0100 0101 1001 xxxx xxxx */
+ {OFFI,"PC,%b", 3,20}, /* 5a: 0110 0100 0101 1010 xxxx xxxx */
+ {OFFI,"PD,%b", 3,20}, /* 5b: 0110 0100 0101 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
+ {OFFI,"PF,%b", 3,20}, /* 5d: 0110 0100 0101 1101 xxxx xxxx */
+ {OFFI,"MKH,%b", 3,20}, /* 5e: 0110 0100 0101 1110 xxxx xxxx */
+ {OFFI,"MKL,%b", 3,20}, /* 5f: 0110 0100 0101 1111 xxxx xxxx */
+
+ {SUI,"PA,%b", 3,20}, /* 60: 0110 0100 0110 0000 xxxx xxxx */
+ {SUI,"PB,%b", 3,20}, /* 61: 0110 0100 0110 0001 xxxx xxxx */
+ {SUI,"PC,%b", 3,20}, /* 62: 0110 0100 0110 0010 xxxx xxxx */
+ {SUI,"PD,%b", 3,20}, /* 63: 0110 0100 0110 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 64: 0110 0100 0110 0100 xxxx xxxx */
+ {SUI,"PF,%b", 3,20}, /* 65: 0110 0100 0110 0101 xxxx xxxx */
+ {SUI,"MKH,%b", 3,20}, /* 66: 0110 0100 0110 0110 xxxx xxxx */
+ {SUI,"MKL,%b", 3,20}, /* 67: 0110 0100 0110 0111 xxxx xxxx */
+ {NEI,"PA,%b", 3,20}, /* 68: 0110 0100 0110 1000 xxxx xxxx */
+ {NEI,"PB,%b", 3,20}, /* 69: 0110 0100 0110 1001 xxxx xxxx */
+ {NEI,"PC,%b", 3,20}, /* 6a: 0110 0100 0110 1010 xxxx xxxx */
+ {NEI,"PD,%b", 3,20}, /* 6b: 0110 0100 0110 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
+ {NEI,"PF,%b", 3,20}, /* 6d: 0110 0100 0110 1101 xxxx xxxx */
+ {NEI,"MKH,%b", 3,20}, /* 6e: 0110 0100 0110 1110 xxxx xxxx */
+ {NEI,"MKL,%b", 3,20}, /* 6f: 0110 0100 0110 1111 xxxx xxxx */
+
+ {SBI,"PA,%b", 3,20}, /* 70: 0110 0100 0111 0000 xxxx xxxx */
+ {SBI,"PB,%b", 3,20}, /* 71: 0110 0100 0111 0001 xxxx xxxx */
+ {SBI,"PC,%b", 3,20}, /* 72: 0110 0100 0111 0010 xxxx xxxx */
+ {SBI,"PD,%b", 3,20}, /* 73: 0110 0100 0111 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 74: 0110 0100 0111 0100 xxxx xxxx */
+ {SBI,"PF,%b", 3,20}, /* 75: 0110 0100 0111 0101 xxxx xxxx */
+ {SBI,"MKH,%b", 3,20}, /* 76: 0110 0100 0111 0110 xxxx xxxx */
+ {SBI,"MKL,%b", 3,20}, /* 77: 0110 0100 0111 0111 xxxx xxxx */
+ {EQI,"PA,%b", 3,20}, /* 78: 0110 0100 0111 1000 xxxx xxxx */
+ {EQI,"PB,%b", 3,20}, /* 79: 0110 0100 0111 1001 xxxx xxxx */
+ {EQI,"PC,%b", 3,20}, /* 7a: 0110 0100 0111 1010 xxxx xxxx */
+ {EQI,"PD,%b", 3,20}, /* 7b: 0110 0100 0111 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
+ {EQI,"PF,%b", 3,20}, /* 7d: 0110 0100 0111 1101 xxxx xxxx */
+ {EQI,"MKH,%b", 3,20}, /* 7e: 0110 0100 0111 1110 xxxx xxxx */
+ {EQI,"MKL,%b", 3,20}, /* 7f: 0110 0100 0111 1111 xxxx xxxx */
+
+ {MVI,"ANM,%b", 3,14}, /* 80: 0110 0100 1000 0000 xxxx xxxx */ /* 7810 */
+ {MVI,"SMH,%b", 3,14}, /* 81: 0110 0100 1000 0001 xxxx xxxx */
+ {illegal,0, 3,14}, /* 82: 0110 0100 1000 0010 xxxx xxxx */
+ {MVI,"EOM,%b", 3,14}, /* 83: 0110 0100 1000 0011 xxxx xxxx */
+ {illegal,0, 3,14}, /* 84: 0110 0100 1000 0100 xxxx xxxx */
+ {MVI,"TMM,%b", 3,14}, /* 85: 0110 0100 1000 0101 xxxx xxxx */
+ {illegal,0, 3,14}, /* 86: 0110 0100 1000 0110 xxxx xxxx */
+ {illegal,0, 3,14}, /* 87: 0110 0100 1000 0111 xxxx xxxx */
+ {ANI,"ANM,%b", 3,20}, /* 88: 0110 0100 1000 1000 xxxx xxxx */ /* 7810 */
+ {ANI,"SMH,%b", 3,20}, /* 89: 0110 0100 1000 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
+ {ANI,"EOM,%b", 3,20}, /* 8b: 0110 0100 1000 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
+ {ANI,"TMM,%b", 3,20}, /* 8d: 0110 0100 1000 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
+
+ {XRI,"ANM,%b", 3,20}, /* 90: 0110 0100 1001 0000 xxxx xxxx */ /* 7810 */
+ {XRI,"SMH,%b", 3,20}, /* 91: 0110 0100 1001 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* 92: 0110 0100 1001 0010 xxxx xxxx */
+ {XRI,"EOM,%b", 3,20}, /* 93: 0110 0100 1001 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 94: 0110 0100 1001 0100 xxxx xxxx */
+ {XRI,"TMM,%b", 3,20}, /* 95: 0110 0100 1001 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* 96: 0110 0100 1001 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* 97: 0110 0100 1001 0111 xxxx xxxx */
+ {ORI,"ANM,%b", 3,20}, /* 98: 0110 0100 1001 1000 xxxx xxxx */ /* 7810 */
+ {ORI,"SMH,%b", 3,20}, /* 99: 0110 0100 1001 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
+ {ORI,"EOM,%b", 3,20}, /* 9b: 0110 0100 1001 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
+ {ORI,"TMM,%b", 3,20}, /* 9d: 0110 0100 1001 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
+
+ {ADINC,"ANM,%b", 3,20}, /* a0: 0110 0100 1010 0000 xxxx xxxx */ /* 7810 */
+ {ADINC,"SMH,%b", 3,20}, /* a1: 0110 0100 1010 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* a2: 0110 0100 1010 0010 xxxx xxxx */
+ {ADINC,"EOM,%b", 3,20}, /* a3: 0110 0100 1010 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* a4: 0110 0100 1010 0100 xxxx xxxx */
+ {ADINC,"TMM,%b", 3,20}, /* a5: 0110 0100 1010 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* a6: 0110 0100 1010 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* a7: 0110 0100 1010 0111 xxxx xxxx */
+ {GTI,"ANM,%b", 3,20}, /* a8: 0110 0100 1010 1000 xxxx xxxx */ /* 7810 */
+ {GTI,"SMH,%b", 3,20}, /* a9: 0110 0100 1010 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* aa: 0110 0100 1010 1010 xxxx xxxx */
+ {GTI,"EOM,%b", 3,20}, /* ab: 0110 0100 1010 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* ac: 0110 0100 1010 1100 xxxx xxxx */
+ {GTI,"TMM,%b", 3,20}, /* ad: 0110 0100 1010 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* ae: 0110 0100 1010 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* af: 0110 0100 1010 1111 xxxx xxxx */
+
+ {SUINB,"ANM,%b", 3,20}, /* b0: 0110 0100 1011 0000 xxxx xxxx */ /* 7810 */
+ {SUINB,"SMH,%b", 3,20}, /* b1: 0110 0100 1011 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* b2: 0110 0100 1011 0010 xxxx xxxx */
+ {SUINB,"EOM,%b", 3,20}, /* b3: 0110 0100 1011 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* b4: 0110 0100 1011 0100 xxxx xxxx */
+ {SUINB,"TMM,%b", 3,20}, /* b5: 0110 0100 1011 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* b6: 0110 0100 1011 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* b7: 0110 0100 1011 0111 xxxx xxxx */
+ {LTI,"ANM,%b", 3,20}, /* b8: 0110 0100 1011 1000 xxxx xxxx */ /* 7810 */
+ {LTI,"SMH,%b", 3,20}, /* b9: 0110 0100 1011 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* ba: 0110 0100 1011 1010 xxxx xxxx */
+ {LTI,"EOM,%b", 3,20}, /* bb: 0110 0100 1011 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* bc: 0110 0100 1011 1100 xxxx xxxx */
+ {LTI,"TMM,%b", 3,20}, /* bd: 0110 0100 1011 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* be: 0110 0100 1011 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* bf: 0110 0100 1011 1111 xxxx xxxx */
+
+ {ADI,"ANM,%b", 3,20}, /* c0: 0110 0100 1100 0000 xxxx xxxx */ /* 7810 */
+ {ADI,"SMH,%b", 3,20}, /* c1: 0110 0100 1100 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* c2: 0110 0100 1100 0010 xxxx xxxx */
+ {ADI,"EOM,%b", 3,20}, /* c3: 0110 0100 1100 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* c4: 0110 0100 1100 0100 xxxx xxxx */
+ {ADI,"TMM,%b", 3,20}, /* c5: 0110 0100 1100 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* c6: 0110 0100 1100 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* c7: 0110 0100 1100 0111 xxxx xxxx */
+ {ONI,"ANM,%b", 3,20}, /* c8: 0110 0100 1100 1000 xxxx xxxx */ /* 7810 */
+ {ONI,"SMH,%b", 3,20}, /* c9: 0110 0100 1100 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* ca: 0110 0100 1100 1010 xxxx xxxx */
+ {ONI,"EOM,%b", 3,20}, /* cb: 0110 0100 1100 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* cc: 0110 0100 1100 1100 xxxx xxxx */
+ {ONI,"TMM,%b", 3,20}, /* cd: 0110 0100 1100 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* ce: 0110 0100 1100 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* cf: 0110 0100 1100 1111 xxxx xxxx */
+
+ {ACI,"ANM,%b", 3,20}, /* d0: 0110 0100 1101 0000 xxxx xxxx */ /* 7810 */
+ {ACI,"SMH,%b", 3,20}, /* d1: 0110 0100 1101 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* d2: 0110 0100 1101 0010 xxxx xxxx */
+ {ACI,"EOM,%b", 3,20}, /* d3: 0110 0100 1101 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* d4: 0110 0100 1101 0100 xxxx xxxx */
+ {ACI,"TMM,%b", 3,20}, /* d5: 0110 0100 1101 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* d6: 0110 0100 1101 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* d7: 0110 0100 1101 0111 xxxx xxxx */
+ {OFFI,"ANM,%b", 3,20}, /* d8: 0110 0100 1101 1000 xxxx xxxx */ /* 7810 */
+ {OFFI,"SMH,%b", 3,20}, /* d9: 0110 0100 1101 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* da: 0110 0100 1101 1010 xxxx xxxx */
+ {OFFI,"EOM,%b", 3,20}, /* db: 0110 0100 1101 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* dc: 0110 0100 1101 1100 xxxx xxxx */
+ {OFFI,"TMM,%b", 3,20}, /* dd: 0110 0100 1101 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* de: 0110 0100 1101 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* df: 0110 0100 1101 1111 xxxx xxxx */
+
+ {SUI,"ANM,%b", 3,20}, /* e0: 0110 0100 1110 0000 xxxx xxxx */ /* 7810 */
+ {SUI,"SMH,%b", 3,20}, /* e1: 0110 0100 1110 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* e2: 0110 0100 1110 0010 xxxx xxxx */
+ {SUI,"EOM,%b", 3,20}, /* e3: 0110 0100 1110 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* e4: 0110 0100 1110 0100 xxxx xxxx */
+ {SUI,"TMM,%b", 3,20}, /* e5: 0110 0100 1110 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* e6: 0110 0100 1110 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* e7: 0110 0100 1110 0111 xxxx xxxx */
+ {NEI,"ANM,%b", 3,20}, /* e8: 0110 0100 1110 1000 xxxx xxxx */ /* 7810 */
+ {NEI,"SMH,%b", 3,20}, /* e9: 0110 0100 1110 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* ea: 0110 0100 1110 1010 xxxx xxxx */
+ {NEI,"EOM,%b", 3,20}, /* eb: 0110 0100 1110 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* ec: 0110 0100 1110 1100 xxxx xxxx */
+ {NEI,"TMM,%b", 3,20}, /* ed: 0110 0100 1110 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* ee: 0110 0100 1110 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* ef: 0110 0100 1110 1111 xxxx xxxx */
+
+ {SBI,"ANM,%b", 3,20}, /* f0: 0110 0100 1111 0000 xxxx xxxx */ /* 7810 */
+ {SBI,"SMH,%b", 3,20}, /* f1: 0110 0100 1111 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* f2: 0110 0100 1111 0010 xxxx xxxx */
+ {SBI,"EOM,%b", 3,20}, /* f3: 0110 0100 1111 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* f4: 0110 0100 1111 0100 xxxx xxxx */
+ {SBI,"TMM,%b", 3,20}, /* f5: 0110 0100 1111 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* f6: 0110 0100 1111 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* f7: 0110 0100 1111 0111 xxxx xxxx */
+ {EQI,"ANM,%b", 3,20}, /* f8: 0110 0100 1111 1000 xxxx xxxx */ /* 7810 */
+ {EQI,"SMH,%b", 3,20}, /* f9: 0110 0100 1111 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* fa: 0110 0100 1111 1010 xxxx xxxx */
+ {EQI,"EOM,%b", 3,20}, /* fb: 0110 0100 1111 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* fc: 0110 0100 1111 1100 xxxx xxxx */
+ {EQI,"TMM,%b", 3,20}, /* fd: 0110 0100 1111 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* fe: 0110 0100 1111 1110 xxxx xxxx */
+ {illegal,0, 3,20} /* ff: 0110 0100 1111 1111 xxxx xxxx */
+};
+
+static struct dasm_s dasm64_7807[256] =
+{
+ {MVI,"PA,%b", 3,14}, /* 00: 0110 0100 0000 0000 xxxx xxxx */
+ {MVI,"PB,%b", 3,14}, /* 01: 0110 0100 0000 0001 xxxx xxxx */
+ {MVI,"PC,%b", 3,14}, /* 02: 0110 0100 0000 0010 xxxx xxxx */
+ {MVI,"PD,%b", 3,14}, /* 03: 0110 0100 0000 0011 xxxx xxxx */
+ {illegal,0, 3,14}, /* 04: 0110 0100 0000 0100 xxxx xxxx */
+ {MVI,"PF,%b", 3,14}, /* 05: 0110 0100 0000 0101 xxxx xxxx */
+ {MVI,"MKH,%b", 3,14}, /* 06: 0110 0100 0000 0110 xxxx xxxx */
+ {MVI,"MKL,%b", 3,14}, /* 07: 0110 0100 0000 0111 xxxx xxxx */
+ {ANI,"PA,%b", 3,20}, /* 08: 0110 0100 0000 1000 xxxx xxxx */
+ {ANI,"PB,%b", 3,20}, /* 09: 0110 0100 0000 1001 xxxx xxxx */
+ {ANI,"PC,%b", 3,20}, /* 0a: 0110 0100 0000 1010 xxxx xxxx */
+ {ANI,"PD,%b", 3,20}, /* 0b: 0110 0100 0000 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
+ {ANI,"PF,%b", 3,20}, /* 0d: 0110 0100 0000 1101 xxxx xxxx */
+ {ANI,"MKH,%b", 3,20}, /* 0e: 0110 0100 0000 1110 xxxx xxxx */
+ {ANI,"MKL,%b", 3,20}, /* 0f: 0110 0100 0000 1111 xxxx xxxx */
+
+ {XRI,"PA,%b", 3,20}, /* 10: 0110 0100 0001 0000 xxxx xxxx */
+ {XRI,"PB,%b", 3,20}, /* 11: 0110 0100 0001 0001 xxxx xxxx */
+ {XRI,"PC,%b", 3,20}, /* 12: 0110 0100 0001 0010 xxxx xxxx */
+ {XRI,"PD,%b", 3,20}, /* 13: 0110 0100 0001 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 14: 0110 0100 0001 0100 xxxx xxxx */
+ {XRI,"PF,%b", 3,20}, /* 15: 0110 0100 0001 0101 xxxx xxxx */
+ {XRI,"MKH,%b", 3,20}, /* 16: 0110 0100 0001 0110 xxxx xxxx */
+ {XRI,"MKL,%b", 3,20}, /* 17: 0110 0100 0001 0111 xxxx xxxx */
+ {ORI,"PA,%b", 3,20}, /* 18: 0110 0100 0001 1000 xxxx xxxx */
+ {ORI,"PB,%b", 3,20}, /* 19: 0110 0100 0001 1001 xxxx xxxx */
+ {ORI,"PC,%b", 3,20}, /* 1a: 0110 0100 0001 1010 xxxx xxxx */
+ {ORI,"PD,%b", 3,20}, /* 1b: 0110 0100 0001 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
+ {ORI,"PF,%b", 3,20}, /* 1d: 0110 0100 0001 1101 xxxx xxxx */
+ {ORI,"MKH,%b", 3,20}, /* 1e: 0110 0100 0001 1110 xxxx xxxx */
+ {ORI,"MKL,%b", 3,20}, /* 1f: 0110 0100 0001 1111 xxxx xxxx */
+
+ {ADINC,"PA,%b", 3,20}, /* 20: 0110 0100 0010 0000 xxxx xxxx */
+ {ADINC,"PB,%b", 3,20}, /* 21: 0110 0100 0010 0001 xxxx xxxx */
+ {ADINC,"PC,%b", 3,20}, /* 22: 0110 0100 0010 0010 xxxx xxxx */
+ {ADINC,"PD,%b", 3,20}, /* 23: 0110 0100 0010 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 24: 0110 0100 0010 0100 xxxx xxxx */
+ {ADINC,"PF,%b", 3,20}, /* 25: 0110 0100 0010 0101 xxxx xxxx */
+ {ADINC,"MKH,%b", 3,20}, /* 26: 0110 0100 0010 0110 xxxx xxxx */
+ {ADINC,"MKL,%b", 3,20}, /* 27: 0110 0100 0010 0111 xxxx xxxx */
+ {GTI,"PA,%b", 3,20}, /* 28: 0110 0100 0010 1000 xxxx xxxx */
+ {GTI,"PB,%b", 3,20}, /* 29: 0110 0100 0010 1001 xxxx xxxx */
+ {GTI,"PC,%b", 3,20}, /* 2a: 0110 0100 0010 1010 xxxx xxxx */
+ {GTI,"PD,%b", 3,20}, /* 2b: 0110 0100 0010 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
+ {GTI,"PF,%b", 3,20}, /* 2d: 0110 0100 0010 1101 xxxx xxxx */
+ {GTI,"MKH,%b", 3,20}, /* 2e: 0110 0100 0010 1110 xxxx xxxx */
+ {GTI,"MKL,%b", 3,20}, /* 2f: 0110 0100 0010 1111 xxxx xxxx */
+
+ {SUINB,"PA,%b", 3,20}, /* 30: 0110 0100 0011 0000 xxxx xxxx */
+ {SUINB,"PB,%b", 3,20}, /* 31: 0110 0100 0011 0001 xxxx xxxx */
+ {SUINB,"PC,%b", 3,20}, /* 32: 0110 0100 0011 0010 xxxx xxxx */
+ {SUINB,"PD,%b", 3,20}, /* 33: 0110 0100 0011 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 34: 0110 0100 0011 0100 xxxx xxxx */
+ {SUINB,"PF,%b", 3,20}, /* 35: 0110 0100 0011 0101 xxxx xxxx */
+ {SUINB,"MKH,%b", 3,20}, /* 36: 0110 0100 0011 0110 xxxx xxxx */
+ {SUINB,"MKL,%b", 3,20}, /* 37: 0110 0100 0011 0111 xxxx xxxx */
+ {LTI,"PA,%b", 3,20}, /* 38: 0110 0100 0011 1000 xxxx xxxx */
+ {LTI,"PB,%b", 3,20}, /* 39: 0110 0100 0011 1001 xxxx xxxx */
+ {LTI,"PC,%b", 3,20}, /* 3a: 0110 0100 0011 1010 xxxx xxxx */
+ {LTI,"PD,%b", 3,20}, /* 3b: 0110 0100 0011 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
+ {LTI,"PF,%b", 3,20}, /* 3d: 0110 0100 0011 1101 xxxx xxxx */
+ {LTI,"MKH,%b", 3,20}, /* 3e: 0110 0100 0011 1110 xxxx xxxx */
+ {LTI,"MKL,%b", 3,20}, /* 3f: 0110 0100 0011 1111 xxxx xxxx */
+
+ {ADI,"PA,%b", 3,20}, /* 40: 0110 0100 0100 0000 xxxx xxxx */
+ {ADI,"PB,%b", 3,20}, /* 41: 0110 0100 0100 0001 xxxx xxxx */
+ {ADI,"PC,%b", 3,20}, /* 42: 0110 0100 0100 0010 xxxx xxxx */
+ {ADI,"PD,%b", 3,20}, /* 43: 0110 0100 0100 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 44: 0110 0100 0100 0100 xxxx xxxx */
+ {ADI,"PF,%b", 3,20}, /* 45: 0110 0100 0100 0101 xxxx xxxx */
+ {ADI,"MKH,%b", 3,20}, /* 46: 0110 0100 0100 0110 xxxx xxxx */
+ {ADI,"MKL,%b", 3,20}, /* 47: 0110 0100 0100 0111 xxxx xxxx */
+ {ONI,"PA,%b", 3,20}, /* 48: 0110 0100 0100 1000 xxxx xxxx */
+ {ONI,"PB,%b", 3,20}, /* 49: 0110 0100 0100 1001 xxxx xxxx */
+ {ONI,"PC,%b", 3,20}, /* 4a: 0110 0100 0100 1010 xxxx xxxx */
+ {ONI,"PD,%b", 3,20}, /* 4b: 0110 0100 0100 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
+ {ONI,"PF,%b", 3,20}, /* 4d: 0110 0100 0100 1101 xxxx xxxx */
+ {ONI,"MKH,%b", 3,20}, /* 4e: 0110 0100 0100 1110 xxxx xxxx */
+ {ONI,"MKL,%b", 3,20}, /* 4f: 0110 0100 0100 1111 xxxx xxxx */
+
+ {ACI,"PA,%b", 3,20}, /* 50: 0110 0100 0101 0000 xxxx xxxx */
+ {ACI,"PB,%b", 3,20}, /* 51: 0110 0100 0101 0001 xxxx xxxx */
+ {ACI,"PC,%b", 3,20}, /* 52: 0110 0100 0101 0010 xxxx xxxx */
+ {ACI,"PD,%b", 3,20}, /* 53: 0110 0100 0101 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 54: 0110 0100 0101 0100 xxxx xxxx */
+ {ACI,"PF,%b", 3,20}, /* 55: 0110 0100 0101 0101 xxxx xxxx */
+ {ACI,"MKH,%b", 3,20}, /* 56: 0110 0100 0101 0110 xxxx xxxx */
+ {ACI,"MKL,%b", 3,20}, /* 57: 0110 0100 0101 0111 xxxx xxxx */
+ {OFFI,"PA,%b", 3,20}, /* 58: 0110 0100 0101 1000 xxxx xxxx */
+ {OFFI,"PB,%b", 3,20}, /* 59: 0110 0100 0101 1001 xxxx xxxx */
+ {OFFI,"PC,%b", 3,20}, /* 5a: 0110 0100 0101 1010 xxxx xxxx */
+ {OFFI,"PD,%b", 3,20}, /* 5b: 0110 0100 0101 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
+ {OFFI,"PF,%b", 3,20}, /* 5d: 0110 0100 0101 1101 xxxx xxxx */
+ {OFFI,"MKH,%b", 3,20}, /* 5e: 0110 0100 0101 1110 xxxx xxxx */
+ {OFFI,"MKL,%b", 3,20}, /* 5f: 0110 0100 0101 1111 xxxx xxxx */
+
+ {SUI,"PA,%b", 3,20}, /* 60: 0110 0100 0110 0000 xxxx xxxx */
+ {SUI,"PB,%b", 3,20}, /* 61: 0110 0100 0110 0001 xxxx xxxx */
+ {SUI,"PC,%b", 3,20}, /* 62: 0110 0100 0110 0010 xxxx xxxx */
+ {SUI,"PD,%b", 3,20}, /* 63: 0110 0100 0110 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 64: 0110 0100 0110 0100 xxxx xxxx */
+ {SUI,"PF,%b", 3,20}, /* 65: 0110 0100 0110 0101 xxxx xxxx */
+ {SUI,"MKH,%b", 3,20}, /* 66: 0110 0100 0110 0110 xxxx xxxx */
+ {SUI,"MKL,%b", 3,20}, /* 67: 0110 0100 0110 0111 xxxx xxxx */
+ {NEI,"PA,%b", 3,20}, /* 68: 0110 0100 0110 1000 xxxx xxxx */
+ {NEI,"PB,%b", 3,20}, /* 69: 0110 0100 0110 1001 xxxx xxxx */
+ {NEI,"PC,%b", 3,20}, /* 6a: 0110 0100 0110 1010 xxxx xxxx */
+ {NEI,"PD,%b", 3,20}, /* 6b: 0110 0100 0110 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
+ {NEI,"PF,%b", 3,20}, /* 6d: 0110 0100 0110 1101 xxxx xxxx */
+ {NEI,"MKH,%b", 3,20}, /* 6e: 0110 0100 0110 1110 xxxx xxxx */
+ {NEI,"MKL,%b", 3,20}, /* 6f: 0110 0100 0110 1111 xxxx xxxx */
+
+ {SBI,"PA,%b", 3,20}, /* 70: 0110 0100 0111 0000 xxxx xxxx */
+ {SBI,"PB,%b", 3,20}, /* 71: 0110 0100 0111 0001 xxxx xxxx */
+ {SBI,"PC,%b", 3,20}, /* 72: 0110 0100 0111 0010 xxxx xxxx */
+ {SBI,"PD,%b", 3,20}, /* 73: 0110 0100 0111 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 74: 0110 0100 0111 0100 xxxx xxxx */
+ {SBI,"PF,%b", 3,20}, /* 75: 0110 0100 0111 0101 xxxx xxxx */
+ {SBI,"MKH,%b", 3,20}, /* 76: 0110 0100 0111 0110 xxxx xxxx */
+ {SBI,"MKL,%b", 3,20}, /* 77: 0110 0100 0111 0111 xxxx xxxx */
+ {EQI,"PA,%b", 3,20}, /* 78: 0110 0100 0111 1000 xxxx xxxx */
+ {EQI,"PB,%b", 3,20}, /* 79: 0110 0100 0111 1001 xxxx xxxx */
+ {EQI,"PC,%b", 3,20}, /* 7a: 0110 0100 0111 1010 xxxx xxxx */
+ {EQI,"PD,%b", 3,20}, /* 7b: 0110 0100 0111 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
+ {EQI,"PF,%b", 3,20}, /* 7d: 0110 0100 0111 1101 xxxx xxxx */
+ {EQI,"MKH,%b", 3,20}, /* 7e: 0110 0100 0111 1110 xxxx xxxx */
+ {EQI,"MKL,%b", 3,20}, /* 7f: 0110 0100 0111 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* 80: 0110 0100 1000 0000 xxxx xxxx */
+ {MVI,"SMH,%b", 3,14}, /* 81: 0110 0100 1000 0001 xxxx xxxx */
+ {illegal,0, 3,14}, /* 82: 0110 0100 1000 0010 xxxx xxxx */
+ {MVI,"EOM,%b", 3,14}, /* 83: 0110 0100 1000 0011 xxxx xxxx */
+ {illegal,0, 3,14}, /* 84: 0110 0100 1000 0100 xxxx xxxx */
+ {MVI,"TMM,%b", 3,14}, /* 85: 0110 0100 1000 0101 xxxx xxxx */
+ {illegal,0, 3,14}, /* 86: 0110 0100 1000 0110 xxxx xxxx */
+ {illegal,0, 3,14}, /* 87: 0110 0100 1000 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* 88: 0110 0100 1000 1000 xxxx xxxx */
+ {ANI,"SMH,%b", 3,20}, /* 89: 0110 0100 1000 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
+ {ANI,"EOM,%b", 3,20}, /* 8b: 0110 0100 1000 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
+ {ANI,"TMM,%b", 3,20}, /* 8d: 0110 0100 1000 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* 90: 0110 0100 1001 0000 xxxx xxxx */
+ {XRI,"SMH,%b", 3,20}, /* 91: 0110 0100 1001 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* 92: 0110 0100 1001 0010 xxxx xxxx */
+ {XRI,"EOM,%b", 3,20}, /* 93: 0110 0100 1001 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 94: 0110 0100 1001 0100 xxxx xxxx */
+ {XRI,"TMM,%b", 3,20}, /* 95: 0110 0100 1001 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* 96: 0110 0100 1001 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* 97: 0110 0100 1001 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* 98: 0110 0100 1001 1000 xxxx xxxx */
+ {ORI,"SMH,%b", 3,20}, /* 99: 0110 0100 1001 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
+ {ORI,"EOM,%b", 3,20}, /* 9b: 0110 0100 1001 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
+ {ORI,"TMM,%b", 3,20}, /* 9d: 0110 0100 1001 1101 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* a0: 0110 0100 1010 0000 xxxx xxxx */
+ {ADINC,"SMH,%b", 3,20}, /* a1: 0110 0100 1010 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* a2: 0110 0100 1010 0010 xxxx xxxx */
+ {ADINC,"EOM,%b", 3,20}, /* a3: 0110 0100 1010 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* a4: 0110 0100 1010 0100 xxxx xxxx */
+ {ADINC,"TMM,%b", 3,20}, /* a5: 0110 0100 1010 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* a6: 0110 0100 1010 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* a7: 0110 0100 1010 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* a8: 0110 0100 1010 1000 xxxx xxxx */
+ {GTI,"SMH,%b", 3,20}, /* a9: 0110 0100 1010 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* aa: 0110 0100 1010 1010 xxxx xxxx */
+ {GTI,"EOM,%b", 3,20}, /* ab: 0110 0100 1010 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* ac: 0110 0100 1010 1100 xxxx xxxx */
+ {GTI,"TMM,%b", 3,20}, /* ad: 0110 0100 1010 1101 xxxx xxxx */
+ {GTI,"PT,%b", 3,20}, /* ae: 0110 0100 1010 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* af: 0110 0100 1010 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* b0: 0110 0100 1011 0000 xxxx xxxx */
+ {SUINB,"SMH,%b", 3,20}, /* b1: 0110 0100 1011 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* b2: 0110 0100 1011 0010 xxxx xxxx */
+ {SUINB,"EOM,%b", 3,20}, /* b3: 0110 0100 1011 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* b4: 0110 0100 1011 0100 xxxx xxxx */
+ {SUINB,"TMM,%b", 3,20}, /* b5: 0110 0100 1011 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* b6: 0110 0100 1011 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* b7: 0110 0100 1011 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* b8: 0110 0100 1011 1000 xxxx xxxx */
+ {LTI,"SMH,%b", 3,20}, /* b9: 0110 0100 1011 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* ba: 0110 0100 1011 1010 xxxx xxxx */
+ {LTI,"EOM,%b", 3,20}, /* bb: 0110 0100 1011 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* bc: 0110 0100 1011 1100 xxxx xxxx */
+ {LTI,"TMM,%b", 3,20}, /* bd: 0110 0100 1011 1101 xxxx xxxx */
+ {LTI,"PT,%b", 3,20}, /* be: 0110 0100 1011 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* bf: 0110 0100 1011 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* c0: 0110 0100 1100 0000 xxxx xxxx */
+ {ADI,"SMH,%b", 3,20}, /* c1: 0110 0100 1100 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* c2: 0110 0100 1100 0010 xxxx xxxx */
+ {ADI,"EOM,%b", 3,20}, /* c3: 0110 0100 1100 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* c4: 0110 0100 1100 0100 xxxx xxxx */
+ {ADI,"TMM,%b", 3,20}, /* c5: 0110 0100 1100 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* c6: 0110 0100 1100 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* c7: 0110 0100 1100 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* c8: 0110 0100 1100 1000 xxxx xxxx */
+ {ONI,"SMH,%b", 3,20}, /* c9: 0110 0100 1100 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* ca: 0110 0100 1100 1010 xxxx xxxx */
+ {ONI,"EOM,%b", 3,20}, /* cb: 0110 0100 1100 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* cc: 0110 0100 1100 1100 xxxx xxxx */
+ {ONI,"TMM,%b", 3,20}, /* cd: 0110 0100 1100 1101 xxxx xxxx */
+ {ONI,"PT,%b", 3,20}, /* ce: 0110 0100 1100 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* cf: 0110 0100 1100 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* d0: 0110 0100 1101 0000 xxxx xxxx */
+ {ACI,"SMH,%b", 3,20}, /* d1: 0110 0100 1101 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* d2: 0110 0100 1101 0010 xxxx xxxx */
+ {ACI,"EOM,%b", 3,20}, /* d3: 0110 0100 1101 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* d4: 0110 0100 1101 0100 xxxx xxxx */
+ {ACI,"TMM,%b", 3,20}, /* d5: 0110 0100 1101 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* d6: 0110 0100 1101 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* d7: 0110 0100 1101 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* d8: 0110 0100 1101 1000 xxxx xxxx */
+ {OFFI,"SMH,%b", 3,20}, /* d9: 0110 0100 1101 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* da: 0110 0100 1101 1010 xxxx xxxx */
+ {OFFI,"EOM,%b", 3,20}, /* db: 0110 0100 1101 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* dc: 0110 0100 1101 1100 xxxx xxxx */
+ {OFFI,"TMM,%b", 3,20}, /* dd: 0110 0100 1101 1101 xxxx xxxx */
+ {OFFI,"PT,%b", 3,20}, /* de: 0110 0100 1101 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* df: 0110 0100 1101 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* e0: 0110 0100 1110 0000 xxxx xxxx */
+ {SUI,"SMH,%b", 3,20}, /* e1: 0110 0100 1110 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* e2: 0110 0100 1110 0010 xxxx xxxx */
+ {SUI,"EOM,%b", 3,20}, /* e3: 0110 0100 1110 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* e4: 0110 0100 1110 0100 xxxx xxxx */
+ {SUI,"TMM,%b", 3,20}, /* e5: 0110 0100 1110 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* e6: 0110 0100 1110 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* e7: 0110 0100 1110 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* e8: 0110 0100 1110 1000 xxxx xxxx */
+ {NEI,"SMH,%b", 3,20}, /* e9: 0110 0100 1110 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* ea: 0110 0100 1110 1010 xxxx xxxx */
+ {NEI,"EOM,%b", 3,20}, /* eb: 0110 0100 1110 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* ec: 0110 0100 1110 1100 xxxx xxxx */
+ {NEI,"TMM,%b", 3,20}, /* ed: 0110 0100 1110 1101 xxxx xxxx */
+ {NEI,"PT,%b", 3,20}, /* ee: 0110 0100 1110 1110 xxxx xxxx */
+ {illegal,0, 3,20}, /* ef: 0110 0100 1110 1111 xxxx xxxx */
+
+ {illegal,0, 3,20}, /* f0: 0110 0100 1111 0000 xxxx xxxx */
+ {SBI,"SMH,%b", 3,20}, /* f1: 0110 0100 1111 0001 xxxx xxxx */
+ {illegal,0, 3,20}, /* f2: 0110 0100 1111 0010 xxxx xxxx */
+ {SBI,"EOM,%b", 3,20}, /* f3: 0110 0100 1111 0011 xxxx xxxx */
+ {illegal,0, 3,20}, /* f4: 0110 0100 1111 0100 xxxx xxxx */
+ {SBI,"TMM,%b", 3,20}, /* f5: 0110 0100 1111 0101 xxxx xxxx */
+ {illegal,0, 3,20}, /* f6: 0110 0100 1111 0110 xxxx xxxx */
+ {illegal,0, 3,20}, /* f7: 0110 0100 1111 0111 xxxx xxxx */
+ {illegal,0, 3,20}, /* f8: 0110 0100 1111 1000 xxxx xxxx */
+ {EQI,"SMH,%b", 3,20}, /* f9: 0110 0100 1111 1001 xxxx xxxx */
+ {illegal,0, 3,20}, /* fa: 0110 0100 1111 1010 xxxx xxxx */
+ {EQI,"EOM,%b", 3,20}, /* fb: 0110 0100 1111 1011 xxxx xxxx */
+ {illegal,0, 3,20}, /* fc: 0110 0100 1111 1100 xxxx xxxx */
+ {EQI,"TMM,%b", 3,20}, /* fd: 0110 0100 1111 1101 xxxx xxxx */
+ {EQI,"PT,%b", 3,20}, /* fe: 0110 0100 1111 1110 xxxx xxxx */
+ {illegal,0, 3,20} /* ff: 0110 0100 1111 1111 xxxx xxxx */
+};
+
+/* prefix 70 */
+static struct dasm_s dasm70[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0111 0000 0000 0000 */
+ {illegal,0, 2, 8}, /* 01: 0111 0000 0000 0001 */
+ {illegal,0, 2, 8}, /* 02: 0111 0000 0000 0010 */
+ {illegal,0, 2, 8}, /* 03: 0111 0000 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0111 0000 0000 0100 */
+ {illegal,0, 2, 8}, /* 05: 0111 0000 0000 0101 */
+ {illegal,0, 2, 8}, /* 06: 0111 0000 0000 0110 */
+ {illegal,0, 2, 8}, /* 07: 0111 0000 0000 0111 */
+ {illegal,0, 2, 8}, /* 08: 0111 0000 0000 1000 */
+ {illegal,0, 2, 8}, /* 09: 0111 0000 0000 1001 */
+ {illegal,0, 2, 8}, /* 0a: 0111 0000 0000 1010 */
+ {illegal,0, 2, 8}, /* 0b: 0111 0000 0000 1011 */
+ {illegal,0, 2, 8}, /* 0c: 0111 0000 0000 1100 */
+ {illegal,0, 2, 8}, /* 0d: 0111 0000 0000 1101 */
+ {SSPD,"%w", 4,20}, /* 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */
+ {LSPD,"%w", 4,20}, /* 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */
+
+ {illegal,0, 2, 8}, /* 10: 0111 0000 0001 0000 */
+ {illegal,0, 2, 8}, /* 11: 0111 0000 0001 0001 */
+ {illegal,0, 2, 8}, /* 12: 0111 0000 0001 0010 */
+ {illegal,0, 2, 8}, /* 13: 0111 0000 0001 0011 */
+ {illegal,0, 2, 8}, /* 14: 0111 0000 0001 0100 */
+ {illegal,0, 2, 8}, /* 15: 0111 0000 0001 0101 */
+ {illegal,0, 2, 8}, /* 16: 0111 0000 0001 0110 */
+ {illegal,0, 2, 8}, /* 17: 0111 0000 0001 0111 */
+ {illegal,0, 2, 8}, /* 18: 0111 0000 0001 1000 */
+ {illegal,0, 2, 8}, /* 19: 0111 0000 0001 1001 */
+ {illegal,0, 2, 8}, /* 1a: 0111 0000 0001 1010 */
+ {illegal,0, 2, 8}, /* 1b: 0111 0000 0001 1011 */
+ {illegal,0, 2, 8}, /* 1c: 0111 0000 0001 1100 */
+ {illegal,0, 2, 8}, /* 1d: 0111 0000 0001 1101 */
+ {SBCD,"%w", 4,20}, /* 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */
+ {LBCD,"%w", 4,20}, /* 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */
+
+ {illegal,0, 2, 8}, /* 20: 0111 0000 0010 0000 */
+ {illegal,0, 2, 8}, /* 21: 0111 0000 0010 0001 */
+ {illegal,0, 2, 8}, /* 22: 0111 0000 0010 0010 */
+ {illegal,0, 2, 8}, /* 23: 0111 0000 0010 0011 */
+ {illegal,0, 2, 8}, /* 24: 0111 0000 0010 0100 */
+ {illegal,0, 2, 8}, /* 25: 0111 0000 0010 0101 */
+ {illegal,0, 2, 8}, /* 26: 0111 0000 0010 0110 */
+ {illegal,0, 2, 8}, /* 27: 0111 0000 0010 0111 */
+ {illegal,0, 2, 8}, /* 28: 0111 0000 0010 1000 */
+ {illegal,0, 2, 8}, /* 29: 0111 0000 0010 1001 */
+ {illegal,0, 2, 8}, /* 2a: 0111 0000 0010 1010 */
+ {illegal,0, 2, 8}, /* 2b: 0111 0000 0010 1011 */
+ {illegal,0, 2, 8}, /* 2c: 0111 0000 0010 1100 */
+ {illegal,0, 2, 8}, /* 2d: 0111 0000 0010 1101 */
+ {SDED,"%w", 4,20}, /* 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */
+ {LDED,"%w", 4,20}, /* 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */
+
+ {illegal,0, 2, 8}, /* 30: 0111 0000 0011 0000 */
+ {illegal,0, 2, 8}, /* 31: 0111 0000 0011 0001 */
+ {illegal,0, 2, 8}, /* 32: 0111 0000 0011 0010 */
+ {illegal,0, 2, 8}, /* 33: 0111 0000 0011 0011 */
+ {illegal,0, 2, 8}, /* 34: 0111 0000 0011 0100 */
+ {illegal,0, 2, 8}, /* 35: 0111 0000 0011 0101 */
+ {illegal,0, 2, 8}, /* 36: 0111 0000 0011 0110 */
+ {illegal,0, 2, 8}, /* 37: 0111 0000 0011 0111 */
+ {illegal,0, 2, 8}, /* 38: 0111 0000 0011 1000 */
+ {illegal,0, 2, 8}, /* 39: 0111 0000 0011 1001 */
+ {illegal,0, 2, 8}, /* 3a: 0111 0000 0011 1010 */
+ {illegal,0, 2, 8}, /* 3b: 0111 0000 0011 1011 */
+ {illegal,0, 2, 8}, /* 3c: 0111 0000 0011 1100 */
+ {illegal,0, 2, 8}, /* 3d: 0111 0000 0011 1101 */
+ {SHLD,"%w", 4,20}, /* 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */
+ {LHLD,"%w", 4,20}, /* 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */
+
+ {EADD,"EA,V", 2,11}, /* 40: 0111 0000 0100 0000 */
+ {EADD,"EA,A", 2,11}, /* 41: 0111 0000 0100 0001 */
+ {EADD,"EA,B", 2,11}, /* 42: 0111 0000 0100 0010 */
+ {EADD,"EA,C", 2,11}, /* 43: 0111 0000 0100 0011 */
+ {illegal,0, 2, 8}, /* 44: 0111 0000 0100 0100 */
+ {illegal,0, 2, 8}, /* 45: 0111 0000 0100 0101 */
+ {illegal,0, 2, 8}, /* 46: 0111 0000 0100 0110 */
+ {illegal,0, 2, 8}, /* 47: 0111 0000 0100 0111 */
+ {illegal,0, 2, 8}, /* 48: 0111 0000 0100 1000 */
+ {illegal,0, 2, 8}, /* 49: 0111 0000 0100 1001 */
+ {illegal,0, 2, 8}, /* 4a: 0111 0000 0100 1010 */
+ {illegal,0, 2, 8}, /* 4b: 0111 0000 0100 1011 */
+ {illegal,0, 2, 8}, /* 4c: 0111 0000 0100 1100 */
+ {illegal,0, 2, 8}, /* 4d: 0111 0000 0100 1101 */
+ {illegal,0, 2, 8}, /* 4e: 0111 0000 0100 1110 */
+ {illegal,0, 2, 8}, /* 4f: 0111 0000 0100 1111 */
+
+ {illegal,0, 2, 8}, /* 50: 0111 0000 0101 0000 */
+ {illegal,0, 2, 8}, /* 51: 0111 0000 0101 0001 */
+ {illegal,0, 2, 8}, /* 52: 0111 0000 0101 0010 */
+ {illegal,0, 2, 8}, /* 53: 0111 0000 0101 0011 */
+ {illegal,0, 2, 8}, /* 54: 0111 0000 0101 0100 */
+ {illegal,0, 2, 8}, /* 55: 0111 0000 0101 0101 */
+ {illegal,0, 2, 8}, /* 56: 0111 0000 0101 0110 */
+ {illegal,0, 2, 8}, /* 57: 0111 0000 0101 0111 */
+ {illegal,0, 2, 8}, /* 58: 0111 0000 0101 1000 */
+ {illegal,0, 2, 8}, /* 59: 0111 0000 0101 1001 */
+ {illegal,0, 2, 8}, /* 5a: 0111 0000 0101 1010 */
+ {illegal,0, 2, 8}, /* 5b: 0111 0000 0101 1011 */
+ {illegal,0, 2, 8}, /* 5c: 0111 0000 0101 1100 */
+ {illegal,0, 2, 8}, /* 5d: 0111 0000 0101 1101 */
+ {illegal,0, 2, 8}, /* 5e: 0111 0000 0101 1110 */
+ {illegal,0, 2, 8}, /* 5f: 0111 0000 0101 1111 */
+
+ {ESUB,"EA,V", 2,11}, /* 60: 0111 0000 0110 0000 */
+ {ESUB,"EA,A", 2,11}, /* 61: 0111 0000 0110 0001 */
+ {ESUB,"EA,B", 2,11}, /* 62: 0111 0000 0110 0010 */
+ {ESUB,"EA,C", 2,11}, /* 63: 0111 0000 0110 0011 */
+ {illegal,0, 2, 8}, /* 64: 0111 0000 0110 0100 */
+ {illegal,0, 2, 8}, /* 65: 0111 0000 0110 0101 */
+ {illegal,0, 2, 8}, /* 66: 0111 0000 0110 0110 */
+ {illegal,0, 2, 8}, /* 67: 0111 0000 0110 0111 */
+ {MOV,"V,(%w)", 4,17}, /* 68: 0111 0000 0110 1000 llll llll hhhh hhhh */
+ {MOV,"A,(%w)", 4,17}, /* 69: 0111 0000 0110 1001 llll llll hhhh hhhh */
+ {MOV,"B,(%w)", 4,17}, /* 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */
+ {MOV,"C,(%w)", 4,17}, /* 6b: 0111 0000 0110 1011 llll llll hhhh hhhh */
+ {MOV,"D,(%w)", 4,17}, /* 6c: 0111 0000 0110 1100 llll llll hhhh hhhh */
+ {MOV,"E,(%w)", 4,17}, /* 6d: 0111 0000 0110 1101 llll llll hhhh hhhh */
+ {MOV,"H,(%w)", 4,17}, /* 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */
+ {MOV,"L,(%w)", 4,17}, /* 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */
+
+ {illegal,0, 2, 8}, /* 70: 0111 0000 0111 0000 */
+ {illegal,0, 2, 8}, /* 71: 0111 0000 0111 0001 */
+ {illegal,0, 2, 8}, /* 72: 0111 0000 0111 0010 */
+ {illegal,0, 2, 8}, /* 73: 0111 0000 0111 0011 */
+ {illegal,0, 2, 8}, /* 74: 0111 0000 0111 0100 */
+ {illegal,0, 2, 8}, /* 75: 0111 0000 0111 0101 */
+ {illegal,0, 2, 8}, /* 76: 0111 0000 0111 0110 */
+ {illegal,0, 2, 8}, /* 77: 0111 0000 0111 0111 */
+ {MOV,"(%w),V", 4,17}, /* 78: 0111 0000 0111 1000 llll llll hhhh hhhh */
+ {MOV,"(%w),A", 4,17}, /* 79: 0111 0000 0111 1001 llll llll hhhh hhhh */
+ {MOV,"(%w),B", 4,17}, /* 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */
+ {MOV,"(%w),C", 4,17}, /* 7b: 0111 0000 0111 1011 llll llll hhhh hhhh */
+ {MOV,"(%w),D", 4,17}, /* 7c: 0111 0000 0111 1100 llll llll hhhh hhhh */
+ {MOV,"(%w),E", 4,17}, /* 7d: 0111 0000 0111 1101 llll llll hhhh hhhh */
+ {MOV,"(%w),H", 4,17}, /* 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */
+ {MOV,"(%w),L", 4,17}, /* 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */
+
+ {illegal,0, 2, 8}, /* 80: 0111 0000 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0111 0000 1000 0001 */
+ {illegal,0, 2, 8}, /* 82: 0111 0000 1000 0010 */
+ {illegal,0, 2, 8}, /* 83: 0111 0000 1000 0011 */
+ {illegal,0, 2, 8}, /* 84: 0111 0000 1000 0100 */
+ {illegal,0, 2, 8}, /* 85: 0111 0000 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0111 0000 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0111 0000 1000 0111 */
+ {illegal,0, 2,11}, /* 88: 0111 0000 1000 1000 */
+ {ANAX,"(BC)", 2,11}, /* 89: 0111 0000 1000 1001 */
+ {ANAX,"(DE)", 2,11}, /* 8a: 0111 0000 1000 1010 */
+ {ANAX,"(HL)", 2,11}, /* 8b: 0111 0000 1000 1011 */
+ {ANAX,"(DE+)", 2,11}, /* 8c: 0111 0000 1000 1100 */
+ {ANAX,"(HL+)", 2,11}, /* 8d: 0111 0000 1000 1101 */
+ {ANAX,"(DE-)", 2,11}, /* 8e: 0111 0000 1000 1110 */
+ {ANAX,"(HL-)", 2,11}, /* 8f: 0111 0000 1000 1111 */
+
+ {illegal,0, 2,11}, /* 90: 0111 0000 1001 0000 */
+ {XRAX,"(BC)", 2,11}, /* 91: 0111 0000 1001 0001 */
+ {XRAX,"(DE)", 2,11}, /* 92: 0111 0000 1001 0010 */
+ {XRAX,"(HL)", 2,11}, /* 93: 0111 0000 1001 0011 */
+ {XRAX,"(DE+)", 2,11}, /* 94: 0111 0000 1001 0100 */
+ {XRAX,"(HL+)", 2,11}, /* 95: 0111 0000 1001 0101 */
+ {XRAX,"(DE-)", 2,11}, /* 96: 0111 0000 1001 0110 */
+ {XRAX,"(HL-)", 2,11}, /* 97: 0111 0000 1001 0111 */
+ {illegal,0, 2, 8}, /* 98: 0111 0000 1001 1000 */
+ {ORAX,"(BC)", 2, 8}, /* 99: 0111 0000 1001 1001 */
+ {ORAX,"(DE)", 2, 8}, /* 9a: 0111 0000 1001 1010 */
+ {ORAX,"(HL)", 2, 8}, /* 9b: 0111 0000 1001 1011 */
+ {ORAX,"(DE+)", 2, 8}, /* 9c: 0111 0000 1001 1100 */
+ {ORAX,"(HL+)", 2, 8}, /* 9d: 0111 0000 1001 1101 */
+ {ORAX,"(DE-)", 2, 8}, /* 9e: 0111 0000 1001 1110 */
+ {ORAX,"(HL-)", 2, 8}, /* 9f: 0111 0000 1001 1111 */
+
+ {illegal,0, 2,11}, /* a0: 0111 0000 1010 0000 */
+ {ADDNCX,"(BC)", 2,11}, /* a1: 0111 0000 1010 0001 */
+ {ADDNCX,"(DE)", 2,11}, /* a2: 0111 0000 1010 0010 */
+ {ADDNCX,"(HL)", 2,11}, /* a3: 0111 0000 1010 0011 */
+ {ADDNCX,"(DE+)", 2,11}, /* a4: 0111 0000 1010 0100 */
+ {ADDNCX,"(HL+)", 2,11}, /* a5: 0111 0000 1010 0101 */
+ {ADDNCX,"(DE-)", 2,11}, /* a6: 0111 0000 1010 0110 */
+ {ADDNCX,"(HL-)", 2,11}, /* a7: 0111 0000 1010 0111 */
+ {illegal,0, 2,11}, /* a8: 0111 0000 1010 1000 */
+ {GTAX,"(BC)", 2,11}, /* a9: 0111 0000 1010 1001 */
+ {GTAX,"(DE)", 2,11}, /* aa: 0111 0000 1010 1010 */
+ {GTAX,"(HL)", 2,11}, /* ab: 0111 0000 1010 1011 */
+ {GTAX,"(DE+)", 2,11}, /* ac: 0111 0000 1010 1100 */
+ {GTAX,"(HL+)", 2,11}, /* ad: 0111 0000 1010 1101 */
+ {GTAX,"(DE-)", 2,11}, /* ae: 0111 0000 1010 1110 */
+ {GTAX,"(HL-)", 2,11}, /* af: 0111 0000 1010 1111 */
+
+ {illegal,0, 2,11}, /* b0: 0111 0000 1011 0000 */
+ {SUBNBX,"(BC)", 2,11}, /* b1: 0111 0000 1011 0001 */
+ {SUBNBX,"(DE)", 2,11}, /* b2: 0111 0000 1011 0010 */
+ {SUBNBX,"(HL)", 2,11}, /* b3: 0111 0000 1011 0011 */
+ {SUBNBX,"(DE+)", 2,11}, /* b4: 0111 0000 1011 0100 */
+ {SUBNBX,"(HL+)", 2,11}, /* b5: 0111 0000 1011 0101 */
+ {SUBNBX,"(DE-)", 2,11}, /* b6: 0111 0000 1011 0110 */
+ {SUBNBX,"(HL-)", 2,11}, /* b7: 0111 0000 1011 0111 */
+ {illegal,0, 2,11}, /* b8: 0111 0000 1011 1000 */
+ {LTAX,"(BC)", 2,11}, /* b9: 0111 0000 1011 1001 */
+ {LTAX,"(DE)", 2,11}, /* ba: 0111 0000 1011 1010 */
+ {LTAX,"(HL)", 2,11}, /* bb: 0111 0000 1011 1011 */
+ {LTAX,"(DE+)", 2,11}, /* bc: 0111 0000 1011 1100 */
+ {LTAX,"(HL+)", 2,11}, /* bd: 0111 0000 1011 1101 */
+ {LTAX,"(DE-)", 2,11}, /* be: 0111 0000 1011 1110 */
+ {LTAX,"(HL-)", 2,11}, /* bf: 0111 0000 1011 1111 */
+
+ {illegal,0, 2,11}, /* c0: 0111 0000 1100 0000 */
+ {ADDX,"(BC)", 2,11}, /* c1: 0111 0000 1100 0001 */
+ {ADDX,"(DE)", 2,11}, /* c2: 0111 0000 1100 0010 */
+ {ADDX,"(HL)", 2,11}, /* c3: 0111 0000 1100 0011 */
+ {ADDX,"(DE+)", 2,11}, /* c4: 0111 0000 1100 0100 */
+ {ADDX,"(HL+)", 2,11}, /* c5: 0111 0000 1100 0101 */
+ {ADDX,"(DE-)", 2,11}, /* c6: 0111 0000 1100 0110 */
+ {ADDX,"(HL-)", 2,11}, /* c7: 0111 0000 1100 0111 */
+ {illegal,0, 2,11}, /* c8: 0111 0000 1100 1000 */
+ {ONAX,"(BC)", 2,11}, /* c9: 0111 0000 1100 1001 */
+ {ONAX,"(DE)", 2,11}, /* ca: 0111 0000 1100 1010 */
+ {ONAX,"(HL)", 2,11}, /* cb: 0111 0000 1100 1011 */
+ {ONAX,"(DE+)", 2,11}, /* cc: 0111 0000 1100 1100 */
+ {ONAX,"(HL+)", 2,11}, /* cd: 0111 0000 1100 1101 */
+ {ONAX,"(DE-)", 2,11}, /* ce: 0111 0000 1100 1110 */
+ {ONAX,"(HL-)", 2,11}, /* cf: 0111 0000 1100 1111 */
+
+ {illegal,0, 2,11}, /* d0: 0111 0000 1101 0000 */
+ {ADCX,"(BC)", 2,11}, /* d1: 0111 0000 1101 0001 */
+ {ADCX,"(DE)", 2,11}, /* d2: 0111 0000 1101 0010 */
+ {ADCX,"(HL)", 2,11}, /* d3: 0111 0000 1101 0011 */
+ {ADCX,"(DE+)", 2,11}, /* d4: 0111 0000 1101 0100 */
+ {ADCX,"(HL+)", 2,11}, /* d5: 0111 0000 1101 0101 */
+ {ADCX,"(DE-)", 2,11}, /* d6: 0111 0000 1101 0110 */
+ {ADCX,"(HL-)", 2,11}, /* d7: 0111 0000 1101 0111 */
+ {illegal,0, 2,11}, /* d8: 0111 0000 1101 1000 */
+ {OFFAX,"(BC)", 2,11}, /* d9: 0111 0000 1101 1001 */
+ {OFFAX,"(DE)", 2,11}, /* da: 0111 0000 1101 1010 */
+ {OFFAX,"(HL)", 2,11}, /* db: 0111 0000 1101 1011 */
+ {OFFAX,"(DE+)", 2,11}, /* dc: 0111 0000 1101 1100 */
+ {OFFAX,"(HL+)", 2,11}, /* dd: 0111 0000 1101 1101 */
+ {OFFAX,"(DE-)", 2,11}, /* de: 0111 0000 1101 1110 */
+ {OFFAX,"(HL-)", 2,11}, /* df: 0111 0000 1101 1111 */
+
+ {illegal,0, 2,11}, /* e0: 0111 0000 1110 0000 */
+ {SUBX,"(BC)", 2,11}, /* e1: 0111 0000 1110 0001 */
+ {SUBX,"(DE)", 2,11}, /* e2: 0111 0000 1110 0010 */
+ {SUBX,"(HL)", 2,11}, /* e3: 0111 0000 1110 0011 */
+ {SUBX,"(DE+)", 2,11}, /* e4: 0111 0000 1110 0100 */
+ {SUBX,"(HL+)", 2,11}, /* e5: 0111 0000 1110 0101 */
+ {SUBX,"(DE-)", 2,11}, /* e6: 0111 0000 1110 0110 */
+ {SUBX,"(HL-)", 2,11}, /* e7: 0111 0000 1110 0111 */
+ {illegal,0, 2,11}, /* e8: 0111 0000 1110 1000 */
+ {NEAX,"(BC)", 2,11}, /* e9: 0111 0000 1110 1001 */
+ {NEAX,"(DE)", 2,11}, /* ea: 0111 0000 1110 1010 */
+ {NEAX,"(HL)", 2,11}, /* eb: 0111 0000 1110 1011 */
+ {NEAX,"(DE+)", 2,11}, /* ec: 0111 0000 1110 1100 */
+ {NEAX,"(HL+)", 2,11}, /* ed: 0111 0000 1110 1101 */
+ {NEAX,"(DE-)", 2,11}, /* ee: 0111 0000 1110 1110 */
+ {NEAX,"(HL-)", 2,11}, /* ef: 0111 0000 1110 1111 */
+
+ {illegal,0, 2,11}, /* f0: 0111 0000 1111 0000 */
+ {SBBX,"(BC)", 2,11}, /* f1: 0111 0000 1111 0001 */
+ {SBBX,"(DE)", 2,11}, /* f2: 0111 0000 1111 0010 */
+ {SBBX,"(HL)", 2,11}, /* f3: 0111 0000 1111 0011 */
+ {SBBX,"(DE+)", 2,11}, /* f4: 0111 0000 1111 0100 */
+ {SBBX,"(HL+)", 2,11}, /* f5: 0111 0000 1111 0101 */
+ {SBBX,"(DE-)", 2,11}, /* f6: 0111 0000 1111 0110 */
+ {SBBX,"(HL-)", 2,11}, /* f7: 0111 0000 1111 0111 */
+ {illegal,0, 2,11}, /* f8: 0111 0000 1111 1000 */
+ {EQAX,"(BC)", 2,11}, /* f9: 0111 0000 1111 1001 */
+ {EQAX,"(DE)", 2,11}, /* fa: 0111 0000 1111 1010 */
+ {EQAX,"(HL)", 2,11}, /* fb: 0111 0000 1111 1011 */
+ {EQAX,"(DE+)", 2,11}, /* fc: 0111 0000 1111 1100 */
+ {EQAX,"(HL+)", 2,11}, /* fd: 0111 0000 1111 1101 */
+ {EQAX,"(DE-)", 2,11}, /* fe: 0111 0000 1111 1110 */
+ {EQAX,"(HL-)", 2,11} /* ff: 0111 0000 1111 1111 */
+};
+
+/* prefix 74 */
+static struct dasm_s dasm74[256] =
+{
+ {illegal,0, 2, 8}, /* 00: 0111 0100 0000 0000 */
+ {illegal,0, 2, 8}, /* 01: 0111 0100 0000 0001 */
+ {illegal,0, 2, 8}, /* 02: 0111 0100 0000 0010 */
+ {illegal,0, 2, 8}, /* 03: 0111 0100 0000 0011 */
+ {illegal,0, 2, 8}, /* 04: 0111 0100 0000 0100 */
+ {illegal,0, 2, 8}, /* 05: 0111 0100 0000 0101 */
+ {illegal,0, 2, 8}, /* 06: 0111 0100 0000 0110 */
+ {illegal,0, 2, 8}, /* 07: 0111 0100 0000 0111 */
+ {ANI,"V,%b", 3,11}, /* 08: 0111 0100 0000 1000 xxxx xxxx */
+ {ANI,"A,%b", 3,11}, /* 09: 0111 0100 0000 1001 xxxx xxxx */
+ {ANI,"B,%b", 3,11}, /* 0a: 0111 0100 0000 1010 xxxx xxxx */
+ {ANI,"C,%b", 3,11}, /* 0b: 0111 0100 0000 1011 xxxx xxxx */
+ {ANI,"D,%b", 3,11}, /* 0c: 0111 0100 0000 1100 xxxx xxxx */
+ {ANI,"E,%b", 3,11}, /* 0d: 0111 0100 0000 1101 xxxx xxxx */
+ {ANI,"H,%b", 3,11}, /* 0e: 0111 0100 0000 1110 xxxx xxxx */
+ {ANI,"L,%b", 3,11}, /* 0f: 0111 0100 0000 1111 xxxx xxxx */
+
+ {XRI,"V,%b", 3,11}, /* 10: 0111 0100 0001 0000 xxxx xxxx */
+ {XRI,"A,%b", 3,11}, /* 11: 0111 0100 0001 0001 xxxx xxxx */
+ {XRI,"B,%b", 3,11}, /* 12: 0111 0100 0001 0010 xxxx xxxx */
+ {XRI,"C,%b", 3,11}, /* 13: 0111 0100 0001 0011 xxxx xxxx */
+ {XRI,"D,%b", 3,11}, /* 14: 0111 0100 0001 0100 xxxx xxxx */
+ {XRI,"E,%b", 3,11}, /* 15: 0111 0100 0001 0101 xxxx xxxx */
+ {XRI,"H,%b", 3,11}, /* 16: 0111 0100 0001 0110 xxxx xxxx */
+ {XRI,"L,%b", 3,11}, /* 17: 0111 0100 0001 0111 xxxx xxxx */
+ {ORI,"V,%b", 3,11}, /* 18: 0111 0100 0001 1000 xxxx xxxx */
+ {ORI,"A,%b", 3,11}, /* 19: 0111 0100 0001 1001 xxxx xxxx */
+ {ORI,"B,%b", 3,11}, /* 1a: 0111 0100 0001 1010 xxxx xxxx */
+ {ORI,"C,%b", 3,11}, /* 1b: 0111 0100 0001 1011 xxxx xxxx */
+ {ORI,"D,%b", 3,11}, /* 1c: 0111 0100 0001 1100 xxxx xxxx */
+ {ORI,"E,%b", 3,11}, /* 1d: 0111 0100 0001 1101 xxxx xxxx */
+ {ORI,"H,%b", 3,11}, /* 1e: 0111 0100 0001 1110 xxxx xxxx */
+ {ORI,"L,%b", 3,11}, /* 1f: 0111 0100 0001 1111 xxxx xxxx */
+
+ {ADINC,"V,%b", 3,11}, /* 20: 0111 0100 0010 0000 xxxx xxxx */
+ {ADINC,"A,%b", 3,11}, /* 21: 0111 0100 0010 0001 xxxx xxxx */
+ {ADINC,"B,%b", 3,11}, /* 22: 0111 0100 0010 0010 xxxx xxxx */
+ {ADINC,"C,%b", 3,11}, /* 23: 0111 0100 0010 0011 xxxx xxxx */
+ {ADINC,"D,%b", 3,11}, /* 24: 0111 0100 0010 0100 xxxx xxxx */
+ {ADINC,"E,%b", 3,11}, /* 25: 0111 0100 0010 0101 xxxx xxxx */
+ {ADINC,"H,%b", 3,11}, /* 26: 0111 0100 0010 0110 xxxx xxxx */
+ {ADINC,"L,%b", 3,11}, /* 27: 0111 0100 0010 0111 xxxx xxxx */
+ {GTI,"V,%b", 3,11}, /* 28: 0111 0100 0010 1000 xxxx xxxx */
+ {GTI,"A,%b", 3,11}, /* 29: 0111 0100 0010 1001 xxxx xxxx */
+ {GTI,"B,%b", 3,11}, /* 2a: 0111 0100 0010 1010 xxxx xxxx */
+ {GTI,"C,%b", 3,11}, /* 2b: 0111 0100 0010 1011 xxxx xxxx */
+ {GTI,"D,%b", 3,11}, /* 2c: 0111 0100 0010 1100 xxxx xxxx */
+ {GTI,"E,%b", 3,11}, /* 2d: 0111 0100 0010 1101 xxxx xxxx */
+ {GTI,"H,%b", 3,11}, /* 2e: 0111 0100 0010 1110 xxxx xxxx */
+ {GTI,"L,%b", 3,11}, /* 2f: 0111 0100 0010 1111 xxxx xxxx */
+
+ {SUINB,"V,%b", 3,11}, /* 30: 0111 0100 0011 0000 xxxx xxxx */
+ {SUINB,"A,%b", 3,11}, /* 31: 0111 0100 0011 0001 xxxx xxxx */
+ {SUINB,"B,%b", 3,11}, /* 32: 0111 0100 0011 0010 xxxx xxxx */
+ {SUINB,"C,%b", 3,11}, /* 33: 0111 0100 0011 0011 xxxx xxxx */
+ {SUINB,"D,%b", 3,11}, /* 34: 0111 0100 0011 0100 xxxx xxxx */
+ {SUINB,"E,%b", 3,11}, /* 35: 0111 0100 0011 0101 xxxx xxxx */
+ {SUINB,"H,%b", 3,11}, /* 36: 0111 0100 0011 0110 xxxx xxxx */
+ {SUINB,"L,%b", 3,11}, /* 37: 0111 0100 0011 0111 xxxx xxxx */
+ {LTI,"V,%b", 3,11}, /* 38: 0111 0100 0011 1000 xxxx xxxx */
+ {LTI,"A,%b", 3,11}, /* 39: 0111 0100 0011 1001 xxxx xxxx */
+ {LTI,"B,%b", 3,11}, /* 3a: 0111 0100 0011 1010 xxxx xxxx */
+ {LTI,"C,%b", 3,11}, /* 3b: 0111 0100 0011 1011 xxxx xxxx */
+ {LTI,"D,%b", 3,11}, /* 3c: 0111 0100 0011 1100 xxxx xxxx */
+ {LTI,"E,%b", 3,11}, /* 3d: 0111 0100 0011 1101 xxxx xxxx */
+ {LTI,"H,%b", 3,11}, /* 3e: 0111 0100 0011 1110 xxxx xxxx */
+ {LTI,"L,%b", 3,11}, /* 3f: 0111 0100 0011 1111 xxxx xxxx */
+
+ {ADI,"V,%b", 3,11}, /* 40: 0111 0100 0100 0000 xxxx xxxx */
+ {ADI,"A,%b", 3,11}, /* 41: 0111 0100 0100 0001 xxxx xxxx */
+ {ADI,"B,%b", 3,11}, /* 42: 0111 0100 0100 0010 xxxx xxxx */
+ {ADI,"C,%b", 3,11}, /* 43: 0111 0100 0100 0011 xxxx xxxx */
+ {ADI,"D,%b", 3,11}, /* 44: 0111 0100 0100 0100 xxxx xxxx */
+ {ADI,"E,%b", 3,11}, /* 45: 0111 0100 0100 0101 xxxx xxxx */
+ {ADI,"H,%b", 3,11}, /* 46: 0111 0100 0100 0110 xxxx xxxx */
+ {ADI,"L,%b", 3,11}, /* 47: 0111 0100 0100 0111 xxxx xxxx */
+ {ONI,"V,%b", 3,11}, /* 48: 0111 0100 0100 1000 xxxx xxxx */
+ {ONI,"A,%b", 3,11}, /* 49: 0111 0100 0100 1001 xxxx xxxx */
+ {ONI,"B,%b", 3,11}, /* 4a: 0111 0100 0100 1010 xxxx xxxx */
+ {ONI,"C,%b", 3,11}, /* 4b: 0111 0100 0100 1011 xxxx xxxx */
+ {ONI,"D,%b", 3,11}, /* 4c: 0111 0100 0100 1100 xxxx xxxx */
+ {ONI,"E,%b", 3,11}, /* 4d: 0111 0100 0100 1101 xxxx xxxx */
+ {ONI,"H,%b", 3,11}, /* 4e: 0111 0100 0100 1110 xxxx xxxx */
+ {ONI,"L,%b", 3,11}, /* 4f: 0111 0100 0100 1111 xxxx xxxx */
+
+ {ACI,"V,%b", 3,11}, /* 50: 0111 0100 0101 0000 xxxx xxxx */
+ {ACI,"A,%b", 3,11}, /* 51: 0111 0100 0101 0001 xxxx xxxx */
+ {ACI,"B,%b", 3,11}, /* 52: 0111 0100 0101 0010 xxxx xxxx */
+ {ACI,"C,%b", 3,11}, /* 53: 0111 0100 0101 0011 xxxx xxxx */
+ {ACI,"D,%b", 3,11}, /* 54: 0111 0100 0101 0100 xxxx xxxx */
+ {ACI,"E,%b", 3,11}, /* 55: 0111 0100 0101 0101 xxxx xxxx */
+ {ACI,"H,%b", 3,11}, /* 56: 0111 0100 0101 0110 xxxx xxxx */
+ {ACI,"L,%b", 3,11}, /* 57: 0111 0100 0101 0111 xxxx xxxx */
+ {OFFI,"V,%b", 3,11}, /* 58: 0111 0100 0101 1000 xxxx xxxx */
+ {OFFI,"A,%b", 3,11}, /* 59: 0111 0100 0101 1001 xxxx xxxx */
+ {OFFI,"B,%b", 3,11}, /* 5a: 0111 0100 0101 1010 xxxx xxxx */
+ {OFFI,"C,%b", 3,11}, /* 5b: 0111 0100 0101 1011 xxxx xxxx */
+ {OFFI,"D,%b", 3,11}, /* 5c: 0111 0100 0101 1100 xxxx xxxx */
+ {OFFI,"E,%b", 3,11}, /* 5d: 0111 0100 0101 1101 xxxx xxxx */
+ {OFFI,"H,%b", 3,11}, /* 5e: 0111 0100 0101 1110 xxxx xxxx */
+ {OFFI,"L,%b", 3,11}, /* 5f: 0111 0100 0101 1111 xxxx xxxx */
+
+ {SUI,"V,%b", 3,11}, /* 60: 0111 0100 0110 0000 xxxx xxxx */
+ {SUI,"A,%b", 3,11}, /* 61: 0111 0100 0110 0001 xxxx xxxx */
+ {SUI,"B,%b", 3,11}, /* 62: 0111 0100 0110 0010 xxxx xxxx */
+ {SUI,"C,%b", 3,11}, /* 63: 0111 0100 0110 0011 xxxx xxxx */
+ {SUI,"D,%b", 3,11}, /* 64: 0111 0100 0110 0100 xxxx xxxx */
+ {SUI,"E,%b", 3,11}, /* 65: 0111 0100 0110 0101 xxxx xxxx */
+ {SUI,"H,%b", 3,11}, /* 66: 0111 0100 0110 0110 xxxx xxxx */
+ {SUI,"L,%b", 3,11}, /* 67: 0111 0100 0110 0111 xxxx xxxx */
+ {NEI,"V,%b", 3,11}, /* 68: 0111 0100 0110 1000 xxxx xxxx */
+ {NEI,"A,%b", 3,11}, /* 69: 0111 0100 0110 1001 xxxx xxxx */
+ {NEI,"B,%b", 3,11}, /* 6a: 0111 0100 0110 1010 xxxx xxxx */
+ {NEI,"C,%b", 3,11}, /* 6b: 0111 0100 0110 1011 xxxx xxxx */
+ {NEI,"D,%b", 3,11}, /* 6c: 0111 0100 0110 1100 xxxx xxxx */
+ {NEI,"E,%b", 3,11}, /* 6d: 0111 0100 0110 1101 xxxx xxxx */
+ {NEI,"H,%b", 3,11}, /* 6e: 0111 0100 0110 1110 xxxx xxxx */
+ {NEI,"L,%b", 3,11}, /* 6f: 0111 0100 0110 1111 xxxx xxxx */
+
+ {SBI,"V,%b", 3,11}, /* 70: 0111 0100 0111 0000 xxxx xxxx */
+ {SBI,"A,%b", 3,11}, /* 71: 0111 0100 0111 0001 xxxx xxxx */
+ {SBI,"B,%b", 3,11}, /* 72: 0111 0100 0111 0010 xxxx xxxx */
+ {SBI,"C,%b", 3,11}, /* 73: 0111 0100 0111 0011 xxxx xxxx */
+ {SBI,"D,%b", 3,11}, /* 74: 0111 0100 0111 0100 xxxx xxxx */
+ {SBI,"E,%b", 3,11}, /* 75: 0111 0100 0111 0101 xxxx xxxx */
+ {SBI,"H,%b", 3,11}, /* 76: 0111 0100 0111 0110 xxxx xxxx */
+ {SBI,"L,%b", 3,11}, /* 77: 0111 0100 0111 0111 xxxx xxxx */
+ {EQI,"V,%b", 3,11}, /* 78: 0111 0100 0111 1000 xxxx xxxx */
+ {EQI,"A,%b", 3,11}, /* 79: 0111 0100 0111 1001 xxxx xxxx */
+ {EQI,"B,%b", 3,11}, /* 7a: 0111 0100 0111 1010 xxxx xxxx */
+ {EQI,"C,%b", 3,11}, /* 7b: 0111 0100 0111 1011 xxxx xxxx */
+ {EQI,"D,%b", 3,11}, /* 7c: 0111 0100 0111 1100 xxxx xxxx */
+ {EQI,"E,%b", 3,11}, /* 7d: 0111 0100 0111 1101 xxxx xxxx */
+ {EQI,"H,%b", 3,11}, /* 7e: 0111 0100 0111 1110 xxxx xxxx */
+ {EQI,"L,%b", 3,11}, /* 7f: 0111 0100 0111 1111 xxxx xxxx */
+
+ {illegal,0, 2, 8}, /* 80: 0111 0100 1000 0000 */
+ {illegal,0, 2, 8}, /* 81: 0111 0100 1000 0001 */
+ {illegal,0, 2, 8}, /* 82: 0111 0100 1000 0010 */
+ {illegal,0, 2, 8}, /* 83: 0111 0100 1000 0011 */
+ {illegal,0, 2, 8}, /* 84: 0111 0100 1000 0100 */
+ {illegal,0, 2, 8}, /* 85: 0111 0100 1000 0101 */
+ {illegal,0, 2, 8}, /* 86: 0111 0100 1000 0110 */
+ {illegal,0, 2, 8}, /* 87: 0111 0100 1000 0111 */
+ {ANAW,"%a", 3,14}, /* 88: 0111 0100 1000 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* 89: 0111 0100 1000 1001 */
+ {illegal,0, 2, 8}, /* 8a: 0111 0100 1000 1010 */
+ {illegal,0, 2, 8}, /* 8b: 0111 0100 1000 1011 */
+ {illegal,0, 2, 8}, /* 8c: 0111 0100 1000 1100 */
+ {DAN,"EA,BC", 2,11}, /* 8d: 0111 0100 1000 1101 */
+ {DAN,"EA,DE", 2,11}, /* 8e: 0111 0100 1000 1110 */
+ {DAN,"EA,HL", 2,11}, /* 8f: 0111 0100 1000 1111 */
+
+ {XRAW,"%a", 3,14}, /* 90: 0111 0100 1001 0000 oooo oooo */
+ {illegal,0, 2, 8}, /* 91: 0111 0100 1001 0001 */
+ {illegal,0, 2, 8}, /* 92: 0111 0100 1001 0010 */
+ {illegal,0, 2, 8}, /* 93: 0111 0100 1001 0011 */
+ {illegal,0, 2, 8}, /* 94: 0111 0100 1001 0100 */
+ {DXR,"EA,BC", 2,11}, /* 95: 0111 0100 1001 0101 */
+ {DXR,"EA,DE", 2,11}, /* 96: 0111 0100 1001 0110 */
+ {DXR,"EA,HL", 2,11}, /* 97: 0111 0100 1001 0111 */
+ {ORAW,"%a", 3,14}, /* 98: 0111 0100 1001 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* 99: 0111 0100 1001 1001 */
+ {illegal,0, 2, 8}, /* 9a: 0111 0100 1001 1010 */
+ {illegal,0, 2, 8}, /* 9b: 0111 0100 1001 1011 */
+ {illegal,0, 2, 8}, /* 9c: 0111 0100 1001 1100 */
+ {DOR,"EA,BC", 2,11}, /* 9d: 0111 0100 1001 1101 */
+ {DOR,"EA,DE", 2,11}, /* 9e: 0111 0100 1001 1110 */
+ {DOR,"EA,HL", 2,11}, /* 9f: 0111 0100 1001 1111 */
+
+ {ADDNCW,"%a", 3,14}, /* a0: 0111 0100 1010 0000 oooo oooo */
+ {illegal,0, 2, 8}, /* a1: 0111 0100 1010 0001 */
+ {illegal,0, 2, 8}, /* a2: 0111 0100 1010 0010 */
+ {illegal,0, 2, 8}, /* a3: 0111 0100 1010 0011 */
+ {illegal,0, 2, 8}, /* a4: 0111 0100 1010 0100 */
+ {DADDNC,"EA,BC", 2,11}, /* a5: 0111 0100 1010 0101 */
+ {DADDNC,"EA,DE", 2,11}, /* a6: 0111 0100 1010 0110 */
+ {DADDNC,"EA,HL", 2,11}, /* a7: 0111 0100 1010 0111 */
+ {GTAW,"%a", 3,14}, /* a8: 0111 0100 1010 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* a9: 0111 0100 1010 1001 */
+ {illegal,0, 2, 8}, /* aa: 0111 0100 1010 1010 */
+ {illegal,0, 2, 8}, /* ab: 0111 0100 1010 1011 */
+ {illegal,0, 2, 8}, /* ac: 0111 0100 1010 1100 */
+ {DGT,"EA,BC", 2,11}, /* ad: 0111 0100 1010 1101 */
+ {DGT,"EA,DE", 2,11}, /* ae: 0111 0100 1010 1110 */
+ {DGT,"EA,HL", 2,11}, /* af: 0111 0100 1010 1111 */
+
+ {SUBNBW,"%a", 3,14}, /* b0: 0111 0100 1011 0000 oooo oooo */
+ {illegal,0, 2, 8}, /* b1: 0111 0100 1011 0001 */
+ {illegal,0, 2, 8}, /* b2: 0111 0100 1011 0010 */
+ {illegal,0, 2, 8}, /* b3: 0111 0100 1011 0011 */
+ {illegal,0, 2, 8}, /* b4: 0111 0100 1011 0100 */
+ {DSUBNB,"EA,BC", 2,11}, /* b5: 0111 0100 1011 0101 */
+ {DSUBNB,"EA,DE", 2,11}, /* b6: 0111 0100 1011 0110 */
+ {DSUBNB,"EA,HL", 2,11}, /* b7: 0111 0100 1011 0111 */
+ {LTAW,"%a", 3,14}, /* b8: 0111 0100 1011 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* b9: 0111 0100 1011 1001 */
+ {illegal,0, 2, 8}, /* ba: 0111 0100 1011 1010 */
+ {illegal,0, 2, 8}, /* bb: 0111 0100 1011 1011 */
+ {illegal,0, 2, 8}, /* bc: 0111 0100 1011 1100 */
+ {DLT,"EA,BC", 2,11}, /* bd: 0111 0100 1011 1101 */
+ {DLT,"EA,DE", 2,11}, /* be: 0111 0100 1011 1110 */
+ {DLT,"EA,HL", 2,11}, /* bf: 0111 0100 1011 1111 */
+
+ {ADDW,"%a", 3,14}, /* c0: 0111 0100 1100 0000 oooo oooo */
+ {illegal,0, 2, 8}, /* c1: 0111 0100 1100 0001 */
+ {illegal,0, 2, 8}, /* c2: 0111 0100 1100 0010 */
+ {illegal,0, 2, 8}, /* c3: 0111 0100 1100 0011 */
+ {illegal,0, 2, 8}, /* c4: 0111 0100 1100 0100 */
+ {DADD,"EA,BC", 2,11}, /* c5: 0111 0100 1100 0101 */
+ {DADD,"EA,DE", 2,11}, /* c6: 0111 0100 1100 0110 */
+ {DADD,"EA,HL", 2,11}, /* c7: 0111 0100 1100 0111 */
+ {ONAW,"%a", 3,14}, /* c8: 0111 0100 1100 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* c9: 0111 0100 1100 1001 */
+ {illegal,0, 2, 8}, /* ca: 0111 0100 1100 1010 */
+ {illegal,0, 2, 8}, /* cb: 0111 0100 1100 1011 */
+ {illegal,0, 2, 8}, /* cc: 0111 0100 1100 1100 */
+ {DON,"EA,BC", 2,11}, /* cd: 0111 0100 1100 1101 */
+ {DON,"EA,DE", 2,11}, /* ce: 0111 0100 1100 1110 */
+ {DON,"EA,HL", 2,11}, /* cf: 0111 0100 1100 1111 */
+
+ {ADCW,"%a", 3,14}, /* d0: 0111 0100 1101 0000 oooo oooo */
+ {illegal,0, 2, 8}, /* d1: 0111 0100 1101 0001 */
+ {illegal,0, 2, 8}, /* d2: 0111 0100 1101 0010 */
+ {illegal,0, 2, 8}, /* d3: 0111 0100 1101 0011 */
+ {illegal,0, 2, 8}, /* d4: 0111 0100 1101 0100 */
+ {DADC,"EA,BC", 2,11}, /* d5: 0111 0100 1101 0101 */
+ {DADC,"EA,DE", 2,11}, /* d6: 0111 0100 1101 0110 */
+ {DADC,"EA,HL", 2,11}, /* d7: 0111 0100 1101 0111 */
+ {OFFAW,"%a", 3,14}, /* d8: 0111 0100 1101 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* d9: 0111 0100 1101 1001 */
+ {illegal,0, 2, 8}, /* da: 0111 0100 1101 1010 */
+ {illegal,0, 2, 8}, /* db: 0111 0100 1101 1011 */
+ {illegal,0, 2, 8}, /* dc: 0111 0100 1101 1100 */
+ {DOFF,"EA,BC", 2,11}, /* dd: 0111 0100 1101 1101 */
+ {DOFF,"EA,DE", 2,11}, /* de: 0111 0100 1101 1110 */
+ {DOFF,"EA,HL", 2,11}, /* df: 0111 0100 1101 1111 */
+
+ {SUBW,"%a", 3,14}, /* e0: 0111 0100 1110 0000 oooo oooo */
+ {illegal,0, 2, 8}, /* e1: 0111 0100 1110 0001 */
+ {illegal,0, 2, 8}, /* e2: 0111 0100 1110 0010 */
+ {illegal,0, 2, 8}, /* e3: 0111 0100 1110 0011 */
+ {illegal,0, 2, 8}, /* e4: 0111 0100 1110 0100 */
+ {DSUB,"EA,BC", 2,11}, /* e5: 0111 0100 1110 0101 */
+ {DSUB,"EA,DE", 2,11}, /* e6: 0111 0100 1110 0110 */
+ {DSUB,"EA,HL", 2,11}, /* e7: 0111 0100 1110 0111 */
+ {NEAW,"%a", 3,14}, /* e8: 0111 0100 1110 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* e9: 0111 0100 1110 1001 */
+ {illegal,0, 2, 8}, /* ea: 0111 0100 1110 1010 */
+ {illegal,0, 2, 8}, /* eb: 0111 0100 1110 1011 */
+ {illegal,0, 2, 8}, /* ec: 0111 0100 1110 1100 */
+ {DNE,"EA,BC", 2,11}, /* ed: 0111 0100 1110 1101 */
+ {DNE,"EA,DE", 2,11}, /* ee: 0111 0100 1110 1110 */
+ {DNE,"EA,HL", 2,11}, /* ef: 0111 0100 1110 1111 */
+
+ {SBBW,"%a", 3,14}, /* f0: 0111 0100 1111 0000 oooo oooo */
+ {illegal,0, 2, 8}, /* f1: 0111 0100 1111 0001 */
+ {illegal,0, 2, 8}, /* f2: 0111 0100 1111 0010 */
+ {illegal,0, 2, 8}, /* f3: 0111 0100 1111 0011 */
+ {illegal,0, 2, 8}, /* f4: 0111 0100 1111 0100 */
+ {DSBB,"EA,BC", 2,11}, /* f5: 0111 0100 1111 0101 */
+ {DSBB,"EA,DE", 2,11}, /* f6: 0111 0100 1111 0110 */
+ {DSBB,"EA,HL", 2,11}, /* f7: 0111 0100 1111 0111 */
+ {EQAW,"%a", 3,14}, /* f8: 0111 0100 1111 1000 oooo oooo */
+ {illegal,0, 2, 8}, /* f9: 0111 0100 1111 1001 */
+ {illegal,0, 2, 8}, /* fa: 0111 0100 1111 1010 */
+ {illegal,0, 2, 8}, /* fb: 0111 0100 1111 1011 */
+ {illegal,0, 2, 8}, /* fc: 0111 0100 1111 1100 */
+ {DEQ,"EA,BC", 2,11}, /* fd: 0111 0100 1111 1101 */
+ {DEQ,"EA,DE", 2,11}, /* fe: 0111 0100 1111 1110 */
+ {DEQ,"EA,HL", 2,11} /* ff: 0111 0100 1111 1111 */
+};
+
+/* main opcodes */
+static struct dasm_s dasmXX_7810[256] =
+{
+ {NOP,0, 1, 4}, /* 00: 0000 0000 */
+ {LDAW,"%a", 2,10}, /* 01: 0000 0001 oooo oooo */
+ {INX,"SP", 1, 7}, /* 02: 0000 0010 */
+ {DCX,"SP", 1, 7}, /* 03: 0000 0011 */
+ {LXI,"SP,%w", 3,10}, /* 04: 0000 0100 llll llll hhhh hhhh */
+ {ANIW,"%a,%b", 3,19}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
+ {illegal,0, 1, 4}, /* 06: */
+ {ANI,"A,%b", 2, 7}, /* 07: 0000 0111 xxxx xxxx */
+ {MOV,"A,EAH", 1, 4}, /* 08: 0000 1000 */
+ {MOV,"A,EAL", 1, 4}, /* 09: 0000 1001 */
+ {MOV,"A,B", 1, 4}, /* 0a: 0000 1010 */
+ {MOV,"A,C", 1, 4}, /* 0b: 0000 1011 */
+ {MOV,"A,D", 1, 4}, /* 0c: 0000 1100 */
+ {MOV,"A,E", 1, 4}, /* 0d: 0000 1101 */
+ {MOV,"A,H", 1, 4}, /* 0e: 0000 1110 */
+ {MOV,"A,L", 1, 4}, /* 0f: 0000 1111 */
+
+ {EXA,0, 1, 4}, /* 10: 0001 0000 */ /* 7810 */
+ {EXX,0, 1, 4}, /* 11: 0001 0001 */ /* 7810 */
+ {INX,"BC", 1, 7}, /* 12: 0001 0010 */
+ {DCX,"BC", 1, 7}, /* 13: 0001 0011 */
+ {LXI,"BC,%w", 3,10}, /* 14: 0001 0100 llll llll hhhh hhhh */
+ {ORIW,"%a,%b", 3,19}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
+ {XRI,"A,%b", 2, 7}, /* 16: 0001 0110 xxxx xxxx */
+ {ORI,"A,%b", 2, 7}, /* 17: 0001 0111 xxxx xxxx */
+ {MOV,"EAH,A", 1, 4}, /* 18: 0001 1000 */
+ {MOV,"EAL,A", 1, 4}, /* 19: 0001 1001 */
+ {MOV,"B,A", 1, 4}, /* 1a: 0001 1010 */
+ {MOV,"C,A", 1, 4}, /* 1b: 0001 1011 */
+ {MOV,"D,A", 1, 4}, /* 1c: 0001 1100 */
+ {MOV,"E,A", 1, 4}, /* 1d: 0001 1101 */
+ {MOV,"H,A", 1, 4}, /* 1e: 0001 1110 */
+ {MOV,"L,A", 1, 4}, /* 1f: 0001 1111 */
+
+ {INRW,"%a", 2,16}, /* 20: 0010 0000 oooo oooo */
+ {JB,0, 1, 4}, /* 21: 0010 0001 */
+ {INX,"DE", 1, 7}, /* 22: 0010 0010 */
+ {DCX,"DE", 1, 7}, /* 23: 0010 0011 */
+ {LXI,"DE,%w", 3,10}, /* 24: 0010 0100 llll llll hhhh hhhh */
+ {GTIW,"%a,%b", 3,19}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
+ {ADINC,"A,%b", 2, 7}, /* 26: 0010 0110 xxxx xxxx */
+ {GTI,"A,%b", 2, 7}, /* 27: 0010 0111 xxxx xxxx */
+ {illegal,0, 1, 4}, /* 28: 0010 1000 */
+ {LDAX,"(BC)", 1, 7}, /* 29: 0010 1001 */
+ {LDAX,"(DE)", 1, 7}, /* 2a: 0010 1010 */
+ {LDAX,"(HL)", 1, 7}, /* 2b: 0010 1011 */
+ {LDAX,"(DE+)", 1, 7}, /* 2c: 0010 1100 */
+ {LDAX,"(HL+)", 1, 7}, /* 2d: 0010 1101 */
+ {LDAX,"(DE-)", 1, 7}, /* 2e: 0010 1110 */
+ {LDAX,"(HL-)", 1, 7}, /* 2f: 0010 1111 */
+
+ {DCRW,"%a", 2,16}, /* 30: 0011 0000 oooo oooo */
+ {BLOCK,0, 1,13}, /* 31: 0011 0001 */ /* 7810 */
+ {INX,"HL", 1, 7}, /* 32: 0011 0010 */
+ {DCX,"HL", 1, 7}, /* 33: 0011 0011 */
+ {LXI,"HL,%w", 3,10}, /* 34: 0011 0100 llll llll hhhh hhhh */
+ {LTIW,"%a,%b", 3,19}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
+ {SUINB,"A,%b", 2, 7}, /* 36: 0011 0110 xxxx xxxx */
+ {LTI,"A,%b", 2, 7}, /* 37: 0011 0111 xxxx xxxx */
+ {illegal,0, 1, 4}, /* 38: */
+ {STAX,"(BC)", 1, 7}, /* 39: 0011 1001 */
+ {STAX,"(DE)", 1, 7}, /* 3a: 0011 1010 */
+ {STAX,"(HL)", 1, 7}, /* 3b: 0011 1011 */
+ {STAX,"(DE+)", 1, 7}, /* 3c: 0011 1100 */
+ {STAX,"(HL+)", 1, 7}, /* 3d: 0011 1101 */
+ {STAX,"(DE-)", 1, 7}, /* 3e: 0011 1110 */
+ {STAX,"(HL-)", 1, 7}, /* 3f: 0011 1111 */
+
+ {CALL,"%w", 3,16}, /* 40: 0100 0000 llll llll hhhh hhhh */
+ {INR,"A", 1, 4}, /* 41: 0100 0001 */
+ {INR,"B", 1, 4}, /* 42: 0100 0010 */
+ {INR,"C", 1, 4}, /* 43: 0100 0011 */
+ {LXI,"EA,%w", 3,10}, /* 44: 0100 0100 llll llll hhhh hhhh */
+ {ONIW,"%a,%b", 3,19}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
+ {ADI,"A,%b", 2, 7}, /* 46: 0100 0110 xxxx xxxx */
+ {ONI,"A,%b", 2, 7}, /* 47: 0100 0111 xxxx xxxx */
+ {0,dasm48_7810, 0, 0}, /* 48: prefix */
+ {MVIX,"BC,%b", 2,10}, /* 49: 0100 1001 xxxx xxxx */
+ {MVIX,"DE,%b", 2,10}, /* 4a: 0100 1010 xxxx xxxx */
+ {MVIX,"HL,%b", 2,10}, /* 4b: 0100 1011 xxxx xxxx */
+ {0,dasm4C_7810, 0, 0}, /* 4c: prefix */
+ {0,dasm4D_7810, 0, 0}, /* 4d: prefix */
+ {JRE,"%d", 2,10}, /* 4e: 0100 111d dddd dddd */
+ {JRE,"%d", 2,10}, /* 4f: 0100 111d dddd dddd */
+
+ {EXH,0, 1, 4}, /* 50: 0101 0000 */ /* 7810 */
+ {DCR,"A", 1, 4}, /* 51: 0101 0001 */
+ {DCR,"B", 1, 4}, /* 52: 0101 0010 */
+ {DCR,"C", 1, 4}, /* 53: 0101 0011 */
+ {JMP,"%w", 3,10}, /* 54: 0101 0100 llll llll hhhh hhhh */
+ {OFFIW,"%a,%b", 3,19}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
+ {ACI,"A,%b", 2, 7}, /* 56: 0101 0110 xxxx xxxx */
+ {OFFI,"A,%b", 2, 7}, /* 57: 0101 0111 xxxx xxxx */
+ {BIT,"0,%a", 2,10}, /* 58: 0101 1000 oooo oooo */ /* 7810 */
+ {BIT,"1,%a", 2,10}, /* 59: 0101 1001 oooo oooo */ /* 7810 */
+ {BIT,"2,%a", 2,10}, /* 5a: 0101 1010 oooo oooo */ /* 7810 */
+ {BIT,"3,%a", 2,10}, /* 5b: 0101 1011 oooo oooo */ /* 7810 */
+ {BIT,"4,%a", 2,10}, /* 5c: 0101 1100 oooo oooo */ /* 7810 */
+ {BIT,"5,%a", 2,10}, /* 5d: 0101 1101 oooo oooo */ /* 7810 */
+ {BIT,"6,%a", 2,10}, /* 5e: 0101 1110 oooo oooo */ /* 7810 */
+ {BIT,"7,%a", 2,10}, /* 5f: 0101 1111 oooo oooo */ /* 7810 */
+
+ {0,dasm60, 0, 0}, /* 60: prefix */
+ {DAA,0, 1, 4}, /* 61: 0110 0001 */
+ {RETI,0, 1,13}, /* 62: 0110 0010 */
+ {STAW,"%a", 2,10}, /* 63: 0110 0011 oooo oooo */
+ {0,dasm64_7810, 0, 0}, /* 64: prefix */
+ {NEIW,"%a,%b", 3,19}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
+ {SUI,"A,%b", 2, 7}, /* 66: 0110 0110 xxxx xxxx */
+ {NEI,"A,%b", 2, 7}, /* 67: 0110 0111 xxxx xxxx */
+ {MVI,"V,%b", 2, 7}, /* 68: 0110 1000 xxxx xxxx */
+ {MVI,"A,%b", 2, 7}, /* 69: 0110 1001 xxxx xxxx */
+ {MVI,"B,%b", 2, 7}, /* 6a: 0110 1010 xxxx xxxx */
+ {MVI,"C,%b", 2, 7}, /* 6b: 0110 1011 xxxx xxxx */
+ {MVI,"D,%b", 2, 7}, /* 6c: 0110 1100 xxxx xxxx */
+ {MVI,"E,%b", 2, 7}, /* 6d: 0110 1101 xxxx xxxx */
+ {MVI,"H,%b", 2, 7}, /* 6e: 0110 1110 xxxx xxxx */
+ {MVI,"L,%b", 2, 7}, /* 6f: 0110 1111 xxxx xxxx */
+
+ {0,dasm70, 0, 0}, /* 70: prefix */
+ {MVIW,"%a,%b", 3,13}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
+ {SOFTI,0, 1,16}, /* 72: 0111 0010 */
+ {illegal,0, 1, 0}, /* 73: */
+ {0,dasm74, 0, 0}, /* 74: prefix */
+ {EQIW,"%a,%b", 3,19}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
+ {SBI,"A,%b", 2, 7}, /* 76: 0111 0110 xxxx xxxx */
+ {EQI,"A,%b", 2, 7}, /* 77: 0111 0111 xxxx xxxx */
+ {CALF,"%f", 2,13}, /* 78: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 79: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7a: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7b: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7c: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7d: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7e: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7f: 0111 1ddd dddd dddd */
+
+ {CALT,"%t", 1,16}, /* 80: 100t tttt */
+ {CALT,"%t", 1,16}, /* 81: 100t tttt */
+ {CALT,"%t", 1,16}, /* 82: 100t tttt */
+ {CALT,"%t", 1,16}, /* 83: 100t tttt */
+ {CALT,"%t", 1,16}, /* 84: 100t tttt */
+ {CALT,"%t", 1,16}, /* 85: 100t tttt */
+ {CALT,"%t", 1,16}, /* 86: 100t tttt */
+ {CALT,"%t", 1,16}, /* 87: 100t tttt */
+ {CALT,"%t", 1,16}, /* 88: 100t tttt */
+ {CALT,"%t", 1,16}, /* 89: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8a: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8b: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8c: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8d: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8e: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8f: 100t tttt */
+
+ {CALT,"%t", 1,16}, /* 90: 100t tttt */
+ {CALT,"%t", 1,16}, /* 91: 100t tttt */
+ {CALT,"%t", 1,16}, /* 92: 100t tttt */
+ {CALT,"%t", 1,16}, /* 93: 100t tttt */
+ {CALT,"%t", 1,16}, /* 94: 100t tttt */
+ {CALT,"%t", 1,16}, /* 95: 100t tttt */
+ {CALT,"%t", 1,16}, /* 96: 100t tttt */
+ {CALT,"%t", 1,16}, /* 97: 100t tttt */
+ {CALT,"%t", 1,16}, /* 98: 100t tttt */
+ {CALT,"%t", 1,16}, /* 99: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9a: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9b: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9c: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9d: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9e: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9f: 100t tttt */
+
+ {POP,"VA", 1,10}, /* a0: 1010 0000 */
+ {POP,"BC", 1,10}, /* a1: 1010 0001 */
+ {POP,"DE", 1,10}, /* a2: 1010 0010 */
+ {POP,"HL", 1,10}, /* a3: 1010 0011 */
+ {POP,"EA", 1,10}, /* a4: 1010 0100 */
+ {DMOV,"EA,BC", 1, 4}, /* a5: 1010 0101 */
+ {DMOV,"EA,DE", 1, 4}, /* a6: 1010 0110 */
+ {DMOV,"EA,HL", 1, 4}, /* a7: 1010 0111 */
+ {INX,"EA", 1, 7}, /* a8: 1010 1000 */
+ {DCX,"EA", 1, 7}, /* a9: 1010 1001 */
+ {EI,0, 1, 4}, /* aa: 1010 1010 */
+ {LDAX,"(DE+%b)", 2,13}, /* ab: 1010 1011 dddd dddd */
+ {LDAX,"(HL+A)", 1,13}, /* ac: 1010 1100 */
+ {LDAX,"(HL+B)", 1,13}, /* ad: 1010 1101 */
+ {LDAX,"(HL+EA)", 1,13}, /* ae: 1010 1110 */
+ {LDAX,"(HL+%b)", 2,13}, /* af: 1010 1111 dddd dddd */
+
+ {PUSH,"VA", 1,13}, /* b0: 1011 0000 */
+ {PUSH,"BC", 1,13}, /* b1: 1011 0001 */
+ {PUSH,"DE", 1,13}, /* b2: 1011 0010 */
+ {PUSH,"HL", 1,13}, /* b3: 1011 0011 */
+ {PUSH,"EA", 1,13}, /* b4: 1011 0100 */
+ {DMOV,"BC,EA", 1, 4}, /* b5: 1011 0101 */
+ {DMOV,"DE,EA", 1, 4}, /* b6: 1011 0110 */
+ {DMOV,"HL,EA", 1, 4}, /* b7: 1011 0111 */
+ {RET,0, 1,10}, /* b8: 1011 1000 */
+ {RETS,0, 1,10}, /* b9: 1011 1001 */
+ {DI,0, 1, 4}, /* ba: 1011 1010 */
+ {STAX,"(DE+%b)", 2,13}, /* bb: 1011 1011 dddd dddd */
+ {STAX,"(HL+A)", 1,13}, /* bc: 1011 1100 */
+ {STAX,"(HL+B)", 1,13}, /* bd: 1011 1101 */
+ {STAX,"(HL+EA)", 1,13}, /* be: 1011 1110 */
+ {STAX,"(HL+%b)", 2,13}, /* bf: 1011 1111 dddd dddd */
+
+ {JR,"%o", 1,10}, /* c0: 11oo oooo */
+ {JR,"%o", 1,10}, /* c1: 11oo oooo */
+ {JR,"%o", 1,10}, /* c2: 11oo oooo */
+ {JR,"%o", 1,10}, /* c3: 11oo oooo */
+ {JR,"%o", 1,10}, /* c4: 11oo oooo */
+ {JR,"%o", 1,10}, /* c5: 11oo oooo */
+ {JR,"%o", 1,10}, /* c6: 11oo oooo */
+ {JR,"%o", 1,10}, /* c7: 11oo oooo */
+ {JR,"%o", 1,10}, /* c8: 11oo oooo */
+ {JR,"%o", 1,10}, /* c9: 11oo oooo */
+ {JR,"%o", 1,10}, /* ca: 11oo oooo */
+ {JR,"%o", 1,10}, /* cb: 11oo oooo */
+ {JR,"%o", 1,10}, /* cc: 11oo oooo */
+ {JR,"%o", 1,10}, /* cd: 11oo oooo */
+ {JR,"%o", 1,10}, /* ce: 11oo oooo */
+ {JR,"%o", 1,10}, /* cf: 11oo oooo */
+
+ {JR,"%o", 1,10}, /* d0: 11oo oooo */
+ {JR,"%o", 1,10}, /* d1: 11oo oooo */
+ {JR,"%o", 1,10}, /* d2: 11oo oooo */
+ {JR,"%o", 1,10}, /* d3: 11oo oooo */
+ {JR,"%o", 1,10}, /* d4: 11oo oooo */
+ {JR,"%o", 1,10}, /* d5: 11oo oooo */
+ {JR,"%o", 1,10}, /* d6: 11oo oooo */
+ {JR,"%o", 1,10}, /* d7: 11oo oooo */
+ {JR,"%o", 1,10}, /* d8: 11oo oooo */
+ {JR,"%o", 1,10}, /* d9: 11oo oooo */
+ {JR,"%o", 1,10}, /* da: 11oo oooo */
+ {JR,"%o", 1,10}, /* db: 11oo oooo */
+ {JR,"%o", 1,10}, /* dc: 11oo oooo */
+ {JR,"%o", 1,10}, /* dd: 11oo oooo */
+ {JR,"%o", 1,10}, /* de: 11oo oooo */
+ {JR,"%o", 1,10}, /* df: 11oo oooo */
+
+ {JR,"%o", 1,10}, /* e0: 11oo oooo */
+ {JR,"%o", 1,10}, /* e1: 11oo oooo */
+ {JR,"%o", 1,10}, /* e2: 11oo oooo */
+ {JR,"%o", 1,10}, /* e3: 11oo oooo */
+ {JR,"%o", 1,10}, /* e4: 11oo oooo */
+ {JR,"%o", 1,10}, /* e5: 11oo oooo */
+ {JR,"%o", 1,10}, /* e6: 11oo oooo */
+ {JR,"%o", 1,10}, /* e7: 11oo oooo */
+ {JR,"%o", 1,10}, /* e8: 11oo oooo */
+ {JR,"%o", 1,10}, /* e9: 11oo oooo */
+ {JR,"%o", 1,10}, /* ea: 11oo oooo */
+ {JR,"%o", 1,10}, /* eb: 11oo oooo */
+ {JR,"%o", 1,10}, /* ec: 11oo oooo */
+ {JR,"%o", 1,10}, /* ed: 11oo oooo */
+ {JR,"%o", 1,10}, /* ee: 11oo oooo */
+ {JR,"%o", 1,10}, /* ef: 11oo oooo */
+
+ {JR,"%o", 1,10}, /* f0: 11oo oooo */
+ {JR,"%o", 1,10}, /* f1: 11oo oooo */
+ {JR,"%o", 1,10}, /* f2: 11oo oooo */
+ {JR,"%o", 1,10}, /* f3: 11oo oooo */
+ {JR,"%o", 1,10}, /* f4: 11oo oooo */
+ {JR,"%o", 1,10}, /* f5: 11oo oooo */
+ {JR,"%o", 1,10}, /* f6: 11oo oooo */
+ {JR,"%o", 1,10}, /* f7: 11oo oooo */
+ {JR,"%o", 1,10}, /* f8: 11oo oooo */
+ {JR,"%o", 1,10}, /* f9: 11oo oooo */
+ {JR,"%o", 1,10}, /* fa: 11oo oooo */
+ {JR,"%o", 1,10}, /* fb: 11oo oooo */
+ {JR,"%o", 1,10}, /* fc: 11oo oooo */
+ {JR,"%o", 1,10}, /* fd: 11oo oooo */
+ {JR,"%o", 1,10}, /* fe: 11oo oooo */
+ {JR,"%o", 1,10} /* ff: 11oo oooo */
+};
+
+static struct dasm_s dasmXX_7807[256] =
+{
+ {NOP,0, 1, 4}, /* 00: 0000 0000 */
+ {LDAW,"%a", 2,10}, /* 01: 0000 0001 oooo oooo */
+ {INX,"SP", 1, 7}, /* 02: 0000 0010 */
+ {DCX,"SP", 1, 7}, /* 03: 0000 0011 */
+ {LXI,"SP,%w", 3,10}, /* 04: 0000 0100 llll llll hhhh hhhh */
+ {ANIW,"%a,%b", 3,19}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
+ {illegal,0, 1, 4}, /* 06: */
+ {ANI,"A,%b", 2, 7}, /* 07: 0000 0111 xxxx xxxx */
+ {MOV,"A,EAH", 1, 4}, /* 08: 0000 1000 */
+ {MOV,"A,EAL", 1, 4}, /* 09: 0000 1001 */
+ {MOV,"A,B", 1, 4}, /* 0a: 0000 1010 */
+ {MOV,"A,C", 1, 4}, /* 0b: 0000 1011 */
+ {MOV,"A,D", 1, 4}, /* 0c: 0000 1100 */
+ {MOV,"A,E", 1, 4}, /* 0d: 0000 1101 */
+ {MOV,"A,H", 1, 4}, /* 0e: 0000 1110 */
+ {MOV,"A,L", 1, 4}, /* 0f: 0000 1111 */
+
+ {BLOCK,"D+", 1,13}, /* 10: 0001 0000 */ /* 7807 */
+ {BLOCK,"D-", 1,13}, /* 11: 0001 0001 */ /* 7807 */
+ {INX,"BC", 1, 7}, /* 12: 0001 0010 */
+ {DCX,"BC", 1, 7}, /* 13: 0001 0011 */
+ {LXI,"BC,%w", 3,10}, /* 14: 0001 0100 llll llll hhhh hhhh */
+ {ORIW,"%a,%b", 3,19}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
+ {XRI,"A,%b", 2, 7}, /* 16: 0001 0110 xxxx xxxx */
+ {ORI,"A,%b", 2, 7}, /* 17: 0001 0111 xxxx xxxx */
+ {MOV,"EAH,A", 1, 4}, /* 18: 0001 1000 */
+ {MOV,"EAL,A", 1, 4}, /* 19: 0001 1001 */
+ {MOV,"B,A", 1, 4}, /* 1a: 0001 1010 */
+ {MOV,"C,A", 1, 4}, /* 1b: 0001 1011 */
+ {MOV,"D,A", 1, 4}, /* 1c: 0001 1100 */
+ {MOV,"E,A", 1, 4}, /* 1d: 0001 1101 */
+ {MOV,"H,A", 1, 4}, /* 1e: 0001 1110 */
+ {MOV,"L,A", 1, 4}, /* 1f: 0001 1111 */
+
+ {INRW,"%a", 2,16}, /* 20: 0010 0000 oooo oooo */
+ {JB,0, 1, 4}, /* 21: 0010 0001 */
+ {INX,"DE", 1, 7}, /* 22: 0010 0010 */
+ {DCX,"DE", 1, 7}, /* 23: 0010 0011 */
+ {LXI,"DE,%w", 3,10}, /* 24: 0010 0100 llll llll hhhh hhhh */
+ {GTIW,"%a,%b", 3,19}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
+ {ADINC,"A,%b", 2, 7}, /* 26: 0010 0110 xxxx xxxx */
+ {GTI,"A,%b", 2, 7}, /* 27: 0010 0111 xxxx xxxx */
+ {illegal,0, 1, 4}, /* 28: 0010 1000 */
+ {LDAX,"(BC)", 1, 7}, /* 29: 0010 1001 */
+ {LDAX,"(DE)", 1, 7}, /* 2a: 0010 1010 */
+ {LDAX,"(HL)", 1, 7}, /* 2b: 0010 1011 */
+ {LDAX,"(DE+)", 1, 7}, /* 2c: 0010 1100 */
+ {LDAX,"(HL+)", 1, 7}, /* 2d: 0010 1101 */
+ {LDAX,"(DE-)", 1, 7}, /* 2e: 0010 1110 */
+ {LDAX,"(HL-)", 1, 7}, /* 2f: 0010 1111 */
+
+ {DCRW,"%a", 2,16}, /* 30: 0011 0000 oooo oooo */
+ {AND,"CY,%i", 2,10}, /* 31: 0011 0001 bbbb bbbb */ /* 7807 */
+ {INX,"HL", 1, 7}, /* 32: 0011 0010 */
+ {DCX,"HL", 1, 7}, /* 33: 0011 0011 */
+ {LXI,"HL,%w", 3,10}, /* 34: 0011 0100 llll llll hhhh hhhh */
+ {LTIW,"%a,%b", 3,19}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
+ {SUINB,"A,%b", 2, 7}, /* 36: 0011 0110 xxxx xxxx */
+ {LTI,"A,%b", 2, 7}, /* 37: 0011 0111 xxxx xxxx */
+ {illegal,0, 1, 4}, /* 38: */
+ {STAX,"(BC)", 1, 7}, /* 39: 0011 1001 */
+ {STAX,"(DE)", 1, 7}, /* 3a: 0011 1010 */
+ {STAX,"(HL)", 1, 7}, /* 3b: 0011 1011 */
+ {STAX,"(DE+)", 1, 7}, /* 3c: 0011 1100 */
+ {STAX,"(HL+)", 1, 7}, /* 3d: 0011 1101 */
+ {STAX,"(DE-)", 1, 7}, /* 3e: 0011 1110 */
+ {STAX,"(HL-)", 1, 7}, /* 3f: 0011 1111 */
+
+ {CALL,"%w", 3,16}, /* 40: 0100 0000 llll llll hhhh hhhh */
+ {INR,"A", 1, 4}, /* 41: 0100 0001 */
+ {INR,"B", 1, 4}, /* 42: 0100 0010 */
+ {INR,"C", 1, 4}, /* 43: 0100 0011 */
+ {LXI,"EA,%w", 3,10}, /* 44: 0100 0100 llll llll hhhh hhhh */
+ {ONIW,"%a,%b", 3,19}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
+ {ADI,"A,%b", 2, 7}, /* 46: 0100 0110 xxxx xxxx */
+ {ONI,"A,%b", 2, 7}, /* 47: 0100 0111 xxxx xxxx */
+ {0,dasm48_7807, 0, 0}, /* 48: prefix */
+ {MVIX,"BC,%b", 2,10}, /* 49: 0100 1001 xxxx xxxx */
+ {MVIX,"DE,%b", 2,10}, /* 4a: 0100 1010 xxxx xxxx */
+ {MVIX,"HL,%b", 2,10}, /* 4b: 0100 1011 xxxx xxxx */
+ {0,dasm4C_7807, 0, 0}, /* 4c: prefix */
+ {0,dasm4D_7807, 0, 0}, /* 4d: prefix */
+ {JRE,"%d", 2,10}, /* 4e: 0100 111d dddd dddd */
+ {JRE,"%d", 2,10}, /* 4f: 0100 111d dddd dddd */
+ {SKN,"%i", 2,10}, /* 50: 0101 0000 bbbb bbbb */ /* 7807 */
+ {DCR,"A", 1, 4}, /* 51: 0101 0001 */
+ {DCR,"B", 1, 4}, /* 52: 0101 0010 */
+ {DCR,"C", 1, 4}, /* 53: 0101 0011 */
+ {JMP,"%w", 3,10}, /* 54: 0101 0100 llll llll hhhh hhhh */
+ {OFFIW,"%a,%b", 3,19}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
+ {ACI,"A,%b", 2, 7}, /* 56: 0101 0110 xxxx xxxx */
+ {OFFI,"A,%b", 2, 7}, /* 57: 0101 0111 xxxx xxxx */
+ {SETB,"%i", 2,13}, /* 58: 0101 1000 bbbb bbbb */ /* 7807 */
+ {NOT,"%i", 2,13}, /* 59: 0101 1001 bbbb bbbb */ /* 7807 */
+ {MOV,"%i,CY", 2,13}, /* 5a: 0101 1010 bbbb bbbb */ /* 7807 */
+ {CLR,"%i", 2,13}, /* 5b: 0101 1011 bbbb bbbb */ /* 7807 */
+ {OR,"CY,%i", 2,10}, /* 5c: 0101 1100 bbbb bbbb */ /* 7807 */
+ {SK,"%i", 2,10}, /* 5d: 0101 1101 bbbb bbbb */ /* 7807 */
+ {XOR,"CY,%i", 2,10}, /* 5e: 0101 1110 bbbb bbbb */ /* 7807 */
+ {MOV,"CY,%i", 2,10}, /* 5f: 0101 1111 bbbb bbbb */ /* 7807 */
+
+ {0,dasm60, 0, 0}, /* 60: prefix */
+ {DAA,0, 1, 4}, /* 61: 0110 0001 */
+ {RETI,0, 1,13}, /* 62: 0110 0010 */
+ {STAW,"%a", 2,10}, /* 63: 0110 0011 oooo oooo */
+ {0,dasm64_7807, 0, 0}, /* 64: prefix */
+ {NEIW,"%a,%b", 3,19}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
+ {SUI,"A,%b", 2, 7}, /* 66: 0110 0110 xxxx xxxx */
+ {NEI,"A,%b", 2, 7}, /* 67: 0110 0111 xxxx xxxx */
+ {MVI,"V,%b", 2, 7}, /* 68: 0110 1000 xxxx xxxx */
+ {MVI,"A,%b", 2, 7}, /* 69: 0110 1001 xxxx xxxx */
+ {MVI,"B,%b", 2, 7}, /* 6a: 0110 1010 xxxx xxxx */
+ {MVI,"C,%b", 2, 7}, /* 6b: 0110 1011 xxxx xxxx */
+ {MVI,"D,%b", 2, 7}, /* 6c: 0110 1100 xxxx xxxx */
+ {MVI,"E,%b", 2, 7}, /* 6d: 0110 1101 xxxx xxxx */
+ {MVI,"H,%b", 2, 7}, /* 6e: 0110 1110 xxxx xxxx */
+ {MVI,"L,%b", 2, 7}, /* 6f: 0110 1111 xxxx xxxx */
+
+ {0,dasm70, 0, 0}, /* 70: prefix */
+ {MVIW,"%a,%b", 3,13}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
+ {SOFTI,0, 1,16}, /* 72: 0111 0010 */
+ {illegal,0, 1, 0}, /* 73: */
+ {0,dasm74, 0, 0}, /* 74: prefix */
+ {EQIW,"%a,%b", 3,19}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
+ {SBI,"A,%b", 2, 7}, /* 76: 0111 0110 xxxx xxxx */
+ {EQI,"A,%b", 2, 7}, /* 77: 0111 0111 xxxx xxxx */
+ {CALF,"%f", 2,13}, /* 78: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 79: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7a: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7b: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7c: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7d: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7e: 0111 1ddd dddd dddd */
+ {CALF,"%f", 2,13}, /* 7f: 0111 1ddd dddd dddd */
+
+ {CALT,"%t", 1,16}, /* 80: 100t tttt */
+ {CALT,"%t", 1,16}, /* 81: 100t tttt */
+ {CALT,"%t", 1,16}, /* 82: 100t tttt */
+ {CALT,"%t", 1,16}, /* 83: 100t tttt */
+ {CALT,"%t", 1,16}, /* 84: 100t tttt */
+ {CALT,"%t", 1,16}, /* 85: 100t tttt */
+ {CALT,"%t", 1,16}, /* 86: 100t tttt */
+ {CALT,"%t", 1,16}, /* 87: 100t tttt */
+ {CALT,"%t", 1,16}, /* 88: 100t tttt */
+ {CALT,"%t", 1,16}, /* 89: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8a: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8b: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8c: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8d: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8e: 100t tttt */
+ {CALT,"%t", 1,16}, /* 8f: 100t tttt */
+
+ {CALT,"%t", 1,16}, /* 90: 100t tttt */
+ {CALT,"%t", 1,16}, /* 91: 100t tttt */
+ {CALT,"%t", 1,16}, /* 92: 100t tttt */
+ {CALT,"%t", 1,16}, /* 93: 100t tttt */
+ {CALT,"%t", 1,16}, /* 94: 100t tttt */
+ {CALT,"%t", 1,16}, /* 95: 100t tttt */
+ {CALT,"%t", 1,16}, /* 96: 100t tttt */
+ {CALT,"%t", 1,16}, /* 97: 100t tttt */
+ {CALT,"%t", 1,16}, /* 98: 100t tttt */
+ {CALT,"%t", 1,16}, /* 99: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9a: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9b: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9c: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9d: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9e: 100t tttt */
+ {CALT,"%t", 1,16}, /* 9f: 100t tttt */
+
+ {POP,"VA", 1,10}, /* a0: 1010 0000 */
+ {POP,"BC", 1,10}, /* a1: 1010 0001 */
+ {POP,"DE", 1,10}, /* a2: 1010 0010 */
+ {POP,"HL", 1,10}, /* a3: 1010 0011 */
+ {POP,"EA", 1,10}, /* a4: 1010 0100 */
+ {DMOV,"EA,BC", 1, 4}, /* a5: 1010 0101 */
+ {DMOV,"EA,DE", 1, 4}, /* a6: 1010 0110 */
+ {DMOV,"EA,HL", 1, 4}, /* a7: 1010 0111 */
+ {INX,"EA", 1, 7}, /* a8: 1010 1000 */
+ {DCX,"EA", 1, 7}, /* a9: 1010 1001 */
+ {EI,0, 1, 4}, /* aa: 1010 1010 */
+ {LDAX,"(DE+%b)", 2,13}, /* ab: 1010 1011 dddd dddd */
+ {LDAX,"(HL+A)", 1,13}, /* ac: 1010 1100 */
+ {LDAX,"(HL+B)", 1,13}, /* ad: 1010 1101 */
+ {LDAX,"(HL+EA)", 1,13}, /* ae: 1010 1110 */
+ {LDAX,"(HL+%b)", 2,13}, /* af: 1010 1111 dddd dddd */
+
+ {PUSH,"VA", 1,13}, /* b0: 1011 0000 */
+ {PUSH,"BC", 1,13}, /* b1: 1011 0001 */
+ {PUSH,"DE", 1,13}, /* b2: 1011 0010 */
+ {PUSH,"HL", 1,13}, /* b3: 1011 0011 */
+ {PUSH,"EA", 1,13}, /* b4: 1011 0100 */
+ {DMOV,"BC,EA", 1, 4}, /* b5: 1011 0101 */
+ {DMOV,"DE,EA", 1, 4}, /* b6: 1011 0110 */
+ {DMOV,"HL,EA", 1, 4}, /* b7: 1011 0111 */
+ {RET,0, 1,10}, /* b8: 1011 1000 */
+ {RETS,0, 1,10}, /* b9: 1011 1001 */
+ {DI,0, 1, 4}, /* ba: 1011 1010 */
+ {STAX,"(DE+%b)", 2,13}, /* bb: 1011 1011 dddd dddd */
+ {STAX,"(HL+A)", 1,13}, /* bc: 1011 1100 */
+ {STAX,"(HL+B)", 1,13}, /* bd: 1011 1101 */
+ {STAX,"(HL+EA)", 1,13}, /* be: 1011 1110 */
+ {STAX,"(HL+%b)", 2,13}, /* bf: 1011 1111 dddd dddd */
+
+ {JR,"%o", 1,10}, /* c0: 11oo oooo */
+ {JR,"%o", 1,10}, /* c1: 11oo oooo */
+ {JR,"%o", 1,10}, /* c2: 11oo oooo */
+ {JR,"%o", 1,10}, /* c3: 11oo oooo */
+ {JR,"%o", 1,10}, /* c4: 11oo oooo */
+ {JR,"%o", 1,10}, /* c5: 11oo oooo */
+ {JR,"%o", 1,10}, /* c6: 11oo oooo */
+ {JR,"%o", 1,10}, /* c7: 11oo oooo */
+ {JR,"%o", 1,10}, /* c8: 11oo oooo */
+ {JR,"%o", 1,10}, /* c9: 11oo oooo */
+ {JR,"%o", 1,10}, /* ca: 11oo oooo */
+ {JR,"%o", 1,10}, /* cb: 11oo oooo */
+ {JR,"%o", 1,10}, /* cc: 11oo oooo */
+ {JR,"%o", 1,10}, /* cd: 11oo oooo */
+ {JR,"%o", 1,10}, /* ce: 11oo oooo */
+ {JR,"%o", 1,10}, /* cf: 11oo oooo */
+
+ {JR,"%o", 1,10}, /* d0: 11oo oooo */
+ {JR,"%o", 1,10}, /* d1: 11oo oooo */
+ {JR,"%o", 1,10}, /* d2: 11oo oooo */
+ {JR,"%o", 1,10}, /* d3: 11oo oooo */
+ {JR,"%o", 1,10}, /* d4: 11oo oooo */
+ {JR,"%o", 1,10}, /* d5: 11oo oooo */
+ {JR,"%o", 1,10}, /* d6: 11oo oooo */
+ {JR,"%o", 1,10}, /* d7: 11oo oooo */
+ {JR,"%o", 1,10}, /* d8: 11oo oooo */
+ {JR,"%o", 1,10}, /* d9: 11oo oooo */
+ {JR,"%o", 1,10}, /* da: 11oo oooo */
+ {JR,"%o", 1,10}, /* db: 11oo oooo */
+ {JR,"%o", 1,10}, /* dc: 11oo oooo */
+ {JR,"%o", 1,10}, /* dd: 11oo oooo */
+ {JR,"%o", 1,10}, /* de: 11oo oooo */
+ {JR,"%o", 1,10}, /* df: 11oo oooo */
+
+ {JR,"%o", 1,10}, /* e0: 11oo oooo */
+ {JR,"%o", 1,10}, /* e1: 11oo oooo */
+ {JR,"%o", 1,10}, /* e2: 11oo oooo */
+ {JR,"%o", 1,10}, /* e3: 11oo oooo */
+ {JR,"%o", 1,10}, /* e4: 11oo oooo */
+ {JR,"%o", 1,10}, /* e5: 11oo oooo */
+ {JR,"%o", 1,10}, /* e6: 11oo oooo */
+ {JR,"%o", 1,10}, /* e7: 11oo oooo */
+ {JR,"%o", 1,10}, /* e8: 11oo oooo */
+ {JR,"%o", 1,10}, /* e9: 11oo oooo */
+ {JR,"%o", 1,10}, /* ea: 11oo oooo */
+ {JR,"%o", 1,10}, /* eb: 11oo oooo */
+ {JR,"%o", 1,10}, /* ec: 11oo oooo */
+ {JR,"%o", 1,10}, /* ed: 11oo oooo */
+ {JR,"%o", 1,10}, /* ee: 11oo oooo */
+ {JR,"%o", 1,10}, /* ef: 11oo oooo */
+
+ {JR,"%o", 1,10}, /* f0: 11oo oooo */
+ {JR,"%o", 1,10}, /* f1: 11oo oooo */
+ {JR,"%o", 1,10}, /* f2: 11oo oooo */
+ {JR,"%o", 1,10}, /* f3: 11oo oooo */
+ {JR,"%o", 1,10}, /* f4: 11oo oooo */
+ {JR,"%o", 1,10}, /* f5: 11oo oooo */
+ {JR,"%o", 1,10}, /* f6: 11oo oooo */
+ {JR,"%o", 1,10}, /* f7: 11oo oooo */
+ {JR,"%o", 1,10}, /* f8: 11oo oooo */
+ {JR,"%o", 1,10}, /* f9: 11oo oooo */
+ {JR,"%o", 1,10}, /* fa: 11oo oooo */
+ {JR,"%o", 1,10}, /* fb: 11oo oooo */
+ {JR,"%o", 1,10}, /* fc: 11oo oooo */
+ {JR,"%o", 1,10}, /* fd: 11oo oooo */
+ {JR,"%o", 1,10}, /* fe: 11oo oooo */
+ {JR,"%o", 1,10} /* ff: 11oo oooo */
+};
+
+
+/* register names for bit manipulation instructions */
+static const char *regname[32] =
+{
+ "illegal", "illegal", "illegal", "illegal",
+ "illegal", "illegal", "illegal", "illegal",
+ "illegal", "illegal", "illegal", "illegal",
+ "illegal", "illegal", "illegal", "illegal",
+ "PA", "PB", "PC", "PD",
+ "illegal", "PF", "MKH", "MKL",
+ "illegal", "SMH", "illegal", "EOM",
+ "illegal", "TMM", "PT", "illegal"
+};
+
+static unsigned upd7810_get_reg(int reg) { cpuinfo info; upd7810_get_info(CPUINFO_INT_REGISTER + (reg), &info); return info.i; }
+
+static unsigned Dasm( char *buffer, unsigned pc, struct dasm_s *dasmXX, const UINT8 *oprom, const UINT8 *opram )
+{
+ unsigned opc = pc;
+ UINT8 op = oprom[pc++ - opc], op2, t, l;
+ int offset;
+ UINT16 ea;
+ const char *a;
+ UINT32 flags = 0;
+
+ t = dasmXX[op].token;
+ a = dasmXX[op].args;
+ l = dasmXX[op].oplen;
+
+ /* 0 token means prefix opcode (use table from args) */
+ if (0 == t)
+ {
+ struct dasm_s *p_dasm = (struct dasm_s *)a;
+
+ op2 = oprom[pc++ - opc];
+ t = p_dasm[op2].token;
+ a = p_dasm[op2].args;
+ l = p_dasm[op2].oplen;
+ }
+
+ buffer += sprintf(buffer, "%-8.8s", token[t]);
+
+ if (t == CALB || t == CALF || t == CALL || t == CALT)
+ flags = DASMFLAG_STEP_OVER;
+ else if (t == RET || t == RETI)
+ flags = DASMFLAG_STEP_OUT;
+
+ while (a && *a)
+ {
+ if ('%' == *a)
+ {
+ a++;
+ switch (*a)
+ {
+ case 'a': /* address V * 256 + offset */
+ op2 = opram[pc++ - opc];
+ ea = upd7810_get_reg(UPD7810_V) * 256 + op2;
+ buffer += sprintf(buffer, "$%04X", ea);
+ break;
+ case 'b': /* immediate byte */
+ buffer += sprintf(buffer, "$%02X", opram[pc++ - opc]);
+ break;
+ case 'w': /* immediate word */
+ ea = opram[pc++ - opc];
+ ea += opram[pc++ - opc] << 8;
+ buffer += sprintf(buffer, "$%04X", ea);
+ break;
+ case 'd': /* JRE address */
+ op2 = oprom[pc++ - opc];
+ offset = (op & 1) ? -(256 - op2): + op2;
+ buffer += sprintf(buffer, "$%04X", pc + offset);
+ break;
+ case 't': /* CALT address */
+ ea = 0x80 + 2 * (op & 0x1f);
+ buffer += sprintf(buffer, "($%04X)", ea);
+ break;
+ case 'f': /* CALF address */
+ op2 = oprom[pc++ - opc];
+ ea = 0x800 + 0x100 * (op & 0x07) + op2;
+ buffer += sprintf(buffer, "$%04X", ea);
+ break;
+ case 'o': /* JR offset */
+ op2 = oprom[pc++ - opc];
+ offset = (INT8)(op << 2) >> 2;
+ buffer += sprintf(buffer, "$%04X", pc + offset - 1);
+ break;
+ case 'i': /* bit manipulation */
+ op2 = oprom[pc++ - opc];
+ buffer += sprintf(buffer, "%s,%d", regname[op2 & 0x1f], op2 >> 5);
+ break;
+ default:
+ *buffer++ = *a;
+ }
+ }
+ else
+ *buffer++ = *a;
+ a++;
+ }
+ *buffer = '\0';
+
+ return l | flags | DASMFLAG_SUPPORTED;
+}
+
+unsigned upd7810_dasm( char *buffer, unsigned pc, const UINT8 *oprom, const UINT8 *opram )
+{
+ return Dasm( buffer, pc, dasmXX_7810, oprom, opram );
+}
+
+unsigned upd7807_dasm( char *buffer, unsigned pc, const UINT8 *oprom, const UINT8 *opram )
+{
+ return Dasm( buffer, pc, dasmXX_7807, oprom, opram );
+}
diff --git a/src/emu/cpu/upd7810/7810ops.c b/src/emu/cpu/upd7810/7810ops.c
new file mode 100644
index 00000000000..c243cd612b1
--- /dev/null
+++ b/src/emu/cpu/upd7810/7810ops.c
@@ -0,0 +1,9341 @@
+/*****************************************************************************
+ *
+ * Portable uPD7810/11, 7810H/11H, 78C10/C11/C14 emulator V0.2
+ * Copyright (c) 2001 Juergen Buchmueller, all rights reserved.
+ *
+ * 7810ops.c - opcode functions
+ *
+ *****************************************************************************/
+
+static void illegal(void)
+{
+ logerror("uPD7810 #%d: illegal opcode %02x at PC:%04x\n", cpu_getactivecpu(), OP, PC);
+}
+
+static void illegal2(void)
+{
+ logerror("uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, OP2, PC);
+}
+
+/* prefix 48 */
+
+/* 48 01: 0100 1000 0000 0001 */
+static void SLRC_A(void)
+{
+ PSW = (PSW & ~CY) | (A & CY);
+ A >>= 1;
+ SKIP_CY;
+}
+
+/* 48 02: 0100 1000 0000 0010 */
+static void SLRC_B(void)
+{
+ PSW = (PSW & ~CY) | (B & CY);
+ B >>= 1;
+ SKIP_CY;
+}
+
+/* 48 03: 0100 1000 0000 0011 */
+static void SLRC_C(void)
+{
+ PSW = (PSW & ~CY) | (C & CY);
+ C >>= 1;
+ SKIP_CY;
+}
+
+
+/* 48 05: 0100 1000 0000 0101 */
+static void SLLC_A(void)
+{
+ PSW = (PSW & ~CY) | ((A >> 7) & CY);
+ A <<= 1;
+ SKIP_CY;
+}
+
+/* 48 06: 0100 1000 0000 0110 */
+static void SLLC_B(void)
+{
+ PSW = (PSW & ~CY) | ((B >> 7) & CY);
+ B <<= 1;
+ SKIP_CY;
+}
+
+/* 48 07: 0100 1000 0000 0111 */
+static void SLLC_C(void)
+{
+ PSW = (PSW & ~CY) | ((C >> 7) & CY);
+ C <<= 1;
+ SKIP_CY;
+}
+
+/* 48 08: 0100 1000 0000 1000 */
+static void SK_NV(void)
+{
+ /* 48 skip never */
+}
+
+/* 48 0a: 0100 1000 0000 1010 */
+static void SK_CY(void)
+{
+ if (CY == (PSW & CY))
+ PSW |= SK;
+}
+
+/* 48 0b: 0100 1000 0000 1011 */
+static void SK_HC(void)
+{
+ if (HC == (PSW & HC))
+ PSW |= SK;
+}
+
+/* 48 0c: 0100 1000 0000 1100 */
+static void SK_Z(void)
+{
+ if (Z == (PSW & Z))
+ PSW |= SK;
+}
+
+/* 48 18: 0100 1000 0001 1000 */
+static void SKN_NV(void)
+{
+ /* skip not never -> skip always ;-) */
+ PSW |= SK;
+}
+
+/* 48 1a: 0100 1000 0001 1010 */
+static void SKN_CY(void)
+{
+ if (0 == (PSW & CY))
+ PSW |= SK;
+}
+
+/* 48 1b: 0100 1000 0001 1011 */
+static void SKN_HC(void)
+{
+ if (0 == (PSW & HC))
+ PSW |= SK;
+}
+
+/* 48 1c: 0100 1000 0001 1100 */
+static void SKN_Z(void)
+{
+ if (0 == (PSW & Z))
+ PSW |= SK;
+}
+
+/* 48 21: 0100 1000 0010 0001 */
+static void SLR_A(void)
+{
+ PSW = (PSW & ~CY) | (A & CY);
+ A >>= 1;
+}
+
+/* 48 22: 0100 1000 0010 0010 */
+static void SLR_B(void)
+{
+ PSW = (PSW & ~CY) | (B & CY);
+ B >>= 1;
+}
+
+/* 48 23: 0100 1000 0010 0011 */
+static void SLR_C(void)
+{
+ PSW = (PSW & ~CY) | (C & CY);
+ C >>= 1;
+}
+
+/* 48 25: 0100 1000 0010 0101 */
+static void SLL_A(void)
+{
+ PSW = (PSW & ~CY) | ((A >> 7) & CY);
+ A <<= 1;
+}
+
+/* 48 26: 0100 1000 0010 0110 */
+static void SLL_B(void)
+{
+ PSW = (PSW & ~CY) | ((B >> 7) & CY);
+ B <<= 1;
+}
+
+/* 48 27: 0100 1000 0010 0111 */
+static void SLL_C(void)
+{
+ PSW = (PSW & ~CY) | ((C >> 7) & CY);
+ C <<= 1;
+}
+
+/* 48 28: 0100 1000 0010 1000 */
+static void JEA(void)
+{
+ PC = EA;
+ change_pc( PCD );
+}
+
+/* 48 29: 0100 1000 0010 1001 */
+static void CALB(void)
+{
+ SP--;
+ WM( SPD, PCH );
+ SP--;
+ WM( SPD, PCL );
+
+ PC = BC;
+ change_pc( PCD );
+}
+
+/* 48 2a: 0100 1000 0010 1010 */
+static void CLC(void)
+{
+ PSW &= ~CY;
+}
+
+/* 48 2b: 0100 1000 0010 1011 */
+static void STC(void)
+{
+ PSW |= CY;
+}
+
+/* 48 2d: 0100 1000 0010 1101 */
+static void MUL_A(void)
+{
+ EA = A * A;
+}
+
+/* 48 2e: 0100 1000 0010 1110 */
+static void MUL_B(void)
+{
+ EA = A * B;
+}
+
+/* 48 2f: 0100 1000 0010 1111 */
+static void MUL_C(void)
+{
+ EA = A * C;
+}
+
+/* 48 31: 0100 1000 0011 0001 */
+static void RLR_A(void)
+{
+ UINT8 carry=(PSW&CY)<<7;
+ PSW = (PSW & ~CY) | (A & CY);
+ A = (A >> 1) | carry;
+}
+
+/* 48 32: 0100 1000 0011 0010 */
+static void RLR_B(void)
+{
+ UINT8 carry=(PSW&CY)<<7;
+ PSW = (PSW & ~CY) | (B & CY);
+ B = (B >> 1) | carry;
+}
+
+/* 48 33: 0100 1000 0011 0011 */
+static void RLR_C(void)
+{
+ UINT8 carry=(PSW&CY)<<7;
+ PSW = (PSW & ~CY) | (C & CY);
+ C = (C >> 1) | carry;
+}
+
+/* 48 35: 0100 1000 0011 0101 */
+static void RLL_A(void)
+{
+ UINT8 carry=PSW&CY;
+ PSW = (PSW & ~CY) | ((A >> 7) & CY);
+ A = (A << 1) | carry;
+}
+
+/* 48 36: 0100 1000 0011 0110 */
+static void RLL_B(void)
+{
+ UINT8 carry=PSW&CY;
+ PSW = (PSW & ~CY) | ((B >> 7) & CY);
+ B = (B << 1) | carry;
+}
+
+/* 48 37: 0100 1000 0011 0111 */
+static void RLL_C(void)
+{
+ UINT8 carry=PSW&CY;
+ PSW = (PSW & ~CY) | ((C >> 7) & CY);
+ C = (C << 1) | carry;
+}
+
+/* 48 38: 0100 1000 0011 1000 */
+static void RLD(void)
+{
+ UINT8 m = RM( HL ), tmp;
+ tmp = (m << 4) | (A & 0x0f);
+ A = (A & 0xf0) | (m >> 4);
+ WM( HL, tmp );
+}
+
+/* 48 39: 0100 1000 0011 1001 */
+static void RRD(void)
+{
+ UINT8 m = RM( HL ), tmp;
+ tmp = (A << 4) | (m >> 4);
+ A = (A & 0xf0) | (m & 0x0f);
+ WM( HL, tmp );
+}
+
+/* 48 3a: 0100 1000 0011 1010 */
+static void NEGA(void)
+{
+ A = ~A + 1;
+}
+
+/* 48 3b: 0100 1000 0011 1011 */
+static void HALT(void)
+{
+ int cycles = (upd7810_icount / 4) * 4;
+ upd7810_icount -= cycles;
+ upd7810_timers(cycles);
+ PC -= 1; /* continue executing HALT */
+}
+
+/* 48 3d: 0100 1000 0011 1101 */
+static void DIV_A(void)
+{
+ if (A)
+ {
+ UINT8 remainder;
+ remainder = EA % A;
+ EA /= A;
+ A = remainder;
+ }
+ else
+ EA = 0xffff; /* guess */
+}
+
+/* 48 3e: 0100 1000 0011 1110 */
+static void DIV_B(void)
+{
+ if (B)
+ {
+ UINT8 remainder;
+ remainder = EA % B;
+ EA /= B;
+ B = remainder;
+ }
+ else
+ EA = 0xffff; /* guess */
+}
+
+/* 48 3f: 0100 1000 0011 1111 */
+static void DIV_C(void)
+{
+ if (C)
+ {
+ UINT8 remainder;
+ remainder = EA % C;
+ EA /= C;
+ C = remainder;
+ }
+ else
+ EA = 0xffff; /* guess */
+}
+
+/* 48 40: 0100 1000 0100 0000 */
+static void SKIT_NMI(void)
+{
+ if (IRR & INTNMI)
+ PSW |= SK;
+ IRR &= ~INTNMI;
+}
+
+/* 48 41: 0100 1000 0100 0001 */
+static void SKIT_FT0(void)
+{
+ if (IRR & INTFT0)
+ PSW |= SK;
+ IRR &= ~INTFT0;
+}
+
+/* 48 42: 0100 1000 0100 0010 */
+static void SKIT_FT1(void)
+{
+ if (IRR & INTFT1)
+ PSW |= SK;
+ IRR &= ~INTFT1;
+}
+
+/* 48 43: 0100 1000 0100 0011 */
+static void SKIT_F1(void)
+{
+ if (IRR & INTF1)
+ PSW |= SK;
+ IRR &= ~INTF1;
+}
+
+/* 48 44: 0100 1000 0100 0100 */
+static void SKIT_F2(void)
+{
+ if (IRR & INTF2)
+ PSW |= SK;
+ IRR &= ~INTF2;
+}
+
+/* 48 45: 0100 1000 0100 0101 */
+static void SKIT_FE0(void)
+{
+ if (IRR & INTFE0)
+ PSW |= SK;
+ IRR &= ~INTFE0;
+}
+
+/* 48 46: 0100 1000 0100 0110 */
+static void SKIT_FE1(void)
+{
+ if (IRR & INTFE1)
+ PSW |= SK;
+ IRR &= ~INTFE1;
+}
+
+/* 48 47: 0100 1000 0100 0111 */
+static void SKIT_FEIN(void)
+{
+ if (IRR & INTFEIN)
+ PSW |= SK;
+ IRR &= ~INTFEIN;
+}
+
+/* 48 48: 0100 1000 0100 1000 */
+static void SKIT_FAD(void)
+{
+ if (IRR & INTFAD)
+ PSW |= SK;
+ IRR &= ~INTFAD;
+}
+
+/* 48 49: 0100 1000 0100 1001 */
+static void SKIT_FSR(void)
+{
+ if (IRR & INTFSR)
+ PSW |= SK;
+ IRR &= ~INTFSR;
+}
+
+/* 48 4a: 0100 1000 0100 1010 */
+static void SKIT_FST(void)
+{
+ if (IRR & INTFST)
+ PSW |= SK;
+ IRR &= ~INTFST;
+}
+
+/* 48 4b: 0100 1000 0100 1011 */
+static void SKIT_ER(void)
+{
+ if (IRR & INTER)
+ PSW |= SK;
+ IRR &= ~INTER;
+}
+
+/* 48 4c: 0100 1000 0100 1100 */
+static void SKIT_OV(void)
+{
+ if (IRR & INTOV)
+ PSW |= SK;
+ IRR &= ~INTOV;
+}
+
+/* 48 50: 0100 1000 0101 0000 */
+static void SKIT_AN4(void)
+{
+ if (ITF & INTAN4)
+ PSW |= SK;
+ ITF &= ~INTAN4;
+}
+
+/* 48 51: 0100 1000 0101 0001 */
+static void SKIT_AN5(void)
+{
+ if (ITF & INTAN5)
+ PSW |= SK;
+ ITF &= ~INTAN5;
+}
+
+/* 48 52: 0100 1000 0101 0010 */
+static void SKIT_AN6(void)
+{
+ if (ITF & INTAN6)
+ PSW |= SK;
+ ITF &= ~INTAN6;
+}
+
+/* 48 53: 0100 1000 0101 0011 */
+static void SKIT_AN7(void)
+{
+ if (ITF & INTAN7)
+ PSW |= SK;
+ ITF &= ~INTAN7;
+}
+
+/* 48 54: 0100 1000 0101 0100 */
+static void SKIT_SB(void)
+{
+ if (ITF & INTSB)
+ PSW |= SK;
+ ITF &= ~INTSB;
+}
+
+/* 48 60: 0100 1000 0110 0000 */
+static void SKNIT_NMI(void)
+{
+ if (0 == (IRR & INTNMI))
+ PSW |= SK;
+ IRR &= ~INTNMI;
+}
+
+/* 48 61: 0100 1000 0110 0001 */
+static void SKNIT_FT0(void)
+{
+ if (0 == (IRR & INTFT0))
+ PSW |= SK;
+ IRR &= ~INTFT0;
+}
+
+/* 48 62: 0100 1000 0110 0010 */
+static void SKNIT_FT1(void)
+{
+ if (0 == (IRR & INTFT1))
+ PSW |= SK;
+ IRR &= ~INTFT1;
+}
+
+/* 48 63: 0100 1000 0110 0011 */
+static void SKNIT_F1(void)
+{
+ if (0 == (IRR & INTF1))
+ PSW |= SK;
+ IRR &= ~INTF1;
+}
+
+/* 48 64: 0100 1000 0110 0100 */
+static void SKNIT_F2(void)
+{
+ if (0 == (IRR & INTF2))
+ PSW |= SK;
+ IRR &= ~INTF2;
+}
+
+/* 48 65: 0100 1000 0110 0101 */
+static void SKNIT_FE0(void)
+{
+ if (0 == (IRR & INTFE0))
+ PSW |= SK;
+ IRR &= ~INTFE0;
+}
+
+/* 48 66: 0100 1000 0110 0110 */
+static void SKNIT_FE1(void)
+{
+ if (0 == (IRR & INTFE1))
+ PSW |= SK;
+ IRR &= ~INTFE1;
+}
+
+/* 48 67: 0100 1000 0110 0111 */
+static void SKNIT_FEIN(void)
+{
+ if (0 == (IRR & INTFEIN))
+ PSW |= SK;
+ IRR &= ~INTFEIN;
+}
+
+/* 48 68: 0100 1000 0110 1000 */
+static void SKNIT_FAD(void)
+{
+ if (0 == (IRR & INTFAD))
+ PSW |= SK;
+ IRR &= ~INTFAD;
+}
+
+/* 48 69: 0100 1000 0110 1001 */
+static void SKNIT_FSR(void)
+{
+ if (0 == (IRR & INTFSR))
+ PSW |= SK;
+ IRR &= ~INTFSR;
+}
+
+/* 48 6a: 0100 1000 0110 1010 */
+static void SKNIT_FST(void)
+{
+ if (0 == (IRR & INTFST))
+ PSW |= SK;
+ IRR &= ~INTFST;
+}
+
+/* 48 6b: 0100 1000 0110 1011 */
+static void SKNIT_ER(void)
+{
+ if (0 == (IRR & INTER))
+ PSW |= SK;
+ IRR &= ~INTER;
+}
+
+/* 48 6c: 0100 1000 0110 1100 */
+static void SKNIT_OV(void)
+{
+ if (0 == (IRR & INTOV))
+ PSW |= SK;
+ IRR &= ~INTOV;
+}
+
+/* 48 70: 0100 1000 0111 0000 */
+static void SKNIT_AN4(void)
+{
+ if (0 == (ITF & INTAN4))
+ PSW |= SK;
+ ITF &= ~INTAN4;
+}
+
+/* 48 71: 0100 1000 0111 0001 */
+static void SKNIT_AN5(void)
+{
+ if (0 == (ITF & INTAN5))
+ PSW |= SK;
+ ITF &= ~INTAN5;
+}
+
+/* 48 72: 0100 1000 0111 0010 */
+static void SKNIT_AN6(void)
+{
+ if (0 == (ITF & INTAN6))
+ PSW |= SK;
+ ITF &= ~INTAN6;
+}
+
+/* 48 73: 0100 1000 0111 0011 */
+static void SKNIT_AN7(void)
+{
+ if (0 == (ITF & INTAN7))
+ PSW |= SK;
+ ITF &= ~INTAN7;
+}
+
+/* 48 74: 0100 1000 0111 0100 */
+static void SKNIT_SB(void)
+{
+ if (0 == (ITF & INTSB))
+ PSW |= SK;
+ ITF &= ~INTSB;
+}
+
+/* 48 82: 0100 1000 1000 0010 */
+static void LDEAX_D(void)
+{
+ EAL = RM( DE );
+ EAH = RM( DE + 1 );
+}
+
+/* 48 83: 0100 1000 1000 0011 */
+static void LDEAX_H(void)
+{
+ EAL = RM( HL );
+ EAH = RM( HL + 1 );
+}
+
+/* 48 84: 0100 1000 1000 0100 */
+static void LDEAX_Dp(void)
+{
+ EAL = RM( DE );
+ EAH = RM( DE + 1 );
+ DE += 2;
+}
+
+/* 48 85: 0100 1000 1000 0101 */
+static void LDEAX_Hp(void)
+{
+ EAL = RM( HL );
+ EAH = RM( HL + 1 );
+ HL += 2;
+}
+
+/* 48 8b: 0100 1000 1000 1011 xxxx xxxx */
+static void LDEAX_D_xx(void)
+{
+ UINT16 ea;
+ RDOPARG( ea );
+ ea += DE;
+ EAL = RM( ea );
+ EAH = RM( ea + 1 );
+}
+
+/* 48 8c: 0100 1000 1000 1100 */
+static void LDEAX_H_A(void)
+{
+ UINT16 ea = HL + A;
+ EAL = RM( ea );
+ EAH = RM( ea + 1 );
+}
+
+/* 48 8d: 0100 1000 1000 1101 */
+static void LDEAX_H_B(void)
+{
+ UINT16 ea = HL + B;
+ EAL = RM( ea );
+ EAH = RM( ea + 1 );
+}
+
+/* 48 8e: 0100 1000 1000 1110 */
+static void LDEAX_H_EA(void)
+{
+ UINT16 ea = HL + EA;
+ EAL = RM( ea );
+ EAH = RM( ea + 1 );
+}
+
+/* 48 8f: 0100 1000 1000 1111 xxxx xxxx */
+static void LDEAX_H_xx(void)
+{
+ UINT16 ea;
+ RDOPARG( ea );
+ ea += HL;
+ EAL = RM( ea );
+ EAH = RM( ea + 1 );
+}
+
+/* 48 92: 0100 1000 1000 0010 */
+static void STEAX_D(void)
+{
+ WM( DE, EAL );
+ WM( DE + 1, EAH );
+}
+
+/* 48 93: 0100 1000 1000 0011 */
+static void STEAX_H(void)
+{
+ WM( HL, EAL );
+ WM( HL + 1, EAH );
+}
+
+/* 48 94: 0100 1000 1000 0100 */
+static void STEAX_Dp(void)
+{
+ WM( DE, EAL );
+ WM( DE + 1, EAH );
+ DE += 2;
+}
+
+/* 48 95: 0100 1000 1000 0101 */
+static void STEAX_Hp(void)
+{
+ WM( HL, EAL );
+ WM( HL + 1, EAH );
+ HL += 2;
+}
+
+/* 48 9b: 0100 1000 1000 1011 xxxx xxxx */
+static void STEAX_D_xx(void)
+{
+ UINT16 ea;
+ RDOPARG( ea );
+ ea += DE;
+ WM( ea, EAL );
+ WM( ea + 1, EAH );
+}
+
+/* 48 9c: 0100 1000 1000 1100 */
+static void STEAX_H_A(void)
+{
+ UINT16 ea = HL + A;
+ WM( ea, EAL );
+ WM( ea + 1, EAH );
+}
+
+/* 48 9d: 0100 1000 1000 1101 */
+static void STEAX_H_B(void)
+{
+ UINT16 ea = HL + B;
+ WM( ea, EAL );
+ WM( ea + 1, EAH );
+}
+
+/* 48 9e: 0100 1000 1000 1110 */
+static void STEAX_H_EA(void)
+{
+ UINT16 ea = HL + EA;
+ WM( ea, EAL );
+ WM( ea + 1, EAH );
+}
+
+/* 48 9f: 0100 1000 1000 1111 xxxx xxxx */
+static void STEAX_H_xx(void)
+{
+ UINT16 ea;
+ RDOPARG( ea );
+ ea += HL;
+ WM( ea, EAL );
+ WM( ea + 1, EAH );
+}
+
+/* 48 a0: 0100 1000 1010 0000 */
+static void DSLR_EA(void)
+{
+ PSW = (PSW & ~CY) | (EA & CY);
+ EA >>= 1;
+}
+
+/* 48 a4: 0100 1000 1010 0100 */
+static void DSLL_EA(void)
+{
+ PSW = (PSW & ~CY) | ((EA >> 15) & CY);
+ EA <<= 1;
+}
+
+/* 48 a8: 0100 1000 1010 1000 */
+static void TABLE(void)
+{
+ UINT16 ea = PC + A + 1;
+ C = RM( ea );
+ B = RM( ea + 1 );
+}
+
+/* 48 b0: 0100 1000 1011 0000 */
+static void DRLR_EA(void)
+{
+ UINT8 carry=PSW&CY;
+ PSW = (PSW & ~CY) | (EA & CY);
+ EA = (EA >> 1) | (carry << 15);
+}
+
+/* 48 b4: 0100 1000 1011 0100 */
+static void DRLL_EA(void)
+{
+ UINT8 carry=PSW&CY;
+ PSW = (PSW & ~CY) | ((EA >> 15) & CY);
+ EA = (EA << 1) | carry;
+}
+
+/* 48 bb: 0100 1000 1011 1011 */
+static void STOP(void)
+{
+ int cycles = (upd7810_icount / 4) * 4;
+ upd7810_icount -= cycles;
+ upd7810_timers(cycles);
+ PC -= 1;
+}
+
+/* 48 c0: 0100 1000 1100 0000 */
+static void DMOV_EA_ECNT(void)
+{
+ EA = ECNT;
+}
+
+/* 48 c1: 0100 1000 1100 0001 */
+static void DMOV_EA_ECPT(void)
+{
+ EA = ECPT;
+}
+
+/* 48 d2: 0100 1000 1101 0010 */
+static void DMOV_ETM0_EA(void)
+{
+ ETM0 = EA;
+}
+
+/* 48 d3: 0100 1000 1101 0011 */
+static void DMOV_ETM1_EA(void)
+{
+ ETM1 = EA;
+}
+
+/* prefix 4C */
+/* 4c c0: 0100 1100 1100 0000 */
+static void MOV_A_PA(void)
+{
+ A = RP( UPD7810_PORTA );
+}
+
+/* 4c c1: 0100 1100 1100 0001 */
+static void MOV_A_PB(void)
+{
+ A = RP( UPD7810_PORTB );
+}
+
+/* 4c c2: 0100 1100 1100 0010 */
+static void MOV_A_PC(void)
+{
+ A = RP( UPD7810_PORTC );
+}
+
+/* 4c c3: 0100 1100 1100 0011 */
+static void MOV_A_PD(void)
+{
+ A = RP( UPD7810_PORTD );
+}
+
+/* 4c c5: 0100 1100 1100 0101 */
+static void MOV_A_PF(void)
+{
+ A = RP( UPD7810_PORTF );
+}
+
+/* 4c c6: 0100 1100 1100 0110 */
+static void MOV_A_MKH(void)
+{
+ A = MKH;
+}
+
+/* 4c c7: 0100 1100 1100 0111 */
+static void MOV_A_MKL(void)
+{
+ A = MKL;
+}
+
+/* 4c c8: 0100 1100 1100 1000 */
+static void MOV_A_ANM(void)
+{
+ A = ANM;
+}
+
+/* 4c c9: 0100 1100 1100 1001 */
+static void MOV_A_SMH(void)
+{
+ A = SMH;
+}
+
+/* 4c cb: 0100 1100 1100 1011 */
+static void MOV_A_EOM(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ A = eom;
+}
+
+/* 4c cd: 0100 1100 1100 1101 */
+static void MOV_A_TMM(void)
+{
+ A = TMM;
+}
+
+/* 4c ce: 0100 1100 1110 0000 (7807 only) */
+static void MOV_A_PT(void)
+{
+ A = RP( UPD7807_PORTT );
+}
+
+/* 4c d9: 0100 1100 1101 1001 */
+static void MOV_A_RXB(void)
+{
+ A = RXB;
+}
+
+/* 4c e0: 0100 1100 1110 0000 */
+static void MOV_A_CR0(void)
+{
+ A = CR0;
+}
+
+/* 4c e1: 0100 1100 1110 0001 */
+static void MOV_A_CR1(void)
+{
+ A = CR1;
+}
+
+/* 4c e2: 0100 1100 1110 0010 */
+static void MOV_A_CR2(void)
+{
+ A = CR2;
+}
+
+/* 4c e3: 0100 1100 1110 0011 */
+static void MOV_A_CR3(void)
+{
+ A = CR3;
+}
+
+/* prefix 4D */
+/* 4d c0: 0100 1101 1100 0000 */
+static void MOV_PA_A(void)
+{
+ WP( UPD7810_PORTA, A );
+}
+
+/* 4d c1: 0100 1101 1100 0001 */
+static void MOV_PB_A(void)
+{
+ WP( UPD7810_PORTB, A );
+}
+
+/* 4d c2: 0100 1101 1100 0010 */
+static void MOV_PC_A(void)
+{
+ WP( UPD7810_PORTC, A );
+}
+
+/* 4d c3: 0100 1101 1100 0011 */
+static void MOV_PD_A(void)
+{
+ WP( UPD7810_PORTD, A );
+}
+
+/* 4d c5: 0100 1101 1100 0101 */
+static void MOV_PF_A(void)
+{
+ WP( UPD7810_PORTF, A );
+}
+
+/* 4d c6: 0100 1101 1100 0110 */
+static void MOV_MKH_A(void)
+{
+ MKH = A;
+}
+
+/* 4d c7: 0100 1101 1100 0111 */
+static void MOV_MKL_A(void)
+{
+ MKL = A;
+}
+
+/* 4d c8: 0100 1101 1100 1000 */
+static void MOV_ANM_A(void)
+{
+ ANM = A;
+}
+
+/* 4d c9: 0100 1101 1100 1001 */
+static void MOV_SMH_A(void)
+{
+ SMH = A;
+}
+
+/* 4d ca: 0100 1101 1100 1010 */
+static void MOV_SML_A(void)
+{
+ SML = A;
+}
+
+/* 4d cb: 0100 1101 1100 1011 */
+static void MOV_EOM_A(void)
+{
+ EOM = A;
+ upd7810_write_EOM();
+}
+
+/* 4d cc: 0100 1101 1100 1100 */
+static void MOV_ETMM_A(void)
+{
+ ETMM = A;
+}
+
+/* 4d cd: 0100 1101 1100 1101 */
+static void MOV_TMM_A(void)
+{
+ TMM = A;
+}
+
+/* 4d d0: 0100 1101 1101 0000 */
+static void MOV_MM_A(void)
+{
+ MM = A;
+}
+
+/* 4d d1: 0100 1101 1101 0001 */
+static void MOV_MCC_A(void)
+{
+ MCC = A;
+}
+
+/* 4d d2: 0100 1101 1101 0010 */
+static void MOV_MA_A(void)
+{
+ MA = A;
+}
+
+/* 4d d3: 0100 1101 1101 0011 */
+static void MOV_MB_A(void)
+{
+ MB = A;
+}
+
+/* 4d d4: 0100 1101 1101 0100 */
+static void MOV_MC_A(void)
+{
+ MC = A;
+}
+
+/* 4d d7: 0100 1101 1101 0111 */
+static void MOV_MF_A(void)
+{
+ MF = A;
+}
+
+/* 4d d8: 0100 1101 1101 1000 */
+static void MOV_TXB_A(void)
+{
+ TXB = A;
+ upd7810_write_TXB();
+}
+
+/* 4d da: 0100 1101 1101 1010 */
+static void MOV_TM0_A(void)
+{
+ TM0 = A;
+}
+
+/* 4d db: 0100 1101 1101 1011 */
+static void MOV_TM1_A(void)
+{
+ TM1 = A;
+}
+
+/* 4d e8: 0100 1101 1110 1000 */
+static void MOV_ZCM_A(void)
+{
+ ZCM = A;
+}
+
+/* prefix 60 */
+/* 60 08: 0110 0000 0000 1000 */
+static void ANA_V_A(void)
+{
+ V &= A;
+ SET_Z(V);
+}
+
+/* 60 09: 0110 0000 0000 1001 */
+static void ANA_A_A(void)
+{
+ A &= A;
+ SET_Z(A);
+}
+
+/* 60 0a: 0110 0000 0000 1010 */
+static void ANA_B_A(void)
+{
+ B &= A;
+ SET_Z(B);
+}
+
+/* 60 0b: 0110 0000 0000 1011 */
+static void ANA_C_A(void)
+{
+ C &= A;
+ SET_Z(C);
+}
+
+/* 60 0c: 0110 0000 0000 1100 */
+static void ANA_D_A(void)
+{
+ D &= A;
+ SET_Z(D);
+}
+
+/* 60 0d: 0110 0000 0000 1101 */
+static void ANA_E_A(void)
+{
+ E &= A;
+ SET_Z(E);
+}
+
+/* 60 0e: 0110 0000 0000 1110 */
+static void ANA_H_A(void)
+{
+ H &= A;
+ SET_Z(H);
+}
+
+/* 60 0f: 0110 0000 0000 1111 */
+static void ANA_L_A(void)
+{
+ L &= A;
+ SET_Z(L);
+}
+
+/* 60 10: 0110 0000 0001 0000 */
+static void XRA_V_A(void)
+{
+ V ^= A;
+ SET_Z(V);
+}
+
+/* 60 11: 0110 0000 0001 0001 */
+static void XRA_A_A(void)
+{
+ A ^= A;
+ SET_Z(A);
+}
+
+/* 60 12: 0110 0000 0001 0010 */
+static void XRA_B_A(void)
+{
+ B ^= A;
+ SET_Z(B);
+}
+
+/* 60 13: 0110 0000 0001 0011 */
+static void XRA_C_A(void)
+{
+ C ^= A;
+ SET_Z(C);
+}
+
+/* 60 14: 0110 0000 0001 0100 */
+static void XRA_D_A(void)
+{
+ D ^= A;
+ SET_Z(D);
+}
+
+/* 60 15: 0110 0000 0001 0101 */
+static void XRA_E_A(void)
+{
+ E ^= A;
+ SET_Z(E);
+}
+
+/* 60 16: 0110 0000 0001 0110 */
+static void XRA_H_A(void)
+{
+ H ^= A;
+ SET_Z(H);
+}
+
+/* 60 17: 0110 0000 0001 0111 */
+static void XRA_L_A(void)
+{
+ L ^= A;
+ SET_Z(L);
+}
+
+/* 60 18: 0110 0000 0001 1000 */
+static void ORA_V_A(void)
+{
+ V |= A;
+ SET_Z(V);
+}
+
+/* 60 19: 0110 0000 0001 1001 */
+static void ORA_A_A(void)
+{
+ A |= A;
+ SET_Z(A);
+}
+
+/* 60 1a: 0110 0000 0001 1010 */
+static void ORA_B_A(void)
+{
+ B |= A;
+ SET_Z(B);
+}
+
+/* 60 1b: 0110 0000 0001 1011 */
+static void ORA_C_A(void)
+{
+ C |= A;
+ SET_Z(C);
+}
+
+/* 60 1c: 0110 0000 0001 1100 */
+static void ORA_D_A(void)
+{
+ D |= A;
+ SET_Z(D);
+}
+
+/* 60 1d: 0110 0000 0001 1101 */
+static void ORA_E_A(void)
+{
+ E |= A;
+ SET_Z(E);
+}
+
+/* 60 1e: 0110 0000 0001 1110 */
+static void ORA_H_A(void)
+{
+ H |= A;
+ SET_Z(H);
+}
+
+/* 60 1f: 0110 0000 0001 1111 */
+static void ORA_L_A(void)
+{
+ L |= A;
+ SET_Z(L);
+}
+
+/* 60 20: 0110 0000 0010 0000 */
+static void ADDNC_V_A(void)
+{
+ UINT8 tmp = V + A;
+ ZHC_ADD( tmp, V, 0 );
+ V = tmp;
+ SKIP_NC;
+}
+
+/* 60 21: 0110 0000 0010 0001 */
+static void ADDNC_A_A(void)
+{
+ UINT8 tmp = A + A;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 22: 0110 0000 0010 0010 */
+static void ADDNC_B_A(void)
+{
+ UINT8 tmp = B + A;
+ ZHC_ADD( tmp, B, 0 );
+ B = tmp;
+ SKIP_NC;
+}
+
+/* 60 23: 0110 0000 0010 0011 */
+static void ADDNC_C_A(void)
+{
+ UINT8 tmp = C + A;
+ ZHC_ADD( tmp, C, 0 );
+ C = tmp;
+ SKIP_NC;
+}
+
+/* 60 24: 0110 0000 0010 0100 */
+static void ADDNC_D_A(void)
+{
+ UINT8 tmp = D + A;
+ ZHC_ADD( tmp, D, 0 );
+ D = tmp;
+ SKIP_NC;
+}
+
+/* 60 25: 0110 0000 0010 0101 */
+static void ADDNC_E_A(void)
+{
+ UINT8 tmp = E + A;
+ ZHC_ADD( tmp, E, 0 );
+ E = tmp;
+ SKIP_NC;
+}
+
+/* 60 26: 0110 0000 0010 0110 */
+static void ADDNC_H_A(void)
+{
+ UINT8 tmp = H + A;
+ ZHC_ADD( tmp, H, 0 );
+ H = tmp;
+ SKIP_NC;
+}
+
+/* 60 27: 0110 0000 0010 0111 */
+static void ADDNC_L_A(void)
+{
+ UINT8 tmp = L + A;
+ ZHC_ADD( tmp, L, 0 );
+ L = tmp;
+ SKIP_NC;
+}
+
+/* 60 28: 0110 0000 0010 1000 */
+static void GTA_V_A(void)
+{
+ UINT16 tmp = V - A - 1;
+ ZHC_SUB( tmp, V, 0 );
+ SKIP_NC;
+}
+
+/* 60 29: 0110 0000 0010 1001 */
+static void GTA_A_A(void)
+{
+ UINT16 tmp = A - A - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 2a: 0110 0000 0010 1010 */
+static void GTA_B_A(void)
+{
+ UINT16 tmp = B - A - 1;
+ ZHC_SUB( tmp, B, 0 );
+ SKIP_NC;
+}
+
+/* 60 2b: 0110 0000 0010 1011 */
+static void GTA_C_A(void)
+{
+ UINT16 tmp = C - A - 1;
+ ZHC_SUB( tmp, C, 0 );
+ SKIP_NC;
+}
+
+/* 60 2c: 0110 0000 0010 1100 */
+static void GTA_D_A(void)
+{
+ UINT16 tmp = D - A - 1;
+ ZHC_SUB( tmp, D, 0 );
+ SKIP_NC;
+}
+
+/* 60 2d: 0110 0000 0010 1101 */
+static void GTA_E_A(void)
+{
+ UINT16 tmp = E - A - 1;
+ ZHC_SUB( tmp, E, 0 );
+ SKIP_NC;
+}
+
+/* 60 2e: 0110 0000 0010 1110 */
+static void GTA_H_A(void)
+{
+ UINT16 tmp = H - A - 1;
+ ZHC_SUB( tmp, H, 0 );
+ SKIP_NC;
+}
+
+/* 60 2f: 0110 0000 0010 1111 */
+static void GTA_L_A(void)
+{
+ UINT16 tmp = L - A - 1;
+ ZHC_SUB( tmp, L, 0 );
+ SKIP_NC;
+}
+
+/* 60 30: 0110 0000 0011 0000 */
+static void SUBNB_V_A(void)
+{
+ UINT8 tmp = V - A;
+ ZHC_SUB( tmp, V, 0 );
+ V = tmp;
+ SKIP_NC;
+}
+
+/* 60 31: 0110 0000 0011 0001 */
+static void SUBNB_A_A(void)
+{
+ UINT8 tmp = A - A;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 32: 0110 0000 0011 0010 */
+static void SUBNB_B_A(void)
+{
+ UINT8 tmp = B - A;
+ ZHC_SUB( tmp, B, 0 );
+ B = tmp;
+ SKIP_NC;
+}
+
+/* 60 33: 0110 0000 0011 0011 */
+static void SUBNB_C_A(void)
+{
+ UINT8 tmp = C - A;
+ ZHC_SUB( tmp, C, 0 );
+ C = tmp;
+ SKIP_NC;
+}
+
+/* 60 34: 0110 0000 0011 0100 */
+static void SUBNB_D_A(void)
+{
+ UINT8 tmp = D - A;
+ ZHC_SUB( tmp, D, 0 );
+ D = tmp;
+ SKIP_NC;
+}
+
+/* 60 35: 0110 0000 0011 0101 */
+static void SUBNB_E_A(void)
+{
+ UINT8 tmp = E - A;
+ ZHC_SUB( tmp, E, 0 );
+ E = tmp;
+ SKIP_NC;
+}
+
+/* 60 36: 0110 0000 0011 0110 */
+static void SUBNB_H_A(void)
+{
+ UINT8 tmp = H - A;
+ ZHC_SUB( tmp, H, 0 );
+ H = tmp;
+ SKIP_NC;
+}
+
+/* 60 37: 0110 0000 0011 0111 */
+static void SUBNB_L_A(void)
+{
+ UINT8 tmp = L - A;
+ ZHC_SUB( tmp, L, 0 );
+ L = tmp;
+ SKIP_NC;
+}
+
+/* 60 38: 0110 0000 0011 1000 */
+static void LTA_V_A(void)
+{
+ UINT8 tmp = V - A;
+ ZHC_SUB( tmp, V, 0 );
+ SKIP_CY;
+}
+
+/* 60 39: 0110 0000 0011 1001 */
+static void LTA_A_A(void)
+{
+ UINT8 tmp = A - A;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 3a: 0110 0000 0011 1010 */
+static void LTA_B_A(void)
+{
+ UINT8 tmp = B - A;
+ ZHC_SUB( tmp, B, 0 );
+ SKIP_CY;
+}
+
+/* 60 3b: 0110 0000 0011 1011 */
+static void LTA_C_A(void)
+{
+ UINT8 tmp = C - A;
+ ZHC_SUB( tmp, C, 0 );
+ SKIP_CY;
+}
+
+/* 60 3c: 0110 0000 0011 1100 */
+static void LTA_D_A(void)
+{
+ UINT8 tmp = D - A;
+ ZHC_SUB( tmp, D, 0 );
+ SKIP_CY;
+}
+
+/* 60 3d: 0110 0000 0011 1101 */
+static void LTA_E_A(void)
+{
+ UINT8 tmp = E - A;
+ ZHC_SUB( tmp, E, 0 );
+ SKIP_CY;
+}
+
+/* 60 3e: 0110 0000 0011 1110 */
+static void LTA_H_A(void)
+{
+ UINT8 tmp = H - A;
+ ZHC_SUB( tmp, H, 0 );
+ SKIP_CY;
+}
+
+/* 60 3f: 0110 0000 0011 1111 */
+static void LTA_L_A(void)
+{
+ UINT8 tmp = L - A;
+ ZHC_SUB( tmp, L, 0 );
+ SKIP_CY;
+}
+
+/* 60 40: 0110 0000 0100 0000 */
+static void ADD_V_A(void)
+{
+ UINT8 tmp = V + A;
+ ZHC_ADD( tmp, V, 0 );
+ V = tmp;
+}
+
+/* 60 41: 0110 0000 0100 0001 */
+static void ADD_A_A(void)
+{
+ UINT8 tmp = A + A;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 42: 0110 0000 0100 0010 */
+static void ADD_B_A(void)
+{
+ UINT8 tmp = B + A;
+ ZHC_ADD( tmp, B, 0 );
+ B = tmp;
+}
+
+/* 60 43: 0110 0000 0100 0011 */
+static void ADD_C_A(void)
+{
+ UINT8 tmp = C + A;
+ ZHC_ADD( tmp, C, 0 );
+ C = tmp;
+}
+
+/* 60 44: 0110 0000 0100 0100 */
+static void ADD_D_A(void)
+{
+ UINT8 tmp = D + A;
+ ZHC_ADD( tmp, D, 0 );
+ D = tmp;
+}
+
+/* 60 45: 0110 0000 0100 0101 */
+static void ADD_E_A(void)
+{
+ UINT8 tmp = E + A;
+ ZHC_ADD( tmp, E, 0 );
+ E = tmp;
+}
+
+/* 60 46: 0110 0000 0100 0110 */
+static void ADD_H_A(void)
+{
+ UINT8 tmp = H + A;
+ ZHC_ADD( tmp, H, 0 );
+ H = tmp;
+}
+
+/* 60 47: 0110 0000 0100 0111 */
+static void ADD_L_A(void)
+{
+ UINT8 tmp = L + A;
+ ZHC_ADD( tmp, L, 0 );
+ L = tmp;
+}
+
+/* 60 50: 0110 0000 0101 0000 */
+static void ADC_V_A(void)
+{
+ UINT8 tmp = V + A + (PSW & CY);
+ ZHC_ADD( tmp, V, (PSW & CY) );
+ V = tmp;
+}
+
+/* 60 51: 0110 0000 0101 0001 */
+static void ADC_A_A(void)
+{
+ UINT8 tmp = A + A + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 52: 0110 0000 0101 0010 */
+static void ADC_B_A(void)
+{
+ UINT8 tmp = B + A + (PSW & CY);
+ ZHC_ADD( tmp, B, (PSW & CY) );
+ B = tmp;
+}
+
+/* 60 53: 0110 0000 0101 0011 */
+static void ADC_C_A(void)
+{
+ UINT8 tmp = C + A + (PSW & CY);
+ ZHC_ADD( tmp, C, (PSW & CY) );
+ C = tmp;
+}
+
+/* 60 54: 0110 0000 0101 0100 */
+static void ADC_D_A(void)
+{
+ UINT8 tmp = D + A + (PSW & CY);
+ ZHC_ADD( tmp, D, (PSW & CY) );
+ D = tmp;
+}
+
+/* 60 55: 0110 0000 0101 0101 */
+static void ADC_E_A(void)
+{
+ UINT8 tmp = E + A + (PSW & CY);
+ ZHC_ADD( tmp, E, (PSW & CY) );
+ E = tmp;
+}
+
+/* 60 56: 0110 0000 0101 0110 */
+static void ADC_H_A(void)
+{
+ UINT8 tmp = H + A + (PSW & CY);
+ ZHC_ADD( tmp, H, (PSW & CY) );
+ H = tmp;
+}
+
+/* 60 57: 0110 0000 0101 0111 */
+static void ADC_L_A(void)
+{
+ UINT8 tmp = L + A + (PSW & CY);
+ ZHC_ADD( tmp, L, (PSW & CY) );
+ L = tmp;
+}
+
+/* 60 60: 0110 0000 0110 0000 */
+static void SUB_V_A(void)
+{
+ UINT8 tmp = V - A;
+ ZHC_SUB( tmp, V, 0 );
+ V = tmp;
+}
+
+/* 60 61: 0110 0000 0110 0001 */
+static void SUB_A_A(void)
+{
+ UINT8 tmp = A - A;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 62: 0110 0000 0110 0010 */
+static void SUB_B_A(void)
+{
+ UINT8 tmp = B - A;
+ ZHC_SUB( tmp, B, 0 );
+ B = tmp;
+}
+
+/* 60 63: 0110 0000 0110 0011 */
+static void SUB_C_A(void)
+{
+ UINT8 tmp = C - A;
+ ZHC_SUB( tmp, C, 0 );
+ C = tmp;
+}
+
+/* 60 64: 0110 0000 0110 0100 */
+static void SUB_D_A(void)
+{
+ UINT8 tmp = D - A;
+ ZHC_SUB( tmp, D, 0 );
+ D = tmp;
+}
+
+/* 60 65: 0110 0000 0110 0101 */
+static void SUB_E_A(void)
+{
+ UINT8 tmp = E - A;
+ ZHC_SUB( tmp, E, 0 );
+ E = tmp;
+}
+
+/* 60 66: 0110 0000 0110 0110 */
+static void SUB_H_A(void)
+{
+ UINT8 tmp = H - A;
+ ZHC_SUB( tmp, H, 0 );
+ H = tmp;
+}
+
+/* 60 67: 0110 0000 0110 0111 */
+static void SUB_L_A(void)
+{
+ UINT8 tmp = L - A;
+ ZHC_SUB( tmp, L, 0 );
+ L = tmp;
+}
+
+/* 60 68: 0110 0000 0110 1000 */
+static void NEA_V_A(void)
+{
+ UINT8 tmp = V - A;
+ ZHC_SUB( tmp, V, 0 );
+ SKIP_NZ;
+}
+
+/* 60 69: 0110 0000 0110 1001 */
+static void NEA_A_A(void)
+{
+ UINT8 tmp = A - A;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 6a: 0110 0000 0110 1010 */
+static void NEA_B_A(void)
+{
+ UINT8 tmp = B - A;
+ ZHC_SUB( tmp, B, 0 );
+ SKIP_NZ;
+}
+
+/* 60 6b: 0110 0000 0110 1011 */
+static void NEA_C_A(void)
+{
+ UINT8 tmp = C - A;
+ ZHC_SUB( tmp, C, 0 );
+ SKIP_NZ;
+}
+
+/* 60 6c: 0110 0000 0110 1100 */
+static void NEA_D_A(void)
+{
+ UINT8 tmp = D - A;
+ ZHC_SUB( tmp, D, 0 );
+ SKIP_NZ;
+}
+
+/* 60 6d: 0110 0000 0110 1101 */
+static void NEA_E_A(void)
+{
+ UINT8 tmp = E - A;
+ ZHC_SUB( tmp, E, 0 );
+ SKIP_NZ;
+}
+
+/* 60 6e: 0110 0000 0110 1110 */
+static void NEA_H_A(void)
+{
+ UINT8 tmp = H - A;
+ ZHC_SUB( tmp, H, 0 );
+ SKIP_NZ;
+}
+
+/* 60 6f: 0110 0000 0110 1111 */
+static void NEA_L_A(void)
+{
+ UINT8 tmp = L - A;
+ ZHC_SUB( tmp, L, 0 );
+ SKIP_NZ;
+}
+
+/* 60 70: 0110 0000 0111 0000 */
+static void SBB_V_A(void)
+{
+ UINT8 tmp = V - A - (PSW & CY);
+ ZHC_SUB( tmp, V, (PSW & CY) );
+ V = tmp;
+}
+
+/* 60 71: 0110 0000 0111 0001 */
+static void SBB_A_A(void)
+{
+ UINT8 tmp = A - A - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 72: 0110 0000 0111 0010 */
+static void SBB_B_A(void)
+{
+ UINT8 tmp = B - A - (PSW & CY);
+ ZHC_SUB( tmp, B, (PSW & CY) );
+ B = tmp;
+}
+
+/* 60 73: 0110 0000 0111 0011 */
+static void SBB_C_A(void)
+{
+ UINT8 tmp = C - A - (PSW & CY);
+ ZHC_SUB( tmp, C, (PSW & CY) );
+ C = tmp;
+}
+
+/* 60 74: 0110 0000 0111 0100 */
+static void SBB_D_A(void)
+{
+ UINT8 tmp = D - A - (PSW & CY);
+ ZHC_SUB( tmp, D, (PSW & CY) );
+ D = tmp;
+}
+
+/* 60 75: 0110 0000 0111 0101 */
+static void SBB_E_A(void)
+{
+ UINT8 tmp = E - A - (PSW & CY);
+ ZHC_SUB( tmp, E, (PSW & CY) );
+ E = tmp;
+}
+
+/* 60 76: 0110 0000 0111 0110 */
+static void SBB_H_A(void)
+{
+ UINT8 tmp = H - A - (PSW & CY);
+ ZHC_SUB( tmp, H, (PSW & CY) );
+ H = tmp;
+}
+
+/* 60 77: 0110 0000 0111 0111 */
+static void SBB_L_A(void)
+{
+ UINT8 tmp = L - A - (PSW & CY);
+ ZHC_SUB( tmp, L, (PSW & CY) );
+ L = tmp;
+}
+
+/* 60 78: 0110 0000 0111 1000 */
+static void EQA_V_A(void)
+{
+ UINT8 tmp = V - A;
+ ZHC_SUB( tmp, V, 0 );
+ SKIP_Z;
+}
+
+/* 60 79: 0110 0000 0111 1001 */
+static void EQA_A_A(void)
+{
+ UINT8 tmp = A - A;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 60 7a: 0110 0000 0111 1010 */
+static void EQA_B_A(void)
+{
+ UINT8 tmp = B - A;
+ ZHC_SUB( tmp, B, 0 );
+ SKIP_Z;
+}
+
+/* 60 7b: 0110 0000 0111 1011 */
+static void EQA_C_A(void)
+{
+ UINT8 tmp = C - A;
+ ZHC_SUB( tmp, C, 0 );
+ SKIP_Z;
+}
+
+/* 60 7c: 0110 0000 0111 1100 */
+static void EQA_D_A(void)
+{
+ UINT8 tmp = D - A;
+ ZHC_SUB( tmp, D, 0 );
+ SKIP_Z;
+}
+
+/* 60 7d: 0110 0000 0111 1101 */
+static void EQA_E_A(void)
+{
+ UINT8 tmp = E - A;
+ ZHC_SUB( tmp, E, 0 );
+ SKIP_Z;
+}
+
+/* 60 7e: 0110 0000 0111 1110 */
+static void EQA_H_A(void)
+{
+ UINT8 tmp = H - A;
+ ZHC_SUB( tmp, H, 0 );
+ SKIP_Z;
+}
+
+/* 60 7f: 0110 0000 0111 1111 */
+static void EQA_L_A(void)
+{
+ UINT8 tmp = L - A;
+ ZHC_SUB( tmp, L, 0 );
+ SKIP_Z;
+}
+
+/* 60 88: 0110 0000 1000 1000 */
+static void ANA_A_V(void)
+{
+ A &= V;
+ SET_Z(A);
+}
+
+/* 60 89: 0110 0000 1000 1001 */
+/* ANA_A_A already defined */
+
+/* 60 8a: 0110 0000 1000 1010 */
+static void ANA_A_B(void)
+{
+ A &= B;
+ SET_Z(A);
+}
+
+/* 60 8b: 0110 0000 1000 1011 */
+static void ANA_A_C(void)
+{
+ A &= C;
+ SET_Z(A);
+}
+
+/* 60 8c: 0110 0000 1000 1100 */
+static void ANA_A_D(void)
+{
+ A &= D;
+ SET_Z(A);
+}
+
+/* 60 8d: 0110 0000 1000 1101 */
+static void ANA_A_E(void)
+{
+ A &= E;
+ SET_Z(A);
+}
+
+/* 60 8e: 0110 0000 1000 1110 */
+static void ANA_A_H(void)
+{
+ A &= H;
+ SET_Z(A);
+}
+
+/* 60 8f: 0110 0000 1000 1111 */
+static void ANA_A_L(void)
+{
+ A &= L;
+ SET_Z(A);
+}
+
+/* 60 90: 0110 0000 1001 0000 */
+static void XRA_A_V(void)
+{
+ A ^= V;
+ SET_Z(A);
+}
+
+/* 60 91: 0110 0000 1001 0001 */
+/* XRA_A_A already defined */
+
+/* 60 92: 0110 0000 1001 0010 */
+static void XRA_A_B(void)
+{
+ A ^= B;
+ SET_Z(A);
+}
+
+/* 60 93: 0110 0000 1001 0011 */
+static void XRA_A_C(void)
+{
+ A ^= C;
+ SET_Z(A);
+}
+
+/* 60 94: 0110 0000 1001 0100 */
+static void XRA_A_D(void)
+{
+ A ^= D;
+ SET_Z(A);
+}
+
+/* 60 95: 0110 0000 1001 0101 */
+static void XRA_A_E(void)
+{
+ A ^= E;
+ SET_Z(A);
+}
+
+/* 60 96: 0110 0000 1001 0110 */
+static void XRA_A_H(void)
+{
+ A ^= H;
+ SET_Z(A);
+}
+
+/* 60 97: 0110 0000 1001 0111 */
+static void XRA_A_L(void)
+{
+ A ^= L;
+ SET_Z(A);
+}
+
+/* 60 98: 0110 0000 1001 1000 */
+static void ORA_A_V(void)
+{
+ A |= V;
+ SET_Z(A);
+}
+
+/* 60 99: 0110 0000 1001 1001 */
+/* ORA_A_A already defined */
+
+/* 60 9a: 0110 0000 1001 1010 */
+static void ORA_A_B(void)
+{
+ A |= B;
+ SET_Z(A);
+}
+
+/* 60 9b: 0110 0000 1001 1011 */
+static void ORA_A_C(void)
+{
+ A |= C;
+ SET_Z(A);
+}
+
+/* 60 9c: 0110 0000 1001 1100 */
+static void ORA_A_D(void)
+{
+ A |= D;
+ SET_Z(A);
+}
+
+/* 60 9d: 0110 0000 1001 1101 */
+static void ORA_A_E(void)
+{
+ A |= E;
+ SET_Z(A);
+}
+
+/* 60 9e: 0110 0000 1001 1110 */
+static void ORA_A_H(void)
+{
+ A |= H;
+ SET_Z(A);
+}
+
+/* 60 9f: 0110 0000 1001 1111 */
+static void ORA_A_L(void)
+{
+ A |= L;
+ SET_Z(A);
+}
+
+/* 60 a0: 0110 0000 1010 0000 */
+static void ADDNC_A_V(void)
+{
+ UINT8 tmp = A + V;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 a1: 0110 0000 1010 0001 */
+/* ADDNC_A_A already defined */
+
+/* 60 a2: 0110 0000 1010 0010 */
+static void ADDNC_A_B(void)
+{
+ UINT8 tmp = A + B;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 a3: 0110 0000 1010 0011 */
+static void ADDNC_A_C(void)
+{
+ UINT8 tmp = A + C;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 a4: 0110 0000 1010 0100 */
+static void ADDNC_A_D(void)
+{
+ UINT8 tmp = A + D;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 a5: 0110 0000 1010 0101 */
+static void ADDNC_A_E(void)
+{
+ UINT8 tmp = A + E;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 a6: 0110 0000 1010 0110 */
+static void ADDNC_A_H(void)
+{
+ UINT8 tmp = A + H;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 a7: 0110 0000 1010 0111 */
+static void ADDNC_A_L(void)
+{
+ UINT8 tmp = A + L;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 a8: 0110 0000 1010 1000 */
+static void GTA_A_V(void)
+{
+ UINT16 tmp = A - V - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 a9: 0110 0000 1010 1001 */
+/* GTA_A_A already defined */
+
+/* 60 aa: 0110 0000 1010 1010 */
+static void GTA_A_B(void)
+{
+ UINT16 tmp = A - B - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 ab: 0110 0000 1010 1011 */
+static void GTA_A_C(void)
+{
+ UINT16 tmp = A - C - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 ac: 0110 0000 1010 1100 */
+static void GTA_A_D(void)
+{
+ UINT16 tmp = A - D - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 ad: 0110 0000 1010 1101 */
+static void GTA_A_E(void)
+{
+ UINT16 tmp = A - E - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 ae: 0110 0000 1010 1110 */
+static void GTA_A_H(void)
+{
+ UINT16 tmp = A - H - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 af: 0110 0000 1010 1111 */
+static void GTA_A_L(void)
+{
+ UINT16 tmp = A - L - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 60 b0: 0110 0000 1011 0000 */
+static void SUBNB_A_V(void)
+{
+ UINT8 tmp = A - V;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 b1: 0110 0000 1011 0001 */
+/* SUBNB_A_A already defined */
+
+/* 60 b2: 0110 0000 1011 0010 */
+static void SUBNB_A_B(void)
+{
+ UINT8 tmp = A - B;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 b3: 0110 0000 1011 0011 */
+static void SUBNB_A_C(void)
+{
+ UINT8 tmp = A - C;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 b4: 0110 0000 1011 0100 */
+static void SUBNB_A_D(void)
+{
+ UINT8 tmp = A - D;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 b5: 0110 0000 1011 0101 */
+static void SUBNB_A_E(void)
+{
+ UINT8 tmp = A - E;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 b6: 0110 0000 1011 0110 */
+static void SUBNB_A_H(void)
+{
+ UINT8 tmp = A - H;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 b7: 0110 0000 1011 0111 */
+static void SUBNB_A_L(void)
+{
+ UINT8 tmp = A - L;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 60 b8: 0110 0000 1011 1000 */
+static void LTA_A_V(void)
+{
+ UINT8 tmp = A - V;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 b9: 0110 0000 1011 1001 */
+/* LTA_A_A already defined */
+
+/* 60 ba: 0110 0000 1011 1010 */
+static void LTA_A_B(void)
+{
+ UINT8 tmp = A - B;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 bb: 0110 0000 1011 1011 */
+static void LTA_A_C(void)
+{
+ UINT8 tmp = A - C;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 bc: 0110 0000 1011 1100 */
+static void LTA_A_D(void)
+{
+ UINT8 tmp = A - D;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 bd: 0110 0000 1011 1101 */
+static void LTA_A_E(void)
+{
+ UINT8 tmp = A - E;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 be: 0110 0000 1011 1110 */
+static void LTA_A_H(void)
+{
+ UINT8 tmp = A - H;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 bf: 0110 0000 1011 1111 */
+static void LTA_A_L(void)
+{
+ UINT8 tmp = A - L;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 60 c0: 0110 0000 1100 0000 */
+static void ADD_A_V(void)
+{
+ UINT8 tmp = A + V;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 c1: 0110 0000 1100 0001 */
+/* ADD_A_A already defined */
+
+/* 60 c2: 0110 0000 1100 0010 */
+static void ADD_A_B(void)
+{
+ UINT8 tmp = A + B;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 c3: 0110 0000 1100 0011 */
+static void ADD_A_C(void)
+{
+ UINT8 tmp = A + C;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 c4: 0110 0000 1100 0100 */
+static void ADD_A_D(void)
+{
+ UINT8 tmp = A + D;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 c5: 0110 0000 1100 0101 */
+static void ADD_A_E(void)
+{
+ UINT8 tmp = A + E;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 c6: 0110 0000 1100 0110 */
+static void ADD_A_H(void)
+{
+ UINT8 tmp = A + H;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 c7: 0110 0000 1100 0111 */
+static void ADD_A_L(void)
+{
+ UINT8 tmp = A + L;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 c8: 0110 0000 1100 1000 */
+static void ONA_A_V(void)
+{
+ if (A & V)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 c9: 0110 0000 1100 1001 */
+static void ONA_A_A(void)
+{
+ if (A & A)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 ca: 0110 0000 1100 1010 */
+static void ONA_A_B(void)
+{
+ if (A & B)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 cb: 0110 0000 1100 1011 */
+static void ONA_A_C(void)
+{
+ if (A & C)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 cc: 0110 0000 1100 1100 */
+static void ONA_A_D(void)
+{
+ if (A & D)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 cd: 0110 0000 1100 1101 */
+static void ONA_A_E(void)
+{
+ if (A & E)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 ce: 0110 0000 1100 1110 */
+static void ONA_A_H(void)
+{
+ if (A & H)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 cf: 0110 0000 1100 1111 */
+static void ONA_A_L(void)
+{
+ if (A & L)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 60 d0: 0110 0000 1101 0000 */
+static void ADC_A_V(void)
+{
+ UINT8 tmp = A + V + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 d1: 0110 0000 1101 0001 */
+/* ADC_A_A already defined */
+
+/* 60 d2: 0110 0000 1101 0010 */
+static void ADC_A_B(void)
+{
+ UINT8 tmp = A + B + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 d3: 0110 0000 1101 0011 */
+static void ADC_A_C(void)
+{
+ UINT8 tmp = A + C + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 d4: 0110 0000 1101 0100 */
+static void ADC_A_D(void)
+{
+ UINT8 tmp = A + D + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 d5: 0110 0000 1101 0101 */
+static void ADC_A_E(void)
+{
+ UINT8 tmp = A + E + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 d6: 0110 0000 1101 0110 */
+static void ADC_A_H(void)
+{
+ UINT8 tmp = A + H + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 d7: 0110 0000 1101 0111 */
+static void ADC_A_L(void)
+{
+ UINT8 tmp = A + L + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 d8: 0110 0000 1101 1000 */
+static void OFFA_A_V(void)
+{
+ if ( A & V )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 d9: 0110 0000 1101 1001 */
+static void OFFA_A_A(void)
+{
+ if ( A & A )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 da: 0110 0000 1101 1010 */
+static void OFFA_A_B(void)
+{
+ if ( A & B )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 db: 0110 0000 1101 1011 */
+static void OFFA_A_C(void)
+{
+ if ( A & C )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 dc: 0110 0000 1101 1100 */
+static void OFFA_A_D(void)
+{
+ if ( A & D )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 dd: 0110 0000 1101 1101 */
+static void OFFA_A_E(void)
+{
+ if ( A & E )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 de: 0110 0000 1101 1110 */
+static void OFFA_A_H(void)
+{
+ if ( A & H )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 df: 0110 0000 1101 1111 */
+static void OFFA_A_L(void)
+{
+ if ( A & L )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 60 e0: 0110 0000 1110 0000 */
+static void SUB_A_V(void)
+{
+ UINT8 tmp = A - V;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 e1: 0110 0000 1110 0001 */
+/* SUB_A_A already defined */
+
+/* 60 e2: 0110 0000 1110 0010 */
+static void SUB_A_B(void)
+{
+ UINT8 tmp = A - B;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 e3: 0110 0000 1110 0011 */
+static void SUB_A_C(void)
+{
+ UINT8 tmp = A - C;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 e4: 0110 0000 1110 0100 */
+static void SUB_A_D(void)
+{
+ UINT8 tmp = A - D;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 e5: 0110 0000 1110 0101 */
+static void SUB_A_E(void)
+{
+ UINT8 tmp = A - E;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 e6: 0110 0000 1110 0110 */
+static void SUB_A_H(void)
+{
+ UINT8 tmp = A - H;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 e7: 0110 0000 1110 0111 */
+static void SUB_A_L(void)
+{
+ UINT8 tmp = A - L;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 60 e8: 0110 0000 1110 1000 */
+static void NEA_A_V(void)
+{
+ UINT8 tmp = A - V;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 e9: 0110 0000 1110 1001 */
+/* NEA_A_A already defined */
+
+/* 60 ea: 0110 0000 1110 1010 */
+static void NEA_A_B(void)
+{
+ UINT8 tmp = A - B;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 eb: 0110 0000 1110 1011 */
+static void NEA_A_C(void)
+{
+ UINT8 tmp = A - C;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 ec: 0110 0000 1110 1100 */
+static void NEA_A_D(void)
+{
+ UINT8 tmp = A - D;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 ed: 0110 0000 1110 1101 */
+static void NEA_A_E(void)
+{
+ UINT8 tmp = A - E;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 ee: 0110 0000 1110 1110 */
+static void NEA_A_H(void)
+{
+ UINT8 tmp = A - H;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 ef: 0110 0000 1110 1111 */
+static void NEA_A_L(void)
+{
+ UINT8 tmp = A - L;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 60 f0: 0110 0000 1111 0000 */
+static void SBB_A_V(void)
+{
+ UINT8 tmp = A - V - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 f1: 0110 0000 1111 0001 */
+/* SBB_A_A already defined */
+
+/* 60 f2: 0110 0000 1111 0010 */
+static void SBB_A_B(void)
+{
+ UINT8 tmp = A - B - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 f3: 0110 0000 1111 0011 */
+static void SBB_A_C(void)
+{
+ UINT8 tmp = A - C - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 f4: 0110 0000 1111 0100 */
+static void SBB_A_D(void)
+{
+ UINT8 tmp = A - D - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 f5: 0110 0000 1111 0101 */
+static void SBB_A_E(void)
+{
+ UINT8 tmp = A - E - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 f6: 0110 0000 1111 0110 */
+static void SBB_A_H(void)
+{
+ UINT8 tmp = A - H - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 f7: 0110 0000 1111 0111 */
+static void SBB_A_L(void)
+{
+ UINT8 tmp = A - L - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 60 f8: 0110 0000 1111 1000 */
+static void EQA_A_V(void)
+{
+ UINT8 tmp = A - V;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 60 f9: 0110 0000 1111 1001 */
+/* EQA_A_A already defined */
+
+/* 60 fa: 0110 0000 1111 1010 */
+static void EQA_A_B(void)
+{
+ UINT8 tmp = A - B;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 60 fb: 0110 0000 1111 1011 */
+static void EQA_A_C(void)
+{
+ UINT8 tmp = A - C;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 60 fc: 0110 0000 1111 1100 */
+static void EQA_A_D(void)
+{
+ UINT8 tmp = A - D;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 60 fd: 0110 0000 1111 1101 */
+static void EQA_A_E(void)
+{
+ UINT8 tmp = A - E;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 60 fe: 0110 0000 1111 1110 */
+static void EQA_A_H(void)
+{
+ UINT8 tmp = A - H;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 60 ff: 0110 0000 1111 1111 */
+static void EQA_A_L(void)
+{
+ UINT8 tmp = A - L;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* prefix 64 */
+/* 64 00: 0110 0100 0000 0000 xxxx xxxx */
+static void MVI_PA_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WP( UPD7810_PORTA, imm );
+}
+
+/* 64 01: 0110 0100 0000 0001 xxxx xxxx */
+static void MVI_PB_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WP( UPD7810_PORTB, imm );
+}
+
+/* 64 02: 0110 0100 0000 0010 xxxx xxxx */
+static void MVI_PC_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WP( UPD7810_PORTC, imm );
+}
+
+/* 64 03: 0110 0100 0000 0011 xxxx xxxx */
+static void MVI_PD_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WP( UPD7810_PORTD, imm );
+}
+
+/* 64 05: 0110 0100 0000 0101 xxxx xxxx */
+static void MVI_PF_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WP( UPD7810_PORTF, imm );
+}
+
+/* 64 06: 0110 0100 0000 0110 xxxx xxxx */
+static void MVI_MKH_xx(void)
+{
+ RDOPARG( MKH );
+}
+
+/* 64 07: 0110 0100 0000 0111 xxxx xxxx */
+static void MVI_MKL_xx(void)
+{
+ RDOPARG( MKL );
+}
+
+/* 64 08: 0110 0100 0000 1000 xxxx xxxx */
+static void ANI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA), imm;
+ RDOPARG( imm );
+ pa &= imm;
+ WP( UPD7810_PORTA, pa );
+ SET_Z(pa);
+}
+
+/* 64 09: 0110 0100 0000 1001 xxxx xxxx */
+static void ANI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB), imm;
+ RDOPARG( imm );
+ pb &= imm;
+ WP( UPD7810_PORTB, pb );
+ SET_Z(pb);
+}
+
+/* 64 0a: 0110 0100 0000 1010 xxxx xxxx */
+static void ANI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC), imm;
+ RDOPARG( imm );
+ pc &= imm;
+ WP( UPD7810_PORTC, pc );
+ SET_Z(pc);
+}
+
+/* 64 0b: 0110 0100 0000 1011 xxxx xxxx */
+static void ANI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), imm;
+ RDOPARG( imm );
+ pd &= imm;
+ WP( UPD7810_PORTD, pd );
+ SET_Z(pd);
+}
+
+/* 64 0d: 0110 0100 0000 1101 xxxx xxxx */
+static void ANI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), imm;
+ RDOPARG( imm );
+ pf &= imm;
+ WP( UPD7810_PORTF, pf );
+ SET_Z(pf);
+}
+
+/* 64 0e: 0110 0100 0000 1110 xxxx xxxx */
+static void ANI_MKH_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ MKH &= imm;
+ SET_Z(MKH);
+}
+
+/* 64 0f: 0110 0100 0000 1111 xxxx xxxx */
+static void ANI_MKL_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ MKL &= imm;
+ SET_Z(MKL);
+}
+
+/* 64 10: 0110 0100 0001 0000 xxxx xxxx */
+static void XRI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), imm;
+ RDOPARG( imm );
+ pa ^= imm;
+ WP( UPD7810_PORTA, pa );
+ SET_Z(pa);
+}
+
+/* 64 11: 0110 0100 0001 0001 xxxx xxxx */
+static void XRI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), imm;
+ RDOPARG( imm );
+ pb ^= imm;
+ WP( UPD7810_PORTB, pb );
+ SET_Z(pb);
+}
+
+/* 64 12: 0110 0100 0001 0010 xxxx xxxx */
+static void XRI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), imm;
+ RDOPARG( imm );
+ pc ^= imm;
+ WP( UPD7810_PORTC, pc );
+ SET_Z(pc);
+}
+
+/* 64 13: 0110 0100 0001 0011 xxxx xxxx */
+static void XRI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), imm;
+ RDOPARG( imm );
+ pd ^= imm;
+ WP( UPD7810_PORTD, pd );
+ SET_Z(pd);
+}
+
+/* 64 15: 0110 0100 0001 0101 xxxx xxxx */
+static void XRI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), imm;
+ RDOPARG( imm );
+ pf ^= imm;
+ WP( UPD7810_PORTF, pf );
+ SET_Z(pf);
+}
+
+/* 64 16: 0110 0100 0001 0110 xxxx xxxx */
+static void XRI_MKH_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ MKH ^= imm;
+ SET_Z(MKH);
+}
+
+/* 64 17: 0110 0100 0001 0111 xxxx xxxx */
+static void XRI_MKL_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ MKL ^= imm;
+ SET_Z(MKL);
+}
+
+/* 64 18: 0110 0100 0001 1000 xxxx xxxx */
+static void ORI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), imm;
+ RDOPARG( imm );
+ pa |= imm;
+ WP( UPD7810_PORTA, pa );
+ SET_Z(pa);
+}
+
+/* 64 19: 0110 0100 0001 1001 xxxx xxxx */
+static void ORI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), imm;
+ RDOPARG( imm );
+ pb |= imm;
+ WP( UPD7810_PORTB, pb );
+ SET_Z(pb);
+}
+
+/* 64 1a: 0110 0100 0001 1010 xxxx xxxx */
+static void ORI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), imm;
+ RDOPARG( imm );
+ pc |= imm;
+ WP( UPD7810_PORTC, pc );
+ SET_Z(pc);
+}
+
+/* 64 1b: 0110 0100 0001 1011 xxxx xxxx */
+static void ORI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), imm;
+ RDOPARG( imm );
+ pd |= imm;
+ WP( UPD7810_PORTD, pd );
+ SET_Z(pd);
+}
+
+/* 64 1d: 0110 0100 0001 1101 xxxx xxxx */
+static void ORI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), imm;
+ RDOPARG( imm );
+ pf |= imm;
+ WP( UPD7810_PORTF, pf );
+ SET_Z(pf);
+}
+
+/* 64 1e: 0110 0100 0001 1110 xxxx xxxx */
+static void ORI_MKH_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ MKH |= imm;
+ SET_Z(MKH);
+}
+
+/* 64 1f: 0110 0100 0001 1111 xxxx xxxx */
+static void ORI_MKL_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ MKL |= imm;
+ SET_Z(MKL);
+}
+
+/* 64 20: 0110 0100 0010 0000 xxxx xxxx */
+static void ADINC_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA );
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa + imm;
+
+ ZHC_ADD( tmp, pa, 0 );
+ WP( UPD7810_PORTA , tmp );
+ SKIP_NC;
+}
+
+/* 64 21: 0110 0100 0010 0001 xxxx xxxx */
+static void ADINC_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB );
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb + imm;
+
+ ZHC_ADD( tmp, pb, 0 );
+ WP( UPD7810_PORTB, tmp );
+ SKIP_NC;
+}
+
+/* 64 22: 0110 0100 0010 0010 xxxx xxxx */
+static void ADINC_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC );
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc + imm;
+
+ ZHC_ADD( tmp, pc, 0 );
+ WP( UPD7810_PORTC, tmp );
+ SKIP_NC;
+}
+
+/* 64 23: 0110 0100 0010 0011 xxxx xxxx */
+static void ADINC_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD );
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd + imm;
+
+ ZHC_ADD( tmp, pd, 0 );
+ WP( UPD7810_PORTD, tmp );
+ SKIP_NC;
+}
+
+/* 64 25: 0110 0100 0010 0101 xxxx xxxx */
+static void ADINC_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF );
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf + imm;
+
+ ZHC_ADD( tmp, pf, 0 );
+ WP( UPD7810_PORTF, tmp );
+ SKIP_NC;
+}
+
+/* 64 26: 0110 0100 0010 0110 xxxx xxxx */
+static void ADINC_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH + imm;
+
+ ZHC_ADD( tmp, MKH, 0 );
+ MKH = tmp;
+ SKIP_NC;
+}
+
+/* 64 27: 0110 0100 0010 0111 xxxx xxxx */
+static void ADINC_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL + imm;
+
+ ZHC_ADD( tmp, MKL, 0 );
+ MKL = tmp;
+ SKIP_NC;
+}
+
+/* 64 28: 0110 0100 0010 1000 xxxx xxxx */
+static void GTI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = pa - imm - 1;
+ ZHC_SUB( tmp, pa, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 29: 0110 0100 0010 1001 xxxx xxxx */
+static void GTI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = pb - imm - 1;
+ ZHC_SUB( tmp, pb, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 2a: 0110 0100 0010 1010 xxxx xxxx */
+static void GTI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = pc - imm - 1;
+ ZHC_SUB( tmp, pc, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 2b: 0110 0100 0010 1011 xxxx xxxx */
+static void GTI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = pd - imm - 1;
+ ZHC_SUB( tmp, pd, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 2d: 0110 0100 0010 1101 xxxx xxxx */
+static void GTI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = pf - imm - 1;
+ ZHC_SUB( tmp, pf, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 2e: 0110 0100 0010 1110 xxxx xxxx */
+static void GTI_MKH_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = MKH - imm - 1;
+ ZHC_SUB( tmp, MKH, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 2f: 0110 0100 0010 1111 xxxx xxxx */
+static void GTI_MKL_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = MKL - imm - 1;
+ ZHC_SUB( tmp, MKL, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 30: 0110 0100 0011 0000 xxxx xxxx */
+static void SUINB_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa - imm;
+ ZHC_SUB( tmp, pa, 0 );
+ pa = tmp;
+ WP( UPD7810_PORTA, pa );
+ SKIP_NC;
+}
+
+/* 64 31: 0110 0100 0011 0001 xxxx xxxx */
+static void SUINB_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb - imm;
+ ZHC_SUB( tmp, pb, 0 );
+ pb = tmp;
+ WP( UPD7810_PORTB, pb );
+ SKIP_NC;
+}
+
+/* 64 32: 0110 0100 0011 0010 xxxx xxxx */
+static void SUINB_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc - imm;
+ ZHC_SUB( tmp, pc, 0 );
+ pc = tmp;
+ WP( UPD7810_PORTC, pc );
+ SKIP_NC;
+}
+
+/* 64 33: 0110 0100 0011 0011 xxxx xxxx */
+static void SUINB_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd - imm;
+ ZHC_SUB( tmp, pd, 0 );
+ pd = tmp;
+ WP( UPD7810_PORTD, pd );
+ SKIP_NC;
+}
+
+/* 64 35: 0110 0100 0011 0101 xxxx xxxx */
+static void SUINB_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf - imm;
+ ZHC_SUB( tmp, pf, 0 );
+ pf = tmp;
+ WP( UPD7810_PORTF, pf );
+ SKIP_NC;
+}
+
+/* 64 36: 0110 0100 0011 0110 xxxx xxxx */
+static void SUINB_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH - imm;
+ ZHC_SUB( tmp, MKH, 0 );
+ MKH = tmp;
+ SKIP_NC;
+}
+
+/* 64 37: 0110 0100 0011 0111 xxxx xxxx */
+static void SUINB_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL - imm;
+ ZHC_SUB( tmp, MKL, 0 );
+ MKL = tmp;
+ SKIP_NC;
+}
+
+/* 64 38: 0110 0100 0011 1000 xxxx xxxx */
+static void LTI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+ RDOPARG( imm );
+ tmp = pa - imm;
+ ZHC_SUB( tmp, pa, 0 );
+ SKIP_CY;
+}
+
+/* 64 39: 0110 0100 0011 1001 xxxx xxxx */
+static void LTI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+ RDOPARG( imm );
+ tmp = pb - imm;
+ ZHC_SUB( tmp, pb, 0 );
+ SKIP_CY;
+}
+
+/* 64 3a: 0110 0100 0011 1010 xxxx xxxx */
+static void LTI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+ RDOPARG( imm );
+ tmp = pc - imm;
+ ZHC_SUB( tmp, pc, 0 );
+ SKIP_CY;
+}
+
+/* 64 3b: 0110 0100 0011 1011 xxxx xxxx */
+static void LTI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+ RDOPARG( imm );
+ tmp = pd - imm;
+ ZHC_SUB( tmp, pd, 0 );
+ SKIP_CY;
+}
+
+/* 64 3d: 0110 0100 0011 1101 xxxx xxxx */
+static void LTI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+ RDOPARG( imm );
+ tmp = pf - imm;
+ ZHC_SUB( tmp, pf, 0 );
+ SKIP_CY;
+}
+
+/* 64 3e: 0110 0100 0011 1110 xxxx xxxx */
+static void LTI_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH - imm;
+ ZHC_SUB( tmp, MKH, 0 );
+ SKIP_CY;
+}
+
+/* 64 3f: 0110 0100 0011 1111 xxxx xxxx */
+static void LTI_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL - imm;
+ ZHC_SUB( tmp, MKL, 0 );
+ SKIP_CY;
+}
+
+/* 64 40: 0110 0100 0100 0000 xxxx xxxx */
+static void ADI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa + imm;
+ ZHC_ADD( tmp, pa, 0 );
+ pa = tmp;
+ WP( UPD7810_PORTA, pa );
+}
+
+/* 64 41: 0110 0100 0100 0001 xxxx xxxx */
+static void ADI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb + imm;
+ ZHC_ADD( tmp, pb, 0 );
+ pb = tmp;
+ WP( UPD7810_PORTB, pb );
+}
+
+/* 64 42: 0110 0100 0100 0010 xxxx xxxx */
+static void ADI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc + imm;
+ ZHC_ADD( tmp, pc, 0 );
+ pc = tmp;
+ WP( UPD7810_PORTC, pc );
+}
+
+/* 64 43: 0110 0100 0100 0011 xxxx xxxx */
+static void ADI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd + imm;
+ ZHC_ADD( tmp, pd, 0 );
+ pd = tmp;
+ WP( UPD7810_PORTD, pd );
+}
+
+/* 64 45: 0110 0100 0100 0101 xxxx xxxx */
+static void ADI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf + imm;
+ ZHC_ADD( tmp, pf, 0 );
+ pf = tmp;
+ WP( UPD7810_PORTF, pf );
+}
+
+/* 64 46: 0110 0100 0100 0110 xxxx xxxx */
+static void ADI_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH + imm;
+ ZHC_ADD( tmp, MKH, 0 );
+ MKH = tmp;
+}
+
+/* 64 47: 0110 0100 0100 0111 xxxx xxxx */
+static void ADI_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL + imm;
+ ZHC_ADD( tmp, MKL, 0 );
+ MKL = tmp;
+}
+
+/* 64 48: 0110 0100 0100 1000 xxxx xxxx */
+static void ONI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), imm;
+
+ RDOPARG( imm );
+ if (pa & imm)
+ PSW |= SK;
+}
+
+/* 64 49: 0110 0100 0100 1001 xxxx xxxx */
+static void ONI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), imm;
+
+ RDOPARG( imm );
+ if (pb & imm)
+ PSW |= SK;
+}
+
+/* 64 4a: 0110 0100 0100 1010 xxxx xxxx */
+static void ONI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), imm;
+
+ RDOPARG( imm );
+ if (pc & imm)
+ PSW |= SK;
+}
+
+/* 64 4b: 0110 0100 0100 1011 xxxx xxxx */
+static void ONI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), imm;
+
+ RDOPARG( imm );
+ if (pd & imm)
+ PSW |= SK;
+}
+
+/* 64 4d: 0110 0100 0100 1101 xxxx xxxx */
+static void ONI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), imm;
+
+ RDOPARG( imm );
+ if (pf & imm)
+ PSW |= SK;
+}
+
+/* 64 4e: 0110 0100 0100 1110 xxxx xxxx */
+static void ONI_MKH_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (MKH & imm)
+ PSW |= SK;
+}
+
+/* 64 4f: 0110 0100 0100 1111 xxxx xxxx */
+static void ONI_MKL_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (MKL & imm)
+ PSW |= SK;
+}
+
+/* 64 50: 0110 0100 0101 0000 xxxx xxxx */
+static void ACI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa + imm + (PSW & CY);
+ ZHC_ADD( tmp, pa, (PSW & CY) );
+ pa = tmp;
+ WP( UPD7810_PORTA, pa );
+}
+
+/* 64 51: 0110 0100 0101 0001 xxxx xxxx */
+static void ACI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb + imm + (PSW & CY);
+ ZHC_ADD( tmp, pb, (PSW & CY) );
+ pb = tmp;
+ WP( UPD7810_PORTB, pb );
+}
+
+/* 64 52: 0110 0100 0101 0010 xxxx xxxx */
+static void ACI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc + imm + (PSW & CY);
+ ZHC_ADD( tmp, pc, (PSW & CY) );
+ pc = tmp;
+ WP( UPD7810_PORTC, pc );
+}
+
+/* 64 53: 0110 0100 0101 0011 xxxx xxxx */
+static void ACI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd + imm + (PSW & CY);
+ ZHC_ADD( tmp, pd, (PSW & CY) );
+ pd = tmp;
+ WP( UPD7810_PORTD, pd );
+}
+
+/* 64 55: 0110 0100 0101 0101 xxxx xxxx */
+static void ACI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf + imm + (PSW & CY);
+ ZHC_ADD( tmp, pf, (PSW & CY) );
+ pf = tmp;
+ WP( UPD7810_PORTF, pf );
+}
+
+/* 64 56: 0110 0100 0101 0110 xxxx xxxx */
+static void ACI_MKH_xx(void)
+{
+ UINT8 imm, tmp;
+
+ RDOPARG( imm );
+ tmp = MKH + imm + (PSW & CY);
+ ZHC_ADD( tmp, MKH, (PSW & CY) );
+ MKH = tmp;
+}
+
+/* 64 57: 0110 0100 0101 0111 xxxx xxxx */
+static void ACI_MKL_xx(void)
+{
+ UINT8 imm, tmp;
+
+ RDOPARG( imm );
+ tmp = MKL + imm + (PSW & CY);
+ ZHC_ADD( tmp, MKL, (PSW & CY) );
+ MKL = tmp;
+}
+
+/* 64 58: 0110 0100 0101 1000 xxxx xxxx */
+static void OFFI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), imm;
+
+ RDOPARG( imm );
+ if (0 == (pa & imm))
+ PSW |= SK;
+}
+
+/* 64 59: 0110 0100 0101 1001 xxxx xxxx */
+static void OFFI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), imm;
+
+ RDOPARG( imm );
+ if (0 == (pb & imm))
+ PSW |= SK;
+}
+
+/* 64 5a: 0110 0100 0101 1010 xxxx xxxx */
+static void OFFI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), imm;
+
+ RDOPARG( imm );
+ if (0 == (pc & imm))
+ PSW |= SK;
+}
+
+/* 64 5b: 0110 0100 0101 1011 xxxx xxxx */
+static void OFFI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), imm;
+
+ RDOPARG( imm );
+ if (0 == (pd & imm))
+ PSW |= SK;
+}
+
+/* 64 5d: 0110 0100 0101 1101 xxxx xxxx */
+static void OFFI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), imm;
+
+ RDOPARG( imm );
+ if (0 == (pf & imm))
+ PSW |= SK;
+}
+
+/* 64 5e: 0110 0100 0101 1110 xxxx xxxx */
+static void OFFI_MKH_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (MKH & imm))
+ PSW |= SK;
+}
+
+/* 64 5f: 0110 0100 0101 1111 xxxx xxxx */
+static void OFFI_MKL_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (MKL & imm))
+ PSW |= SK;
+}
+
+/* 64 60: 0110 0100 0110 0000 xxxx xxxx */
+static void SUI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa - imm;
+ ZHC_SUB( tmp, pa, 0 );
+ pa = tmp;
+ WP( UPD7810_PORTA, pa );
+}
+
+/* 64 61: 0110 0100 0110 0001 xxxx xxxx */
+static void SUI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb - imm;
+ ZHC_SUB( tmp, pb, 0 );
+ pb = tmp;
+ WP( UPD7810_PORTB, pb );
+}
+
+/* 64 62: 0110 0100 0110 0010 xxxx xxxx */
+static void SUI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc - imm;
+ ZHC_SUB( tmp, pc, 0 );
+ pc = tmp;
+ WP( UPD7810_PORTC, pc );
+}
+
+/* 64 63: 0110 0100 0110 0011 xxxx xxxx */
+static void SUI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd - imm;
+ ZHC_SUB( tmp, pd, 0 );
+ pd = tmp;
+ WP( UPD7810_PORTD, pd );
+}
+
+/* 64 65: 0110 0100 0110 0101 xxxx xxxx */
+static void SUI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf - imm;
+ ZHC_SUB( tmp, pf, 0 );
+ pf = tmp;
+ WP( UPD7810_PORTF, pf );
+}
+
+/* 64 66: 0110 0100 0110 0110 xxxx xxxx */
+static void SUI_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH - imm;
+ ZHC_SUB( tmp, MKH, 0 );
+ MKH = tmp;
+}
+
+/* 64 67: 0110 0100 0110 0111 xxxx xxxx */
+static void SUI_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL - imm;
+ ZHC_SUB( tmp, MKL, 0 );
+ MKL = tmp;
+}
+
+/* 64 68: 0110 0100 0110 1000 xxxx xxxx */
+static void NEI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa - imm;
+ ZHC_SUB( tmp, pa, 0 );
+ SKIP_NZ;
+}
+
+/* 64 69: 0110 0100 0110 1001 xxxx xxxx */
+static void NEI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb - imm;
+ ZHC_SUB( tmp, pb, 0 );
+ SKIP_NZ;
+}
+
+/* 64 6a: 0110 0100 0110 1010 xxxx xxxx */
+static void NEI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc - imm;
+ ZHC_SUB( tmp, pc, 0 );
+ SKIP_NZ;
+}
+
+/* 64 6b: 0110 0100 0110 1011 xxxx xxxx */
+static void NEI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd - imm;
+ ZHC_SUB( tmp, pd, 0 );
+ SKIP_NZ;
+}
+
+/* 64 6d: 0110 0100 0110 1101 xxxx xxxx */
+static void NEI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf - imm;
+ ZHC_SUB( tmp, pf, 0 );
+ SKIP_NZ;
+}
+
+/* 64 6e: 0110 0100 0110 1110 xxxx xxxx */
+static void NEI_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH - imm;
+ ZHC_SUB( tmp, MKH, 0 );
+ SKIP_NZ;
+}
+
+/* 64 6f: 0110 0100 0110 1111 xxxx xxxx */
+static void NEI_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL - imm;
+ ZHC_SUB( tmp, MKL, 0 );
+ SKIP_NZ;
+}
+
+/* 64 70: 0110 0100 0111 0000 xxxx xxxx */
+static void SBI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa - imm - (PSW & CY);
+ ZHC_SUB( tmp, pa, (PSW & CY) );
+ pa = tmp;
+ WP( UPD7810_PORTA, pa );
+}
+
+/* 64 71: 0110 0100 0111 0001 xxxx xxxx */
+static void SBI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb - imm - (PSW & CY);
+ ZHC_SUB( tmp, pb, (PSW & CY) );
+ pb = tmp;
+ WP( UPD7810_PORTB, pb );
+}
+
+/* 64 72: 0110 0100 0111 0010 xxxx xxxx */
+static void SBI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc - imm - (PSW & CY);
+ ZHC_SUB( tmp, pc, (PSW & CY) );
+ pc = tmp;
+ WP( UPD7810_PORTC, pc );
+}
+
+/* 64 73: 0110 0100 0111 0011 xxxx xxxx */
+static void SBI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd - imm - (PSW & CY);
+ ZHC_SUB( tmp, pd, (PSW & CY) );
+ pd = tmp;
+ WP( UPD7810_PORTD, pd );
+}
+
+/* 64 75: 0110 0100 0111 0101 xxxx xxxx */
+static void SBI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf - imm - (PSW & CY);
+ ZHC_SUB( tmp, pf, (PSW & CY) );
+ pf = tmp;
+ WP( UPD7810_PORTF, pf );
+}
+
+/* 64 76: 0110 0100 0111 0110 xxxx xxxx */
+static void SBI_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH - imm - (PSW & CY);
+ ZHC_SUB( tmp, MKH, (PSW & CY) );
+ MKH = tmp;
+}
+
+/* 64 77: 0110 0100 0111 0111 xxxx xxxx */
+static void SBI_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL - imm - (PSW & CY);
+ ZHC_SUB( tmp, MKL, (PSW & CY) );
+ MKL = tmp;
+}
+
+/* 64 78: 0110 0100 0111 1000 xxxx xxxx */
+static void EQI_PA_xx(void)
+{
+ UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pa - imm;
+ ZHC_SUB( tmp, pa, 0 );
+ SKIP_Z;
+}
+
+/* 64 79: 0110 0100 0111 1001 xxxx xxxx */
+static void EQI_PB_xx(void)
+{
+ UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pb - imm;
+ ZHC_SUB( tmp, pb, 0 );
+ SKIP_Z;
+}
+
+/* 64 7a: 0110 0100 0111 1010 xxxx xxxx */
+static void EQI_PC_xx(void)
+{
+ UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pc - imm;
+ ZHC_SUB( tmp, pc, 0 );
+ SKIP_Z;
+}
+
+/* 64 7b: 0110 0100 0111 1011 xxxx xxxx */
+static void EQI_PD_xx(void)
+{
+ UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pd - imm;
+ ZHC_SUB( tmp, pd, 0 );
+ SKIP_Z;
+}
+
+/* 64 7d: 0110 0100 0111 1101 xxxx xxxx */
+static void EQI_PF_xx(void)
+{
+ UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
+
+ RDOPARG( imm );
+ tmp = pf - imm;
+ ZHC_SUB( tmp, pf, 0 );
+ SKIP_Z;
+}
+
+/* 64 7e: 0110 0100 0111 1110 xxxx xxxx */
+static void EQI_MKH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKH - imm;
+ ZHC_SUB( tmp, MKH, 0 );
+ SKIP_Z;
+}
+
+/* 64 7f: 0110 0100 0111 1111 xxxx xxxx */
+static void EQI_MKL_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = MKL - imm;
+ ZHC_SUB( tmp, MKL, 0 );
+ SKIP_Z;
+}
+
+/* 64 80: 0110 0100 1000 0000 xxxx xxxx */
+static void MVI_ANM_xx(void)
+{
+ RDOPARG( ANM );
+}
+
+/* 64 81: 0110 0100 1000 0001 xxxx xxxx */
+static void MVI_SMH_xx(void)
+{
+ RDOPARG( SMH );
+}
+
+/* 64 83: 0110 0100 1000 0011 xxxx xxxx */
+static void MVI_EOM_xx(void)
+{
+ RDOPARG( EOM );
+ upd7810_write_EOM();
+}
+
+/* 64 85: 0110 0100 1000 0101 xxxx xxxx */
+static void MVI_TMM_xx(void)
+{
+ RDOPARG( TMM );
+}
+
+/* 64 88: 0110 0100 1000 1000 xxxx xxxx */
+static void ANI_ANM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ ANM &= imm;
+ SET_Z(ANM);
+}
+
+/* 64 89: 0110 0100 1000 1001 xxxx xxxx */
+static void ANI_SMH_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ SMH &= imm;
+ SET_Z(SMH);
+}
+
+/* 64 8b: 0110 0100 1000 1011 xxxx xxxx */
+static void ANI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 imm;
+
+ RDOPARG( imm );
+ /* only bits #1 and #5 can be read */
+ EOM = eom & imm;
+ SET_Z(EOM);
+ upd7810_write_EOM();
+}
+
+/* 64 8d: 0110 0100 1000 1101 xxxx xxxx */
+static void ANI_TMM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ TMM &= imm;
+ SET_Z(TMM);
+}
+
+/* 64 90: 0110 0100 1001 0000 xxxx xxxx */
+static void XRI_ANM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ ANM ^= imm;
+ SET_Z(ANM);
+}
+
+/* 64 91: 0110 0100 1001 0001 xxxx xxxx */
+static void XRI_SMH_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ SMH ^= imm;
+ SET_Z(SMH);
+}
+
+/* 64 93: 0110 0100 1001 0011 xxxx xxxx */
+static void XRI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 imm;
+
+ RDOPARG( imm );
+ /* only bits #1 and #5 can be read */
+ EOM = eom ^ imm;
+ SET_Z(EOM);
+ upd7810_write_EOM();
+}
+
+/* 64 95: 0110 0100 1001 0101 xxxx xxxx */
+static void XRI_TMM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ TMM ^= imm;
+ SET_Z(TMM);
+}
+
+/* 64 98: 0110 0100 1001 1000 xxxx xxxx */
+static void ORI_ANM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ ANM |= imm;
+ SET_Z(ANM);
+}
+
+/* 64 99: 0110 0100 1001 1001 xxxx xxxx */
+static void ORI_SMH_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ SMH |= imm;
+ SET_Z(SMH);
+}
+
+/* 64 9b: 0110 0100 1001 1011 xxxx xxxx */
+static void ORI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 imm;
+
+ RDOPARG( imm );
+ /* only bits #1 and #5 can be read */
+ EOM = eom | imm;
+ SET_Z(EOM);
+ upd7810_write_EOM();
+}
+
+/* 64 9d: 0110 0100 1001 1101 xxxx xxxx */
+static void ORI_TMM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ TMM |= imm;
+ SET_Z(TMM);
+}
+
+/* 64 a0: 0110 0100 1010 0000 xxxx xxxx */
+static void ADINC_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM + imm;
+
+ ZHC_ADD( tmp, ANM, 0 );
+ ANM = tmp;
+ SKIP_NC;
+}
+
+/* 64 a1: 0110 0100 1010 0001 xxxx xxxx */
+static void ADINC_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH + imm;
+
+ ZHC_ADD( tmp, SMH, 0 );
+ SMH = tmp;
+ SKIP_NC;
+}
+
+/* 64 a3: 0110 0100 1010 0011 xxxx xxxx */
+static void ADINC_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ /* only bits #1 and #5 can be read */
+ tmp = eom + imm;
+
+ ZHC_ADD( tmp, eom, 0 );
+ EOM = tmp;
+ SKIP_NC;
+ upd7810_write_EOM();
+}
+
+/* 64 a5: 0110 0100 1010 0101 xxxx xxxx */
+static void ADINC_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM + imm;
+
+ ZHC_ADD( tmp, TMM, 0 );
+ TMM = tmp;
+ SKIP_NC;
+}
+
+/* 64 a8: 0110 0100 1010 1000 xxxx xxxx */
+static void GTI_ANM_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = ANM - imm - 1;
+ ZHC_SUB( tmp, ANM, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 a9: 0110 0100 1010 1001 xxxx xxxx */
+static void GTI_SMH_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = SMH - imm - 1;
+ ZHC_SUB( tmp, SMH, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 ab: 0110 0100 1010 1011 xxxx xxxx */
+static void GTI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = eom - imm - 1;
+ ZHC_SUB( tmp, eom, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 ad: 0110 0100 1010 1101 xxxx xxxx */
+static void GTI_TMM_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = TMM - imm - 1;
+ ZHC_SUB( tmp, TMM, 0 );
+
+ SKIP_NC;
+}
+
+/* 64 b0: 0110 0100 1011 0000 xxxx xxxx */
+static void SUINB_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM - imm;
+ ZHC_SUB( tmp, ANM, 0 );
+ ANM = tmp;
+ SKIP_NC;
+}
+
+/* 64 b1: 0110 0100 1011 0001 xxxx xxxx */
+static void SUINB_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH - imm;
+ ZHC_SUB( tmp, SMH, 0 );
+ SMH = tmp;
+ SKIP_NC;
+}
+
+/* 64 b3: 0110 0100 1011 0011 xxxx xxxx */
+static void SUINB_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom - imm;
+ ZHC_SUB( tmp, eom, 0 );
+ EOM = tmp;
+ SKIP_NC;
+ upd7810_write_EOM();
+}
+
+/* 64 b5: 0110 0100 1011 0101 xxxx xxxx */
+static void SUINB_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM - imm;
+ ZHC_SUB( tmp, TMM, 0 );
+ TMM = tmp;
+ SKIP_NC;
+}
+
+/* 64 b8: 0110 0100 1011 1000 xxxx xxxx */
+static void LTI_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM - imm;
+ ZHC_SUB( tmp, ANM, 0 );
+ SKIP_CY;
+}
+
+/* 64 b9: 0110 0100 1011 1001 xxxx xxxx */
+static void LTI_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH - imm;
+ ZHC_SUB( tmp, SMH, 0 );
+ SKIP_CY;
+}
+
+/* 64 bb: 0110 0100 1011 1011 xxxx xxxx */
+static void LTI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom - imm;
+ ZHC_SUB( tmp, eom, 0 );
+ SKIP_CY;
+}
+
+/* 64 bd: 0110 0100 1011 1101 xxxx xxxx */
+static void LTI_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM - imm;
+ ZHC_SUB( tmp, TMM, 0 );
+ SKIP_CY;
+}
+
+/* 64 c0: 0110 0100 1100 0000 xxxx xxxx */
+static void ADI_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM + imm;
+
+ ZHC_ADD( tmp, ANM, 0 );
+ ANM = tmp;
+}
+
+/* 64 c1: 0110 0100 1100 0001 xxxx xxxx */
+static void ADI_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH + imm;
+
+ ZHC_ADD( tmp, SMH, 0 );
+ SMH = tmp;
+}
+
+/* 64 c3: 0110 0100 1100 0011 xxxx xxxx */
+static void ADI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom + imm;
+
+ ZHC_ADD( tmp, eom, 0 );
+ EOM = tmp;
+ upd7810_write_EOM();
+}
+
+/* 64 c5: 0110 0100 1100 0101 xxxx xxxx */
+static void ADI_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM + imm;
+
+ ZHC_ADD( tmp, TMM, 0 );
+ TMM = tmp;
+}
+
+/* 64 c8: 0110 0100 1100 1000 xxxx xxxx */
+static void ONI_ANM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (ANM & imm)
+ PSW |= SK;
+}
+
+/* 64 c9: 0110 0100 1100 1001 xxxx xxxx */
+static void ONI_SMH_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (SMH & imm)
+ PSW |= SK;
+}
+
+/* 64 cb: 0110 0100 1100 1011 xxxx xxxx */
+static void ONI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (eom & imm)
+ PSW |= SK;
+}
+
+/* 64 cd: 0110 0100 1100 1101 xxxx xxxx */
+static void ONI_TMM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (TMM & imm)
+ PSW |= SK;
+}
+
+/* 64 d0: 0110 0100 1101 0000 xxxx xxxx */
+static void ACI_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM + imm + (PSW & CY);
+
+ ZHC_ADD( tmp, ANM, (PSW & CY) );
+ ANM = tmp;
+}
+
+/* 64 d1: 0110 0100 1101 0001 xxxx xxxx */
+static void ACI_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH + imm + (PSW & CY);
+
+ ZHC_ADD( tmp, SMH, (PSW & CY) );
+ SMH = tmp;
+}
+
+/* 64 d3: 0110 0100 1101 0011 xxxx xxxx */
+static void ACI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom + imm + (PSW & CY);
+
+ ZHC_ADD( tmp, eom, (PSW & CY) );
+ EOM = tmp;
+ upd7810_write_EOM();
+}
+
+/* 64 d5: 0110 0100 1101 0101 xxxx xxxx */
+static void ACI_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM + imm + (PSW & CY);
+
+ ZHC_ADD( tmp, TMM, (PSW & CY) );
+ TMM = tmp;
+}
+
+/* 64 d8: 0110 0100 1101 1000 xxxx xxxx */
+static void OFFI_ANM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (ANM & imm))
+ PSW |= SK;
+}
+
+/* 64 d9: 0110 0100 1101 1001 xxxx xxxx */
+static void OFFI_SMH_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (SMH & imm))
+ PSW |= SK;
+}
+
+/* 64 db: 0110 0100 1101 1011 xxxx xxxx */
+static void OFFI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (eom & imm))
+ PSW |= SK;
+}
+
+/* 64 dd: 0110 0100 1101 1101 xxxx xxxx */
+static void OFFI_TMM_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (TMM & imm))
+ PSW |= SK;
+}
+
+/* 64 e0: 0110 0100 1110 0000 xxxx xxxx */
+static void SUI_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM - imm;
+ ZHC_SUB( tmp, ANM, 0 );
+ ANM = tmp;
+}
+
+/* 64 e1: 0110 0100 1110 0001 xxxx xxxx */
+static void SUI_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH - imm;
+ ZHC_SUB( tmp, SMH, 0 );
+ SMH = tmp;
+}
+
+/* 64 e3: 0110 0100 1110 0011 xxxx xxxx */
+static void SUI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom - imm;
+ ZHC_SUB( tmp, eom, 0 );
+ EOM = tmp;
+ upd7810_write_EOM();
+}
+
+/* 64 e5: 0110 0100 1110 0101 xxxx xxxx */
+static void SUI_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM - imm;
+ ZHC_SUB( tmp, TMM, 0 );
+ TMM = tmp;
+}
+
+/* 64 e8: 0110 0100 1110 1000 xxxx xxxx */
+static void NEI_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM - imm;
+ ZHC_SUB( tmp, ANM, 0 );
+ SKIP_NZ;
+}
+
+/* 64 e9: 0110 0100 1110 1001 xxxx xxxx */
+static void NEI_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH - imm;
+ ZHC_SUB( tmp, SMH, 0 );
+ SKIP_NZ;
+}
+
+/* 64 eb: 0110 0100 1110 1011 xxxx xxxx */
+static void NEI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom - imm;
+ ZHC_SUB( tmp, eom, 0 );
+ SKIP_NZ;
+}
+
+/* 64 ed: 0110 0100 1110 1101 xxxx xxxx */
+static void NEI_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM - imm;
+ ZHC_SUB( tmp, TMM, 0 );
+ SKIP_NZ;
+}
+
+/* 64 f0: 0110 0100 1111 0000 xxxx xxxx */
+static void SBI_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM - imm - (PSW & CY);
+ ZHC_SUB( tmp, ANM, (PSW & CY) );
+ ANM = tmp;
+}
+
+/* 64 f1: 0110 0100 1111 0001 xxxx xxxx */
+static void SBI_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH - imm - (PSW & CY);
+ ZHC_SUB( tmp, SMH, (PSW & CY) );
+ SMH = tmp;
+}
+
+/* 64 f3: 0110 0100 1111 0011 xxxx xxxx */
+static void SBI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom - imm - (PSW & CY);
+ ZHC_SUB( tmp, eom, (PSW & CY) );
+ EOM = tmp;
+ upd7810_write_EOM();
+}
+
+/* 64 f5: 0110 0100 1111 0101 xxxx xxxx */
+static void SBI_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM - imm - (PSW & CY);
+ ZHC_SUB( tmp, TMM, (PSW & CY) );
+ TMM = tmp;
+}
+
+/* 64 f8: 0110 0100 1111 1000 xxxx xxxx */
+static void EQI_ANM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = ANM - imm;
+ ZHC_SUB( tmp, ANM, 0 );
+ SKIP_Z;
+}
+
+/* 64 f9: 0110 0100 1111 1001 xxxx xxxx */
+static void EQI_SMH_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = SMH - imm;
+ ZHC_SUB( tmp, SMH, 0 );
+ SKIP_Z;
+}
+
+/* 64 fb: 0110 0100 1111 1011 xxxx xxxx */
+static void EQI_EOM_xx(void)
+{
+ /* only bits #1 and #5 can be read */
+ UINT8 eom = EOM & 0x22;
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = eom - imm;
+ ZHC_SUB( tmp, eom, 0 );
+ SKIP_Z;
+}
+
+/* 64 fd: 0110 0100 1111 1101 xxxx xxxx */
+static void EQI_TMM_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = TMM - imm;
+ ZHC_SUB( tmp, TMM, 0 );
+ SKIP_Z;
+}
+
+/* prefix 70 */
+/* 70 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */
+static void SSPD_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, SPL );
+ WM( ea.d + 1, SPH );
+}
+
+/* 70 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */
+static void LSPD_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ SPL = RM( ea.d );
+ SPH = RM( ea.d + 1 );
+}
+
+/* 70 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */
+static void SBCD_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, C );
+ WM( ea.d + 1, B );
+}
+
+/* 70 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */
+static void LBCD_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ C = RM( ea.d );
+ B = RM( ea.d + 1 );
+}
+
+/* 70 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */
+static void SDED_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, E );
+ WM( ea.d + 1, D );
+}
+
+/* 70 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */
+static void LDED_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ E = RM( ea.d );
+ D = RM( ea.d + 1 );
+}
+
+/* 70 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */
+static void SHLD_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, L );
+ WM( ea.d + 1, H );
+}
+
+/* 70 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */
+static void LHLD_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ L = RM( ea.d );
+ H = RM( ea.d + 1 );
+}
+
+/* 70 41: 0111 0000 0100 0001 */
+static void EADD_EA_A(void)
+{
+ UINT16 tmp;
+ tmp = EA + A;
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 70 42: 0111 0000 0100 0010 */
+static void EADD_EA_B(void)
+{
+ UINT16 tmp;
+ tmp = EA + B;
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 70 43: 0111 0000 0100 0011 */
+static void EADD_EA_C(void)
+{
+ UINT16 tmp;
+ tmp = EA + C;
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 70 61: 0111 0000 0110 0001 */
+static void ESUB_EA_A(void)
+{
+ UINT16 tmp;
+ tmp = EA - A;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 70 62: 0111 0000 0110 0010 */
+static void ESUB_EA_B(void)
+{
+ UINT16 tmp;
+ tmp = EA - B;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 70 63: 0111 0000 0110 0011 */
+static void ESUB_EA_C(void)
+{
+ UINT16 tmp;
+ tmp = EA - C;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 70 68: 0111 0000 0110 1000 llll llll hhhh hhhh */
+static void MOV_V_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ V = RM( ea.d );
+}
+
+/* 70 69: 0111 0000 0110 1001 llll llll hhhh hhhh */
+static void MOV_A_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ A = RM( ea.d );
+}
+
+/* 70 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */
+static void MOV_B_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ B = RM( ea.d );
+}
+
+/* 70 6b: 0111 0000 0110 1011 llll llll hhhh hhhh */
+static void MOV_C_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ C = RM( ea.d );
+}
+
+/* 70 6c: 0111 0000 0110 1100 llll llll hhhh hhhh */
+static void MOV_D_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ D = RM( ea.d );
+}
+
+/* 70 6d: 0111 0000 0110 1101 llll llll hhhh hhhh */
+static void MOV_E_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ E = RM( ea.d );
+}
+
+/* 70 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */
+static void MOV_H_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ H = RM( ea.d );
+}
+
+/* 70 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */
+static void MOV_L_w(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ L = RM( ea.d );
+}
+
+/* 70 78: 0111 0000 0111 1000 llll llll hhhh hhhh */
+static void MOV_w_V(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, V );
+}
+
+/* 70 79: 0111 0000 0111 1001 llll llll hhhh hhhh */
+static void MOV_w_A(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, A );
+}
+
+/* 70 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */
+static void MOV_w_B(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, B );
+}
+
+/* 70 7b: 0111 0000 0111 1011 llll llll hhhh hhhh */
+static void MOV_w_C(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, C );
+}
+
+/* 70 7c: 0111 0000 0111 1100 llll llll hhhh hhhh */
+static void MOV_w_D(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, D );
+}
+
+/* 70 7d: 0111 0000 0111 1101 llll llll hhhh hhhh */
+static void MOV_w_E(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, E );
+}
+
+/* 70 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */
+static void MOV_w_H(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, H );
+}
+
+/* 70 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */
+static void MOV_w_L(void)
+{
+ PAIR ea;
+ ea.d = 0;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( ea.b.h );
+ WM( ea.d, L );
+}
+
+/* 70 89: 0111 0000 1000 1001 */
+static void ANAX_B(void)
+{
+ A &= RM( BC );
+ SET_Z(A);
+}
+
+/* 70 8a: 0111 0000 1000 1010 */
+static void ANAX_D(void)
+{
+ A &= RM( DE );
+ SET_Z(A);
+}
+
+/* 70 8b: 0111 0000 1000 1011 */
+static void ANAX_H(void)
+{
+ A &= RM( HL );
+ SET_Z(A);
+}
+
+/* 70 8c: 0111 0000 1000 1100 */
+static void ANAX_Dp(void)
+{
+ A &= RM( DE );
+ DE++;
+ SET_Z(A);
+}
+
+/* 70 8d: 0111 0000 1000 1101 */
+static void ANAX_Hp(void)
+{
+ A &= RM( HL );
+ HL++;
+ SET_Z(A);
+}
+
+/* 70 8e: 0111 0000 1000 1110 */
+static void ANAX_Dm(void)
+{
+ A &= RM( DE );
+ DE--;
+ SET_Z(A);
+}
+
+/* 70 8f: 0111 0000 1000 1111 */
+static void ANAX_Hm(void)
+{
+ A &= RM( HL );
+ HL--;
+ SET_Z(A);
+}
+
+/* 70 91: 0111 0000 1001 0001 */
+static void XRAX_B(void)
+{
+ A ^= RM( BC );
+ SET_Z(A);
+}
+
+/* 70 92: 0111 0000 1001 0010 */
+static void XRAX_D(void)
+{
+ A ^= RM( DE );
+ SET_Z(A);
+}
+
+/* 70 93: 0111 0000 1001 0011 */
+static void XRAX_H(void)
+{
+ A ^= RM( HL );
+ SET_Z(A);
+}
+
+/* 70 94: 0111 0000 1001 0100 */
+static void XRAX_Dp(void)
+{
+ A ^= RM( DE );
+ DE++;
+ SET_Z(A);
+}
+
+/* 70 95: 0111 0000 1001 0101 */
+static void XRAX_Hp(void)
+{
+ A ^= RM( HL );
+ HL++;
+ SET_Z(A);
+}
+
+/* 70 96: 0111 0000 1001 0110 */
+static void XRAX_Dm(void)
+{
+ A ^= RM( DE );
+ DE--;
+ SET_Z(A);
+}
+
+/* 70 97: 0111 0000 1001 0111 */
+static void XRAX_Hm(void)
+{
+ A ^= RM( HL );
+ HL--;
+ SET_Z(A);
+}
+
+/* 70 99: 0111 0000 1001 1001 */
+static void ORAX_B(void)
+{
+ A |= RM( BC );
+ SET_Z(A);
+}
+
+/* 70 9a: 0111 0000 1001 1010 */
+static void ORAX_D(void)
+{
+ A |= RM( DE );
+ SET_Z(A);
+}
+
+/* 70 9b: 0111 0000 1001 1011 */
+static void ORAX_H(void)
+{
+ A |= RM( HL );
+ SET_Z(A);
+}
+
+/* 70 9c: 0111 0000 1001 0100 */
+static void ORAX_Dp(void)
+{
+ A |= RM( DE );
+ DE++;
+ SET_Z(A);
+}
+
+/* 70 9d: 0111 0000 1001 1101 */
+static void ORAX_Hp(void)
+{
+ A |= RM( HL );
+ HL++;
+ SET_Z(A);
+}
+
+/* 70 9e: 0111 0000 1001 1110 */
+static void ORAX_Dm(void)
+{
+ A |= RM( DE );
+ DE--;
+ SET_Z(A);
+}
+
+/* 70 9f: 0111 0000 1001 1111 */
+static void ORAX_Hm(void)
+{
+ A |= RM( HL );
+ HL--;
+ SET_Z(A);
+}
+
+/* 70 a1: 0111 0000 1010 0001 */
+static void ADDNCX_B(void)
+{
+ UINT8 tmp = A + RM( BC );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 a2: 0111 0000 1010 0010 */
+static void ADDNCX_D(void)
+{
+ UINT8 tmp = A + RM( DE );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 a3: 0111 0000 1010 0011 */
+static void ADDNCX_H(void)
+{
+ UINT8 tmp = A + RM( HL );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 a4: 0111 0000 1010 0100 */
+static void ADDNCX_Dp(void)
+{
+ UINT8 tmp = A + RM( DE );
+ DE++;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 a5: 0111 0000 1010 0101 */
+static void ADDNCX_Hp(void)
+{
+ UINT8 tmp = A + RM( HL );
+ HL++;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 a6: 0111 0000 1010 0110 */
+static void ADDNCX_Dm(void)
+{
+ UINT8 tmp = A + RM( DE );
+ DE--;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 a7: 0111 0000 1010 0111 */
+static void ADDNCX_Hm(void)
+{
+ UINT8 tmp = A + RM( HL );
+ HL--;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 a9: 0111 0000 1010 1001 */
+static void GTAX_B(void)
+{
+ UINT16 tmp = A - RM( BC ) - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 70 aa: 0111 0000 1010 1010 */
+static void GTAX_D(void)
+{
+ UINT16 tmp = A - RM( DE ) - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 70 ab: 0111 0000 1010 1011 */
+static void GTAX_H(void)
+{
+ UINT16 tmp = A - RM( HL ) - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 70 ac: 0111 0000 1010 1100 */
+static void GTAX_Dp(void)
+{
+ UINT16 tmp = A - RM( DE ) - 1;
+ DE++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 70 ad: 0111 0000 1010 1101 */
+static void GTAX_Hp(void)
+{
+ UINT16 tmp = A - RM( HL ) - 1;
+ HL++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 70 ae: 0111 0000 1010 1110 */
+static void GTAX_Dm(void)
+{
+ UINT16 tmp = A - RM( DE ) - 1;
+ DE--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 70 af: 0111 0000 1010 1111 */
+static void GTAX_Hm(void)
+{
+ UINT16 tmp = A - RM( HL ) - 1;
+ HL--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 70 b1: 0111 0000 1011 0001 */
+static void SUBNBX_B(void)
+{
+ UINT8 tmp = A - RM( BC );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 b2: 0111 0000 1011 0010 */
+static void SUBNBX_D(void)
+{
+ UINT8 tmp = A - RM( DE );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 b3: 0111 0000 1011 0011 */
+static void SUBNBX_H(void)
+{
+ UINT8 tmp = A - RM( HL );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 b4: 0111 0000 1011 0100 */
+static void SUBNBX_Dp(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE++;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 b5: 0111 0000 1011 0101 */
+static void SUBNBX_Hp(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL++;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 b6: 0111 0000 1011 0110 */
+static void SUBNBX_Dm(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE--;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 b7: 0111 0000 1011 0111 */
+static void SUBNBX_Hm(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL--;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 70 b9: 0111 0000 1011 1001 */
+static void LTAX_B(void)
+{
+ UINT8 tmp = A - RM( BC );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 70 ba: 0111 0000 1011 1010 */
+static void LTAX_D(void)
+{
+ UINT8 tmp = A - RM( DE );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 70 bb: 0111 0000 1011 1011 */
+static void LTAX_H(void)
+{
+ UINT8 tmp = A - RM( HL );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 70 bc: 0111 0000 1011 1100 */
+static void LTAX_Dp(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 70 bd: 0111 0000 1011 1101 */
+static void LTAX_Hp(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 70 be: 0111 0000 1011 1110 */
+static void LTAX_Dm(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 70 bf: 0111 0000 1011 1111 */
+static void LTAX_Hm(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 70 c1: 0111 0000 1100 0001 */
+static void ADDX_B(void)
+{
+ UINT8 tmp = A + RM( BC );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 c2: 0111 0000 1100 0010 */
+static void ADDX_D(void)
+{
+ UINT8 tmp = A + RM( DE );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 c3: 0111 0000 1100 0011 */
+static void ADDX_H(void)
+{
+ UINT8 tmp = A + RM( HL );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 c4: 0111 0000 1100 0100 */
+static void ADDX_Dp(void)
+{
+ UINT8 tmp = A + RM( DE );
+ DE++;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 c5: 0111 0000 1100 0101 */
+static void ADDX_Hp(void)
+{
+ UINT8 tmp = A + RM( HL );
+ HL++;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 c6: 0111 0000 1100 0110 */
+static void ADDX_Dm(void)
+{
+ UINT8 tmp = A + RM( DE );
+ DE--;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 c7: 0111 0000 1100 0111 */
+static void ADDX_Hm(void)
+{
+ UINT8 tmp = A + RM( HL );
+ HL--;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 c9: 0111 0000 1100 1001 */
+static void ONAX_B(void)
+{
+ if (A & RM( BC ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 70 ca: 0111 0000 1100 1010 */
+static void ONAX_D(void)
+{
+ if (A & RM( DE ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 70 cb: 0111 0000 1100 1011 */
+static void ONAX_H(void)
+{
+ if (A & RM( HL ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 70 cc: 0111 0000 1100 1100 */
+static void ONAX_Dp(void)
+{
+ if (A & RM( DE ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+ DE++;
+}
+
+/* 70 cd: 0111 0000 1100 1101 */
+static void ONAX_Hp(void)
+{
+ if (A & RM( HL ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+ HL++;
+}
+
+/* 70 ce: 0111 0000 1100 1110 */
+static void ONAX_Dm(void)
+{
+ if (A & RM( DE ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+ DE--;
+}
+
+/* 70 cf: 0111 0000 1100 1111 */
+static void ONAX_Hm(void)
+{
+ if (A & RM( HL ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+ HL--;
+}
+
+/* 70 d1: 0111 0000 1101 0001 */
+static void ADCX_B(void)
+{
+ UINT8 tmp = A + RM( BC ) + (PSW & CY);
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 d2: 0111 0000 1101 0010 */
+static void ADCX_D(void)
+{
+ UINT8 tmp = A + RM( DE ) + (PSW & CY);
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 d3: 0111 0000 1101 0011 */
+static void ADCX_H(void)
+{
+ UINT8 tmp = A + RM( HL ) + (PSW & CY);
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 d4: 0111 0000 1101 0100 */
+static void ADCX_Dp(void)
+{
+ UINT8 tmp = A + RM( DE ) + (PSW & CY);
+ DE++;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 d5: 0111 0000 1101 0101 */
+static void ADCX_Hp(void)
+{
+ UINT8 tmp = A + RM( HL ) + (PSW & CY);
+ HL++;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 d6: 0111 0000 1101 0110 */
+static void ADCX_Dm(void)
+{
+ UINT8 tmp = A + RM( DE ) + (PSW & CY);
+ DE--;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 d7: 0111 0000 1101 0111 */
+static void ADCX_Hm(void)
+{
+ UINT8 tmp = A + RM( HL ) + (PSW & CY);
+ HL--;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 d9: 0111 0000 1101 1001 */
+static void OFFAX_B(void)
+{
+ if ( A & RM( BC ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 70 da: 0111 0000 1101 1010 */
+static void OFFAX_D(void)
+{
+ if ( A & RM( DE ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 70 db: 0111 0000 1101 1011 */
+static void OFFAX_H(void)
+{
+ if ( A & RM( HL ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 70 dc: 0111 0000 1101 1100 */
+static void OFFAX_Dp(void)
+{
+ if ( A & RM( DE ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+ DE++;
+}
+
+/* 70 dd: 0111 0000 1101 1101 */
+static void OFFAX_Hp(void)
+{
+ if ( A & RM( HL ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+ HL++;
+}
+
+/* 70 de: 0111 0000 1101 1110 */
+static void OFFAX_Dm(void)
+{
+ if ( A & RM( DE ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+ DE--;
+}
+
+/* 70 df: 0111 0000 1101 1111 */
+static void OFFAX_Hm(void)
+{
+ if ( A & RM( HL ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+ HL--;
+}
+
+/* 70 e1: 0111 0000 1110 0001 */
+static void SUBX_B(void)
+{
+ UINT8 tmp = A - RM( BC );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 e2: 0111 0000 1110 0010 */
+static void SUBX_D(void)
+{
+ UINT8 tmp = A - RM( DE );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 e3: 0111 0000 1110 0011 */
+static void SUBX_H(void)
+{
+ UINT8 tmp = A - RM( HL );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 70 e4: 0111 0000 1110 0100 */
+static void SUBX_Dp(void)
+{
+ UINT8 tmp = A - RM( DE );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ DE++;
+}
+
+/* 70 e5: 0111 0000 1110 0101 */
+static void SUBX_Hp(void)
+{
+ UINT8 tmp = A - RM( HL );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ HL++;
+}
+
+/* 70 e6: 0111 0000 1110 0110 */
+static void SUBX_Dm(void)
+{
+ UINT8 tmp = A - RM( DE );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ DE--;
+}
+
+/* 70 e7: 0111 0000 1110 0111 */
+static void SUBX_Hm(void)
+{
+ UINT8 tmp = A - RM( HL );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ HL--;
+}
+
+/* 70 e9: 0111 0000 1110 1001 */
+static void NEAX_B(void)
+{
+ UINT8 tmp = A - RM( BC );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 70 ea: 0111 0000 1110 1010 */
+static void NEAX_D(void)
+{
+ UINT8 tmp = A - RM( DE );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 70 eb: 0111 0000 1110 1011 */
+static void NEAX_H(void)
+{
+ UINT8 tmp = A - RM( HL );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 70 ec: 0111 0000 1110 1100 */
+static void NEAX_Dp(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 70 ed: 0111 0000 1110 1101 */
+static void NEAX_Hp(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 70 ee: 0111 0000 1110 1110 */
+static void NEAX_Dm(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 70 ef: 0111 0000 1110 1111 */
+static void NEAX_Hm(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 70 f1: 0111 0000 1111 0001 */
+static void SBBX_B(void)
+{
+ UINT8 tmp = A - RM( BC ) - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 70 f2: 0111 0000 1111 0010 */
+static void SBBX_D(void)
+{
+ UINT8 tmp = A - RM( DE ) - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 70 f3: 0111 0000 1111 0011 */
+static void SBBX_H(void)
+{
+ UINT8 tmp = A - RM( HL ) - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 70 f4: 0111 0000 1111 0100 */
+static void SBBX_Dp(void)
+{
+ UINT8 tmp = A - RM( DE ) - (PSW & CY);
+ DE++;
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 70 f5: 0111 0000 1111 0101 */
+static void SBBX_Hp(void)
+{
+ UINT8 tmp = A - RM( HL ) - (PSW & CY);
+ HL++;
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 70 f6: 0111 0000 1111 0110 */
+static void SBBX_Dm(void)
+{
+ UINT8 tmp = A - RM( DE ) - (PSW & CY);
+ DE--;
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 70 f7: 0111 0000 1111 0111 */
+static void SBBX_Hm(void)
+{
+ UINT8 tmp = A - RM( HL ) - (PSW & CY);
+ HL--;
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 70 f9: 0111 0000 1111 1001 */
+static void EQAX_B(void)
+{
+ UINT8 tmp = A - RM( BC );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 70 fa: 0111 0000 1111 1010 */
+static void EQAX_D(void)
+{
+ UINT8 tmp = A - RM( DE );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 70 fb: 0111 0000 1111 1011 */
+static void EQAX_H(void)
+{
+ UINT8 tmp = A - RM( HL );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 70 fc: 0111 0000 1111 1100 */
+static void EQAX_Dp(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 70 fd: 0111 0000 1111 1101 */
+static void EQAX_Hp(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL++;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 70 fe: 0111 0000 1111 1110 */
+static void EQAX_Dm(void)
+{
+ UINT8 tmp = A - RM( DE );
+ DE--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 70 ff: 0111 0000 1111 1111 */
+static void EQAX_Hm(void)
+{
+ UINT8 tmp = A - RM( HL );
+ HL--;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* prefix 74 */
+/* 74 08: 0111 0100 0000 1000 xxxx xxxx */
+static void ANI_V_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ V &= imm;
+ SET_Z(V);
+}
+
+/* 74 09: 0111 0100 0000 1001 xxxx xxxx */
+static void ANI_A_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ A &= imm;
+ SET_Z(A);
+}
+
+/* 74 0a: 0111 0100 0000 1010 xxxx xxxx */
+static void ANI_B_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ B &= imm;
+ SET_Z(B);
+}
+
+/* 74 0b: 0111 0100 0000 1011 xxxx xxxx */
+static void ANI_C_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ C &= imm;
+ SET_Z(C);
+}
+
+/* 74 0c: 0111 0100 0000 1100 xxxx xxxx */
+static void ANI_D_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ D &= imm;
+ SET_Z(D);
+}
+
+/* 74 0d: 0111 0100 0000 1101 xxxx xxxx */
+static void ANI_E_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ E &= imm;
+ SET_Z(E);
+}
+
+/* 74 0e: 0111 0100 0000 1110 xxxx xxxx */
+static void ANI_H_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ H &= imm;
+ SET_Z(H);
+}
+
+/* 74 0f: 0111 0100 0000 1111 xxxx xxxx */
+static void ANI_L_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ L &= imm;
+ SET_Z(L);
+}
+
+/* 74 10: 0111 0100 0001 0000 xxxx xxxx */
+static void XRI_V_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ V ^= imm;
+ SET_Z(V);
+}
+
+/* 74 11: 0111 0100 0001 0001 xxxx xxxx */
+static void XRI_A_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ A ^= imm;
+ SET_Z(A);
+}
+
+/* 74 12: 0111 0100 0001 0010 xxxx xxxx */
+static void XRI_B_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ B ^= imm;
+ SET_Z(B);
+}
+
+/* 74 13: 0111 0100 0001 0011 xxxx xxxx */
+static void XRI_C_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ C ^= imm;
+ SET_Z(C);
+}
+
+/* 74 14: 0111 0100 0001 0100 xxxx xxxx */
+static void XRI_D_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ D ^= imm;
+ SET_Z(D);
+}
+
+/* 74 15: 0111 0100 0001 0101 xxxx xxxx */
+static void XRI_E_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ E ^= imm;
+ SET_Z(E);
+}
+
+/* 74 16: 0111 0100 0001 0110 xxxx xxxx */
+static void XRI_H_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ H ^= imm;
+ SET_Z(H);
+}
+
+/* 74 17: 0111 0100 0001 0111 xxxx xxxx */
+static void XRI_L_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ L ^= imm;
+ SET_Z(L);
+}
+
+/* 74 18: 0111 0100 0001 1000 xxxx xxxx */
+static void ORI_V_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ V |= imm;
+ SET_Z(V);
+}
+
+/* 74 19: 0111 0100 0001 1001 xxxx xxxx */
+static void ORI_A_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ A |= imm;
+ SET_Z(A);
+}
+
+/* 74 1a: 0111 0100 0001 1010 xxxx xxxx */
+static void ORI_B_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ B |= imm;
+ SET_Z(B);
+}
+
+/* 74 1b: 0111 0100 0001 1011 xxxx xxxx */
+static void ORI_C_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ C |= imm;
+ SET_Z(C);
+}
+
+/* 74 1c: 0111 0100 0001 1100 xxxx xxxx */
+static void ORI_D_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ D |= imm;
+ SET_Z(D);
+}
+
+/* 74 1d: 0111 0100 0001 1101 xxxx xxxx */
+static void ORI_E_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ E |= imm;
+ SET_Z(E);
+}
+
+/* 74 1e: 0111 0100 0001 1110 xxxx xxxx */
+static void ORI_H_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ H |= imm;
+ SET_Z(H);
+}
+
+/* 74 1f: 0111 0100 0001 1111 xxxx xxxx */
+static void ORI_L_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ L |= imm;
+ SET_Z(L);
+}
+
+/* 74 20: 0111 0100 0010 0000 xxxx xxxx */
+static void ADINC_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V + imm;
+
+ ZHC_ADD( tmp, V, 0 );
+ V = tmp;
+ SKIP_NC;
+}
+
+/* 74 21: 0111 0100 0010 0001 xxxx xxxx */
+static void ADINC_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A + imm;
+
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 74 22: 0111 0100 0010 0010 xxxx xxxx */
+static void ADINC_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B + imm;
+
+ ZHC_ADD( tmp, B, 0 );
+ B = tmp;
+ SKIP_NC;
+}
+
+/* 74 23: 0111 0100 0010 0011 xxxx xxxx */
+static void ADINC_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C + imm;
+
+ ZHC_ADD( tmp, C, 0 );
+ C = tmp;
+ SKIP_NC;
+}
+
+/* 74 24: 0111 0100 0010 0100 xxxx xxxx */
+static void ADINC_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D + imm;
+
+ ZHC_ADD( tmp, D, 0 );
+ D = tmp;
+ SKIP_NC;
+}
+
+/* 74 25: 0111 0100 0010 0101 xxxx xxxx */
+static void ADINC_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E + imm;
+
+ ZHC_ADD( tmp, E, 0 );
+ E = tmp;
+ SKIP_NC;
+}
+
+/* 74 26: 0111 0100 0010 0110 xxxx xxxx */
+static void ADINC_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H + imm;
+
+ ZHC_ADD( tmp, H, 0 );
+ H = tmp;
+ SKIP_NC;
+}
+
+/* 74 27: 0111 0100 0010 0111 xxxx xxxx */
+static void ADINC_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L + imm;
+
+ ZHC_ADD( tmp, L, 0 );
+ L = tmp;
+ SKIP_NC;
+}
+
+/* 74 28: 0111 0100 0010 1000 xxxx xxxx */
+static void GTI_V_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = V - imm - 1;
+ ZHC_SUB( tmp, V, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 29: 0111 0100 0010 1001 xxxx xxxx */
+static void GTI_A_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = A - imm - 1;
+ ZHC_SUB( tmp, A, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 2a: 0111 0100 0010 1010 xxxx xxxx */
+static void GTI_B_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = B - imm - 1;
+ ZHC_SUB( tmp, B, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 2b: 0111 0100 0010 1011 xxxx xxxx */
+static void GTI_C_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = C - imm - 1;
+ ZHC_SUB( tmp, C, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 2c: 0111 0100 0010 1100 xxxx xxxx */
+static void GTI_D_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = D - imm - 1;
+ ZHC_SUB( tmp, D, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 2d: 0111 0100 0010 1101 xxxx xxxx */
+static void GTI_E_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = E - imm - 1;
+ ZHC_SUB( tmp, E, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 2e: 0111 0100 0010 1110 xxxx xxxx */
+static void GTI_H_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = H - imm - 1;
+ ZHC_SUB( tmp, H, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 2f: 0111 0100 0010 1111 xxxx xxxx */
+static void GTI_L_xx(void)
+{
+ UINT8 imm;
+ UINT16 tmp;
+
+ RDOPARG( imm );
+ tmp = L - imm - 1;
+ ZHC_SUB( tmp, L, 0 );
+
+ SKIP_NC;
+}
+
+/* 74 30: 0111 0100 0011 0000 xxxx xxxx */
+static void SUINB_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V - imm;
+ ZHC_SUB( tmp, V, 0 );
+ V = tmp;
+ SKIP_NC;
+}
+
+/* 74 31: 0111 0100 0011 0001 xxxx xxxx */
+static void SUINB_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A - imm;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 74 32: 0111 0100 0011 0010 xxxx xxxx */
+static void SUINB_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B - imm;
+ ZHC_SUB( tmp, B, 0 );
+ B = tmp;
+ SKIP_NC;
+}
+
+/* 74 33: 0111 0100 0011 0011 xxxx xxxx */
+static void SUINB_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C - imm;
+ ZHC_SUB( tmp, C, 0 );
+ C = tmp;
+ SKIP_NC;
+}
+
+/* 74 34: 0111 0100 0011 0100 xxxx xxxx */
+static void SUINB_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D - imm;
+ ZHC_SUB( tmp, D, 0 );
+ D = tmp;
+ SKIP_NC;
+}
+
+/* 74 35: 0111 0100 0011 0101 xxxx xxxx */
+static void SUINB_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E - imm;
+ ZHC_SUB( tmp, E, 0 );
+ E = tmp;
+ SKIP_NC;
+}
+
+/* 74 36: 0111 0100 0011 0110 xxxx xxxx */
+static void SUINB_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H - imm;
+ ZHC_SUB( tmp, H, 0 );
+ H = tmp;
+ SKIP_NC;
+}
+
+/* 74 37: 0111 0100 0011 0111 xxxx xxxx */
+static void SUINB_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L - imm;
+ ZHC_SUB( tmp, L, 0 );
+ L = tmp;
+ SKIP_NC;
+}
+
+/* 74 38: 0111 0100 0011 1000 xxxx xxxx */
+static void LTI_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V - imm;
+ ZHC_SUB( tmp, V, 0 );
+ SKIP_CY;
+}
+
+/* 74 39: 0111 0100 0011 1001 xxxx xxxx */
+static void LTI_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A - imm;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 74 3a: 0111 0100 0011 1010 xxxx xxxx */
+static void LTI_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B - imm;
+ ZHC_SUB( tmp, B, 0 );
+ SKIP_CY;
+}
+
+/* 74 3b: 0111 0100 0011 1011 xxxx xxxx */
+static void LTI_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C - imm;
+ ZHC_SUB( tmp, C, 0 );
+ SKIP_CY;
+}
+
+/* 74 3c: 0111 0100 0011 1100 xxxx xxxx */
+static void LTI_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D - imm;
+ ZHC_SUB( tmp, D, 0 );
+ SKIP_CY;
+}
+
+/* 74 3d: 0111 0100 0011 1101 xxxx xxxx */
+static void LTI_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E - imm;
+ ZHC_SUB( tmp, E, 0 );
+ SKIP_CY;
+}
+
+/* 74 3e: 0111 0100 0011 1110 xxxx xxxx */
+static void LTI_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H - imm;
+ ZHC_SUB( tmp, H, 0 );
+ SKIP_CY;
+}
+
+/* 74 3f: 0111 0100 0011 1111 xxxx xxxx */
+static void LTI_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L - imm;
+ ZHC_SUB( tmp, L, 0 );
+ SKIP_CY;
+}
+
+/* 74 40: 0111 0100 0100 0000 xxxx xxxx */
+static void ADI_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V + imm;
+
+ ZHC_ADD( tmp, V, 0 );
+ V = tmp;
+}
+
+/* 74 41: 0111 0100 0100 0001 xxxx xxxx */
+static void ADI_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A + imm;
+
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 74 42: 0111 0100 0100 0010 xxxx xxxx */
+static void ADI_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B + imm;
+
+ ZHC_ADD( tmp, B, 0 );
+ B = tmp;
+}
+
+/* 74 43: 0111 0100 0100 0011 xxxx xxxx */
+static void ADI_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C + imm;
+
+ ZHC_ADD( tmp, C, 0 );
+ C = tmp;
+}
+
+/* 74 44: 0111 0100 0100 0100 xxxx xxxx */
+static void ADI_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D + imm;
+
+ ZHC_ADD( tmp, D, 0 );
+ D = tmp;
+}
+
+/* 74 45: 0111 0100 0100 0101 xxxx xxxx */
+static void ADI_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E + imm;
+
+ ZHC_ADD( tmp, E, 0 );
+ E = tmp;
+}
+
+/* 74 46: 0111 0100 0100 0110 xxxx xxxx */
+static void ADI_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H + imm;
+
+ ZHC_ADD( tmp, H, 0 );
+ H = tmp;
+}
+
+/* 74 47: 0111 0100 0100 0111 xxxx xxxx */
+static void ADI_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L + imm;
+
+ ZHC_ADD( tmp, L, 0 );
+ L = tmp;
+}
+
+/* 74 48: 0111 0100 0100 1000 xxxx xxxx */
+static void ONI_V_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (V & imm)
+ PSW |= SK;
+}
+
+/* 74 49: 0111 0100 0100 1001 xxxx xxxx */
+static void ONI_A_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (A & imm)
+ PSW |= SK;
+}
+
+/* 74 4a: 0111 0100 0100 1010 xxxx xxxx */
+static void ONI_B_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (B & imm)
+ PSW |= SK;
+}
+
+/* 74 4b: 0111 0100 0100 1011 xxxx xxxx */
+static void ONI_C_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (C & imm)
+ PSW |= SK;
+}
+
+/* 74 4c: 0111 0100 0100 1100 xxxx xxxx */
+static void ONI_D_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (D & imm)
+ PSW |= SK;
+}
+
+/* 74 4d: 0111 0100 0100 1101 xxxx xxxx */
+static void ONI_E_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (E & imm)
+ PSW |= SK;
+}
+
+/* 74 4e: 0111 0100 0100 1110 xxxx xxxx */
+static void ONI_H_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (H & imm)
+ PSW |= SK;
+}
+
+/* 74 4f: 0111 0100 0100 1111 xxxx xxxx */
+static void ONI_L_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (L & imm)
+ PSW |= SK;
+}
+
+/* 74 50: 0111 0100 0101 0000 xxxx xxxx */
+static void ACI_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V + imm + (PSW & CY);
+ ZHC_SUB( tmp, V, (PSW & CY) );
+ V = tmp;
+}
+
+/* 74 51: 0111 0100 0101 0001 xxxx xxxx */
+static void ACI_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A + imm + (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 74 52: 0111 0100 0101 0010 xxxx xxxx */
+static void ACI_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B + imm + (PSW & CY);
+ ZHC_SUB( tmp, B, (PSW & CY) );
+ B = tmp;
+}
+
+/* 74 53: 0111 0100 0101 0011 xxxx xxxx */
+static void ACI_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C + imm + (PSW & CY);
+ ZHC_SUB( tmp, C, (PSW & CY) );
+ C = tmp;
+}
+
+/* 74 54: 0111 0100 0101 0100 xxxx xxxx */
+static void ACI_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D + imm + (PSW & CY);
+ ZHC_SUB( tmp, D, (PSW & CY) );
+ D = tmp;
+}
+
+/* 74 55: 0111 0100 0101 0101 xxxx xxxx */
+static void ACI_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E + imm + (PSW & CY);
+ ZHC_SUB( tmp, E, (PSW & CY) );
+ E = tmp;
+}
+
+/* 74 56: 0111 0100 0101 0110 xxxx xxxx */
+static void ACI_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H + imm + (PSW & CY);
+ ZHC_SUB( tmp, H, (PSW & CY) );
+ H = tmp;
+}
+
+/* 74 57: 0111 0100 0101 0111 xxxx xxxx */
+static void ACI_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L + imm + (PSW & CY);
+ ZHC_SUB( tmp, L, (PSW & CY) );
+ L = tmp;
+}
+
+/* 74 58: 0111 0100 0101 1000 xxxx xxxx */
+static void OFFI_V_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (V & imm))
+ PSW |= SK;
+}
+
+/* 74 59: 0111 0100 0101 1001 xxxx xxxx */
+static void OFFI_A_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (A & imm))
+ PSW |= SK;
+}
+
+/* 74 5a: 0111 0100 0101 1010 xxxx xxxx */
+static void OFFI_B_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (B & imm))
+ PSW |= SK;
+}
+
+/* 74 5b: 0111 0100 0101 1011 xxxx xxxx */
+static void OFFI_C_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (C & imm))
+ PSW |= SK;
+}
+
+/* 74 5c: 0111 0100 0101 1100 xxxx xxxx */
+static void OFFI_D_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (D & imm))
+ PSW |= SK;
+}
+
+/* 74 5d: 0111 0100 0101 1101 xxxx xxxx */
+static void OFFI_E_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (E & imm))
+ PSW |= SK;
+}
+
+/* 74 5e: 0111 0100 0101 1110 xxxx xxxx */
+static void OFFI_H_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (H & imm))
+ PSW |= SK;
+}
+
+/* 74 5f: 0111 0100 0101 1111 xxxx xxxx */
+static void OFFI_L_xx(void)
+{
+ UINT8 imm;
+
+ RDOPARG( imm );
+ if (0 == (L & imm))
+ PSW |= SK;
+}
+
+/* 74 60: 0111 0100 0110 0000 xxxx xxxx */
+static void SUI_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V - imm;
+ ZHC_SUB( tmp, V, 0 );
+ V = tmp;
+}
+
+/* 74 61: 0111 0100 0110 0001 xxxx xxxx */
+static void SUI_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A - imm;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 74 62: 0111 0100 0110 0010 xxxx xxxx */
+static void SUI_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B - imm;
+ ZHC_SUB( tmp, B, 0 );
+ B = tmp;
+}
+
+/* 74 63: 0111 0100 0110 0011 xxxx xxxx */
+static void SUI_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C - imm;
+ ZHC_SUB( tmp, C, 0 );
+ C = tmp;
+}
+
+/* 74 64: 0111 0100 0110 0100 xxxx xxxx */
+static void SUI_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D - imm;
+ ZHC_SUB( tmp, D, 0 );
+ D = tmp;
+}
+
+/* 74 65: 0111 0100 0110 0101 xxxx xxxx */
+static void SUI_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E - imm;
+ ZHC_SUB( tmp, E, 0 );
+ E = tmp;
+}
+
+/* 74 66: 0111 0100 0110 0110 xxxx xxxx */
+static void SUI_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H - imm;
+ ZHC_SUB( tmp, H, 0 );
+ H = tmp;
+}
+
+/* 74 67: 0111 0100 0110 0111 xxxx xxxx */
+static void SUI_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L - imm;
+ ZHC_SUB( tmp, L, 0 );
+ L = tmp;
+}
+
+/* 74 68: 0111 0100 0110 1000 xxxx xxxx */
+static void NEI_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V - imm;
+ ZHC_SUB( tmp, V, 0 );
+ SKIP_NZ;
+}
+
+/* 74 69: 0111 0100 0110 1001 xxxx xxxx */
+static void NEI_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A - imm;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 74 6a: 0111 0100 0110 1010 xxxx xxxx */
+static void NEI_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B - imm;
+ ZHC_SUB( tmp, B, 0 );
+ SKIP_NZ;
+}
+
+/* 74 6b: 0111 0100 0110 1011 xxxx xxxx */
+static void NEI_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C - imm;
+ ZHC_SUB( tmp, C, 0 );
+ SKIP_NZ;
+}
+
+/* 74 6c: 0111 0100 0110 1100 xxxx xxxx */
+static void NEI_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D - imm;
+ ZHC_SUB( tmp, D, 0 );
+ SKIP_NZ;
+}
+
+/* 74 6d: 0111 0100 0110 1101 xxxx xxxx */
+static void NEI_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E - imm;
+ ZHC_SUB( tmp, E, 0 );
+ SKIP_NZ;
+}
+
+/* 74 6e: 0111 0100 0110 1110 xxxx xxxx */
+static void NEI_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H - imm;
+ ZHC_SUB( tmp, H, 0 );
+ SKIP_NZ;
+}
+
+/* 74 6f: 0111 0100 0110 1111 xxxx xxxx */
+static void NEI_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L - imm;
+ ZHC_SUB( tmp, L, 0 );
+ SKIP_NZ;
+}
+
+/* 74 70: 0111 0100 0111 0000 xxxx xxxx */
+static void SBI_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V - imm - (PSW & CY);
+ ZHC_SUB( tmp, V, (PSW & CY) );
+ V = tmp;
+}
+
+/* 74 71: 0111 0100 0111 0001 xxxx xxxx */
+static void SBI_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A - imm - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 74 72: 0111 0100 0111 0010 xxxx xxxx */
+static void SBI_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B - imm - (PSW & CY);
+ ZHC_SUB( tmp, B, (PSW & CY) );
+ B = tmp;
+}
+
+/* 74 73: 0111 0100 0111 0011 xxxx xxxx */
+static void SBI_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C - imm - (PSW & CY);
+ ZHC_SUB( tmp, C, (PSW & CY) );
+ C = tmp;
+}
+
+/* 74 74: 0111 0100 0111 0100 xxxx xxxx */
+static void SBI_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D - imm - (PSW & CY);
+ ZHC_SUB( tmp, D, (PSW & CY) );
+ D = tmp;
+}
+
+/* 74 75: 0111 0100 0111 0101 xxxx xxxx */
+static void SBI_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E - imm - (PSW & CY);
+ ZHC_SUB( tmp, E, (PSW & CY) );
+ E = tmp;
+}
+
+/* 74 76: 0111 0100 0111 0110 xxxx xxxx */
+static void SBI_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H - imm - (PSW & CY);
+ ZHC_SUB( tmp, H, (PSW & CY) );
+ H = tmp;
+}
+
+/* 74 77: 0111 0100 0111 0111 xxxx xxxx */
+static void SBI_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L - imm - (PSW & CY);
+ ZHC_SUB( tmp, L, (PSW & CY) );
+ L = tmp;
+}
+
+/* 74 78: 0111 0100 0111 1000 xxxx xxxx */
+static void EQI_V_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = V - imm;
+ ZHC_SUB( tmp, V, 0 );
+ SKIP_Z;
+}
+
+/* 74 79: 0111 0100 0111 1001 xxxx xxxx */
+static void EQI_A_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = A - imm;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 74 7a: 0111 0100 0111 1010 xxxx xxxx */
+static void EQI_B_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = B - imm;
+ ZHC_SUB( tmp, B, 0 );
+ SKIP_Z;
+}
+
+/* 74 7b: 0111 0100 0111 1011 xxxx xxxx */
+static void EQI_C_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = C - imm;
+ ZHC_SUB( tmp, C, 0 );
+ SKIP_Z;
+}
+
+/* 74 7c: 0111 0100 0111 1100 xxxx xxxx */
+static void EQI_D_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = D - imm;
+ ZHC_SUB( tmp, D, 0 );
+ SKIP_Z;
+}
+
+/* 74 7d: 0111 0100 0111 1101 xxxx xxxx */
+static void EQI_E_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = E - imm;
+ ZHC_SUB( tmp, E, 0 );
+ SKIP_Z;
+}
+
+/* 74 7e: 0111 0100 0111 1110 xxxx xxxx */
+static void EQI_H_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = H - imm;
+ ZHC_SUB( tmp, H, 0 );
+ SKIP_Z;
+}
+
+/* 74 7f: 0111 0100 0111 1111 xxxx xxxx */
+static void EQI_L_xx(void)
+{
+ UINT8 tmp, imm;
+
+ RDOPARG( imm );
+ tmp = L - imm;
+ ZHC_SUB( tmp, L, 0 );
+ SKIP_Z;
+}
+
+/* 74 88: 0111 0100 1000 1000 oooo oooo */
+static void ANAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ RDOPARG( ea.b.l );
+
+ A &= RM( ea.d );
+ SET_Z(A);
+}
+
+/* 74 8d: 0111 0100 1000 1101 */
+static void DAN_EA_BC(void)
+{
+ EA &= BC;
+ SET_Z(EA);
+}
+
+/* 74 8e: 0111 0100 1000 1110 */
+static void DAN_EA_DE(void)
+{
+ EA &= DE;
+ SET_Z(EA);
+}
+
+/* 74 8f: 0111 0100 1000 1111 */
+static void DAN_EA_HL(void)
+{
+ EA &= HL;
+ SET_Z(EA);
+}
+
+/* 74 90: 0111 0100 1001 0000 oooo oooo */
+static void XRAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ RDOPARG( ea.b.l );
+
+ A ^= RM( ea.d );
+ SET_Z(A);
+}
+
+/* 74 95: 0111 0100 1001 0101 */
+static void DXR_EA_BC(void)
+{
+ EA ^= BC;
+ SET_Z(EA);
+}
+
+/* 74 96: 0111 0100 1001 0110 */
+static void DXR_EA_DE(void)
+{
+ EA ^= DE;
+ SET_Z(EA);
+}
+
+/* 74 97: 0111 0100 1001 0111 */
+static void DXR_EA_HL(void)
+{
+ EA ^= HL;
+ SET_Z(EA);
+}
+
+/* 74 98: 0111 0100 1001 1000 oooo oooo */
+static void ORAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ RDOPARG( ea.b.l );
+
+ A |= RM( ea.d );
+ SET_Z(A);
+}
+
+/* 74 9d: 0111 0100 1001 1101 */
+static void DOR_EA_BC(void)
+{
+ EA |= BC;
+ SET_Z(EA);
+}
+
+/* 74 9e: 0111 0100 1001 1110 */
+static void DOR_EA_DE(void)
+{
+ EA |= DE;
+ SET_Z(EA);
+}
+
+/* 74 9f: 0111 0100 1001 1111 */
+static void DOR_EA_HL(void)
+{
+ EA |= HL;
+ SET_Z(EA);
+}
+
+/* 74 a0: 0111 0100 1010 0000 oooo oooo */
+static void ADDNCW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+
+ tmp = A + RM( ea.d );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 74 a5: 0111 0100 1010 0101 */
+static void DADDNC_EA_BC(void)
+{
+ UINT16 tmp = EA + BC;
+
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+ SKIP_NC;
+}
+
+/* 74 a6: 0111 0100 1010 0110 */
+static void DADDNC_EA_DE(void)
+{
+ UINT16 tmp = EA + DE;
+
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+ SKIP_NC;
+}
+
+/* 74 a7: 0111 0100 1010 0111 */
+static void DADDNC_EA_HL(void)
+{
+ UINT16 tmp = EA + HL;
+
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+ SKIP_NC;
+}
+
+/* 74 a8: 0111 0100 1010 1000 oooo oooo */
+static void GTAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT16 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A - RM( ea.d ) - 1;
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NC;
+}
+
+/* 74 ad: 0111 0100 1010 1101 */
+static void DGT_EA_BC(void)
+{
+ UINT32 tmp = EA - BC - 1;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_NC;
+}
+
+/* 74 ae: 0111 0100 1010 1110 */
+static void DGT_EA_DE(void)
+{
+ UINT32 tmp = EA - DE - 1;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_NC;
+}
+
+/* 74 af: 0111 0100 1010 1111 */
+static void DGT_EA_HL(void)
+{
+ UINT32 tmp = EA - HL - 1;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_NC;
+}
+
+/* 74 b0: 0111 0100 1011 0000 oooo oooo */
+static void SUBNBW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A - RM( ea.d );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_NC;
+}
+
+/* 74 b5: 0111 0100 1011 0101 */
+static void DSUBNB_EA_BC(void)
+{
+ UINT16 tmp = EA - BC;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+ SKIP_NC;
+}
+
+/* 74 b6: 0111 0100 1011 0110 */
+static void DSUBNB_EA_DE(void)
+{
+ UINT16 tmp = EA - DE;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+ SKIP_NC;
+}
+
+/* 74 b7: 0111 0100 1011 0111 */
+static void DSUBNB_EA_HL(void)
+{
+ UINT16 tmp;
+
+ tmp = EA - HL;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+ SKIP_NC;
+}
+
+/* 74 b8: 0111 0100 1011 1000 oooo oooo */
+static void LTAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A - RM( ea.d );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_CY;
+}
+
+/* 74 bd: 0111 0100 1011 1101 */
+static void DLT_EA_BC(void)
+{
+ UINT16 tmp = EA - BC;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_CY;
+}
+
+/* 74 be: 0111 0100 1011 1110 */
+static void DLT_EA_DE(void)
+{
+ UINT16 tmp = EA - DE;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_CY;
+}
+
+/* 74 bf: 0111 0100 1011 1111 */
+static void DLT_EA_HL(void)
+{
+ UINT16 tmp = EA - HL;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_CY;
+}
+
+/* 74 c0: 0111 0100 1100 0000 oooo oooo */
+static void ADDW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+ RDOPARG( ea.b.l );
+ tmp = A + RM( ea.d );
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 74 c5: 0111 0100 1100 0101 */
+static void DADD_EA_BC(void)
+{
+ UINT16 tmp = EA + BC;
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 74 c6: 0111 0100 1100 0110 */
+static void DADD_EA_DE(void)
+{
+ UINT16 tmp = EA + DE;
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 74 c7: 0111 0100 1100 0111 */
+static void DADD_EA_HL(void)
+{
+ UINT16 tmp = EA + HL;
+ ZHC_ADD( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 74 c8: 0111 0100 1100 1000 oooo oooo */
+static void ONAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ RDOPARG( ea.b.l );
+
+ if (A & RM( ea.d ))
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 74 cd: 0111 0100 1100 1101 */
+static void DON_EA_BC(void)
+{
+ if (EA & BC)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 74 ce: 0111 0100 1100 1110 */
+static void DON_EA_DE(void)
+{
+ if (EA & DE)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 74 cf: 0111 0100 1100 1111 */
+static void DON_EA_HL(void)
+{
+ if (EA & HL)
+ PSW = (PSW & ~Z) | SK;
+ else
+ PSW |= Z;
+}
+
+/* 74 d0: 0111 0100 1101 0000 oooo oooo */
+static void ADCW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A + RM( ea.d ) + (PSW & CY);
+ ZHC_ADD( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 74 d5: 0111 0100 1101 0101 */
+static void DADC_EA_BC(void)
+{
+ UINT16 tmp = EA + BC + (PSW & CY);
+ ZHC_ADD( tmp, EA, (PSW & CY) );
+ EA = tmp;
+}
+
+/* 74 d6: 0111 0100 1101 0110 */
+static void DADC_EA_DE(void)
+{
+ UINT16 tmp = EA + DE + (PSW & CY);
+ ZHC_ADD( tmp, EA, (PSW & CY) );
+ EA = tmp;
+}
+
+/* 74 d7: 0111 0100 1101 0111 */
+static void DADC_EA_HL(void)
+{
+ UINT16 tmp = EA + HL + (PSW & CY);
+ ZHC_ADD( tmp, EA, (PSW & CY) );
+ EA = tmp;
+}
+
+/* 74 d8: 0111 0100 1101 1000 oooo oooo */
+static void OFFAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ RDOPARG( ea.b.l );
+
+ if ( A & RM( ea.d ) )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 74 dd: 0111 0100 1101 1101 */
+static void DOFF_EA_BC(void)
+{
+ if ( EA & BC )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 74 de: 0111 0100 1101 1110 */
+static void DOFF_EA_DE(void)
+{
+ if ( EA & DE )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 74 df: 0111 0100 1101 1111 */
+static void DOFF_EA_HL(void)
+{
+ if ( EA & HL )
+ PSW &= ~Z;
+ else
+ PSW = PSW | Z | SK;
+}
+
+/* 74 e0: 0111 0100 1110 0000 oooo oooo */
+static void SUBW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A - RM( ea.d );
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+}
+
+/* 74 e5: 0111 0100 1110 0101 */
+static void DSUB_EA_BC(void)
+{
+ UINT16 tmp = EA - BC;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 74 e6: 0111 0100 1110 0110 */
+static void DSUB_EA_DE(void)
+{
+ UINT16 tmp = EA - DE;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 74 e7: 0111 0100 1110 0111 */
+static void DSUB_EA_HL(void)
+{
+ UINT16 tmp = EA - HL;
+ ZHC_SUB( tmp, EA, 0 );
+ EA = tmp;
+}
+
+/* 74 e8: 0111 0100 1110 1000 oooo oooo */
+static void NEAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A - RM( ea.d );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_NZ;
+}
+
+/* 74 ed: 0111 0100 1110 1101 */
+static void DNE_EA_BC(void)
+{
+ UINT16 tmp;
+
+ tmp = EA - BC;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_NZ;
+}
+
+/* 74 ee: 0111 0100 1110 1110 */
+static void DNE_EA_DE(void)
+{
+ UINT16 tmp;
+
+ tmp = EA - DE;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_NZ;
+}
+
+/* 74 ef: 0111 0100 1110 1111 */
+static void DNE_EA_HL(void)
+{
+ UINT16 tmp;
+
+ tmp = EA - HL;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_NZ;
+}
+
+/* 74 f0: 0111 0100 1111 0000 oooo oooo */
+static void SBBW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A - RM( ea.d ) - (PSW & CY);
+ ZHC_SUB( tmp, A, (PSW & CY) );
+ A = tmp;
+}
+
+/* 74 f5: 0111 0100 1111 0101 */
+static void DSBB_EA_BC(void)
+{
+ UINT16 tmp = EA - BC - (PSW & CY);
+ ZHC_SUB( tmp, EA, (PSW & CY) );
+ EA = tmp;
+}
+
+/* 74 f6: 0111 0100 1111 0110 */
+static void DSBB_EA_DE(void)
+{
+ UINT16 tmp = EA - DE - (PSW & CY);
+ ZHC_SUB( tmp, EA, (PSW & CY) );
+ EA = tmp;
+}
+
+/* 74 f7: 0111 0100 1111 0111 */
+static void DSBB_EA_HL(void)
+{
+ UINT16 tmp = EA - HL - (PSW & CY);
+ ZHC_SUB( tmp, EA, (PSW & CY) );
+ EA = tmp;
+}
+
+/* 74 f8: 0111 0100 1111 1000 oooo oooo */
+static void EQAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp;
+
+ RDOPARG( ea.b.l );
+ tmp = A - RM( ea.d );
+ ZHC_SUB( tmp, A, 0 );
+ SKIP_Z;
+}
+
+/* 74 fd: 0111 0100 1111 1101 */
+static void DEQ_EA_BC(void)
+{
+ UINT16 tmp;
+
+ tmp = EA - BC;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_Z;
+}
+
+/* 74 fe: 0111 0100 1111 1110 */
+static void DEQ_EA_DE(void)
+{
+ UINT16 tmp;
+
+ tmp = EA - DE;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_Z;
+}
+
+/* 74 ff: 0111 0100 1111 1111 */
+static void DEQ_EA_HL(void)
+{
+ UINT16 tmp;
+
+ tmp = EA - HL;
+ ZHC_SUB( tmp, EA, 0 );
+ SKIP_Z;
+}
+
+/************************************************
+ * main opcodes
+ ************************************************/
+
+/* 00: 0000 0000 */
+static void NOP(void)
+{
+}
+
+/* 01: 0000 0001 oooo oooo */
+static void LDAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ A = RM( ea.d );
+}
+
+/* 02: 0000 0010 */
+static void INX_SP(void)
+{
+ SP++;
+}
+
+/* 03: 0000 0011 */
+static void DCX_SP(void)
+{
+ SP--;
+}
+
+/* 04: 0000 0100 llll llll hhhh hhhh */
+static void LXI_S_w(void)
+{
+ RDOPARG( SPL );
+ RDOPARG( SPH );
+}
+
+/* 05: 0000 0101 oooo oooo xxxx xxxx */
+static void ANIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 m, imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+ m = RM( ea.d );
+ m &= imm;
+ WM( ea.d, m );
+ SET_Z(m);
+}
+
+/* 07: 0000 0111 xxxx xxxx */
+/* ANI_A_xx already defined (long form) */
+
+/* 08: 0000 1000 */
+static void MOV_A_EAH(void)
+{
+ A = EAH;
+}
+
+/* 09: 0000 1001 */
+static void MOV_A_EAL(void)
+{
+ A = EAL;
+}
+
+/* 0a: 0000 1010 */
+static void MOV_A_B(void)
+{
+ A = B;
+}
+
+/* 0b: 0000 1011 */
+static void MOV_A_C(void)
+{
+ A = C;
+}
+
+/* 0c: 0000 1100 */
+static void MOV_A_D(void)
+{
+ A = D;
+}
+
+/* 0d: 0000 1101 */
+static void MOV_A_E(void)
+{
+ A = E;
+}
+
+/* 0e: 0000 1110 */
+static void MOV_A_H(void)
+{
+ A = H;
+}
+
+/* 0f: 0000 1111 */
+static void MOV_A_L(void)
+{
+ A = L;
+}
+
+/* 10: 0001 0000 */
+static void EXA(void)
+{
+ UINT16 tmp;
+ tmp = EA; EA = EA2; EA2 = tmp;
+ tmp = VA; VA = VA2; VA2 = tmp;
+}
+
+/* 11: 0001 0001 */
+static void EXX(void)
+{
+ UINT16 tmp;
+ tmp = BC; BC = BC2; BC2 = tmp;
+ tmp = DE; DE = DE2; DE2 = tmp;
+ tmp = HL; HL = HL2; HL2 = tmp;
+}
+
+/* 48 AD (7807 only) */
+static void EXR(void)
+{
+ UINT16 tmp;
+ tmp = BC; BC = BC2; BC2 = tmp;
+ tmp = DE; DE = DE2; DE2 = tmp;
+ tmp = HL; HL = HL2; HL2 = tmp;
+ tmp = EA; EA = EA2; EA2 = tmp;
+ tmp = VA; VA = VA2; VA2 = tmp;
+}
+
+/* 12: 0001 0010 */
+static void INX_BC(void)
+{
+ BC++;
+}
+
+/* 13: 0001 0011 */
+static void DCX_BC(void)
+{
+ BC--;
+}
+
+/* 14: 0001 0100 llll llll hhhh hhhh */
+static void LXI_B_w(void)
+{
+ RDOPARG( C );
+ RDOPARG( B );
+}
+
+/* 15: 0001 0101 oooo oooo xxxx xxxx */
+static void ORIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 m, imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+ m = RM( ea.d );
+ m |= imm;
+ WM( ea.d, m );
+ SET_Z(m);
+}
+
+/* 16: 0001 0110 xxxx xxxx */
+/* XRI_A_xx already defined (long form) */
+
+/* 17: 0001 0111 xxxx xxxx */
+/* ORI_A_xx already defined (long form) */
+
+/* 18: 0001 1000 */
+static void MOV_EAH_A(void)
+{
+ EAH = A;
+}
+
+/* 19: 0001 1001 */
+static void MOV_EAL_A(void)
+{
+ EAL = A;
+}
+
+/* 1a: 0001 1010 */
+static void MOV_B_A(void)
+{
+ B = A;
+}
+
+/* 1b: 0001 1011 */
+static void MOV_C_A(void)
+{
+ C = A;
+}
+
+/* 1c: 0001 1100 */
+static void MOV_D_A(void)
+{
+ D = A;
+}
+
+/* 1d: 0001 1101 */
+static void MOV_E_A(void)
+{
+ E = A;
+}
+
+/* 1e: 0001 1110 */
+static void MOV_H_A(void)
+{
+ H = A;
+}
+
+/* 1f: 0001 1111 */
+static void MOV_L_A(void)
+{
+ L = A;
+}
+
+/* 20: 0010 0000 oooo oooo */
+static void INRW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp, m;
+
+ RDOPARG( ea.b.l );
+ m = RM( ea.d );
+ tmp = m + 1;
+ ZHC_ADD( tmp, m, 0 );
+ WM( ea.d, tmp );
+ SKIP_CY;
+}
+
+/* 21: 0010 0001 */
+static void JB(void)
+{
+ PC = BC;
+ change_pc( PCD );
+}
+
+/* 22: 0010 0010 */
+static void INX_DE(void)
+{
+ DE++;
+}
+
+/* 23: 0010 0011 */
+static void DCX_DE(void)
+{
+ DE--;
+}
+
+/* 24: 0010 0100 llll llll hhhh hhhh */
+static void LXI_D_w(void)
+{
+ RDOPARG( E );
+ RDOPARG( D );
+}
+
+/* 25: 0010 0101 oooo oooo xxxx xxxx */
+static void GTIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 m, imm;
+ UINT16 tmp;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+ m = RM( ea.d );
+ tmp = m - imm - 1;
+ ZHC_SUB( tmp, m, 0 );
+ SKIP_NC;
+}
+
+/* 26: 0010 0110 xxxx xxxx */
+/* ADINC_A_xx already defined (long form) */
+
+/* 27: 0010 0111 xxxx xxxx */
+/* GTI_A_xx already defined (long form) */
+
+/* 29: 0010 1001 */
+static void LDAX_B(void)
+{
+ A = RM( BC );
+}
+
+/* 2a: 0010 1010 */
+static void LDAX_D(void)
+{
+ A = RM( DE );
+}
+
+/* 2b: 0010 1011 */
+static void LDAX_H(void)
+{
+ A = RM( HL );
+}
+
+/* 2c: 0010 1100 */
+static void LDAX_Dp(void)
+{
+ A = RM( DE );
+ DE++;
+}
+
+/* 2d: 0010 1101 dddd dddd */
+static void LDAX_Hp(void)
+{
+ A = RM( HL );
+ HL++;
+}
+
+/* 2e: 0010 1110 dddd dddd */
+static void LDAX_Dm(void)
+{
+ A = RM( DE );
+ DE--;
+}
+
+/* 2f: 0010 1111 dddd dddd */
+static void LDAX_Hm(void)
+{
+ A = RM( HL );
+ HL--;
+}
+
+/* 30: 0011 0000 oooo oooo */
+static void DCRW_wa(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp, m;
+
+ RDOPARG( ea.b.l );
+ m = RM( ea.d );
+ tmp = m - 1;
+ ZHC_SUB( tmp, m, 0 );
+ WM( ea.d, tmp );
+ SKIP_CY;
+}
+
+/* 31: 0011 0001 */
+static void BLOCK(void)
+{
+ WM( DE, RM( HL ) );
+ DE++;
+ HL++;
+ C--;
+ if (C == 0xff)
+ PSW |= CY;
+ else
+ {
+ PSW &= ~CY;
+ PC--;
+ }
+}
+
+/* 32: 0011 0010 */
+static void INX_HL(void)
+{
+ HL++;
+}
+
+/* 33: 0011 0011 */
+static void DCX_HL(void)
+{
+ HL--;
+}
+
+/* 34: 0011 0100 llll llll hhhh hhhh */
+static void LXI_H_w(void)
+{
+ if (PSW & L0) { /* overlay active? */
+ PC+=2;
+ return;
+ }
+ RDOPARG( L );
+ RDOPARG( H );
+ PSW |= L0;
+}
+
+/* 35: 0011 0101 oooo oooo xxxx xxxx */
+static void LTIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp, m, imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+ m = RM( ea.d );
+ tmp = m - imm;
+ ZHC_SUB( tmp, m, 0 );
+ SKIP_CY;
+}
+
+/* 36: 0011 0110 xxxx xxxx */
+/* SUINB_A_xx already defined (long form) */
+
+/* 37: 0011 0111 xxxx xxxx */
+/* LTI_A_xx already defined (long form) */
+
+/* 39: 0011 1001 */
+static void STAX_B(void)
+{
+ WM( BC, A );
+}
+
+/* 3a: 0011 1010 */
+static void STAX_D(void)
+{
+ WM( DE, A );
+}
+
+/* 3b: 0011 1011 */
+static void STAX_H(void)
+{
+ WM( HL, A );
+}
+
+/* 3c: 0011 1100 */
+static void STAX_Dp(void)
+{
+ WM( DE, A );
+ DE++;
+}
+
+/* 3d: 0011 1101 */
+static void STAX_Hp(void)
+{
+ WM( HL, A );
+ HL++;
+}
+
+/* 3e: 0011 1110 */
+static void STAX_Dm(void)
+{
+ WM( DE, A );
+ DE--;
+}
+
+/* 3f: 0011 1111 */
+static void STAX_Hm(void)
+{
+ WM( HL, A );
+ HL--;
+}
+
+/* 40: 0100 0000 llll llll hhhh hhhh */
+static void CALL_w(void)
+{
+ PAIR w;
+ w.d = 0;
+
+ RDOPARG( w.b.l );
+ RDOPARG( w.b.h );
+
+ SP--;
+ WM( SPD, PCH );
+ SP--;
+ WM( SPD, PCL );
+
+ PC = w.w.l;
+ change_pc( PCD );
+}
+
+/* 41: 0100 0001 */
+static void INR_A(void)
+{
+ UINT8 tmp = A + 1;
+ ZHC_ADD( tmp, A, 0 );
+ A = tmp;
+ SKIP_CY;
+}
+
+/* 42: 0100 0010 */
+static void INR_B(void)
+{
+ UINT8 tmp = B + 1;
+ ZHC_ADD( tmp, B, 0 );
+ B = tmp;
+ SKIP_CY;
+}
+
+/* 43: 0100 0011 */
+static void INR_C(void)
+{
+ UINT8 tmp = C + 1;
+ ZHC_ADD( tmp, C, 0 );
+ C = tmp;
+ SKIP_CY;
+}
+
+/* 44: 0100 0100 llll llll hhhh hhhh */
+static void LXI_EA_s(void)
+{
+ RDOPARG( EAL );
+ RDOPARG( EAH );
+}
+
+/* 45: 0100 0101 oooo oooo xxxx xxxx */
+static void ONIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+
+ if (RM( ea.d ) & imm)
+ PSW |= SK;
+}
+
+/* 46: 0100 0110 xxxx xxxx */
+/* ADI_A_xx already defined (long form) */
+
+/* 47: 0100 0111 xxxx xxxx */
+/* ONI_A_xx already defined (long form) */
+
+/* 48: prefix */
+static void PRE_48(void)
+{
+ RDOP(OP2);
+ upd7810_icount -= op48[OP2].cycles;
+ upd7810_timers(op48[OP2].cycles);
+ (*op48[OP2].opfunc)();
+}
+
+/* 49: 0100 1001 xxxx xxxx */
+static void MVIX_BC_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WM( BC, imm );
+}
+
+/* 4a: 0100 1010 xxxx xxxx */
+static void MVIX_DE_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WM( DE, imm );
+}
+
+/* 4b: 0100 1011 xxxx xxxx */
+static void MVIX_HL_xx(void)
+{
+ UINT8 imm;
+ RDOPARG( imm );
+ WM( HL, imm );
+}
+
+/* 4c: prefix */
+static void PRE_4C(void)
+{
+ RDOP(OP2);
+ upd7810_icount -= op4C[OP2].cycles;
+ upd7810_timers(op4C[OP2].cycles);
+ (*op4C[OP2].opfunc)();
+}
+
+/* 4d: prefix */
+static void PRE_4D(void)
+{
+ RDOP(OP2);
+ upd7810_icount -= op4D[OP2].cycles;
+ upd7810_timers(op4D[OP2].cycles);
+ (*op4D[OP2].opfunc)();
+}
+
+/* 4e: 0100 111d dddd dddd */
+static void JRE(void)
+{
+ UINT8 offs;
+ RDOPARG( offs );
+ if (OP & 0x01)
+ PC -= 256 - offs;
+ else
+ PC += offs;
+ change_pc( PCD );
+}
+
+/* 50: 0101 0000 */
+static void EXH(void)
+{
+ UINT16 tmp;
+ tmp = HL; HL = HL2; HL2 = tmp;
+}
+
+/* 51: 0101 0001 */
+static void DCR_A(void)
+{
+ UINT8 tmp = A - 1;
+ ZHC_SUB( tmp, A, 0 );
+ A = tmp;
+ SKIP_CY;
+}
+
+/* 52: 0101 0010 */
+static void DCR_B(void)
+{
+ UINT8 tmp = B - 1;
+ ZHC_SUB( tmp, B, 0 );
+ B = tmp;
+ SKIP_CY;
+}
+
+/* 53: 0101 0011 */
+static void DCR_C(void)
+{
+ UINT8 tmp = C - 1;
+ ZHC_SUB( tmp, C, 0 );
+ C = tmp;
+ SKIP_CY;
+}
+
+/* 54: 0101 0100 llll llll hhhh hhhh */
+static void JMP_w(void)
+{
+ PAIR w;
+ w.d = 0;
+
+ RDOPARG( w.b.l );
+ RDOPARG( w.b.h );
+
+ PCD = w.d;
+ change_pc( PCD );
+}
+
+/* 55: 0101 0101 oooo oooo xxxx xxxx */
+static void OFFIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+
+ if (0 == (RM( ea.d ) & imm))
+ PSW |= SK;
+}
+
+/* 56: 0101 0110 xxxx xxxx */
+/* ACI_A_xx already defined (long form) */
+
+/* 57: 0101 0111 xxxx xxxx */
+/* OFFI_A_xx already defined (long form) */
+
+/* 58: 0101 1000 oooo oooo (7810 only) */
+static void BIT_0_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x01)
+ PSW |= SK;
+}
+
+/* 59: 0101 1001 oooo oooo (7810 only) */
+static void BIT_1_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x02)
+ PSW |= SK;
+}
+
+/* 5a: 0101 1010 oooo oooo (7810 only) */
+static void BIT_2_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x04)
+ PSW |= SK;
+}
+
+/* 5b: 0101 1011 oooo oooo (7810 only) */
+static void BIT_3_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x08)
+ PSW |= SK;
+}
+
+/* 5c: 0101 1100 oooo oooo (7810 only) */
+static void BIT_4_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x10)
+ PSW |= SK;
+}
+
+/* 5d: 0101 1101 oooo oooo (7810 only) */
+static void BIT_5_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x20)
+ PSW |= SK;
+}
+
+/* 5e: 0101 1110 oooo oooo (7810 only) */
+static void BIT_6_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x40)
+ PSW |= SK;
+}
+
+/* 5f: 0101 1111 oooo oooo (7810 only) */
+static void BIT_7_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ if (RM( ea.d ) & 0x80)
+ PSW |= SK;
+}
+
+/* 5d: 0101 1111 bbbb bbbb (7807 only) */
+static void SKN_bit(void)
+{
+ UINT8 imm;
+ int val;
+
+ RDOPARG( imm );
+
+ switch( imm & 0x1f )
+ {
+ case 0x10: /* PA */
+ val = RP( UPD7810_PORTA );
+ break;
+ case 0x11: /* PB */
+ val = RP( UPD7810_PORTB );
+ break;
+ case 0x12: /* PC */
+ val = RP( UPD7810_PORTC );
+ break;
+ case 0x13: /* PD */
+ val = RP( UPD7810_PORTD );
+ break;
+ case 0x15: /* PF */
+ val = RP( UPD7810_PORTF );
+ break;
+ case 0x16: /* MKH */
+ val = MKH;
+ break;
+ case 0x17: /* MKL */
+ val = MKL;
+ break;
+ case 0x19: /* SMH */
+ val = SMH;
+ break;
+ case 0x1b: /* EOM */
+ val = EOM;
+ break;
+ case 0x1d: /* TMM */
+ val = TMM;
+ break;
+ case 0x1e: /* PT */
+ val = RP( UPD7807_PORTT );
+ break;
+ default:
+ logerror("uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
+ val = 0;
+ break;
+ }
+
+ if (~val & (1 << (imm >> 5)))
+ PSW |= SK;
+}
+
+/* 58: 0101 1000 bbbb bbbb (7807 only) */
+static void SETB(void)
+{
+ UINT8 imm;
+ int bit;
+
+ RDOPARG( imm );
+ bit = imm >> 5;
+
+ switch( imm & 0x1f )
+ {
+ case 0x10: /* PA */
+ WP( UPD7810_PORTA, RP( UPD7810_PORTA ) | (1 << bit));
+ break;
+ case 0x11: /* PB */
+ WP( UPD7810_PORTB, RP( UPD7810_PORTB ) | (1 << bit));
+ break;
+ case 0x12: /* PC */
+ WP( UPD7810_PORTC, RP( UPD7810_PORTC ) | (1 << bit));
+ break;
+ case 0x13: /* PD */
+ WP( UPD7810_PORTD, RP( UPD7810_PORTD ) | (1 << bit));
+ break;
+ case 0x15: /* PF */
+ WP( UPD7810_PORTF, RP( UPD7810_PORTF ) | (1 << bit));
+ break;
+ case 0x16: /* MKH */
+ MKH |= (1 << bit);
+ break;
+ case 0x17: /* MKL */
+ MKL |= (1 << bit);
+ break;
+ case 0x19: /* SMH */
+ SMH |= (1 << bit);
+ break;
+ case 0x1b: /* EOM */
+ EOM |= (1 << bit);
+ break;
+ case 0x1d: /* TMM */
+ TMM |= (1 << bit);
+ break;
+// case 0x1e: /* PT */
+// PT is input only
+// break;
+ default:
+ logerror("uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
+ break;
+ }
+}
+
+/* 5b: 0101 1011 bbbb bbbb (7807 only) */
+static void CLR(void)
+{
+ UINT8 imm;
+ int bit;
+
+ RDOPARG( imm );
+ bit = imm >> 5;
+
+ switch( imm & 0x1f )
+ {
+ case 0x10: /* PA */
+ WP( UPD7810_PORTA, RP( UPD7810_PORTA ) & ~(1 << bit));
+ break;
+ case 0x11: /* PB */
+ WP( UPD7810_PORTB, RP( UPD7810_PORTB ) & ~(1 << bit));
+ break;
+ case 0x12: /* PC */
+ WP( UPD7810_PORTC, RP( UPD7810_PORTC ) & ~(1 << bit));
+ break;
+ case 0x13: /* PD */
+ WP( UPD7810_PORTD, RP( UPD7810_PORTD ) & ~(1 << bit));
+ break;
+ case 0x15: /* PF */
+ WP( UPD7810_PORTF, RP( UPD7810_PORTF ) & ~(1 << bit));
+ break;
+ case 0x16: /* MKH */
+ MKH &= ~(1 << bit);
+ break;
+ case 0x17: /* MKL */
+ MKL &= ~(1 << bit);
+ break;
+ case 0x19: /* SMH */
+ SMH &= ~(1 << bit);
+ break;
+ case 0x1b: /* EOM */
+ EOM &= ~(1 << bit);
+ break;
+ case 0x1d: /* TMM */
+ TMM &= ~(1 << bit);
+ break;
+// case 0x1e: /* PT */
+// PT is input only
+// break;
+ default:
+ logerror("uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
+ break;
+ }
+}
+
+/* 5d: 0101 1111 bbbb bbbb (7807 only) */
+static void SK_bit(void)
+{
+ UINT8 imm;
+ int val;
+
+ RDOPARG( imm );
+
+ switch( imm & 0x1f )
+ {
+ case 0x10: /* PA */
+ val = RP( UPD7810_PORTA );
+ break;
+ case 0x11: /* PB */
+ val = RP( UPD7810_PORTB );
+ break;
+ case 0x12: /* PC */
+ val = RP( UPD7810_PORTC );
+ break;
+ case 0x13: /* PD */
+ val = RP( UPD7810_PORTD );
+ break;
+ case 0x15: /* PF */
+ val = RP( UPD7810_PORTF );
+ break;
+ case 0x16: /* MKH */
+ val = MKH;
+ break;
+ case 0x17: /* MKL */
+ val = MKL;
+ break;
+ case 0x19: /* SMH */
+ val = SMH;
+ break;
+ case 0x1b: /* EOM */
+ val = EOM;
+ break;
+ case 0x1d: /* TMM */
+ val = TMM;
+ break;
+ case 0x1e: /* PT */
+ val = RP( UPD7807_PORTT );
+ break;
+ default:
+ logerror("uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
+ val = 0;
+ break;
+ }
+
+ if (val & (1 << (imm >> 5)))
+ PSW |= SK;
+}
+
+/* 60:*/
+static void PRE_60(void)
+{
+ RDOP(OP2);
+ upd7810_icount -= op60[OP2].cycles;
+ upd7810_timers(op60[OP2].cycles);
+ (*op60[OP2].opfunc)();
+}
+
+/* 61: 0110 0001 */
+static void DAA(void)
+{
+ UINT8 l = A & 0x0f, h = A >> 4, tmp, adj = 0x00;
+ if (0 == (PSW & HC))
+ {
+ if (l < 10)
+ {
+ if (!(h < 10 && 0 == (PSW & CY)))
+ adj = 0x60;
+ }
+ else
+ {
+ if (h < 9 && 0 == (PSW & CY))
+ adj = 0x06;
+ else
+ adj = 0x66;
+ }
+ }
+ else
+ if (l < 3)
+ {
+ if (h < 10 && 0 == (PSW & CY))
+ adj = 0x06;
+ else
+ adj = 0x66;
+ }
+ tmp = A + adj;
+ ZHC_ADD( tmp, A, PSW & CY );
+ A = tmp;
+}
+
+/* 62: 0110 0010 */
+static void RETI(void)
+{
+ PCL = RM( SPD );
+ SP++;
+ PCH = RM( SPD );
+ SP++;
+ PSW = RM( SPD );
+ SP++;
+ change_pc( PCD );
+}
+
+/* 63: 0110 0011 oooo oooo */
+static void STAW_wa(void)
+{
+ PAIR ea = upd7810.va;
+
+ RDOPARG( ea.b.l );
+
+ WM( ea.d, A );
+}
+
+/* 64: prefix */
+static void PRE_64(void)
+{
+ RDOP(OP2);
+ upd7810_icount -= op64[OP2].cycles;
+ upd7810_timers(op64[OP2].cycles);
+ (*op64[OP2].opfunc)();
+}
+
+/* 65: 0110 0101 oooo oooo xxxx xxxx */
+static void NEIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp, m, imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+ m = RM( ea.d );
+ tmp = m - imm;
+ ZHC_SUB( tmp, m, 0 );
+ SKIP_NZ;
+}
+
+/* 66: 0110 0110 xxxx xxxx */
+/* SUI_A_xx already defined (long form) */
+
+/* 67: 0110 0111 xxxx xxxx */
+/* NEI_A_xx already defined (long form) */
+
+/* 68: 0110 1000 xxxx xxxx */
+static void MVI_V_xx(void)
+{
+ RDOPARG( V );
+}
+
+/* 69: 0110 1001 xxxx xxxx */
+static void MVI_A_xx(void)
+{
+ if (PSW & L1) { /* overlay active? */
+ PC++;
+ return; /* NOP */
+ }
+ RDOPARG( A );
+ PSW |= L1;
+}
+
+/* 6a: 0110 1010 xxxx xxxx */
+static void MVI_B_xx(void)
+{
+ RDOPARG( B );
+}
+
+/* 6b: 0110 1011 xxxx xxxx */
+static void MVI_C_xx(void)
+{
+ RDOPARG( C );
+}
+
+/* 6c: 0110 1100 xxxx xxxx */
+static void MVI_D_xx(void)
+{
+ RDOPARG( D );
+}
+
+/* 6d: 0110 1101 xxxx xxxx */
+static void MVI_E_xx(void)
+{
+ RDOPARG( E );
+}
+
+/* 6e: 0110 1110 xxxx xxxx */
+static void MVI_H_xx(void)
+{
+ RDOPARG( H );
+}
+
+/* 6f: 0110 1111 xxxx xxxx */
+static void MVI_L_xx(void)
+{
+ if (PSW & L0) { /* overlay active? */
+ PC++;
+ return; /* NOP */
+ }
+ RDOPARG( L );
+ PSW |= L0;
+}
+
+/* 70: prefix */
+static void PRE_70(void)
+{
+ RDOP(OP2);
+ upd7810_icount -= op70[OP2].cycles;
+ upd7810_timers(op70[OP2].cycles);
+ (*op70[OP2].opfunc)();
+}
+
+/* 71: 0111 0001 oooo oooo xxxx xxxx */
+static void MVIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+
+ WM( ea.d, imm );
+}
+
+/* 72: 0111 0010 */
+static void SOFTI(void)
+{
+ SP--;
+ WM( SPD, PSW );
+ SP--;
+ WM( SPD, PCH );
+ SP--;
+ WM( SPD, PCL );
+
+ PC = 0x0060;
+ change_pc( PCD );
+}
+
+/* 74: prefix */
+static void PRE_74(void)
+{
+ RDOP(OP2);
+ upd7810_icount -= op74[OP2].cycles;
+ upd7810_timers(op74[OP2].cycles);
+ (*op74[OP2].opfunc)();
+}
+
+/* 75: 0111 0101 oooo oooo xxxx xxxx */
+static void EQIW_wa_xx(void)
+{
+ PAIR ea = upd7810.va;
+ UINT8 tmp, m, imm;
+
+ RDOPARG( ea.b.l );
+ RDOPARG( imm );
+ m = RM( ea.d );
+ tmp = m - imm;
+ ZHC_SUB( tmp, m, 0 );
+ SKIP_Z;
+}
+
+/* 76: 0111 0110 xxxx xxxx */
+/* SBI_A_xx already defined (long form) */
+
+/* 77: 0111 0111 xxxx xxxx */
+/* EQI_A_xx already defined (long form) */
+
+/* 78: 0111 1ddd dddd dddd */
+static void CALF(void)
+{
+ PAIR w;
+ w.d = 0;
+
+ RDOPARG( w.b.l );
+ w.b.h = 0x08 + (OP & 0x07);
+
+ SP--;
+ WM( SPD, PCH );
+ SP--;
+ WM( SPD, PCL );
+
+ PCD = w.d;
+ change_pc( PCD );
+}
+
+/* 80: 100t tttt */
+static void CALT(void)
+{
+ PAIR w;
+ w.d = 0;
+
+ switch (upd7810.config.type) {
+ case TYPE_7810_GAMEMASTER:
+ logerror ("!!!!!!!%.4x calt %.2x game master table position not known\n",PPC, OP);
+ break;
+ default:
+ w.w.l = 0x80 + 2 * (OP & 0x1f);
+ }
+
+ if (upd7810.config.type!=TYPE_7810_GAMEMASTER) {
+ SP--;
+ WM( SPD, PCH );
+ SP--;
+ WM( SPD, PCL );
+
+ PCL=RM(w.w.l);
+ PCH=RM(w.w.l+1);
+
+ change_pc( PCD );
+ logerror ("!!!!!!!%.4x calt %.2x %.4x; game master table position not known\n",PPC, OP, PCD);
+ }
+}
+
+/* a0: 1010 0000 */
+static void POP_VA(void)
+{
+ A = RM( SPD );
+ SP++;
+ V = RM( SPD );
+ SP++;
+}
+
+/* a1: 1010 0001 */
+static void POP_BC(void)
+{
+ C = RM( SPD );
+ SP++;
+ B = RM( SPD );
+ SP++;
+}
+
+/* a2: 1010 0010 */
+static void POP_DE(void)
+{
+ E = RM( SPD );
+ SP++;
+ D = RM( SPD );
+ SP++;
+}
+
+/* a3: 1010 0011 */
+static void POP_HL(void)
+{
+ L = RM( SPD );
+ SP++;
+ H = RM( SPD );
+ SP++;
+}
+
+/* a4: 1010 0100 */
+static void POP_EA(void)
+{
+ EAL = RM( SPD );
+ SP++;
+ EAH = RM( SPD );
+ SP++;
+}
+
+/* a5: 1010 0101 */
+static void DMOV_EA_BC(void)
+{
+ EA = BC;
+}
+
+/* a6: 1010 0110 */
+static void DMOV_EA_DE(void)
+{
+ EA = DE;
+}
+
+/* a7: 1010 0111 */
+static void DMOV_EA_HL(void)
+{
+ EA = HL;
+}
+
+/* a8: 1010 1000 */
+static void INX_EA(void)
+{
+ EA++;
+}
+
+/* a9: 1010 1001 */
+static void DCX_EA(void)
+{
+ EA--;
+}
+
+/* aa: 1010 1010 */
+static void EI(void)
+{
+ IFF = 1;
+}
+
+/* ab: 1010 1011 dddd dddd */
+static void LDAX_D_xx(void)
+{
+ UINT16 ea;
+ RDOPARG( ea );
+ ea += DE;
+ A = RM( ea );
+}
+
+/* ac: 1010 1100 */
+static void LDAX_H_A(void)
+{
+ UINT16 ea;
+ ea = HL + A;
+ A = RM( ea );
+}
+
+/* ad: 1010 1101 */
+static void LDAX_H_B(void)
+{
+ UINT16 ea;
+ ea = HL + B;
+ A = RM( ea );
+}
+
+/* ae: 1010 1110 */
+static void LDAX_H_EA(void)
+{
+ UINT16 ea;
+ ea = HL + EA;
+ A = RM( ea );
+}
+
+/* af: 1010 1111 dddd dddd */
+static void LDAX_H_xx(void)
+{
+ UINT16 ea;
+ RDOPARG( ea );
+ ea += HL;
+ A = RM( ea );
+}
+
+/* b0: 1011 0000 */
+static void PUSH_VA(void)
+{
+ SP--;
+ WM( SPD, V );
+ SP--;
+ WM( SPD, A );
+}
+
+/* b1: 1011 0001 */
+static void PUSH_BC(void)
+{
+ SP--;
+ WM( SPD, B );
+ SP--;
+ WM( SPD, C );
+}
+
+/* b2: 1011 0010 */
+static void PUSH_DE(void)
+{
+ SP--;
+ WM( SPD, D );
+ SP--;
+ WM( SPD, E );
+}
+
+/* b3: 1011 0011 */
+static void PUSH_HL(void)
+{
+ SP--;
+ WM( SPD, H );
+ SP--;
+ WM( SPD, L );
+}
+
+/* b4: 1011 0100 */
+static void PUSH_EA(void)
+{
+ SP--;
+ WM( SPD, EAH );
+ SP--;
+ WM( SPD, EAL );
+}
+
+/* b5: 1011 0101 */
+static void DMOV_BC_EA(void)
+{
+ BC = EA;
+}
+
+/* b6: 1011 0110 */
+static void DMOV_DE_EA(void)
+{
+ DE = EA;
+}
+
+/* b7: 1011 0111 */
+static void DMOV_HL_EA(void)
+{
+ HL = EA;
+}
+
+/* b8: 1011 1000 */
+static void RET(void)
+{
+ PCL = RM( SPD );
+ SP++;
+ PCH = RM( SPD );
+ SP++;
+ change_pc( PCD );
+}
+
+/* b9: 1011 1001 */
+static void RETS(void)
+{
+ PCL = RM( SPD );
+ SP++;
+ PCH = RM( SPD );
+ SP++;
+ PSW|=SK; /* skip one instruction */
+ change_pc( PCD );
+}
+
+/* ba: 1011 1010 */
+static void DI(void)
+{
+ IFF = 0;
+}
+
+/* bb: 1011 1011 dddd dddd */
+static void STAX_D_xx(void)
+{
+ UINT16 ea;
+ RDOPARG(ea);
+ ea += DE;
+ WM( ea, A );
+}
+
+/* bc: 1011 1100 */
+static void STAX_H_A(void)
+{
+ UINT16 ea = A;
+ ea += HL;
+ WM( ea, A );
+}
+
+/* bd: 1011 1101 */
+static void STAX_H_B(void)
+{
+ UINT16 ea = B;
+ ea += HL;
+ WM( ea, A );
+}
+
+/* be: 1011 1110 */
+static void STAX_H_EA(void)
+{
+ UINT16 ea = EA;
+ ea += HL;
+ WM( ea, A );
+}
+
+/* bf: 1011 1111 dddd dddd */
+static void STAX_H_xx(void)
+{
+ UINT16 ea;
+ RDOPARG( ea );
+ ea += HL;
+ WM( ea, A );
+}
+
+/* c0: 11dd dddd */
+static void JR(void)
+{
+ INT8 offs = (INT8)(OP << 2) >> 2;
+ PC += offs;
+ change_pc(PCD);
+}
+
diff --git a/src/emu/cpu/upd7810/7810tbl.c b/src/emu/cpu/upd7810/7810tbl.c
new file mode 100644
index 00000000000..d6032fc8aed
--- /dev/null
+++ b/src/emu/cpu/upd7810/7810tbl.c
@@ -0,0 +1,3513 @@
+/*****************************************************************************
+ *
+ * Portable uPD7810/11, 7810H/11H, 78C10/C11/C14 emulator V0.2
+ * Copyright (c) 2001 Juergen Buchmueller, all rights reserved.
+ *
+ * 7810tbl.c - function pointer tables
+ *
+ *****************************************************************************/
+
+static void illegal(void);
+static void illegal2(void);
+
+static void ACI_ANM_xx(void);
+static void ACI_A_xx(void);
+static void ACI_B_xx(void);
+static void ACI_C_xx(void);
+static void ACI_D_xx(void);
+static void ACI_EOM_xx(void);
+static void ACI_E_xx(void);
+static void ACI_H_xx(void);
+static void ACI_L_xx(void);
+static void ACI_MKH_xx(void);
+static void ACI_MKL_xx(void);
+static void ACI_PA_xx(void);
+static void ACI_PB_xx(void);
+static void ACI_PC_xx(void);
+static void ACI_PD_xx(void);
+static void ACI_PF_xx(void);
+static void ACI_SMH_xx(void);
+static void ACI_TMM_xx(void);
+static void ACI_V_xx(void);
+static void ADCW_wa(void);
+static void ADCX_B(void);
+static void ADCX_D(void);
+static void ADCX_Dm(void);
+static void ADCX_Dp(void);
+static void ADCX_H(void);
+static void ADCX_Hm(void);
+static void ADCX_Hp(void);
+static void ADC_A_A(void);
+static void ADC_A_A(void);
+static void ADC_A_B(void);
+static void ADC_A_C(void);
+static void ADC_A_D(void);
+static void ADC_A_E(void);
+static void ADC_A_H(void);
+static void ADC_A_L(void);
+static void ADC_A_V(void);
+static void ADC_B_A(void);
+static void ADC_C_A(void);
+static void ADC_D_A(void);
+static void ADC_E_A(void);
+static void ADC_H_A(void);
+static void ADC_L_A(void);
+static void ADC_V_A(void);
+static void ADDNCW_wa(void);
+static void ADDNCX_B(void);
+static void ADDNCX_D(void);
+static void ADDNCX_Dm(void);
+static void ADDNCX_Dp(void);
+static void ADDNCX_H(void);
+static void ADDNCX_Hm(void);
+static void ADDNCX_Hp(void);
+static void ADDNC_A_A(void);
+static void ADDNC_A_A(void);
+static void ADDNC_A_B(void);
+static void ADDNC_A_C(void);
+static void ADDNC_A_D(void);
+static void ADDNC_A_E(void);
+static void ADDNC_A_H(void);
+static void ADDNC_A_L(void);
+static void ADDNC_A_V(void);
+static void ADDNC_B_A(void);
+static void ADDNC_C_A(void);
+static void ADDNC_D_A(void);
+static void ADDNC_E_A(void);
+static void ADDNC_H_A(void);
+static void ADDNC_L_A(void);
+static void ADDNC_V_A(void);
+static void ADDW_wa(void);
+static void ADDX_B(void);
+static void ADDX_D(void);
+static void ADDX_Dm(void);
+static void ADDX_Dp(void);
+static void ADDX_H(void);
+static void ADDX_Hm(void);
+static void ADDX_Hp(void);
+static void ADD_A_A(void);
+static void ADD_A_A(void);
+static void ADD_A_B(void);
+static void ADD_A_C(void);
+static void ADD_A_D(void);
+static void ADD_A_E(void);
+static void ADD_A_H(void);
+static void ADD_A_L(void);
+static void ADD_A_V(void);
+static void ADD_B_A(void);
+static void ADD_C_A(void);
+static void ADD_D_A(void);
+static void ADD_E_A(void);
+static void ADD_H_A(void);
+static void ADD_L_A(void);
+static void ADD_V_A(void);
+static void ADINC_ANM_xx(void);
+static void ADINC_A_xx(void);
+static void ADINC_A_xx(void);
+static void ADINC_B_xx(void);
+static void ADINC_C_xx(void);
+static void ADINC_D_xx(void);
+static void ADINC_EOM_xx(void);
+static void ADINC_E_xx(void);
+static void ADINC_H_xx(void);
+static void ADINC_L_xx(void);
+static void ADINC_MKH_xx(void);
+static void ADINC_MKL_xx(void);
+static void ADINC_PA_xx(void);
+static void ADINC_PB_xx(void);
+static void ADINC_PC_xx(void);
+static void ADINC_PD_xx(void);
+static void ADINC_PF_xx(void);
+static void ADINC_SMH_xx(void);
+static void ADINC_TMM_xx(void);
+static void ADINC_V_xx(void);
+static void ADI_ANM_xx(void);
+static void ADI_A_xx(void);
+static void ADI_A_xx(void);
+static void ADI_B_xx(void);
+static void ADI_C_xx(void);
+static void ADI_D_xx(void);
+static void ADI_EOM_xx(void);
+static void ADI_E_xx(void);
+static void ADI_H_xx(void);
+static void ADI_L_xx(void);
+static void ADI_MKH_xx(void);
+static void ADI_MKL_xx(void);
+static void ADI_PA_xx(void);
+static void ADI_PB_xx(void);
+static void ADI_PC_xx(void);
+static void ADI_PD_xx(void);
+static void ADI_PF_xx(void);
+static void ADI_SMH_xx(void);
+static void ADI_TMM_xx(void);
+static void ADI_V_xx(void);
+static void ANAW_wa(void);
+static void ANAX_B(void);
+static void ANAX_D(void);
+static void ANAX_Dm(void);
+static void ANAX_Dp(void);
+static void ANAX_H(void);
+static void ANAX_Hm(void);
+static void ANAX_Hp(void);
+static void ANA_A_A(void);
+static void ANA_A_A(void);
+static void ANA_A_B(void);
+static void ANA_A_C(void);
+static void ANA_A_D(void);
+static void ANA_A_E(void);
+static void ANA_A_H(void);
+static void ANA_A_L(void);
+static void ANA_A_V(void);
+static void ANA_B_A(void);
+static void ANA_C_A(void);
+static void ANA_D_A(void);
+static void ANA_E_A(void);
+static void ANA_H_A(void);
+static void ANA_L_A(void);
+static void ANA_V_A(void);
+static void ANIW_wa_xx(void);
+static void ANI_ANM_xx(void);
+static void ANI_A_xx(void);
+static void ANI_A_xx(void);
+static void ANI_B_xx(void);
+static void ANI_C_xx(void);
+static void ANI_D_xx(void);
+static void ANI_EOM_xx(void);
+static void ANI_E_xx(void);
+static void ANI_H_xx(void);
+static void ANI_L_xx(void);
+static void ANI_MKH_xx(void);
+static void ANI_MKL_xx(void);
+static void ANI_PA_xx(void);
+static void ANI_PB_xx(void);
+static void ANI_PC_xx(void);
+static void ANI_PD_xx(void);
+static void ANI_PF_xx(void);
+static void ANI_SMH_xx(void);
+static void ANI_TMM_xx(void);
+static void ANI_V_xx(void);
+static void BIT_0_wa(void);
+static void BIT_1_wa(void);
+static void BIT_2_wa(void);
+static void BIT_3_wa(void);
+static void BIT_4_wa(void);
+static void BIT_5_wa(void);
+static void BIT_6_wa(void);
+static void BIT_7_wa(void);
+static void BLOCK(void);
+static void CALB(void);
+static void CALF(void);
+static void CALL_w(void);
+static void CALT(void);
+static void CLC(void);
+static void CLR(void);
+static void DAA(void);
+static void DADC_EA_BC(void);
+static void DADC_EA_DE(void);
+static void DADC_EA_HL(void);
+static void DADDNC_EA_BC(void);
+static void DADDNC_EA_DE(void);
+static void DADDNC_EA_HL(void);
+static void DADD_EA_BC(void);
+static void DADD_EA_DE(void);
+static void DADD_EA_HL(void);
+static void DAN_EA_BC(void);
+static void DAN_EA_DE(void);
+static void DAN_EA_HL(void);
+static void DCRW_wa(void);
+static void DCR_A(void);
+static void DCR_B(void);
+static void DCR_C(void);
+static void DCX_BC(void);
+static void DCX_DE(void);
+static void DCX_EA(void);
+static void DCX_HL(void);
+static void DCX_SP(void);
+static void DEQ_EA_BC(void);
+static void DEQ_EA_DE(void);
+static void DEQ_EA_HL(void);
+static void DGT_EA_BC(void);
+static void DGT_EA_DE(void);
+static void DGT_EA_HL(void);
+static void DI(void);
+static void DIV_A(void);
+static void DIV_B(void);
+static void DIV_C(void);
+static void DLT_EA_BC(void);
+static void DLT_EA_DE(void);
+static void DLT_EA_HL(void);
+static void DMOV_BC_EA(void);
+static void DMOV_DE_EA(void);
+static void DMOV_EA_BC(void);
+static void DMOV_EA_DE(void);
+static void DMOV_EA_ECNT(void);
+static void DMOV_EA_ECPT(void);
+static void DMOV_EA_HL(void);
+static void DMOV_ETM0_EA(void);
+static void DMOV_ETM1_EA(void);
+static void DMOV_HL_EA(void);
+static void DNE_EA_BC(void);
+static void DNE_EA_DE(void);
+static void DNE_EA_HL(void);
+static void DOFF_EA_BC(void);
+static void DOFF_EA_DE(void);
+static void DOFF_EA_HL(void);
+static void DON_EA_BC(void);
+static void DON_EA_DE(void);
+static void DON_EA_HL(void);
+static void DOR_EA_BC(void);
+static void DOR_EA_DE(void);
+static void DOR_EA_HL(void);
+static void DRLL_EA(void);
+static void DRLR_EA(void);
+static void DSBB_EA_BC(void);
+static void DSBB_EA_DE(void);
+static void DSBB_EA_HL(void);
+static void DSLL_EA(void);
+static void DSLR_EA(void);
+static void DSUBNB_EA_BC(void);
+static void DSUBNB_EA_DE(void);
+static void DSUBNB_EA_HL(void);
+static void DSUB_EA_BC(void);
+static void DSUB_EA_DE(void);
+static void DSUB_EA_HL(void);
+static void DXR_EA_BC(void);
+static void DXR_EA_DE(void);
+static void DXR_EA_HL(void);
+static void EADD_EA_A(void);
+static void EADD_EA_B(void);
+static void EADD_EA_C(void);
+static void EI(void);
+static void EQAW_wa(void);
+static void EQAX_B(void);
+static void EQAX_D(void);
+static void EQAX_Dm(void);
+static void EQAX_Dp(void);
+static void EQAX_H(void);
+static void EQAX_Hm(void);
+static void EQAX_Hp(void);
+static void EQA_A_A(void);
+static void EQA_A_A(void);
+static void EQA_A_B(void);
+static void EQA_A_C(void);
+static void EQA_A_D(void);
+static void EQA_A_E(void);
+static void EQA_A_H(void);
+static void EQA_A_L(void);
+static void EQA_A_V(void);
+static void EQA_B_A(void);
+static void EQA_C_A(void);
+static void EQA_D_A(void);
+static void EQA_E_A(void);
+static void EQA_H_A(void);
+static void EQA_L_A(void);
+static void EQA_V_A(void);
+static void EQIW_wa_xx(void);
+static void EQI_ANM_xx(void);
+static void EQI_A_xx(void);
+static void EQI_A_xx(void);
+static void EQI_B_xx(void);
+static void EQI_C_xx(void);
+static void EQI_D_xx(void);
+static void EQI_EOM_xx(void);
+static void EQI_E_xx(void);
+static void EQI_H_xx(void);
+static void EQI_L_xx(void);
+static void EQI_MKH_xx(void);
+static void EQI_MKL_xx(void);
+static void EQI_PA_xx(void);
+static void EQI_PB_xx(void);
+static void EQI_PC_xx(void);
+static void EQI_PD_xx(void);
+static void EQI_PF_xx(void);
+static void EQI_SMH_xx(void);
+static void EQI_TMM_xx(void);
+static void EQI_V_xx(void);
+static void ESUB_EA_A(void);
+static void ESUB_EA_B(void);
+static void ESUB_EA_C(void);
+static void EXA(void);
+static void EXH(void);
+static void EXX(void);
+static void EXR(void);
+static void GTAW_wa(void);
+static void GTAX_B(void);
+static void GTAX_D(void);
+static void GTAX_Dm(void);
+static void GTAX_Dp(void);
+static void GTAX_H(void);
+static void GTAX_Hm(void);
+static void GTAX_Hp(void);
+static void GTA_A_A(void);
+static void GTA_A_A(void);
+static void GTA_A_B(void);
+static void GTA_A_C(void);
+static void GTA_A_D(void);
+static void GTA_A_E(void);
+static void GTA_A_H(void);
+static void GTA_A_L(void);
+static void GTA_A_V(void);
+static void GTA_B_A(void);
+static void GTA_C_A(void);
+static void GTA_D_A(void);
+static void GTA_E_A(void);
+static void GTA_H_A(void);
+static void GTA_L_A(void);
+static void GTA_V_A(void);
+static void GTIW_wa_xx(void);
+static void GTI_ANM_xx(void);
+static void GTI_A_xx(void);
+static void GTI_A_xx(void);
+static void GTI_B_xx(void);
+static void GTI_C_xx(void);
+static void GTI_D_xx(void);
+static void GTI_EOM_xx(void);
+static void GTI_E_xx(void);
+static void GTI_H_xx(void);
+static void GTI_L_xx(void);
+static void GTI_MKH_xx(void);
+static void GTI_MKL_xx(void);
+static void GTI_PA_xx(void);
+static void GTI_PB_xx(void);
+static void GTI_PC_xx(void);
+static void GTI_PD_xx(void);
+static void GTI_PF_xx(void);
+static void GTI_SMH_xx(void);
+static void GTI_TMM_xx(void);
+static void GTI_V_xx(void);
+static void HALT(void);
+static void INRW_wa(void);
+static void INR_A(void);
+static void INR_B(void);
+static void INR_C(void);
+static void INX_BC(void);
+static void INX_DE(void);
+static void INX_EA(void);
+static void INX_HL(void);
+static void INX_SP(void);
+static void JB(void);
+static void JEA(void);
+static void JMP_w(void);
+static void JR(void);
+static void JRE(void);
+static void LBCD_w(void);
+static void LDAW_wa(void);
+static void LDAX_B(void);
+static void LDAX_D(void);
+static void LDAX_D_xx(void);
+static void LDAX_Dm(void);
+static void LDAX_Dp(void);
+static void LDAX_H(void);
+static void LDAX_H_A(void);
+static void LDAX_H_B(void);
+static void LDAX_H_EA(void);
+static void LDAX_H_xx(void);
+static void LDAX_Hm(void);
+static void LDAX_Hp(void);
+static void LDEAX_D(void);
+static void LDEAX_D_xx(void);
+static void LDEAX_Dp(void);
+static void LDEAX_H(void);
+static void LDEAX_H_A(void);
+static void LDEAX_H_B(void);
+static void LDEAX_H_EA(void);
+static void LDEAX_H_xx(void);
+static void LDEAX_Hp(void);
+static void LDED_w(void);
+static void LHLD_w(void);
+static void LSPD_w(void);
+static void LTAW_wa(void);
+static void LTAX_B(void);
+static void LTAX_D(void);
+static void LTAX_Dm(void);
+static void LTAX_Dp(void);
+static void LTAX_H(void);
+static void LTAX_Hm(void);
+static void LTAX_Hp(void);
+static void LTA_A_A(void);
+static void LTA_A_A(void);
+static void LTA_A_B(void);
+static void LTA_A_C(void);
+static void LTA_A_D(void);
+static void LTA_A_E(void);
+static void LTA_A_H(void);
+static void LTA_A_L(void);
+static void LTA_A_V(void);
+static void LTA_B_A(void);
+static void LTA_C_A(void);
+static void LTA_D_A(void);
+static void LTA_E_A(void);
+static void LTA_H_A(void);
+static void LTA_L_A(void);
+static void LTA_V_A(void);
+static void LTIW_wa_xx(void);
+static void LTI_ANM_xx(void);
+static void LTI_A_xx(void);
+static void LTI_A_xx(void);
+static void LTI_B_xx(void);
+static void LTI_C_xx(void);
+static void LTI_D_xx(void);
+static void LTI_EOM_xx(void);
+static void LTI_E_xx(void);
+static void LTI_H_xx(void);
+static void LTI_L_xx(void);
+static void LTI_MKH_xx(void);
+static void LTI_MKL_xx(void);
+static void LTI_PA_xx(void);
+static void LTI_PB_xx(void);
+static void LTI_PC_xx(void);
+static void LTI_PD_xx(void);
+static void LTI_PF_xx(void);
+static void LTI_SMH_xx(void);
+static void LTI_TMM_xx(void);
+static void LTI_V_xx(void);
+static void LXI_B_w(void);
+static void LXI_D_w(void);
+static void LXI_EA_s(void);
+static void LXI_H_w(void);
+static void LXI_S_w(void);
+static void MOV_ANM_A(void);
+static void MOV_A_ANM(void);
+static void MOV_A_B(void);
+static void MOV_A_C(void);
+static void MOV_A_CR0(void);
+static void MOV_A_CR1(void);
+static void MOV_A_CR2(void);
+static void MOV_A_CR3(void);
+static void MOV_A_D(void);
+static void MOV_A_E(void);
+static void MOV_A_EAH(void);
+static void MOV_A_EAL(void);
+static void MOV_A_EOM(void);
+static void MOV_A_H(void);
+static void MOV_A_L(void);
+static void MOV_A_MKH(void);
+static void MOV_A_MKL(void);
+static void MOV_A_PA(void);
+static void MOV_A_PB(void);
+static void MOV_A_PC(void);
+static void MOV_A_PD(void);
+static void MOV_A_PF(void);
+static void MOV_A_RXB(void);
+static void MOV_A_SMH(void);
+static void MOV_A_TMM(void);
+static void MOV_A_PT(void);
+static void MOV_A_w(void);
+static void MOV_B_A(void);
+static void MOV_B_w(void);
+static void MOV_C_A(void);
+static void MOV_C_w(void);
+static void MOV_D_A(void);
+static void MOV_D_w(void);
+static void MOV_EAH_A(void);
+static void MOV_EAL_A(void);
+static void MOV_EOM_A(void);
+static void MOV_ETMM_A(void);
+static void MOV_E_A(void);
+static void MOV_E_w(void);
+static void MOV_H_A(void);
+static void MOV_H_w(void);
+static void MOV_L_A(void);
+static void MOV_L_w(void);
+static void MOV_MA_A(void);
+static void MOV_MB_A(void);
+static void MOV_MCC_A(void);
+static void MOV_MC_A(void);
+static void MOV_MF_A(void);
+static void MOV_MKH_A(void);
+static void MOV_MKL_A(void);
+static void MOV_MM_A(void);
+static void MOV_PA_A(void);
+static void MOV_PB_A(void);
+static void MOV_PC_A(void);
+static void MOV_PD_A(void);
+static void MOV_PF_A(void);
+static void MOV_SMH_A(void);
+static void MOV_SML_A(void);
+static void MOV_TM0_A(void);
+static void MOV_TM1_A(void);
+static void MOV_TMM_A(void);
+static void MOV_TXB_A(void);
+static void MOV_V_w(void);
+static void MOV_ZCM_A(void);
+static void MOV_w_A(void);
+static void MOV_w_B(void);
+static void MOV_w_C(void);
+static void MOV_w_D(void);
+static void MOV_w_E(void);
+static void MOV_w_H(void);
+static void MOV_w_L(void);
+static void MOV_w_V(void);
+static void MUL_A(void);
+static void MUL_B(void);
+static void MUL_C(void);
+static void MVIW_wa_xx(void);
+static void MVIX_BC_xx(void);
+static void MVIX_DE_xx(void);
+static void MVIX_HL_xx(void);
+static void MVI_ANM_xx(void);
+static void MVI_A_xx(void);
+static void MVI_B_xx(void);
+static void MVI_C_xx(void);
+static void MVI_D_xx(void);
+static void MVI_EOM_xx(void);
+static void MVI_E_xx(void);
+static void MVI_H_xx(void);
+static void MVI_L_xx(void);
+static void MVI_MKH_xx(void);
+static void MVI_MKL_xx(void);
+static void MVI_PA_xx(void);
+static void MVI_PB_xx(void);
+static void MVI_PC_xx(void);
+static void MVI_PD_xx(void);
+static void MVI_PF_xx(void);
+static void MVI_SMH_xx(void);
+static void MVI_TMM_xx(void);
+static void MVI_V_xx(void);
+static void NEAW_wa(void);
+static void NEAX_B(void);
+static void NEAX_D(void);
+static void NEAX_Dm(void);
+static void NEAX_Dp(void);
+static void NEAX_H(void);
+static void NEAX_Hm(void);
+static void NEAX_Hp(void);
+static void NEA_A_A(void);
+static void NEA_A_A(void);
+static void NEA_A_B(void);
+static void NEA_A_C(void);
+static void NEA_A_D(void);
+static void NEA_A_E(void);
+static void NEA_A_H(void);
+static void NEA_A_L(void);
+static void NEA_A_V(void);
+static void NEA_B_A(void);
+static void NEA_C_A(void);
+static void NEA_D_A(void);
+static void NEA_E_A(void);
+static void NEA_H_A(void);
+static void NEA_L_A(void);
+static void NEA_V_A(void);
+static void NEGA(void);
+static void NEIW_wa_xx(void);
+static void NEI_ANM_xx(void);
+static void NEI_A_xx(void);
+static void NEI_A_xx(void);
+static void NEI_B_xx(void);
+static void NEI_C_xx(void);
+static void NEI_D_xx(void);
+static void NEI_EOM_xx(void);
+static void NEI_E_xx(void);
+static void NEI_H_xx(void);
+static void NEI_L_xx(void);
+static void NEI_MKH_xx(void);
+static void NEI_MKL_xx(void);
+static void NEI_PA_xx(void);
+static void NEI_PB_xx(void);
+static void NEI_PC_xx(void);
+static void NEI_PD_xx(void);
+static void NEI_PF_xx(void);
+static void NEI_SMH_xx(void);
+static void NEI_TMM_xx(void);
+static void NEI_V_xx(void);
+static void NOP(void);
+static void OFFAW_wa(void);
+static void OFFAX_B(void);
+static void OFFAX_D(void);
+static void OFFAX_Dm(void);
+static void OFFAX_Dp(void);
+static void OFFAX_H(void);
+static void OFFAX_Hm(void);
+static void OFFAX_Hp(void);
+static void OFFA_A_A(void);
+static void OFFA_A_B(void);
+static void OFFA_A_C(void);
+static void OFFA_A_D(void);
+static void OFFA_A_E(void);
+static void OFFA_A_H(void);
+static void OFFA_A_L(void);
+static void OFFA_A_V(void);
+static void OFFIW_wa_xx(void);
+static void OFFI_ANM_xx(void);
+static void OFFI_A_xx(void);
+static void OFFI_A_xx(void);
+static void OFFI_B_xx(void);
+static void OFFI_C_xx(void);
+static void OFFI_D_xx(void);
+static void OFFI_EOM_xx(void);
+static void OFFI_E_xx(void);
+static void OFFI_H_xx(void);
+static void OFFI_L_xx(void);
+static void OFFI_MKH_xx(void);
+static void OFFI_MKL_xx(void);
+static void OFFI_PA_xx(void);
+static void OFFI_PB_xx(void);
+static void OFFI_PC_xx(void);
+static void OFFI_PD_xx(void);
+static void OFFI_PF_xx(void);
+static void OFFI_SMH_xx(void);
+static void OFFI_TMM_xx(void);
+static void OFFI_V_xx(void);
+static void ONAW_wa(void);
+static void ONAX_B(void);
+static void ONAX_D(void);
+static void ONAX_Dm(void);
+static void ONAX_Dp(void);
+static void ONAX_H(void);
+static void ONAX_Hm(void);
+static void ONAX_Hp(void);
+static void ONA_A_A(void);
+static void ONA_A_B(void);
+static void ONA_A_C(void);
+static void ONA_A_D(void);
+static void ONA_A_E(void);
+static void ONA_A_H(void);
+static void ONA_A_L(void);
+static void ONA_A_V(void);
+static void ONIW_wa_xx(void);
+static void ONI_ANM_xx(void);
+static void ONI_A_xx(void);
+static void ONI_A_xx(void);
+static void ONI_B_xx(void);
+static void ONI_C_xx(void);
+static void ONI_D_xx(void);
+static void ONI_EOM_xx(void);
+static void ONI_E_xx(void);
+static void ONI_H_xx(void);
+static void ONI_L_xx(void);
+static void ONI_MKH_xx(void);
+static void ONI_MKL_xx(void);
+static void ONI_PA_xx(void);
+static void ONI_PB_xx(void);
+static void ONI_PC_xx(void);
+static void ONI_PD_xx(void);
+static void ONI_PF_xx(void);
+static void ONI_SMH_xx(void);
+static void ONI_TMM_xx(void);
+static void ONI_V_xx(void);
+static void ORAW_wa(void);
+static void ORAX_B(void);
+static void ORAX_D(void);
+static void ORAX_Dm(void);
+static void ORAX_Dp(void);
+static void ORAX_H(void);
+static void ORAX_Hm(void);
+static void ORAX_Hp(void);
+static void ORA_A_A(void);
+static void ORA_A_A(void);
+static void ORA_A_B(void);
+static void ORA_A_C(void);
+static void ORA_A_D(void);
+static void ORA_A_E(void);
+static void ORA_A_H(void);
+static void ORA_A_L(void);
+static void ORA_A_V(void);
+static void ORA_B_A(void);
+static void ORA_C_A(void);
+static void ORA_D_A(void);
+static void ORA_E_A(void);
+static void ORA_H_A(void);
+static void ORA_L_A(void);
+static void ORA_V_A(void);
+static void ORIW_wa_xx(void);
+static void ORI_ANM_xx(void);
+static void ORI_A_xx(void);
+static void ORI_A_xx(void);
+static void ORI_B_xx(void);
+static void ORI_C_xx(void);
+static void ORI_D_xx(void);
+static void ORI_EOM_xx(void);
+static void ORI_E_xx(void);
+static void ORI_H_xx(void);
+static void ORI_L_xx(void);
+static void ORI_MKH_xx(void);
+static void ORI_MKL_xx(void);
+static void ORI_PA_xx(void);
+static void ORI_PB_xx(void);
+static void ORI_PC_xx(void);
+static void ORI_PD_xx(void);
+static void ORI_PF_xx(void);
+static void ORI_SMH_xx(void);
+static void ORI_TMM_xx(void);
+static void ORI_V_xx(void);
+static void POP_BC(void);
+static void POP_DE(void);
+static void POP_EA(void);
+static void POP_HL(void);
+static void POP_VA(void);
+static void PRE_48(void);
+static void PRE_4C(void);
+static void PRE_4D(void);
+static void PRE_60(void);
+static void PRE_64(void);
+static void PRE_70(void);
+static void PRE_74(void);
+static void PUSH_BC(void);
+static void PUSH_DE(void);
+static void PUSH_EA(void);
+static void PUSH_HL(void);
+static void PUSH_VA(void);
+static void RET(void);
+static void RETI(void);
+static void RETS(void);
+static void RLD(void);
+static void RLL_A(void);
+static void RLL_B(void);
+static void RLL_C(void);
+static void RLR_A(void);
+static void RLR_B(void);
+static void RLR_C(void);
+static void RRD(void);
+static void SBBW_wa(void);
+static void SBBX_B(void);
+static void SBBX_D(void);
+static void SBBX_Dm(void);
+static void SBBX_Dp(void);
+static void SBBX_H(void);
+static void SBBX_Hm(void);
+static void SBBX_Hp(void);
+static void SBB_A_A(void);
+static void SBB_A_A(void);
+static void SBB_A_B(void);
+static void SBB_A_C(void);
+static void SBB_A_D(void);
+static void SBB_A_E(void);
+static void SBB_A_H(void);
+static void SBB_A_L(void);
+static void SBB_A_V(void);
+static void SBB_B_A(void);
+static void SBB_C_A(void);
+static void SBB_D_A(void);
+static void SBB_E_A(void);
+static void SBB_H_A(void);
+static void SBB_L_A(void);
+static void SBB_V_A(void);
+static void SBCD_w(void);
+static void SBI_ANM_xx(void);
+static void SBI_A_xx(void);
+static void SBI_A_xx(void);
+static void SBI_B_xx(void);
+static void SBI_C_xx(void);
+static void SBI_D_xx(void);
+static void SBI_EOM_xx(void);
+static void SBI_E_xx(void);
+static void SBI_H_xx(void);
+static void SBI_L_xx(void);
+static void SBI_MKH_xx(void);
+static void SBI_MKL_xx(void);
+static void SBI_PA_xx(void);
+static void SBI_PB_xx(void);
+static void SBI_PC_xx(void);
+static void SBI_PD_xx(void);
+static void SBI_PF_xx(void);
+static void SBI_SMH_xx(void);
+static void SBI_TMM_xx(void);
+static void SBI_V_xx(void);
+static void SDED_w(void);
+static void SETB(void);
+static void SHLD_w(void);
+static void SK_bit(void);
+static void SKN_bit(void);
+static void SKIT_AN4(void);
+static void SKIT_AN5(void);
+static void SKIT_AN6(void);
+static void SKIT_AN7(void);
+static void SKIT_ER(void);
+static void SKIT_F1(void);
+static void SKIT_F2(void);
+static void SKIT_FAD(void);
+static void SKIT_FE0(void);
+static void SKIT_FE1(void);
+static void SKIT_FEIN(void);
+static void SKIT_FSR(void);
+static void SKIT_FST(void);
+static void SKIT_FT0(void);
+static void SKIT_FT1(void);
+static void SKIT_NMI(void);
+static void SKIT_OV(void);
+static void SKIT_SB(void);
+static void SKNIT_AN4(void);
+static void SKNIT_AN5(void);
+static void SKNIT_AN6(void);
+static void SKNIT_AN7(void);
+static void SKNIT_ER(void);
+static void SKNIT_F1(void);
+static void SKNIT_F2(void);
+static void SKNIT_FAD(void);
+static void SKNIT_FE0(void);
+static void SKNIT_FE1(void);
+static void SKNIT_FEIN(void);
+static void SKNIT_FSR(void);
+static void SKNIT_FST(void);
+static void SKNIT_FT0(void);
+static void SKNIT_FT1(void);
+static void SKNIT_NMI(void);
+static void SKNIT_OV(void);
+static void SKNIT_SB(void);
+static void SKN_CY(void);
+static void SKN_HC(void);
+static void SKN_NV(void);
+static void SKN_Z(void);
+static void SK_CY(void);
+static void SK_HC(void);
+static void SK_NV(void);
+static void SK_Z(void);
+static void SLLC_A(void);
+static void SLLC_B(void);
+static void SLLC_C(void);
+static void SLL_A(void);
+static void SLL_B(void);
+static void SLL_C(void);
+static void SLRC_A(void);
+static void SLRC_B(void);
+static void SLRC_C(void);
+static void SLR_A(void);
+static void SLR_B(void);
+static void SLR_C(void);
+static void SOFTI(void);
+static void SSPD_w(void);
+static void STAW_wa(void);
+static void STAX_B(void);
+static void STAX_D(void);
+static void STAX_D_xx(void);
+static void STAX_Dm(void);
+static void STAX_Dp(void);
+static void STAX_H(void);
+static void STAX_H_A(void);
+static void STAX_H_B(void);
+static void STAX_H_EA(void);
+static void STAX_H_xx(void);
+static void STAX_Hm(void);
+static void STAX_Hp(void);
+static void STC(void);
+static void STEAX_D(void);
+static void STEAX_D_xx(void);
+static void STEAX_Dp(void);
+static void STEAX_H(void);
+static void STEAX_H_A(void);
+static void STEAX_H_B(void);
+static void STEAX_H_EA(void);
+static void STEAX_H_xx(void);
+static void STEAX_Hp(void);
+static void STOP(void);
+static void SUBNBW_wa(void);
+static void SUBNBX_B(void);
+static void SUBNBX_D(void);
+static void SUBNBX_Dm(void);
+static void SUBNBX_Dp(void);
+static void SUBNBX_H(void);
+static void SUBNBX_Hm(void);
+static void SUBNBX_Hp(void);
+static void SUBNB_A_A(void);
+static void SUBNB_A_A(void);
+static void SUBNB_A_B(void);
+static void SUBNB_A_C(void);
+static void SUBNB_A_D(void);
+static void SUBNB_A_E(void);
+static void SUBNB_A_H(void);
+static void SUBNB_A_L(void);
+static void SUBNB_A_V(void);
+static void SUBNB_B_A(void);
+static void SUBNB_C_A(void);
+static void SUBNB_D_A(void);
+static void SUBNB_E_A(void);
+static void SUBNB_H_A(void);
+static void SUBNB_L_A(void);
+static void SUBNB_V_A(void);
+static void SUBW_wa(void);
+static void SUBX_B(void);
+static void SUBX_D(void);
+static void SUBX_Dm(void);
+static void SUBX_Dp(void);
+static void SUBX_H(void);
+static void SUBX_Hm(void);
+static void SUBX_Hp(void);
+static void SUB_A_A(void);
+static void SUB_A_A(void);
+static void SUB_A_B(void);
+static void SUB_A_C(void);
+static void SUB_A_D(void);
+static void SUB_A_E(void);
+static void SUB_A_H(void);
+static void SUB_A_L(void);
+static void SUB_A_V(void);
+static void SUB_B_A(void);
+static void SUB_C_A(void);
+static void SUB_D_A(void);
+static void SUB_E_A(void);
+static void SUB_H_A(void);
+static void SUB_L_A(void);
+static void SUB_V_A(void);
+static void SUINB_ANM_xx(void);
+static void SUINB_A_xx(void);
+static void SUINB_A_xx(void);
+static void SUINB_B_xx(void);
+static void SUINB_C_xx(void);
+static void SUINB_D_xx(void);
+static void SUINB_EOM_xx(void);
+static void SUINB_E_xx(void);
+static void SUINB_H_xx(void);
+static void SUINB_L_xx(void);
+static void SUINB_MKH_xx(void);
+static void SUINB_MKL_xx(void);
+static void SUINB_PA_xx(void);
+static void SUINB_PB_xx(void);
+static void SUINB_PC_xx(void);
+static void SUINB_PD_xx(void);
+static void SUINB_PF_xx(void);
+static void SUINB_SMH_xx(void);
+static void SUINB_TMM_xx(void);
+static void SUINB_V_xx(void);
+static void SUI_ANM_xx(void);
+static void SUI_A_xx(void);
+static void SUI_A_xx(void);
+static void SUI_B_xx(void);
+static void SUI_C_xx(void);
+static void SUI_D_xx(void);
+static void SUI_EOM_xx(void);
+static void SUI_E_xx(void);
+static void SUI_H_xx(void);
+static void SUI_L_xx(void);
+static void SUI_MKH_xx(void);
+static void SUI_MKL_xx(void);
+static void SUI_PA_xx(void);
+static void SUI_PB_xx(void);
+static void SUI_PC_xx(void);
+static void SUI_PD_xx(void);
+static void SUI_PF_xx(void);
+static void SUI_SMH_xx(void);
+static void SUI_TMM_xx(void);
+static void SUI_V_xx(void);
+static void TABLE(void);
+static void XRAW_wa(void);
+static void XRAX_B(void);
+static void XRAX_D(void);
+static void XRAX_Dm(void);
+static void XRAX_Dp(void);
+static void XRAX_H(void);
+static void XRAX_Hm(void);
+static void XRAX_Hp(void);
+static void XRA_A_A(void);
+static void XRA_A_A(void);
+static void XRA_A_B(void);
+static void XRA_A_C(void);
+static void XRA_A_D(void);
+static void XRA_A_E(void);
+static void XRA_A_H(void);
+static void XRA_A_L(void);
+static void XRA_A_V(void);
+static void XRA_B_A(void);
+static void XRA_C_A(void);
+static void XRA_D_A(void);
+static void XRA_E_A(void);
+static void XRA_H_A(void);
+static void XRA_L_A(void);
+static void XRA_V_A(void);
+static void XRI_ANM_xx(void);
+static void XRI_A_xx(void);
+static void XRI_A_xx(void);
+static void XRI_B_xx(void);
+static void XRI_C_xx(void);
+static void XRI_D_xx(void);
+static void XRI_EOM_xx(void);
+static void XRI_E_xx(void);
+static void XRI_H_xx(void);
+static void XRI_L_xx(void);
+static void XRI_MKH_xx(void);
+static void XRI_MKL_xx(void);
+static void XRI_PA_xx(void);
+static void XRI_PB_xx(void);
+static void XRI_PC_xx(void);
+static void XRI_PD_xx(void);
+static void XRI_PF_xx(void);
+static void XRI_SMH_xx(void);
+static void XRI_TMM_xx(void);
+static void XRI_V_xx(void);
+
+static struct opcode_s op48[256] =
+{
+ {illegal, 2, 8, 8,L0|L1}, /* 00: 0100 1000 0000 0000 */
+ {SLRC_A, 2, 8, 8,L0|L1}, /* 01: 0100 1000 0000 0001 */
+ {SLRC_B, 2, 8, 8,L0|L1}, /* 02: 0100 1000 0000 0010 */
+ {SLRC_C, 2, 8, 8,L0|L1}, /* 03: 0100 1000 0000 0011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 04: 0100 1000 0000 0100 */
+ {SLLC_A, 2, 8, 8,L0|L1}, /* 05: 0100 1000 0000 0101 */
+ {SLLC_B, 2, 8, 8,L0|L1}, /* 06: 0100 1000 0000 0110 */
+ {SLLC_C, 2, 8, 8,L0|L1}, /* 07: 0100 1000 0000 0111 */
+ {SK_NV, 2, 8, 8,L0|L1}, /* 08: 0100 1000 0000 1000 */
+ {illegal, 2, 8, 8,L0|L1}, /* 09: 0100 1000 0000 1001 */
+ {SK_CY, 2, 8, 8,L0|L1}, /* 0a: 0100 1000 0000 1010 */
+ {SK_HC, 2, 8, 8,L0|L1}, /* 0b: 0100 1000 0000 1011 */
+ {SK_Z, 2, 8, 8,L0|L1}, /* 0c: 0100 1000 0000 1100 */
+ {illegal, 2, 8, 8,L0|L1}, /* 0d: 0100 1000 0000 1101 */
+ {illegal, 2, 8, 8,L0|L1}, /* 0e: 0100 1000 0000 1110 */
+ {illegal, 2, 8, 8,L0|L1}, /* 0f: 0100 1000 0000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1000 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1000 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1000 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1000 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1000 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1000 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1000 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1000 0001 0111 */
+ {SKN_NV, 2, 8, 8,L0|L1}, /* 18: 0100 1000 0001 1000 */
+ {illegal, 2, 8, 8,L0|L1}, /* 19: 0100 1000 0001 1001 */
+ {SKN_CY, 2, 8, 8,L0|L1}, /* 1a: 0100 1000 0001 1010 */
+ {SKN_HC, 2, 8, 8,L0|L1}, /* 1b: 0100 1000 0001 1011 */
+ {SKN_Z, 2, 8, 8,L0|L1}, /* 1c: 0100 1000 0001 1100 */
+ {illegal, 2, 8, 8,L0|L1}, /* 1d: 0100 1000 0001 1101 */
+ {illegal, 2, 8, 8,L0|L1}, /* 1e: 0100 1000 0001 1110 */
+ {illegal, 2, 8, 8,L0|L1}, /* 1f: 0100 1000 0001 1111 */
+
+ {illegal, 2, 8, 8,L0|L1}, /* 20: 0100 1000 0010 0000 */
+ {SLR_A, 2, 8, 8,L0|L1}, /* 21: 0100 1000 0010 0001 */
+ {SLR_B, 2, 8, 8,L0|L1}, /* 22: 0100 1000 0010 0010 */
+ {SLR_C, 2, 8, 8,L0|L1}, /* 23: 0100 1000 0010 0011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 24: 0100 1000 0010 0100 */
+ {SLL_A, 2, 8, 8,L0|L1}, /* 25: 0100 1000 0010 0101 */
+ {SLL_B, 2, 8, 8,L0|L1}, /* 26: 0100 1000 0010 0110 */
+ {SLL_C, 2, 8, 8,L0|L1}, /* 27: 0100 1000 0010 0111 */
+ {JEA, 2, 8, 8,L0|L1}, /* 28: 0100 1000 0010 1000 */
+ {CALB, 2,17,17,L0|L1}, /* 29: 0100 1000 0010 1001 */
+ {CLC, 2, 8, 8,L0|L1}, /* 2a: 0100 1000 0010 1010 */
+ {STC, 2, 8, 8,L0|L1}, /* 2b: 0100 1000 0010 1011 */
+ {illegal, 2,32,32,L0|L1}, /* 2c: 0100 1000 0010 1100 */
+ {MUL_A, 2,32,32,L0|L1}, /* 2d: 0100 1000 0010 1101 */
+ {MUL_B, 2,32,32,L0|L1}, /* 2e: 0100 1000 0010 1110 */
+ {MUL_C, 2,32,32,L0|L1}, /* 2f: 0100 1000 0010 1111 */
+
+ {illegal, 2, 8, 8,L0|L1}, /* 30: 0100 1000 0011 0000 */
+ {RLR_A, 2, 8, 8,L0|L1}, /* 31: 0100 1000 0011 0001 */
+ {RLR_B, 2, 8, 8,L0|L1}, /* 32: 0100 1000 0011 0010 */
+ {RLR_C, 2, 8, 8,L0|L1}, /* 33: 0100 1000 0011 0011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 34: 0100 1000 0011 0100 */
+ {RLL_A, 2, 8, 8,L0|L1}, /* 35: 0100 1000 0011 0101 */
+ {RLL_B, 2, 8, 8,L0|L1}, /* 36: 0100 1000 0011 0110 */
+ {RLL_C, 2, 8, 8,L0|L1}, /* 37: 0100 1000 0011 0111 */
+ {RLD, 2,17,17,L0|L1}, /* 38: 0100 1000 0011 1000 */
+ {RRD, 2,17,17,L0|L1}, /* 39: 0100 1000 0011 1001 */
+ {NEGA, 2, 8, 8,L0|L1}, /* 3a: 0100 1000 0011 1010 */
+ {HALT, 2,12,12,L0|L1}, /* 3b: 0100 1000 0011 1011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 3c: 0100 1000 0011 1100 */
+ {DIV_A, 2,59,59,L0|L1}, /* 3d: 0100 1000 0011 1101 */
+ {DIV_B, 2,59,59,L0|L1}, /* 3e: 0100 1000 0011 1110 */
+ {DIV_C, 2,59,59,L0|L1}, /* 3f: 0100 1000 0011 1111 */
+
+ {SKIT_NMI, 2, 8, 8,L0|L1}, /* 40: 0100 1000 0100 0000 */
+ {SKIT_FT0, 2, 8, 8,L0|L1}, /* 41: 0100 1000 0100 0001 */
+ {SKIT_FT1, 2, 8, 8,L0|L1}, /* 42: 0100 1000 0100 0010 */
+ {SKIT_F1, 2, 8, 8,L0|L1}, /* 43: 0100 1000 0100 0011 */
+ {SKIT_F2, 2, 8, 8,L0|L1}, /* 44: 0100 1000 0100 0100 */
+ {SKIT_FE0, 2, 8, 8,L0|L1}, /* 45: 0100 1000 0100 0101 */
+ {SKIT_FE1, 2, 8, 8,L0|L1}, /* 46: 0100 1000 0100 0110 */
+ {SKIT_FEIN, 2, 8, 8,L0|L1}, /* 47: 0100 1000 0100 0111 */
+ {SKIT_FAD, 2, 8, 8,L0|L1}, /* 48: 0100 1000 0100 1000 */
+ {SKIT_FSR, 2, 8, 8,L0|L1}, /* 49: 0100 1000 0100 1001 */
+ {SKIT_FST, 2, 8, 8,L0|L1}, /* 4a: 0100 1000 0100 1010 */
+ {SKIT_ER, 2, 8, 8,L0|L1}, /* 4b: 0100 1000 0100 1011 */
+ {SKIT_OV, 2, 8, 8,L0|L1}, /* 4c: 0100 1000 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1000 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1000 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1000 0100 1111 */
+
+ {SKIT_AN4, 2, 8, 8,L0|L1}, /* 50: 0100 1000 0101 0000 */
+ {SKIT_AN5, 2, 8, 8,L0|L1}, /* 51: 0100 1000 0101 0001 */
+ {SKIT_AN6, 2, 8, 8,L0|L1}, /* 52: 0100 1000 0101 0010 */
+ {SKIT_AN7, 2, 8, 8,L0|L1}, /* 53: 0100 1000 0101 0011 */
+ {SKIT_SB, 2, 8, 8,L0|L1}, /* 54: 0100 1000 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1000 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1000 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1000 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1000 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1000 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1000 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1000 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1000 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1000 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1000 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1000 0101 1111 */
+
+ {SKNIT_NMI, 2, 8, 8,L0|L1}, /* 60: 0100 1000 0110 0000 */
+ {SKNIT_FT0, 2, 8, 8,L0|L1}, /* 61: 0100 1000 0110 0001 */
+ {SKNIT_FT1, 2, 8, 8,L0|L1}, /* 62: 0100 1000 0110 0010 */
+ {SKNIT_F1, 2, 8, 8,L0|L1}, /* 63: 0100 1000 0110 0011 */
+ {SKNIT_F2, 2, 8, 8,L0|L1}, /* 64: 0100 1000 0110 0100 */
+ {SKNIT_FE0, 2, 8, 8,L0|L1}, /* 65: 0100 1000 0110 0101 */
+ {SKNIT_FE1, 2, 8, 8,L0|L1}, /* 66: 0100 1000 0110 0110 */
+ {SKNIT_FEIN, 2, 8, 8,L0|L1}, /* 67: 0100 1000 0110 0111 */
+ {SKNIT_FAD, 2, 8, 8,L0|L1}, /* 68: 0100 1000 0110 1000 */
+ {SKNIT_FSR, 2, 8, 8,L0|L1}, /* 69: 0100 1000 0110 1001 */
+ {SKNIT_FST, 2, 8, 8,L0|L1}, /* 6a: 0100 1000 0110 1010 */
+ {SKNIT_ER, 2, 8, 8,L0|L1}, /* 6b: 0100 1000 0110 1011 */
+ {SKNIT_OV, 2, 8, 8,L0|L1}, /* 6c: 0100 1000 0110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1000 0110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1000 0110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1000 0110 1111 */
+
+ {SKNIT_AN4, 2, 8, 8,L0|L1}, /* 70: 0100 1000 0111 0000 */
+ {SKNIT_AN5, 2, 8, 8,L0|L1}, /* 71: 0100 1000 0111 0001 */
+ {SKNIT_AN6, 2, 8, 8,L0|L1}, /* 72: 0100 1000 0111 0010 */
+ {SKNIT_AN7, 2, 8, 8,L0|L1}, /* 73: 0100 1000 0111 0011 */
+ {SKNIT_SB, 2, 8, 8,L0|L1}, /* 74: 0100 1000 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1000 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1000 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1000 0111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1000 0111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1000 0111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1000 0111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1000 0111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1000 0111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1000 0111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1000 0111 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1000 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1000 1000 0001 */
+ {LDEAX_D, 2,14,11,L0|L1}, /* 82: 0100 1000 1000 0010 */
+ {LDEAX_H, 2,14,11,L0|L1}, /* 83: 0100 1000 1000 0011 */
+ {LDEAX_Dp, 2,14,11,L0|L1}, /* 84: 0100 1000 1000 0100 */
+ {LDEAX_Hp, 2,14,11,L0|L1}, /* 85: 0100 1000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1000 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1000 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1000 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1000 1000 1010 */
+ {LDEAX_D_xx, 3,20,20,L0|L1}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */
+ {LDEAX_H_A, 2,20,20,L0|L1}, /* 8c: 0100 1000 1000 1100 */
+ {LDEAX_H_B, 2,20,20,L0|L1}, /* 8d: 0100 1000 1000 1101 */
+ {LDEAX_H_EA, 2,20,20,L0|L1}, /* 8e: 0100 1000 1000 1110 */
+ {LDEAX_H_xx, 3,20,20,L0|L1}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1000 1000 0001 */
+ {STEAX_D, 2,14,11,L0|L1}, /* 92: 0100 1000 1000 0010 */
+ {STEAX_H, 2,14,11,L0|L1}, /* 93: 0100 1000 1000 0011 */
+ {STEAX_Dp, 2,14,11,L0|L1}, /* 94: 0100 1000 1000 0100 */
+ {STEAX_Hp, 2,14,11,L0|L1}, /* 95: 0100 1000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1000 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1000 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1000 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1000 1000 1010 */
+ {STEAX_D_xx, 3,20,20,L0|L1}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */
+ {STEAX_H_A, 2,20,20,L0|L1}, /* 9c: 0100 1000 1000 1100 */
+ {STEAX_H_B, 2,20,20,L0|L1}, /* 9d: 0100 1000 1000 1101 */
+ {STEAX_H_EA, 2,20,20,L0|L1}, /* 9e: 0100 1000 1000 1110 */
+ {STEAX_H_xx, 3,20,20,L0|L1}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {DSLR_EA, 2, 8, 8,L0|L1}, /* a0: 0100 1000 1010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1000 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1000 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1000 1010 0011 */
+ {DSLL_EA, 2, 8, 8,L0|L1}, /* a4: 0100 1000 1010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1000 1010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1000 1010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1000 1010 0111 */
+ {TABLE, 2,17,17,L0|L1}, /* a8: 0100 1000 1010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1000 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1000 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1000 1010 1011 */
+// {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1000 1010 1100 */
+// {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1000 1010 1101 */
+// {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1000 1010 1110 */
+// {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1000 1010 1111 */
+ {EXA, 2, 8, 8,L0|L1}, /* ac: 0100 1000 1010 1100 */ /* 7807 */
+ {EXR, 2, 8, 8,L0|L1}, /* ad: 0100 1000 1010 1101 */ /* 7807 */
+ {EXH, 2, 8, 8,L0|L1}, /* ae: 0100 1000 1010 1110 */ /* 7807 */
+ {EXX, 2, 8, 8,L0|L1}, /* af: 0100 1000 1010 1111 */ /* 7807 */
+ {DRLR_EA, 2, 8, 8,L0|L1}, /* b0: 0100 1000 1011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1000 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1000 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1000 1011 0011 */
+ {DRLL_EA, 2, 8, 8,L0|L1}, /* b4: 0100 1000 1011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1000 1011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1000 1011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1000 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1000 1011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1000 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1000 1011 1010 */
+ {STOP, 2,12,12,L0|L1}, /* bb: 0100 1000 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1000 1011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1000 1011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1000 1011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1000 1011 1111 */
+
+ {DMOV_EA_ECNT, 2,14,11,L0|L1}, /* c0: 0100 1000 1100 0000 */
+ {DMOV_EA_ECPT, 2,14,11,L0|L1}, /* c1: 0100 1000 1100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c2: 0100 1000 1100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c3: 0100 1000 1100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c4: 0100 1000 1100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c5: 0100 1000 1100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c6: 0100 1000 1100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c7: 0100 1000 1100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c8: 0100 1000 1100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c9: 0100 1000 1100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ca: 0100 1000 1100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cb: 0100 1000 1100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cc: 0100 1000 1100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cd: 0100 1000 1100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ce: 0100 1000 1100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cf: 0100 1000 1100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* d0: 0100 1000 1101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d1: 0100 1000 1101 0001 */
+ {DMOV_ETM0_EA, 2,14,11,L0|L1}, /* d2: 0100 1000 1101 0010 */
+ {DMOV_ETM1_EA, 2,14,11,L0|L1}, /* d3: 0100 1000 1101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d4: 0100 1000 1101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d5: 0100 1000 1101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d6: 0100 1000 1101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d7: 0100 1000 1101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d8: 0100 1000 1101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d9: 0100 1000 1101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* da: 0100 1000 1101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* db: 0100 1000 1101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* dc: 0100 1000 1101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* dd: 0100 1000 1101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* de: 0100 1000 1101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* df: 0100 1000 1101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* e0: 0100 1000 1110 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e1: 0100 1000 1110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e2: 0100 1000 1110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e3: 0100 1000 1110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e4: 0100 1000 1110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e5: 0100 1000 1110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e6: 0100 1000 1110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e7: 0100 1000 1110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e8: 0100 1000 1110 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e9: 0100 1000 1110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ea: 0100 1000 1110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* eb: 0100 1000 1110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ec: 0100 1000 1110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ed: 0100 1000 1110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ee: 0100 1000 1110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ef: 0100 1000 1110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* f0: 0100 1000 1111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f1: 0100 1000 1111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f2: 0100 1000 1111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f3: 0100 1000 1111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f4: 0100 1000 1111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f5: 0100 1000 1111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f6: 0100 1000 1111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f7: 0100 1000 1111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f8: 0100 1000 1111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f9: 0100 1000 1111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fa: 0100 1000 1111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fb: 0100 1000 1111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fc: 0100 1000 1111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fd: 0100 1000 1111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fe: 0100 1000 1111 1110 */
+ {illegal2, 2, 8, 8,L0|L1} /* ff: 0100 1000 1111 1111 */
+};
+
+/* prefix 4C */
+static struct opcode_s op4C[256] =
+{
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0100 1100 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0100 1100 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0100 1100 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0100 1100 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0100 1100 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0100 1100 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0100 1100 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0100 1100 0000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 08: 0100 1100 0000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 09: 0100 1100 0000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0100 1100 0000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0100 1100 0000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0100 1100 0000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0100 1100 0000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0e: 0100 1100 0000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0f: 0100 1100 0000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1100 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1100 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1100 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1100 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1100 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1100 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1100 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1100 0001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 18: 0100 1100 0001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 19: 0100 1100 0001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0100 1100 0001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0100 1100 0001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0100 1100 0001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0100 1100 0001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1e: 0100 1100 0001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1f: 0100 1100 0001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 20: 0100 1100 0010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 21: 0100 1100 0010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 22: 0100 1100 0010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 23: 0100 1100 0010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 24: 0100 1100 0010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 25: 0100 1100 0010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 26: 0100 1100 0010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 27: 0100 1100 0010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 28: 0100 1100 0010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 29: 0100 1100 0010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0100 1100 0010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0100 1100 0010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0100 1100 0010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0100 1100 0010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2e: 0100 1100 0010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2f: 0100 1100 0010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 30: 0100 1100 0011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 31: 0100 1100 0011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 32: 0100 1100 0011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 33: 0100 1100 0011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 34: 0100 1100 0011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 35: 0100 1100 0011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 36: 0100 1100 0011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 37: 0100 1100 0011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 38: 0100 1100 0011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 39: 0100 1100 0011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0100 1100 0011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0100 1100 0011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0100 1100 0011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0100 1100 0011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3e: 0100 1100 0011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3f: 0100 1100 0011 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 40: 0100 1100 0100 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 41: 0100 1100 0100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 42: 0100 1100 0100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 43: 0100 1100 0100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 44: 0100 1100 0100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 45: 0100 1100 0100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 46: 0100 1100 0100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 47: 0100 1100 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0100 1100 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0100 1100 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0100 1100 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0100 1100 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0100 1100 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1100 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1100 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1100 0100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 50: 0100 1100 0101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 51: 0100 1100 0101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 52: 0100 1100 0101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 53: 0100 1100 0101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 54: 0100 1100 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1100 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1100 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1100 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1100 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1100 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1100 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1100 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1100 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1100 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1100 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1100 0101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 60: 0100 1100 0110 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 61: 0100 1100 0110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 62: 0100 1100 0110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 63: 0100 1100 0110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 64: 0100 1100 0110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 65: 0100 1100 0110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 66: 0100 1100 0110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 67: 0100 1100 0110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 68: 0100 1100 0110 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 69: 0100 1100 0110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6a: 0100 1100 0110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6b: 0100 1100 0110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6c: 0100 1100 0110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1100 0110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1100 0110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1100 0110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 70: 0100 1100 0111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 71: 0100 1100 0111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 72: 0100 1100 0111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 73: 0100 1100 0111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 74: 0100 1100 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1100 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1100 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1100 0111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1100 0111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1100 0111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1100 0111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1100 0111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1100 0111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1100 0111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1100 0111 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1100 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1100 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1100 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0100 1100 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0100 1100 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0100 1100 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0100 1100 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1100 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1100 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1100 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1100 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1100 1000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0100 1100 1000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0100 1100 1000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8d: 0100 1100 1000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8e: 0100 1100 1000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8f: 0100 1100 1000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1100 1001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1100 1001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 92: 0100 1100 1001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 93: 0100 1100 1001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 94: 0100 1100 1001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 95: 0100 1100 1001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1100 1001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1100 1001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1100 1001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1100 1001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1100 1001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0100 1100 1001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0100 1100 1001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9d: 0100 1100 1001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9e: 0100 1100 1001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9f: 0100 1100 1001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* a0: 0100 1100 1010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1100 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1100 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1100 1010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a4: 0100 1100 1010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1100 1010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1100 1010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1100 1010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a8: 0100 1100 1010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1100 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1100 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1100 1010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1100 1010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1100 1010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1100 1010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1100 1010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* b0: 0100 1100 1011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1100 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1100 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1100 1011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b4: 0100 1100 1011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1100 1011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1100 1011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1100 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1100 1011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1100 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1100 1011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bb: 0100 1100 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1100 1011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1100 1011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1100 1011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1100 1011 1111 */
+
+ {MOV_A_PA, 2,10,10,L0|L1}, /* c0: 0100 1100 1100 0000 */
+ {MOV_A_PB, 2,10,10,L0|L1}, /* c1: 0100 1100 1100 0001 */
+ {MOV_A_PC, 2,10,10,L0|L1}, /* c2: 0100 1100 1100 0010 */
+ {MOV_A_PD, 2,10,10,L0|L1}, /* c3: 0100 1100 1100 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* c4: 0100 1100 1100 0100 */
+ {MOV_A_PF, 2,10,10,L0|L1}, /* c5: 0100 1100 1100 0101 */
+ {MOV_A_MKH, 2,10,10,L0|L1}, /* c6: 0100 1100 1100 0110 */
+ {MOV_A_MKL, 2,10,10,L0|L1}, /* c7: 0100 1100 1100 0111 */
+ {MOV_A_ANM, 2,10,10,L0|L1}, /* c8: 0100 1100 1100 1000 */
+ {MOV_A_SMH, 2,10,10,L0|L1}, /* c9: 0100 1100 1100 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* ca: 0100 1100 1100 1010 */
+ {MOV_A_EOM, 2,10,10,L0|L1}, /* cb: 0100 1100 1100 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* cc: 0100 1100 1100 1100 */
+ {MOV_A_TMM, 2,10,10,L0|L1}, /* cd: 0100 1100 1100 1101 */
+// {illegal2, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */
+ {MOV_A_PT, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */ /* 7807 */
+ {illegal2, 2,10,10,L0|L1}, /* cf: 0100 1100 1100 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* d0: 0100 1100 1101 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* d1: 0100 1100 1101 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* d2: 0100 1100 1101 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* d3: 0100 1100 1101 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* d4: 0100 1100 1101 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* d5: 0100 1100 1101 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* d6: 0100 1100 1101 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* d7: 0100 1100 1101 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* d8: 0100 1100 1101 1000 */
+ {MOV_A_RXB, 2,10,10,L0|L1}, /* d9: 0100 1100 1101 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* da: 0100 1100 1101 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* db: 0100 1100 1101 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* dc: 0100 1100 1101 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* dd: 0100 1100 1101 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* de: 0100 1100 1101 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* df: 0100 1100 1101 1111 */
+
+ {MOV_A_CR0, 2,10,10,L0|L1}, /* e0: 0100 1100 1110 0000 */
+ {MOV_A_CR1, 2,10,10,L0|L1}, /* e1: 0100 1100 1110 0001 */
+ {MOV_A_CR2, 2,10,10,L0|L1}, /* e2: 0100 1100 1110 0010 */
+ {MOV_A_CR3, 2,10,10,L0|L1}, /* e3: 0100 1100 1110 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* e4: 0100 1100 1110 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* e5: 0100 1100 1110 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* e6: 0100 1100 1110 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* e7: 0100 1100 1110 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* e8: 0100 1100 1110 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* e9: 0100 1100 1110 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* ea: 0100 1100 1110 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* eb: 0100 1100 1110 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* ec: 0100 1100 1110 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* ed: 0100 1100 1110 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* ee: 0100 1100 1110 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* ef: 0100 1100 1110 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* f0: 0100 1100 1111 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* f1: 0100 1100 1111 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* f2: 0100 1100 1111 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* f3: 0100 1100 1111 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* f4: 0100 1100 1111 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* f5: 0100 1100 1111 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* f6: 0100 1100 1111 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* f7: 0100 1100 1111 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* f8: 0100 1100 1111 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* f9: 0100 1100 1111 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* fa: 0100 1100 1111 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* fb: 0100 1100 1111 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* fc: 0100 1100 1111 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* fd: 0100 1100 1111 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* fe: 0100 1100 1111 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* ff: 0100 1100 1111 1111 */
+};
+
+/* prefix 4D */
+static struct opcode_s op4D[256] =
+{
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0100 1101 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0100 1101 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0100 1101 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0100 1101 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0100 1101 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0100 1101 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0100 1101 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0100 1101 0000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 08: 0100 1101 0000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 09: 0100 1101 0000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0100 1101 0000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0100 1101 0000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0100 1101 0000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0100 1101 0000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0e: 0100 1101 0000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0f: 0100 1101 0000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1101 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1101 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1101 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1101 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1101 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1101 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1101 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1101 0001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 18: 0100 1101 0001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 19: 0100 1101 0001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0100 1101 0001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0100 1101 0001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0100 1101 0001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0100 1101 0001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1e: 0100 1101 0001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1f: 0100 1101 0001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 20: 0100 1101 0010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 21: 0100 1101 0010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 22: 0100 1101 0010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 23: 0100 1101 0010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 24: 0100 1101 0010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 25: 0100 1101 0010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 26: 0100 1101 0010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 27: 0100 1101 0010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 28: 0100 1101 0010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 29: 0100 1101 0010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0100 1101 0010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0100 1101 0010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0100 1101 0010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0100 1101 0010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2e: 0100 1101 0010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2f: 0100 1101 0010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 30: 0100 1101 0011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 31: 0100 1101 0011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 32: 0100 1101 0011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 33: 0100 1101 0011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 34: 0100 1101 0011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 35: 0100 1101 0011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 36: 0100 1101 0011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 37: 0100 1101 0011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 38: 0100 1101 0011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 39: 0100 1101 0011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0100 1101 0011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0100 1101 0011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0100 1101 0011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0100 1101 0011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3e: 0100 1101 0011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3f: 0100 1101 0011 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 40: 0100 1101 0100 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 41: 0100 1101 0100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 42: 0100 1101 0100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 43: 0100 1101 0100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 44: 0100 1101 0100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 45: 0100 1101 0100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 46: 0100 1101 0100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 47: 0100 1101 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0100 1101 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0100 1101 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0100 1101 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0100 1101 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0100 1101 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1101 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1101 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1101 0100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 50: 0100 1101 0101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 51: 0100 1101 0101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 52: 0100 1101 0101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 53: 0100 1101 0101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 54: 0100 1101 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1101 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1101 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1101 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1101 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1101 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1101 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1101 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1101 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1101 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1101 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1101 0101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 60: 0100 1101 0110 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 61: 0100 1101 0110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 62: 0100 1101 0110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 63: 0100 1101 0110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 64: 0100 1101 0110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 65: 0100 1101 0110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 66: 0100 1101 0110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 67: 0100 1101 0110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 68: 0100 1101 0110 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 69: 0100 1101 0110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6a: 0100 1101 0110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6b: 0100 1101 0110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6c: 0100 1101 0110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1101 0110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1101 0110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1101 0110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 70: 0100 1101 0111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 71: 0100 1101 0111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 72: 0100 1101 0111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 73: 0100 1101 0111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 74: 0100 1101 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1101 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1101 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1101 0111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1101 0111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1101 0111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1101 0111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1101 0111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1101 0111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1101 0111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1101 0111 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1101 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1101 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1101 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0100 1101 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0100 1101 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0100 1101 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0100 1101 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1101 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1101 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1101 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1101 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1101 1000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0100 1101 1000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0100 1101 1000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8d: 0100 1101 1000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8e: 0100 1101 1000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8f: 0100 1101 1000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1101 1001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1101 1001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 92: 0100 1101 1001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 93: 0100 1101 1001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 94: 0100 1101 1001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 95: 0100 1101 1001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1101 1001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1101 1001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1101 1001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1101 1001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1101 1001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0100 1101 1001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0100 1101 1001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9d: 0100 1101 1001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9e: 0100 1101 1001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9f: 0100 1101 1001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* a0: 0100 1101 1010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1101 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1101 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1101 1010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a4: 0100 1101 1010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1101 1010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1101 1010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1101 1010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a8: 0100 1101 1010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1101 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1101 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1101 1010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1101 1010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1101 1010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1101 1010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1101 1010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* b0: 0100 1101 1011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1101 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1101 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1101 1011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b4: 0100 1101 1011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1101 1011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1101 1011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1101 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1101 1011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1101 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1101 1011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bb: 0100 1101 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1101 1011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1101 1011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1101 1011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1101 1011 1111 */
+
+ {MOV_PA_A, 2,10,10,L0|L1}, /* c0: 0100 1101 1100 0000 */
+ {MOV_PB_A, 2,10,10,L0|L1}, /* c1: 0100 1101 1100 0001 */
+ {MOV_PC_A, 2,10,10,L0|L1}, /* c2: 0100 1101 1100 0010 */
+ {MOV_PD_A, 2,10,10,L0|L1}, /* c3: 0100 1101 1100 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* c4: 0100 1101 1100 0100 */
+ {MOV_PF_A, 2,10,10,L0|L1}, /* c5: 0100 1101 1100 0101 */
+ {MOV_MKH_A, 2,10,10,L0|L1}, /* c6: 0100 1101 1100 0110 */
+ {MOV_MKL_A, 2,10,10,L0|L1}, /* c7: 0100 1101 1100 0111 */
+ {MOV_ANM_A, 2,10,10,L0|L1}, /* c8: 0100 1101 1100 1000 */
+ {MOV_SMH_A, 2,10,10,L0|L1}, /* c9: 0100 1101 1100 1001 */
+ {MOV_SML_A, 2,10,10,L0|L1}, /* ca: 0100 1101 1100 1010 */
+ {MOV_EOM_A, 2,10,10,L0|L1}, /* cb: 0100 1101 1100 1011 */
+ {MOV_ETMM_A, 2,10,10,L0|L1}, /* cc: 0100 1101 1100 1100 */
+ {MOV_TMM_A, 2,10,10,L0|L1}, /* cd: 0100 1101 1100 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* ce: 0100 1101 1100 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* cf: 0100 1101 1100 1111 */
+
+ {MOV_MM_A, 2,10,10,L0|L1}, /* d0: 0100 1101 1101 0000 */
+ {MOV_MCC_A, 2,10,10,L0|L1}, /* d1: 0100 1101 1101 0001 */
+ {MOV_MA_A, 2,10,10,L0|L1}, /* d2: 0100 1101 1101 0010 */
+ {MOV_MB_A, 2,10,10,L0|L1}, /* d3: 0100 1101 1101 0011 */
+ {MOV_MC_A, 2,10,10,L0|L1}, /* d4: 0100 1101 1101 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* d5: 0100 1101 1101 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* d6: 0100 1101 1101 0110 */
+ {MOV_MF_A, 2,10,10,L0|L1}, /* d7: 0100 1101 1101 0111 */
+ {MOV_TXB_A, 2,10,10,L0|L1}, /* d8: 0100 1101 1101 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* d9: 0100 1101 1101 1001 */
+ {MOV_TM0_A, 2,10,10,L0|L1}, /* da: 0100 1101 1101 1010 */
+ {MOV_TM1_A, 2,10,10,L0|L1}, /* db: 0100 1101 1101 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* dc: 0100 1101 1101 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* dd: 0100 1101 1101 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* de: 0100 1101 1101 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* df: 0100 1101 1101 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* e0: 0100 1101 1110 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* e1: 0100 1101 1110 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* e2: 0100 1101 1110 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* e3: 0100 1101 1110 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* e4: 0100 1101 1110 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* e5: 0100 1101 1110 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* e6: 0100 1101 1110 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* e7: 0100 1101 1110 0111 */
+ {MOV_ZCM_A, 2,10,10,L0|L1}, /* e8: 0100 1101 1110 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* e9: 0100 1101 1110 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* ea: 0100 1101 1110 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* eb: 0100 1101 1110 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* ec: 0100 1101 1110 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* ed: 0100 1101 1110 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* ee: 0100 1101 1110 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* ef: 0100 1101 1110 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* f0: 0100 1101 1111 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* f1: 0100 1101 1111 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* f2: 0100 1101 1111 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* f3: 0100 1101 1111 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* f4: 0100 1101 1111 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* f5: 0100 1101 1111 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* f6: 0100 1101 1111 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* f7: 0100 1101 1111 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* f8: 0100 1101 1111 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* f9: 0100 1101 1111 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* fa: 0100 1101 1111 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* fb: 0100 1101 1111 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* fc: 0100 1101 1111 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* fd: 0100 1101 1111 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* fe: 0100 1101 1111 1110 */
+ {illegal2, 2,10,10,L0|L1} /* ff: 0100 1101 1111 1111 */
+};
+
+/* prefix 60 */
+static struct opcode_s op60[256] =
+{
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0110 0000 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0110 0000 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0110 0000 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0110 0000 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0110 0000 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0110 0000 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0110 0000 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0110 0000 0000 0111 */
+ {ANA_V_A, 2, 8, 8,L0|L1}, /* 08: 0110 0000 0000 1000 */
+ {ANA_A_A, 2, 8, 8,L0|L1}, /* 09: 0110 0000 0000 1001 */
+ {ANA_B_A, 2, 8, 8,L0|L1}, /* 0a: 0110 0000 0000 1010 */
+ {ANA_C_A, 2, 8, 8,L0|L1}, /* 0b: 0110 0000 0000 1011 */
+ {ANA_D_A, 2, 8, 8,L0|L1}, /* 0c: 0110 0000 0000 1100 */
+ {ANA_E_A, 2, 8, 8,L0|L1}, /* 0d: 0110 0000 0000 1101 */
+ {ANA_H_A, 2, 8, 8,L0|L1}, /* 0e: 0110 0000 0000 1110 */
+ {ANA_L_A, 2, 8, 8,L0|L1}, /* 0f: 0110 0000 0000 1111 */
+
+ {XRA_V_A, 2, 8, 8,L0|L1}, /* 10: 0110 0000 0001 0000 */
+ {XRA_A_A, 2, 8, 8,L0|L1}, /* 11: 0110 0000 0001 0001 */
+ {XRA_B_A, 2, 8, 8,L0|L1}, /* 12: 0110 0000 0001 0010 */
+ {XRA_C_A, 2, 8, 8,L0|L1}, /* 13: 0110 0000 0001 0011 */
+ {XRA_D_A, 2, 8, 8,L0|L1}, /* 14: 0110 0000 0001 0100 */
+ {XRA_E_A, 2, 8, 8,L0|L1}, /* 15: 0110 0000 0001 0101 */
+ {XRA_H_A, 2, 8, 8,L0|L1}, /* 16: 0110 0000 0001 0110 */
+ {XRA_L_A, 2, 8, 8,L0|L1}, /* 17: 0110 0000 0001 0111 */
+ {ORA_V_A, 2, 8, 8,L0|L1}, /* 18: 0110 0000 0001 1000 */
+ {ORA_A_A, 2, 8, 8,L0|L1}, /* 19: 0110 0000 0001 1001 */
+ {ORA_B_A, 2, 8, 8,L0|L1}, /* 1a: 0110 0000 0001 1010 */
+ {ORA_C_A, 2, 8, 8,L0|L1}, /* 1b: 0110 0000 0001 1011 */
+ {ORA_D_A, 2, 8, 8,L0|L1}, /* 1c: 0110 0000 0001 1100 */
+ {ORA_E_A, 2, 8, 8,L0|L1}, /* 1d: 0110 0000 0001 1101 */
+ {ORA_H_A, 2, 8, 8,L0|L1}, /* 1e: 0110 0000 0001 1110 */
+ {ORA_L_A, 2, 8, 8,L0|L1}, /* 1f: 0110 0000 0001 1111 */
+
+ {ADDNC_V_A, 2, 8, 8,L0|L1}, /* 20: 0110 0000 0010 0000 */
+ {ADDNC_A_A, 2, 8, 8,L0|L1}, /* 21: 0110 0000 0010 0001 */
+ {ADDNC_B_A, 2, 8, 8,L0|L1}, /* 22: 0110 0000 0010 0010 */
+ {ADDNC_C_A, 2, 8, 8,L0|L1}, /* 23: 0110 0000 0010 0011 */
+ {ADDNC_D_A, 2, 8, 8,L0|L1}, /* 24: 0110 0000 0010 0100 */
+ {ADDNC_E_A, 2, 8, 8,L0|L1}, /* 25: 0110 0000 0010 0101 */
+ {ADDNC_H_A, 2, 8, 8,L0|L1}, /* 26: 0110 0000 0010 0110 */
+ {ADDNC_L_A, 2, 8, 8,L0|L1}, /* 27: 0110 0000 0010 0111 */
+ {GTA_V_A, 2, 8, 8,L0|L1}, /* 28: 0110 0000 0010 1000 */
+ {GTA_A_A, 2, 8, 8,L0|L1}, /* 29: 0110 0000 0010 1001 */
+ {GTA_B_A, 2, 8, 8,L0|L1}, /* 2a: 0110 0000 0010 1010 */
+ {GTA_C_A, 2, 8, 8,L0|L1}, /* 2b: 0110 0000 0010 1011 */
+ {GTA_D_A, 2, 8, 8,L0|L1}, /* 2c: 0110 0000 0010 1100 */
+ {GTA_E_A, 2, 8, 8,L0|L1}, /* 2d: 0110 0000 0010 1101 */
+ {GTA_H_A, 2, 8, 8,L0|L1}, /* 2e: 0110 0000 0010 1110 */
+ {GTA_L_A, 2, 8, 8,L0|L1}, /* 2f: 0110 0000 0010 1111 */
+
+ {SUBNB_V_A, 2, 8, 8,L0|L1}, /* 30: 0110 0000 0011 0000 */
+ {SUBNB_A_A, 2, 8, 8,L0|L1}, /* 31: 0110 0000 0011 0001 */
+ {SUBNB_B_A, 2, 8, 8,L0|L1}, /* 32: 0110 0000 0011 0010 */
+ {SUBNB_C_A, 2, 8, 8,L0|L1}, /* 33: 0110 0000 0011 0011 */
+ {SUBNB_D_A, 2, 8, 8,L0|L1}, /* 34: 0110 0000 0011 0100 */
+ {SUBNB_E_A, 2, 8, 8,L0|L1}, /* 35: 0110 0000 0011 0101 */
+ {SUBNB_H_A, 2, 8, 8,L0|L1}, /* 36: 0110 0000 0011 0110 */
+ {SUBNB_L_A, 2, 8, 8,L0|L1}, /* 37: 0110 0000 0011 0111 */
+ {LTA_V_A, 2, 8, 8,L0|L1}, /* 38: 0110 0000 0011 1000 */
+ {LTA_A_A, 2, 8, 8,L0|L1}, /* 39: 0110 0000 0011 1001 */
+ {LTA_B_A, 2, 8, 8,L0|L1}, /* 3a: 0110 0000 0011 1010 */
+ {LTA_C_A, 2, 8, 8,L0|L1}, /* 3b: 0110 0000 0011 1011 */
+ {LTA_D_A, 2, 8, 8,L0|L1}, /* 3c: 0110 0000 0011 1100 */
+ {LTA_E_A, 2, 8, 8,L0|L1}, /* 3d: 0110 0000 0011 1101 */
+ {LTA_H_A, 2, 8, 8,L0|L1}, /* 3e: 0110 0000 0011 1110 */
+ {LTA_L_A, 2, 8, 8,L0|L1}, /* 3f: 0110 0000 0011 1111 */
+
+ {ADD_V_A, 2, 8, 8,L0|L1}, /* 40: 0110 0000 0100 0000 */
+ {ADD_A_A, 2, 8, 8,L0|L1}, /* 41: 0110 0000 0100 0001 */
+ {ADD_B_A, 2, 8, 8,L0|L1}, /* 42: 0110 0000 0100 0010 */
+ {ADD_C_A, 2, 8, 8,L0|L1}, /* 43: 0110 0000 0100 0011 */
+ {ADD_D_A, 2, 8, 8,L0|L1}, /* 44: 0110 0000 0100 0100 */
+ {ADD_E_A, 2, 8, 8,L0|L1}, /* 45: 0110 0000 0100 0101 */
+ {ADD_H_A, 2, 8, 8,L0|L1}, /* 46: 0110 0000 0100 0110 */
+ {ADD_L_A, 2, 8, 8,L0|L1}, /* 47: 0110 0000 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0110 0000 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0110 0000 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0110 0000 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0110 0000 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0110 0000 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0110 0000 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0110 0000 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0110 0000 0100 1111 */
+
+ {ADC_V_A, 2, 8, 8,L0|L1}, /* 50: 0110 0000 0101 0000 */
+ {ADC_A_A, 2, 8, 8,L0|L1}, /* 51: 0110 0000 0101 0001 */
+ {ADC_B_A, 2, 8, 8,L0|L1}, /* 52: 0110 0000 0101 0010 */
+ {ADC_C_A, 2, 8, 8,L0|L1}, /* 53: 0110 0000 0101 0011 */
+ {ADC_D_A, 2, 8, 8,L0|L1}, /* 54: 0110 0000 0101 0100 */
+ {ADC_E_A, 2, 8, 8,L0|L1}, /* 55: 0110 0000 0101 0101 */
+ {ADC_H_A, 2, 8, 8,L0|L1}, /* 56: 0110 0000 0101 0110 */
+ {ADC_L_A, 2, 8, 8,L0|L1}, /* 57: 0110 0000 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0110 0000 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0110 0000 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0110 0000 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0110 0000 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0110 0000 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0110 0000 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0110 0000 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0110 0000 0101 1111 */
+
+ {SUB_V_A, 2, 8, 8,L0|L1}, /* 60: 0110 0000 0110 0000 */
+ {SUB_A_A, 2, 8, 8,L0|L1}, /* 61: 0110 0000 0110 0001 */
+ {SUB_B_A, 2, 8, 8,L0|L1}, /* 62: 0110 0000 0110 0010 */
+ {SUB_C_A, 2, 8, 8,L0|L1}, /* 63: 0110 0000 0110 0011 */
+ {SUB_D_A, 2, 8, 8,L0|L1}, /* 64: 0110 0000 0110 0100 */
+ {SUB_E_A, 2, 8, 8,L0|L1}, /* 65: 0110 0000 0110 0101 */
+ {SUB_H_A, 2, 8, 8,L0|L1}, /* 66: 0110 0000 0110 0110 */
+ {SUB_L_A, 2, 8, 8,L0|L1}, /* 67: 0110 0000 0110 0111 */
+ {NEA_V_A, 2, 8, 8,L0|L1}, /* 68: 0110 0000 0110 1000 */
+ {NEA_A_A, 2, 8, 8,L0|L1}, /* 69: 0110 0000 0110 1001 */
+ {NEA_B_A, 2, 8, 8,L0|L1}, /* 6a: 0110 0000 0110 1010 */
+ {NEA_C_A, 2, 8, 8,L0|L1}, /* 6b: 0110 0000 0110 1011 */
+ {NEA_D_A, 2, 8, 8,L0|L1}, /* 6c: 0110 0000 0110 1100 */
+ {NEA_E_A, 2, 8, 8,L0|L1}, /* 6d: 0110 0000 0110 1101 */
+ {NEA_H_A, 2, 8, 8,L0|L1}, /* 6e: 0110 0000 0110 1110 */
+ {NEA_L_A, 2, 8, 8,L0|L1}, /* 6f: 0110 0000 0110 1111 */
+
+ {SBB_V_A, 2, 8, 8,L0|L1}, /* 70: 0110 0000 0111 0000 */
+ {SBB_A_A, 2, 8, 8,L0|L1}, /* 71: 0110 0000 0111 0001 */
+ {SBB_B_A, 2, 8, 8,L0|L1}, /* 72: 0110 0000 0111 0010 */
+ {SBB_C_A, 2, 8, 8,L0|L1}, /* 73: 0110 0000 0111 0011 */
+ {SBB_D_A, 2, 8, 8,L0|L1}, /* 74: 0110 0000 0111 0100 */
+ {SBB_E_A, 2, 8, 8,L0|L1}, /* 75: 0110 0000 0111 0101 */
+ {SBB_H_A, 2, 8, 8,L0|L1}, /* 76: 0110 0000 0111 0110 */
+ {SBB_L_A, 2, 8, 8,L0|L1}, /* 77: 0110 0000 0111 0111 */
+ {EQA_V_A, 2, 8, 8,L0|L1}, /* 78: 0110 0000 0111 1000 */
+ {EQA_A_A, 2, 8, 8,L0|L1}, /* 79: 0110 0000 0111 1001 */
+ {EQA_B_A, 2, 8, 8,L0|L1}, /* 7a: 0110 0000 0111 1010 */
+ {EQA_C_A, 2, 8, 8,L0|L1}, /* 7b: 0110 0000 0111 1011 */
+ {EQA_D_A, 2, 8, 8,L0|L1}, /* 7c: 0110 0000 0111 1100 */
+ {EQA_E_A, 2, 8, 8,L0|L1}, /* 7d: 0110 0000 0111 1101 */
+ {EQA_H_A, 2, 8, 8,L0|L1}, /* 7e: 0110 0000 0111 1110 */
+ {EQA_L_A, 2, 8, 8,L0|L1}, /* 7f: 0110 0000 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0110 0000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0110 0000 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0110 0000 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0110 0000 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0110 0000 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0110 0000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0110 0000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0110 0000 1000 0111 */
+ {ANA_A_V, 2, 8, 8,L0|L1}, /* 88: 0110 0000 1000 1000 */
+ {ANA_A_A, 2, 8, 8,L0|L1}, /* 89: 0110 0000 1000 1001 */
+ {ANA_A_B, 2, 8, 8,L0|L1}, /* 8a: 0110 0000 1000 1010 */
+ {ANA_A_C, 2, 8, 8,L0|L1}, /* 8b: 0110 0000 1000 1011 */
+ {ANA_A_D, 2, 8, 8,L0|L1}, /* 8c: 0110 0000 1000 1100 */
+ {ANA_A_E, 2, 8, 8,L0|L1}, /* 8d: 0110 0000 1000 1101 */
+ {ANA_A_H, 2, 8, 8,L0|L1}, /* 8e: 0110 0000 1000 1110 */
+ {ANA_A_L, 2, 8, 8,L0|L1}, /* 8f: 0110 0000 1000 1111 */
+
+ {XRA_A_V, 2, 8, 8,L0|L1}, /* 90: 0110 0000 1001 0000 */
+ {XRA_A_A, 2, 8, 8,L0|L1}, /* 91: 0110 0000 1001 0001 */
+ {XRA_A_B, 2, 8, 8,L0|L1}, /* 92: 0110 0000 1001 0010 */
+ {XRA_A_C, 2, 8, 8,L0|L1}, /* 93: 0110 0000 1001 0011 */
+ {XRA_A_D, 2, 8, 8,L0|L1}, /* 94: 0110 0000 1001 0100 */
+ {XRA_A_E, 2, 8, 8,L0|L1}, /* 95: 0110 0000 1001 0101 */
+ {XRA_A_H, 2, 8, 8,L0|L1}, /* 96: 0110 0000 1001 0110 */
+ {XRA_A_L, 2, 8, 8,L0|L1}, /* 97: 0110 0000 1001 0111 */
+ {ORA_A_V, 2, 8, 8,L0|L1}, /* 98: 0110 0000 1001 1000 */
+ {ORA_A_A, 2, 8, 8,L0|L1}, /* 99: 0110 0000 1001 1001 */
+ {ORA_A_B, 2, 8, 8,L0|L1}, /* 9a: 0110 0000 1001 1010 */
+ {ORA_A_C, 2, 8, 8,L0|L1}, /* 9b: 0110 0000 1001 1011 */
+ {ORA_A_D, 2, 8, 8,L0|L1}, /* 9c: 0110 0000 1001 1100 */
+ {ORA_A_E, 2, 8, 8,L0|L1}, /* 9d: 0110 0000 1001 1101 */
+ {ORA_A_H, 2, 8, 8,L0|L1}, /* 9e: 0110 0000 1001 1110 */
+ {ORA_A_L, 2, 8, 8,L0|L1}, /* 9f: 0110 0000 1001 1111 */
+
+ {ADDNC_A_V, 2, 8, 8,L0|L1}, /* a0: 0110 0000 1010 0000 */
+ {ADDNC_A_A, 2, 8, 8,L0|L1}, /* a1: 0110 0000 1010 0001 */
+ {ADDNC_A_B, 2, 8, 8,L0|L1}, /* a2: 0110 0000 1010 0010 */
+ {ADDNC_A_C, 2, 8, 8,L0|L1}, /* a3: 0110 0000 1010 0011 */
+ {ADDNC_A_D, 2, 8, 8,L0|L1}, /* a4: 0110 0000 1010 0100 */
+ {ADDNC_A_E, 2, 8, 8,L0|L1}, /* a5: 0110 0000 1010 0101 */
+ {ADDNC_A_H, 2, 8, 8,L0|L1}, /* a6: 0110 0000 1010 0110 */
+ {ADDNC_A_L, 2, 8, 8,L0|L1}, /* a7: 0110 0000 1010 0111 */
+ {GTA_A_V, 2, 8, 8,L0|L1}, /* a8: 0110 0000 1010 1000 */
+ {GTA_A_A, 2, 8, 8,L0|L1}, /* a9: 0110 0000 1010 1001 */
+ {GTA_A_B, 2, 8, 8,L0|L1}, /* aa: 0110 0000 1010 1010 */
+ {GTA_A_C, 2, 8, 8,L0|L1}, /* ab: 0110 0000 1010 1011 */
+ {GTA_A_D, 2, 8, 8,L0|L1}, /* ac: 0110 0000 1010 1100 */
+ {GTA_A_E, 2, 8, 8,L0|L1}, /* ad: 0110 0000 1010 1101 */
+ {GTA_A_H, 2, 8, 8,L0|L1}, /* ae: 0110 0000 1010 1110 */
+ {GTA_A_L, 2, 8, 8,L0|L1}, /* af: 0110 0000 1010 1111 */
+
+ {SUBNB_A_V, 2, 8, 8,L0|L1}, /* b0: 0110 0000 1011 0000 */
+ {SUBNB_A_A, 2, 8, 8,L0|L1}, /* b1: 0110 0000 1011 0001 */
+ {SUBNB_A_B, 2, 8, 8,L0|L1}, /* b2: 0110 0000 1011 0010 */
+ {SUBNB_A_C, 2, 8, 8,L0|L1}, /* b3: 0110 0000 1011 0011 */
+ {SUBNB_A_D, 2, 8, 8,L0|L1}, /* b4: 0110 0000 1011 0100 */
+ {SUBNB_A_E, 2, 8, 8,L0|L1}, /* b5: 0110 0000 1011 0101 */
+ {SUBNB_A_H, 2, 8, 8,L0|L1}, /* b6: 0110 0000 1011 0110 */
+ {SUBNB_A_L, 2, 8, 8,L0|L1}, /* b7: 0110 0000 1011 0111 */
+ {LTA_A_V, 2, 8, 8,L0|L1}, /* b8: 0110 0000 1011 1000 */
+ {LTA_A_A, 2, 8, 8,L0|L1}, /* b9: 0110 0000 1011 1001 */
+ {LTA_A_B, 2, 8, 8,L0|L1}, /* ba: 0110 0000 1011 1010 */
+ {LTA_A_C, 2, 8, 8,L0|L1}, /* bb: 0110 0000 1011 1011 */
+ {LTA_A_D, 2, 8, 8,L0|L1}, /* bc: 0110 0000 1011 1100 */
+ {LTA_A_E, 2, 8, 8,L0|L1}, /* bd: 0110 0000 1011 1101 */
+ {LTA_A_H, 2, 8, 8,L0|L1}, /* be: 0110 0000 1011 1110 */
+ {LTA_A_L, 2, 8, 8,L0|L1}, /* bf: 0110 0000 1011 1111 */
+
+ {ADD_A_V, 2, 8, 8,L0|L1}, /* c0: 0110 0000 1100 0000 */
+ {ADD_A_A, 2, 8, 8,L0|L1}, /* c1: 0110 0000 1100 0001 */
+ {ADD_A_B, 2, 8, 8,L0|L1}, /* c2: 0110 0000 1100 0010 */
+ {ADD_A_C, 2, 8, 8,L0|L1}, /* c3: 0110 0000 1100 0011 */
+ {ADD_A_D, 2, 8, 8,L0|L1}, /* c4: 0110 0000 1100 0100 */
+ {ADD_A_E, 2, 8, 8,L0|L1}, /* c5: 0110 0000 1100 0101 */
+ {ADD_A_H, 2, 8, 8,L0|L1}, /* c6: 0110 0000 1100 0110 */
+ {ADD_A_L, 2, 8, 8,L0|L1}, /* c7: 0110 0000 1100 0111 */
+ {ONA_A_V, 2, 8, 8,L0|L1}, /* c8: 0110 0000 1100 1000 */
+ {ONA_A_A, 2, 8, 8,L0|L1}, /* c9: 0110 0000 1100 1001 */
+ {ONA_A_B, 2, 8, 8,L0|L1}, /* ca: 0110 0000 1100 1010 */
+ {ONA_A_C, 2, 8, 8,L0|L1}, /* cb: 0110 0000 1100 1011 */
+ {ONA_A_D, 2, 8, 8,L0|L1}, /* cc: 0110 0000 1100 1100 */
+ {ONA_A_E, 2, 8, 8,L0|L1}, /* cd: 0110 0000 1100 1101 */
+ {ONA_A_H, 2, 8, 8,L0|L1}, /* ce: 0110 0000 1100 1110 */
+ {ONA_A_L, 2, 8, 8,L0|L1}, /* cf: 0110 0000 1100 1111 */
+
+ {ADC_A_V, 2, 8, 8,L0|L1}, /* d0: 0110 0000 1101 0000 */
+ {ADC_A_A, 2, 8, 8,L0|L1}, /* d1: 0110 0000 1101 0001 */
+ {ADC_A_B, 2, 8, 8,L0|L1}, /* d2: 0110 0000 1101 0010 */
+ {ADC_A_C, 2, 8, 8,L0|L1}, /* d3: 0110 0000 1101 0011 */
+ {ADC_A_D, 2, 8, 8,L0|L1}, /* d4: 0110 0000 1101 0100 */
+ {ADC_A_E, 2, 8, 8,L0|L1}, /* d5: 0110 0000 1101 0101 */
+ {ADC_A_H, 2, 8, 8,L0|L1}, /* d6: 0110 0000 1101 0110 */
+ {ADC_A_L, 2, 8, 8,L0|L1}, /* d7: 0110 0000 1101 0111 */
+ {OFFA_A_V, 2, 8, 8,L0|L1}, /* d8: 0110 0000 1101 1000 */
+ {OFFA_A_A, 2, 8, 8,L0|L1}, /* d9: 0110 0000 1101 1001 */
+ {OFFA_A_B, 2, 8, 8,L0|L1}, /* da: 0110 0000 1101 1010 */
+ {OFFA_A_C, 2, 8, 8,L0|L1}, /* db: 0110 0000 1101 1011 */
+ {OFFA_A_D, 2, 8, 8,L0|L1}, /* dc: 0110 0000 1101 1100 */
+ {OFFA_A_E, 2, 8, 8,L0|L1}, /* dd: 0110 0000 1101 1101 */
+ {OFFA_A_H, 2, 8, 8,L0|L1}, /* de: 0110 0000 1101 1110 */
+ {OFFA_A_L, 2, 8, 8,L0|L1}, /* df: 0110 0000 1101 1111 */
+
+ {SUB_A_V, 2, 8, 8,L0|L1}, /* e0: 0110 0000 1110 0000 */
+ {SUB_A_A, 2, 8, 8,L0|L1}, /* e1: 0110 0000 1110 0001 */
+ {SUB_A_B, 2, 8, 8,L0|L1}, /* e2: 0110 0000 1110 0010 */
+ {SUB_A_C, 2, 8, 8,L0|L1}, /* e3: 0110 0000 1110 0011 */
+ {SUB_A_D, 2, 8, 8,L0|L1}, /* e4: 0110 0000 1110 0100 */
+ {SUB_A_E, 2, 8, 8,L0|L1}, /* e5: 0110 0000 1110 0101 */
+ {SUB_A_H, 2, 8, 8,L0|L1}, /* e6: 0110 0000 1110 0110 */
+ {SUB_A_L, 2, 8, 8,L0|L1}, /* e7: 0110 0000 1110 0111 */
+ {NEA_A_V, 2, 8, 8,L0|L1}, /* e8: 0110 0000 1110 1000 */
+ {NEA_A_A, 2, 8, 8,L0|L1}, /* e9: 0110 0000 1110 1001 */
+ {NEA_A_B, 2, 8, 8,L0|L1}, /* ea: 0110 0000 1110 1010 */
+ {NEA_A_C, 2, 8, 8,L0|L1}, /* eb: 0110 0000 1110 1011 */
+ {NEA_A_D, 2, 8, 8,L0|L1}, /* ec: 0110 0000 1110 1100 */
+ {NEA_A_E, 2, 8, 8,L0|L1}, /* ed: 0110 0000 1110 1101 */
+ {NEA_A_H, 2, 8, 8,L0|L1}, /* ee: 0110 0000 1110 1110 */
+ {NEA_A_L, 2, 8, 8,L0|L1}, /* ef: 0110 0000 1110 1111 */
+
+ {SBB_A_V, 2, 8, 8,L0|L1}, /* f0: 0110 0000 1111 0000 */
+ {SBB_A_A, 2, 8, 8,L0|L1}, /* f1: 0110 0000 1111 0001 */
+ {SBB_A_B, 2, 8, 8,L0|L1}, /* f2: 0110 0000 1111 0010 */
+ {SBB_A_C, 2, 8, 8,L0|L1}, /* f3: 0110 0000 1111 0011 */
+ {SBB_A_D, 2, 8, 8,L0|L1}, /* f4: 0110 0000 1111 0100 */
+ {SBB_A_E, 2, 8, 8,L0|L1}, /* f5: 0110 0000 1111 0101 */
+ {SBB_A_H, 2, 8, 8,L0|L1}, /* f6: 0110 0000 1111 0110 */
+ {SBB_A_L, 2, 8, 8,L0|L1}, /* f7: 0110 0000 1111 0111 */
+ {EQA_A_V, 2, 8, 8,L0|L1}, /* f8: 0110 0000 1111 1000 */
+ {EQA_A_A, 2, 8, 8,L0|L1}, /* f9: 0110 0000 1111 1001 */
+ {EQA_A_B, 2, 8, 8,L0|L1}, /* fa: 0110 0000 1111 1010 */
+ {EQA_A_C, 2, 8, 8,L0|L1}, /* fb: 0110 0000 1111 1011 */
+ {EQA_A_D, 2, 8, 8,L0|L1}, /* fc: 0110 0000 1111 1100 */
+ {EQA_A_E, 2, 8, 8,L0|L1}, /* fd: 0110 0000 1111 1101 */
+ {EQA_A_H, 2, 8, 8,L0|L1}, /* fe: 0110 0000 1111 1110 */
+ {EQA_A_L, 2, 8, 8,L0|L1} /* ff: 0110 0000 1111 1111 */
+};
+
+/* prefix 64 */
+static struct opcode_s op64[256] =
+{
+ {MVI_PA_xx, 3,14,11,L0|L1}, /* 00: 0110 0100 0000 0000 xxxx xxxx */
+ {MVI_PB_xx, 3,14,11,L0|L1}, /* 01: 0110 0100 0000 0001 xxxx xxxx */
+ {MVI_PC_xx, 3,14,11,L0|L1}, /* 02: 0110 0100 0000 0010 xxxx xxxx */
+ {MVI_PD_xx, 3,14,11,L0|L1}, /* 03: 0110 0100 0000 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 04: 0110 0100 0000 0100 xxxx xxxx */
+ {MVI_PF_xx, 3,14,11,L0|L1}, /* 05: 0110 0100 0000 0101 xxxx xxxx */
+ {MVI_MKH_xx, 3,14,11,L0|L1}, /* 06: 0110 0100 0000 0110 xxxx xxxx */
+ {MVI_MKL_xx, 3,14,11,L0|L1}, /* 07: 0110 0100 0000 0111 xxxx xxxx */
+ {ANI_PA_xx, 3,20,11,L0|L1}, /* 08: 0110 0100 0000 1000 xxxx xxxx */
+ {ANI_PB_xx, 3,20,11,L0|L1}, /* 09: 0110 0100 0000 1001 xxxx xxxx */
+ {ANI_PC_xx, 3,20,11,L0|L1}, /* 0a: 0110 0100 0000 1010 xxxx xxxx */
+ {ANI_PD_xx, 3,20,11,L0|L1}, /* 0b: 0110 0100 0000 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
+ {ANI_PF_xx, 3,20,11,L0|L1}, /* 0d: 0110 0100 0000 1101 xxxx xxxx */
+ {ANI_MKH_xx, 3,20,11,L0|L1}, /* 0e: 0110 0100 0000 1110 xxxx xxxx */
+ {ANI_MKL_xx, 3,20,11,L0|L1}, /* 0f: 0110 0100 0000 1111 xxxx xxxx */
+
+ {XRI_PA_xx, 3,20,11,L0|L1}, /* 10: 0110 0100 0001 0000 xxxx xxxx */
+ {XRI_PB_xx, 3,20,11,L0|L1}, /* 11: 0110 0100 0001 0001 xxxx xxxx */
+ {XRI_PC_xx, 3,20,11,L0|L1}, /* 12: 0110 0100 0001 0010 xxxx xxxx */
+ {XRI_PD_xx, 3,20,11,L0|L1}, /* 13: 0110 0100 0001 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 14: 0110 0100 0001 0100 xxxx xxxx */
+ {XRI_PF_xx, 3,20,11,L0|L1}, /* 15: 0110 0100 0001 0101 xxxx xxxx */
+ {XRI_MKH_xx, 3,20,11,L0|L1}, /* 16: 0110 0100 0001 0110 xxxx xxxx */
+ {XRI_MKL_xx, 3,20,11,L0|L1}, /* 17: 0110 0100 0001 0111 xxxx xxxx */
+ {ORI_PA_xx, 3,20,11,L0|L1}, /* 18: 0110 0100 0001 1000 xxxx xxxx */
+ {ORI_PB_xx, 3,20,11,L0|L1}, /* 19: 0110 0100 0001 1001 xxxx xxxx */
+ {ORI_PC_xx, 3,20,11,L0|L1}, /* 1a: 0110 0100 0001 1010 xxxx xxxx */
+ {ORI_PD_xx, 3,20,11,L0|L1}, /* 1b: 0110 0100 0001 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
+ {ORI_PF_xx, 3,20,11,L0|L1}, /* 1d: 0110 0100 0001 1101 xxxx xxxx */
+ {ORI_MKH_xx, 3,20,11,L0|L1}, /* 1e: 0110 0100 0001 1110 xxxx xxxx */
+ {ORI_MKL_xx, 3,20,11,L0|L1}, /* 1f: 0110 0100 0001 1111 xxxx xxxx */
+
+ {ADINC_PA_xx, 3,20,11,L0|L1}, /* 20: 0110 0100 0010 0000 xxxx xxxx */
+ {ADINC_PB_xx, 3,20,11,L0|L1}, /* 21: 0110 0100 0010 0001 xxxx xxxx */
+ {ADINC_PC_xx, 3,20,11,L0|L1}, /* 22: 0110 0100 0010 0010 xxxx xxxx */
+ {ADINC_PD_xx, 3,20,11,L0|L1}, /* 23: 0110 0100 0010 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 24: 0110 0100 0010 0100 xxxx xxxx */
+ {ADINC_PF_xx, 3,20,11,L0|L1}, /* 25: 0110 0100 0010 0101 xxxx xxxx */
+ {ADINC_MKH_xx, 3,20,11,L0|L1}, /* 26: 0110 0100 0010 0110 xxxx xxxx */
+ {ADINC_MKL_xx, 3,20,11,L0|L1}, /* 27: 0110 0100 0010 0111 xxxx xxxx */
+ {GTI_PA_xx, 3,20,11,L0|L1}, /* 28: 0110 0100 0010 1000 xxxx xxxx */
+ {GTI_PB_xx, 3,20,11,L0|L1}, /* 29: 0110 0100 0010 1001 xxxx xxxx */
+ {GTI_PC_xx, 3,20,11,L0|L1}, /* 2a: 0110 0100 0010 1010 xxxx xxxx */
+ {GTI_PD_xx, 3,20,11,L0|L1}, /* 2b: 0110 0100 0010 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
+ {GTI_PF_xx, 3,20,11,L0|L1}, /* 2d: 0110 0100 0010 1101 xxxx xxxx */
+ {GTI_MKH_xx, 3,20,11,L0|L1}, /* 2e: 0110 0100 0010 1110 xxxx xxxx */
+ {GTI_MKL_xx, 3,20,11,L0|L1}, /* 2f: 0110 0100 0010 1111 xxxx xxxx */
+
+ {SUINB_PA_xx, 3,20,11,L0|L1}, /* 30: 0110 0100 0011 0000 xxxx xxxx */
+ {SUINB_PB_xx, 3,20,11,L0|L1}, /* 31: 0110 0100 0011 0001 xxxx xxxx */
+ {SUINB_PC_xx, 3,20,11,L0|L1}, /* 32: 0110 0100 0011 0010 xxxx xxxx */
+ {SUINB_PD_xx, 3,20,11,L0|L1}, /* 33: 0110 0100 0011 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 34: 0110 0100 0011 0100 xxxx xxxx */
+ {SUINB_PF_xx, 3,20,11,L0|L1}, /* 35: 0110 0100 0011 0101 xxxx xxxx */
+ {SUINB_MKH_xx, 3,20,11,L0|L1}, /* 36: 0110 0100 0011 0110 xxxx xxxx */
+ {SUINB_MKL_xx, 3,20,11,L0|L1}, /* 37: 0110 0100 0011 0111 xxxx xxxx */
+ {LTI_PA_xx, 3,20,11,L0|L1}, /* 38: 0110 0100 0011 1000 xxxx xxxx */
+ {LTI_PB_xx, 3,20,11,L0|L1}, /* 39: 0110 0100 0011 1001 xxxx xxxx */
+ {LTI_PC_xx, 3,20,11,L0|L1}, /* 3a: 0110 0100 0011 1010 xxxx xxxx */
+ {LTI_PD_xx, 3,20,11,L0|L1}, /* 3b: 0110 0100 0011 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
+ {LTI_PF_xx, 3,20,11,L0|L1}, /* 3d: 0110 0100 0011 1101 xxxx xxxx */
+ {LTI_MKH_xx, 3,20,11,L0|L1}, /* 3e: 0110 0100 0011 1110 xxxx xxxx */
+ {LTI_MKL_xx, 3,20,11,L0|L1}, /* 3f: 0110 0100 0011 1111 xxxx xxxx */
+
+ {ADI_PA_xx, 3,20,11,L0|L1}, /* 40: 0110 0100 0100 0000 xxxx xxxx */
+ {ADI_PB_xx, 3,20,11,L0|L1}, /* 41: 0110 0100 0100 0001 xxxx xxxx */
+ {ADI_PC_xx, 3,20,11,L0|L1}, /* 42: 0110 0100 0100 0010 xxxx xxxx */
+ {ADI_PD_xx, 3,20,11,L0|L1}, /* 43: 0110 0100 0100 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 44: 0110 0100 0100 0100 xxxx xxxx */
+ {ADI_PF_xx, 3,20,11,L0|L1}, /* 45: 0110 0100 0100 0101 xxxx xxxx */
+ {ADI_MKH_xx, 3,20,11,L0|L1}, /* 46: 0110 0100 0100 0110 xxxx xxxx */
+ {ADI_MKL_xx, 3,20,11,L0|L1}, /* 47: 0110 0100 0100 0111 xxxx xxxx */
+ {ONI_PA_xx, 3,20,11,L0|L1}, /* 48: 0110 0100 0100 1000 xxxx xxxx */
+ {ONI_PB_xx, 3,20,11,L0|L1}, /* 49: 0110 0100 0100 1001 xxxx xxxx */
+ {ONI_PC_xx, 3,20,11,L0|L1}, /* 4a: 0110 0100 0100 1010 xxxx xxxx */
+ {ONI_PD_xx, 3,20,11,L0|L1}, /* 4b: 0110 0100 0100 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
+ {ONI_PF_xx, 3,20,11,L0|L1}, /* 4d: 0110 0100 0100 1101 xxxx xxxx */
+ {ONI_MKH_xx, 3,20,11,L0|L1}, /* 4e: 0110 0100 0100 1110 xxxx xxxx */
+ {ONI_MKL_xx, 3,20,11,L0|L1}, /* 4f: 0110 0100 0100 1111 xxxx xxxx */
+
+ {ACI_PA_xx, 3,20,11,L0|L1}, /* 50: 0110 0100 0101 0000 xxxx xxxx */
+ {ACI_PB_xx, 3,20,11,L0|L1}, /* 51: 0110 0100 0101 0001 xxxx xxxx */
+ {ACI_PC_xx, 3,20,11,L0|L1}, /* 52: 0110 0100 0101 0010 xxxx xxxx */
+ {ACI_PD_xx, 3,20,11,L0|L1}, /* 53: 0110 0100 0101 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 54: 0110 0100 0101 0100 xxxx xxxx */
+ {ACI_PF_xx, 3,20,11,L0|L1}, /* 55: 0110 0100 0101 0101 xxxx xxxx */
+ {ACI_MKH_xx, 3,20,11,L0|L1}, /* 56: 0110 0100 0101 0110 xxxx xxxx */
+ {ACI_MKL_xx, 3,20,11,L0|L1}, /* 57: 0110 0100 0101 0111 xxxx xxxx */
+ {OFFI_PA_xx, 3,20,11,L0|L1}, /* 58: 0110 0100 0101 1000 xxxx xxxx */
+ {OFFI_PB_xx, 3,20,11,L0|L1}, /* 59: 0110 0100 0101 1001 xxxx xxxx */
+ {OFFI_PC_xx, 3,20,11,L0|L1}, /* 5a: 0110 0100 0101 1010 xxxx xxxx */
+ {OFFI_PD_xx, 3,20,11,L0|L1}, /* 5b: 0110 0100 0101 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
+ {OFFI_PF_xx, 3,20,11,L0|L1}, /* 5d: 0110 0100 0101 1101 xxxx xxxx */
+ {OFFI_MKH_xx, 3,20,11,L0|L1}, /* 5e: 0110 0100 0101 1110 xxxx xxxx */
+ {OFFI_MKL_xx, 3,20,11,L0|L1}, /* 5f: 0110 0100 0101 1111 xxxx xxxx */
+
+ {SUI_PA_xx, 3,20,11,L0|L1}, /* 60: 0110 0100 0110 0000 xxxx xxxx */
+ {SUI_PB_xx, 3,20,11,L0|L1}, /* 61: 0110 0100 0110 0001 xxxx xxxx */
+ {SUI_PC_xx, 3,20,11,L0|L1}, /* 62: 0110 0100 0110 0010 xxxx xxxx */
+ {SUI_PD_xx, 3,20,11,L0|L1}, /* 63: 0110 0100 0110 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 64: 0110 0100 0110 0100 xxxx xxxx */
+ {SUI_PF_xx, 3,20,11,L0|L1}, /* 65: 0110 0100 0110 0101 xxxx xxxx */
+ {SUI_MKH_xx, 3,20,11,L0|L1}, /* 66: 0110 0100 0110 0110 xxxx xxxx */
+ {SUI_MKL_xx, 3,20,11,L0|L1}, /* 67: 0110 0100 0110 0111 xxxx xxxx */
+ {NEI_PA_xx, 3,20,11,L0|L1}, /* 68: 0110 0100 0110 1000 xxxx xxxx */
+ {NEI_PB_xx, 3,20,11,L0|L1}, /* 69: 0110 0100 0110 1001 xxxx xxxx */
+ {NEI_PC_xx, 3,20,11,L0|L1}, /* 6a: 0110 0100 0110 1010 xxxx xxxx */
+ {NEI_PD_xx, 3,20,11,L0|L1}, /* 6b: 0110 0100 0110 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
+ {NEI_PF_xx, 3,20,11,L0|L1}, /* 6d: 0110 0100 0110 1101 xxxx xxxx */
+ {NEI_MKH_xx, 3,20,11,L0|L1}, /* 6e: 0110 0100 0110 1110 xxxx xxxx */
+ {NEI_MKL_xx, 3,20,11,L0|L1}, /* 6f: 0110 0100 0110 1111 xxxx xxxx */
+
+ {SBI_PA_xx, 3,20,11,L0|L1}, /* 70: 0110 0100 0111 0000 xxxx xxxx */
+ {SBI_PB_xx, 3,20,11,L0|L1}, /* 71: 0110 0100 0111 0001 xxxx xxxx */
+ {SBI_PC_xx, 3,20,11,L0|L1}, /* 72: 0110 0100 0111 0010 xxxx xxxx */
+ {SBI_PD_xx, 3,20,11,L0|L1}, /* 73: 0110 0100 0111 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 74: 0110 0100 0111 0100 xxxx xxxx */
+ {SBI_PF_xx, 3,20,11,L0|L1}, /* 75: 0110 0100 0111 0101 xxxx xxxx */
+ {SBI_MKH_xx, 3,20,11,L0|L1}, /* 76: 0110 0100 0111 0110 xxxx xxxx */
+ {SBI_MKL_xx, 3,20,11,L0|L1}, /* 77: 0110 0100 0111 0111 xxxx xxxx */
+ {EQI_PA_xx, 3,20,11,L0|L1}, /* 78: 0110 0100 0111 1000 xxxx xxxx */
+ {EQI_PB_xx, 3,20,11,L0|L1}, /* 79: 0110 0100 0111 1001 xxxx xxxx */
+ {EQI_PC_xx, 3,20,11,L0|L1}, /* 7a: 0110 0100 0111 1010 xxxx xxxx */
+ {EQI_PD_xx, 3,20,11,L0|L1}, /* 7b: 0110 0100 0111 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
+ {EQI_PF_xx, 3,20,11,L0|L1}, /* 7d: 0110 0100 0111 1101 xxxx xxxx */
+ {EQI_MKH_xx, 3,20,11,L0|L1}, /* 7e: 0110 0100 0111 1110 xxxx xxxx */
+ {EQI_MKL_xx, 3,20,11,L0|L1}, /* 7f: 0110 0100 0111 1111 xxxx xxxx */
+
+ {MVI_ANM_xx, 3,14,11,L0|L1}, /* 80: 0110 0100 1000 0000 xxxx xxxx */
+ {MVI_SMH_xx, 3,14,11,L0|L1}, /* 81: 0110 0100 1000 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 82: 0110 0100 1000 0010 xxxx xxxx */
+ {MVI_EOM_xx, 3,14,11,L0|L1}, /* 83: 0110 0100 1000 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 84: 0110 0100 1000 0100 xxxx xxxx */
+ {MVI_TMM_xx, 3,14,11,L0|L1}, /* 85: 0110 0100 1000 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 86: 0110 0100 1000 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 87: 0110 0100 1000 0111 xxxx xxxx */
+ {ANI_ANM_xx, 3,20,11,L0|L1}, /* 88: 0110 0100 1000 1000 xxxx xxxx */
+ {ANI_SMH_xx, 3,20,11,L0|L1}, /* 89: 0110 0100 1000 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
+ {ANI_EOM_xx, 3,20,11,L0|L1}, /* 8b: 0110 0100 1000 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
+ {ANI_TMM_xx, 3,20,11,L0|L1}, /* 8d: 0110 0100 1000 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
+
+ {XRI_ANM_xx, 3,20,11,L0|L1}, /* 90: 0110 0100 1001 0000 xxxx xxxx */
+ {XRI_SMH_xx, 3,20,11,L0|L1}, /* 91: 0110 0100 1001 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 92: 0110 0100 1001 0010 xxxx xxxx */
+ {XRI_EOM_xx, 3,20,11,L0|L1}, /* 93: 0110 0100 1001 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 94: 0110 0100 1001 0100 xxxx xxxx */
+ {XRI_TMM_xx, 3,20,11,L0|L1}, /* 95: 0110 0100 1001 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 96: 0110 0100 1001 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 97: 0110 0100 1001 0111 xxxx xxxx */
+ {ORI_ANM_xx, 3,20,11,L0|L1}, /* 98: 0110 0100 1001 1000 xxxx xxxx */
+ {ORI_SMH_xx, 3,20,11,L0|L1}, /* 99: 0110 0100 1001 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
+ {ORI_EOM_xx, 3,20,11,L0|L1}, /* 9b: 0110 0100 1001 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
+ {ORI_TMM_xx, 3,20,11,L0|L1}, /* 9d: 0110 0100 1001 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
+
+ {ADINC_ANM_xx, 3,20,11,L0|L1}, /* a0: 0110 0100 1010 0000 xxxx xxxx */
+ {ADINC_SMH_xx, 3,20,11,L0|L1}, /* a1: 0110 0100 1010 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a2: 0110 0100 1010 0010 xxxx xxxx */
+ {ADINC_EOM_xx, 3,20,11,L0|L1}, /* a3: 0110 0100 1010 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a4: 0110 0100 1010 0100 xxxx xxxx */
+ {ADINC_TMM_xx, 3,20,11,L0|L1}, /* a5: 0110 0100 1010 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a6: 0110 0100 1010 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a7: 0110 0100 1010 0111 xxxx xxxx */
+ {GTI_ANM_xx, 3,20,11,L0|L1}, /* a8: 0110 0100 1010 1000 xxxx xxxx */
+ {GTI_SMH_xx, 3,20,11,L0|L1}, /* a9: 0110 0100 1010 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* aa: 0110 0100 1010 1010 xxxx xxxx */
+ {GTI_EOM_xx, 3,20,11,L0|L1}, /* ab: 0110 0100 1010 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ac: 0110 0100 1010 1100 xxxx xxxx */
+ {GTI_TMM_xx, 3,20,11,L0|L1}, /* ad: 0110 0100 1010 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ae: 0110 0100 1010 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* af: 0110 0100 1010 1111 xxxx xxxx */
+
+ {SUINB_ANM_xx, 3,20,11,L0|L1}, /* b0: 0110 0100 1011 0000 xxxx xxxx */
+ {SUINB_SMH_xx, 3,20,11,L0|L1}, /* b1: 0110 0100 1011 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b2: 0110 0100 1011 0010 xxxx xxxx */
+ {SUINB_EOM_xx, 3,20,11,L0|L1}, /* b3: 0110 0100 1011 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b4: 0110 0100 1011 0100 xxxx xxxx */
+ {SUINB_TMM_xx, 3,20,11,L0|L1}, /* b5: 0110 0100 1011 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b6: 0110 0100 1011 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b7: 0110 0100 1011 0111 xxxx xxxx */
+ {LTI_ANM_xx, 3,20,11,L0|L1}, /* b8: 0110 0100 1011 1000 xxxx xxxx */
+ {LTI_SMH_xx, 3,20,11,L0|L1}, /* b9: 0110 0100 1011 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ba: 0110 0100 1011 1010 xxxx xxxx */
+ {LTI_EOM_xx, 3,20,11,L0|L1}, /* bb: 0110 0100 1011 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* bc: 0110 0100 1011 1100 xxxx xxxx */
+ {LTI_TMM_xx, 3,20,11,L0|L1}, /* bd: 0110 0100 1011 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* be: 0110 0100 1011 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* bf: 0110 0100 1011 1111 xxxx xxxx */
+
+ {ADI_ANM_xx, 3,20,11,L0|L1}, /* c0: 0110 0100 1100 0000 xxxx xxxx */
+ {ADI_SMH_xx, 3,20,11,L0|L1}, /* c1: 0110 0100 1100 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c2: 0110 0100 1100 0010 xxxx xxxx */
+ {ADI_EOM_xx, 3,20,11,L0|L1}, /* c3: 0110 0100 1100 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c4: 0110 0100 1100 0100 xxxx xxxx */
+ {ADI_TMM_xx, 3,20,11,L0|L1}, /* c5: 0110 0100 1100 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c6: 0110 0100 1100 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c7: 0110 0100 1100 0111 xxxx xxxx */
+ {ONI_ANM_xx, 3,20,11,L0|L1}, /* c8: 0110 0100 1100 1000 xxxx xxxx */
+ {ONI_SMH_xx, 3,20,11,L0|L1}, /* c9: 0110 0100 1100 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ca: 0110 0100 1100 1010 xxxx xxxx */
+ {ONI_EOM_xx, 3,20,11,L0|L1}, /* cb: 0110 0100 1100 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* cc: 0110 0100 1100 1100 xxxx xxxx */
+ {ONI_TMM_xx, 3,20,11,L0|L1}, /* cd: 0110 0100 1100 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ce: 0110 0100 1100 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* cf: 0110 0100 1100 1111 xxxx xxxx */
+
+ {ACI_ANM_xx, 3,20,11,L0|L1}, /* d0: 0110 0100 1101 0000 xxxx xxxx */
+ {ACI_SMH_xx, 3,20,11,L0|L1}, /* d1: 0110 0100 1101 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d2: 0110 0100 1101 0010 xxxx xxxx */
+ {ACI_EOM_xx, 3,20,11,L0|L1}, /* d3: 0110 0100 1101 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d4: 0110 0100 1101 0100 xxxx xxxx */
+ {ACI_TMM_xx, 3,20,11,L0|L1}, /* d5: 0110 0100 1101 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d6: 0110 0100 1101 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d7: 0110 0100 1101 0111 xxxx xxxx */
+ {OFFI_ANM_xx, 3,20,11,L0|L1}, /* d8: 0110 0100 1101 1000 xxxx xxxx */
+ {OFFI_SMH_xx, 3,20,11,L0|L1}, /* d9: 0110 0100 1101 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* da: 0110 0100 1101 1010 xxxx xxxx */
+ {OFFI_EOM_xx, 3,20,11,L0|L1}, /* db: 0110 0100 1101 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* dc: 0110 0100 1101 1100 xxxx xxxx */
+ {OFFI_TMM_xx, 3,20,11,L0|L1}, /* dd: 0110 0100 1101 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* de: 0110 0100 1101 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* df: 0110 0100 1101 1111 xxxx xxxx */
+
+ {SUI_ANM_xx, 3,20,11,L0|L1}, /* e0: 0110 0100 1110 0000 xxxx xxxx */
+ {SUI_SMH_xx, 3,20,11,L0|L1}, /* e1: 0110 0100 1110 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e2: 0110 0100 1110 0010 xxxx xxxx */
+ {SUI_EOM_xx, 3,20,11,L0|L1}, /* e3: 0110 0100 1110 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e4: 0110 0100 1110 0100 xxxx xxxx */
+ {SUI_TMM_xx, 3,20,11,L0|L1}, /* e5: 0110 0100 1110 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e6: 0110 0100 1110 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e7: 0110 0100 1110 0111 xxxx xxxx */
+ {NEI_ANM_xx, 3,20,11,L0|L1}, /* e8: 0110 0100 1110 1000 xxxx xxxx */
+ {NEI_SMH_xx, 3,20,11,L0|L1}, /* e9: 0110 0100 1110 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ea: 0110 0100 1110 1010 xxxx xxxx */
+ {NEI_EOM_xx, 3,20,11,L0|L1}, /* eb: 0110 0100 1110 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ec: 0110 0100 1110 1100 xxxx xxxx */
+ {NEI_TMM_xx, 3,20,11,L0|L1}, /* ed: 0110 0100 1110 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ee: 0110 0100 1110 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ef: 0110 0100 1110 1111 xxxx xxxx */
+
+ {SBI_ANM_xx, 3,20,11,L0|L1}, /* f0: 0110 0100 1111 0000 xxxx xxxx */
+ {SBI_SMH_xx, 3,20,11,L0|L1}, /* f1: 0110 0100 1111 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f2: 0110 0100 1111 0010 xxxx xxxx */
+ {SBI_EOM_xx, 3,20,11,L0|L1}, /* f3: 0110 0100 1111 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f4: 0110 0100 1111 0100 xxxx xxxx */
+ {SBI_TMM_xx, 3,20,11,L0|L1}, /* f5: 0110 0100 1111 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f6: 0110 0100 1111 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f7: 0110 0100 1111 0111 xxxx xxxx */
+ {EQI_ANM_xx, 3,20,11,L0|L1}, /* f8: 0110 0100 1111 1000 xxxx xxxx */
+ {EQI_SMH_xx, 3,20,11,L0|L1}, /* f9: 0110 0100 1111 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* fa: 0110 0100 1111 1010 xxxx xxxx */
+ {EQI_EOM_xx, 3,20,11,L0|L1}, /* fb: 0110 0100 1111 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* fc: 0110 0100 1111 1100 xxxx xxxx */
+ {EQI_TMM_xx, 3,20,11,L0|L1}, /* fd: 0110 0100 1111 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* fe: 0110 0100 1111 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1} /* ff: 0110 0100 1111 1111 xxxx xxxx */
+};
+
+/* prefix 70 */
+static struct opcode_s op70[256] =
+{
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0111 0000 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0111 0000 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0111 0000 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0111 0000 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0111 0000 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0111 0000 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0111 0000 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0111 0000 0000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 08: 0111 0000 0000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 09: 0111 0000 0000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0111 0000 0000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0111 0000 0000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0111 0000 0000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0111 0000 0000 1101 */
+ {SSPD_w, 4,20,20,L0|L1}, /* 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */
+ {LSPD_w, 4,20,20,L0|L1}, /* 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0111 0000 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0111 0000 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0111 0000 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0111 0000 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0111 0000 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0111 0000 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0111 0000 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0111 0000 0001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 18: 0111 0000 0001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 19: 0111 0000 0001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0111 0000 0001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0111 0000 0001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0111 0000 0001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0111 0000 0001 1101 */
+ {SBCD_w, 4,20,20,L0|L1}, /* 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */
+ {LBCD_w, 4,20,20,L0|L1}, /* 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 20: 0111 0000 0010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 21: 0111 0000 0010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 22: 0111 0000 0010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 23: 0111 0000 0010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 24: 0111 0000 0010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 25: 0111 0000 0010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 26: 0111 0000 0010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 27: 0111 0000 0010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 28: 0111 0000 0010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 29: 0111 0000 0010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0111 0000 0010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0111 0000 0010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0111 0000 0010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0111 0000 0010 1101 */
+ {SDED_w, 4,20,20,L0|L1}, /* 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */
+ {LDED_w, 4,20,20,L0|L1}, /* 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 30: 0111 0000 0011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 31: 0111 0000 0011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 32: 0111 0000 0011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 33: 0111 0000 0011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 34: 0111 0000 0011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 35: 0111 0000 0011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 36: 0111 0000 0011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 37: 0111 0000 0011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 38: 0111 0000 0011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 39: 0111 0000 0011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0111 0000 0011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0111 0000 0011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0111 0000 0011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0111 0000 0011 1101 */
+ {SHLD_w, 4,20,20,L0|L1}, /* 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */
+ {LHLD_w, 4,20,20,L0|L1}, /* 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 40: 0111 0000 0100 0000 */
+ {EADD_EA_A, 2,11,11,L0|L1}, /* 41: 0111 0000 0100 0001 */
+ {EADD_EA_B, 2,11,11,L0|L1}, /* 42: 0111 0000 0100 0010 */
+ {EADD_EA_C, 2,11,11,L0|L1}, /* 43: 0111 0000 0100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 44: 0111 0000 0100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 45: 0111 0000 0100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 46: 0111 0000 0100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 47: 0111 0000 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0111 0000 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0111 0000 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0111 0000 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0111 0000 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0111 0000 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0111 0000 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0111 0000 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0111 0000 0100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 50: 0111 0000 0101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 51: 0111 0000 0101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 52: 0111 0000 0101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 53: 0111 0000 0101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 54: 0111 0000 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0111 0000 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0111 0000 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0111 0000 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0111 0000 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0111 0000 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0111 0000 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0111 0000 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0111 0000 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0111 0000 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0111 0000 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0111 0000 0101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 60: 0111 0000 0110 0000 */
+ {ESUB_EA_A, 2,11,11,L0|L1}, /* 61: 0111 0000 0110 0001 */
+ {ESUB_EA_B, 2,11,11,L0|L1}, /* 62: 0111 0000 0110 0010 */
+ {ESUB_EA_C, 2,11,11,L0|L1}, /* 63: 0111 0000 0110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 64: 0111 0000 0110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 65: 0111 0000 0110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 66: 0111 0000 0110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 67: 0111 0000 0110 0111 */
+ {MOV_V_w, 4,17,17,L0|L1}, /* 68: 0111 0000 0110 1000 llll llll hhhh hhhh */
+ {MOV_A_w, 4,17,17,L0|L1}, /* 69: 0111 0000 0110 1001 llll llll hhhh hhhh */
+ {MOV_B_w, 4,17,17,L0|L1}, /* 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */
+ {MOV_C_w, 4,17,17,L0|L1}, /* 6b: 0111 0000 0110 1011 llll llll hhhh hhhh */
+ {MOV_D_w, 4,17,17,L0|L1}, /* 6c: 0111 0000 0110 1100 llll llll hhhh hhhh */
+ {MOV_E_w, 4,17,17,L0|L1}, /* 6d: 0111 0000 0110 1101 llll llll hhhh hhhh */
+ {MOV_H_w, 4,17,17,L0|L1}, /* 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */
+ {MOV_L_w, 4,17,17,L0|L1}, /* 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 70: 0111 0000 0111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 71: 0111 0000 0111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 72: 0111 0000 0111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 73: 0111 0000 0111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 74: 0111 0000 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0111 0000 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0111 0000 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0111 0000 0111 0111 */
+ {MOV_w_V, 4,17,17,L0|L1}, /* 78: 0111 0000 0111 1000 llll llll hhhh hhhh */
+ {MOV_w_A, 4,17,17,L0|L1}, /* 79: 0111 0000 0111 1001 llll llll hhhh hhhh */
+ {MOV_w_B, 4,17,17,L0|L1}, /* 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */
+ {MOV_w_C, 4,17,17,L0|L1}, /* 7b: 0111 0000 0111 1011 llll llll hhhh hhhh */
+ {MOV_w_D, 4,17,17,L0|L1}, /* 7c: 0111 0000 0111 1100 llll llll hhhh hhhh */
+ {MOV_w_E, 4,17,17,L0|L1}, /* 7d: 0111 0000 0111 1101 llll llll hhhh hhhh */
+ {MOV_w_H, 4,17,17,L0|L1}, /* 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */
+ {MOV_w_L, 4,17,17,L0|L1}, /* 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0111 0000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0111 0000 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0111 0000 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0111 0000 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0111 0000 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0111 0000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0111 0000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0111 0000 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0111 0000 1000 1000 */
+ {ANAX_B, 2,11,11,L0|L1}, /* 89: 0111 0000 1000 1001 */
+ {ANAX_D, 2,11,11,L0|L1}, /* 8a: 0111 0000 1000 1010 */
+ {ANAX_H, 2,11,11,L0|L1}, /* 8b: 0111 0000 1000 1011 */
+ {ANAX_Dp, 2,11,11,L0|L1}, /* 8c: 0111 0000 1000 1100 */
+ {ANAX_Hp, 2,11,11,L0|L1}, /* 8d: 0111 0000 1000 1101 */
+ {ANAX_Dm, 2,11,11,L0|L1}, /* 8e: 0111 0000 1000 1110 */
+ {ANAX_Hm, 2,11,11,L0|L1}, /* 8f: 0111 0000 1000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0111 0000 1001 0000 */
+ {XRAX_B, 2,11,11,L0|L1}, /* 91: 0111 0000 1001 0001 */
+ {XRAX_D, 2,11,11,L0|L1}, /* 92: 0111 0000 1001 0010 */
+ {XRAX_H, 2,11,11,L0|L1}, /* 93: 0111 0000 1001 0011 */
+ {XRAX_Dp, 2,11,11,L0|L1}, /* 94: 0111 0000 1001 0100 */
+ {XRAX_Hp, 2,11,11,L0|L1}, /* 95: 0111 0000 1001 0101 */
+ {XRAX_Dm, 2,11,11,L0|L1}, /* 96: 0111 0000 1001 0110 */
+ {XRAX_Hm, 2,11,11,L0|L1}, /* 97: 0111 0000 1001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0111 0000 1001 1000 */
+// orax added, timings not verified
+ {ORAX_B, 2,11, 8,L0|L1}, /* 99: 0111 0000 1001 1001 */
+ {ORAX_D, 2,11, 8,L0|L1}, /* 9a: 0111 0000 1001 1010 */
+ {ORAX_H, 2,11, 8,L0|L1}, /* 9b: 0111 0000 1001 1011 */
+ {ORAX_Dp, 2,11, 8,L0|L1}, /* 9c: 0111 0000 1001 1100 */
+ {ORAX_Hp, 2,11, 8,L0|L1}, /* 9d: 0111 0000 1001 1101 */
+ {ORAX_Dm, 2,11, 8,L0|L1}, /* 9e: 0111 0000 1001 1110 */
+ {ORAX_Hm, 2,11, 8,L0|L1}, /* 9f: 0111 0000 1001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* a0: 0111 0000 1010 0000 */
+ {ADDNCX_B, 2,11, 8,L0|L1}, /* a1: 0111 0000 1010 0001 */
+ {ADDNCX_D, 2,11, 8,L0|L1}, /* a2: 0111 0000 1010 0010 */
+ {ADDNCX_H, 2,11, 8,L0|L1}, /* a3: 0111 0000 1010 0011 */
+ {ADDNCX_Dp, 2,11, 8,L0|L1}, /* a4: 0111 0000 1010 0100 */
+ {ADDNCX_Hp, 2,11, 8,L0|L1}, /* a5: 0111 0000 1010 0101 */
+ {ADDNCX_Dm, 2,11, 8,L0|L1}, /* a6: 0111 0000 1010 0110 */
+ {ADDNCX_Hm, 2,11, 8,L0|L1}, /* a7: 0111 0000 1010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a8: 0111 0000 1010 1000 */
+ {GTAX_B, 2,11,11,L0|L1}, /* a9: 0111 0000 1010 1001 */
+ {GTAX_D, 2,11,11,L0|L1}, /* aa: 0111 0000 1010 1010 */
+ {GTAX_H, 2,11,11,L0|L1}, /* ab: 0111 0000 1010 1011 */
+ {GTAX_Dp, 2,11,11,L0|L1}, /* ac: 0111 0000 1010 1100 */
+ {GTAX_Hp, 2,11,11,L0|L1}, /* ad: 0111 0000 1010 1101 */
+ {GTAX_Dm, 2,11,11,L0|L1}, /* ae: 0111 0000 1010 1110 */
+ {GTAX_Hm, 2,11,11,L0|L1}, /* af: 0111 0000 1010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* b0: 0111 0000 1011 0000 */
+ {SUBNBX_B, 2,11,11,L0|L1}, /* b1: 0111 0000 1011 0001 */
+ {SUBNBX_D, 2,11,11,L0|L1}, /* b2: 0111 0000 1011 0010 */
+ {SUBNBX_H, 2,11,11,L0|L1}, /* b3: 0111 0000 1011 0011 */
+ {SUBNBX_Dp, 2,11,11,L0|L1}, /* b4: 0111 0000 1011 0100 */
+ {SUBNBX_Hp, 2,11,11,L0|L1}, /* b5: 0111 0000 1011 0101 */
+ {SUBNBX_Dm, 2,11,11,L0|L1}, /* b6: 0111 0000 1011 0110 */
+ {SUBNBX_Hm, 2,11,11,L0|L1}, /* b7: 0111 0000 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0111 0000 1011 1000 */
+ {LTAX_B, 2,11,11,L0|L1}, /* b9: 0111 0000 1011 1001 */
+ {LTAX_D, 2,11,11,L0|L1}, /* ba: 0111 0000 1011 1010 */
+ {LTAX_H, 2,11,11,L0|L1}, /* bb: 0111 0000 1011 1011 */
+ {LTAX_Dp, 2,11,11,L0|L1}, /* bc: 0111 0000 1011 1100 */
+ {LTAX_Hp, 2,11,11,L0|L1}, /* bd: 0111 0000 1011 1101 */
+ {LTAX_Dm, 2,11,11,L0|L1}, /* be: 0111 0000 1011 1110 */
+ {LTAX_Hm, 2,11,11,L0|L1}, /* bf: 0111 0000 1011 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* c0: 0111 0000 1100 0000 */
+ {ADDX_B, 2,11, 8,L0|L1}, /* c1: 0111 0000 1100 0001 */
+ {ADDX_D, 2,11, 8,L0|L1}, /* c2: 0111 0000 1100 0010 */
+ {ADDX_H, 2,11, 8,L0|L1}, /* c3: 0111 0000 1100 0011 */
+ {ADDX_Dp, 2,11, 8,L0|L1}, /* c4: 0111 0000 1100 0100 */
+ {ADDX_Hp, 2,11, 8,L0|L1}, /* c5: 0111 0000 1100 0101 */
+ {ADDX_Dm, 2,11, 8,L0|L1}, /* c6: 0111 0000 1100 0110 */
+ {ADDX_Hm, 2,11, 8,L0|L1}, /* c7: 0111 0000 1100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c8: 0111 0000 1100 1000 */
+ {ONAX_B, 2,11, 8,L0|L1}, /* c9: 0111 0000 1100 1001 */
+ {ONAX_D, 2,11, 8,L0|L1}, /* ca: 0111 0000 1100 1010 */
+ {ONAX_H, 2,11, 8,L0|L1}, /* cb: 0111 0000 1100 1011 */
+ {ONAX_Dp, 2,11, 8,L0|L1}, /* cc: 0111 0000 1100 1100 */
+ {ONAX_Hp, 2,11, 8,L0|L1}, /* cd: 0111 0000 1100 1101 */
+ {ONAX_Dm, 2,11, 8,L0|L1}, /* ce: 0111 0000 1100 1110 */
+ {ONAX_Hm, 2,11, 8,L0|L1}, /* cf: 0111 0000 1100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* d0: 0111 0000 1101 0000 */
+ {ADCX_B, 2,11, 8,L0|L1}, /* d1: 0111 0000 1101 0001 */
+ {ADCX_D, 2,11, 8,L0|L1}, /* d2: 0111 0000 1101 0010 */
+ {ADCX_H, 2,11, 8,L0|L1}, /* d3: 0111 0000 1101 0011 */
+ {ADCX_Dp, 2,11, 8,L0|L1}, /* d4: 0111 0000 1101 0100 */
+ {ADCX_Hp, 2,11, 8,L0|L1}, /* d5: 0111 0000 1101 0101 */
+ {ADCX_Dm, 2,11, 8,L0|L1}, /* d6: 0111 0000 1101 0110 */
+ {ADCX_Hm, 2,11, 8,L0|L1}, /* d7: 0111 0000 1101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d8: 0111 0000 1101 1000 */
+ {OFFAX_B, 2,11, 8,L0|L1}, /* d9: 0111 0000 1101 1001 */
+ {OFFAX_D, 2,11, 8,L0|L1}, /* da: 0111 0000 1101 1010 */
+ {OFFAX_H, 2,11, 8,L0|L1}, /* db: 0111 0000 1101 1011 */
+ {OFFAX_Dp, 2,11, 8,L0|L1}, /* dc: 0111 0000 1101 1100 */
+ {OFFAX_Hp, 2,11, 8,L0|L1}, /* dd: 0111 0000 1101 1101 */
+ {OFFAX_Dm, 2,11, 8,L0|L1}, /* de: 0111 0000 1101 1110 */
+ {OFFAX_Hm, 2,11, 8,L0|L1}, /* df: 0111 0000 1101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* e0: 0111 0000 1110 0000 */
+ {SUBX_B, 2,11,11,L0|L1}, /* e1: 0111 0000 1110 0001 */
+ {SUBX_D, 2,11,11,L0|L1}, /* e2: 0111 0000 1110 0010 */
+ {SUBX_H, 2,11,11,L0|L1}, /* e3: 0111 0000 1110 0011 */
+ {SUBX_Dp, 2,11,11,L0|L1}, /* e4: 0111 0000 1110 0100 */
+ {SUBX_Hp, 2,11,11,L0|L1}, /* e5: 0111 0000 1110 0101 */
+ {SUBX_Dm, 2,11,11,L0|L1}, /* e6: 0111 0000 1110 0110 */
+ {SUBX_Hm, 2,11,11,L0|L1}, /* e7: 0111 0000 1110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e8: 0111 0000 1110 1000 */
+ {NEAX_B, 2,11,11,L0|L1}, /* e9: 0111 0000 1110 1001 */
+ {NEAX_D, 2,11,11,L0|L1}, /* ea: 0111 0000 1110 1010 */
+ {NEAX_H, 2,11,11,L0|L1}, /* eb: 0111 0000 1110 1011 */
+ {NEAX_Dp, 2,11,11,L0|L1}, /* ec: 0111 0000 1110 1100 */
+ {NEAX_Hp, 2,11,11,L0|L1}, /* ed: 0111 0000 1110 1101 */
+ {NEAX_Dm, 2,11,11,L0|L1}, /* ee: 0111 0000 1110 1110 */
+ {NEAX_Hm, 2,11,11,L0|L1}, /* ef: 0111 0000 1110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* f0: 0111 0000 1111 0000 */
+ {SBBX_B, 2,11,11,L0|L1}, /* f1: 0111 0000 1111 0001 */
+ {SBBX_D, 2,11,11,L0|L1}, /* f2: 0111 0000 1111 0010 */
+ {SBBX_H, 2,11,11,L0|L1}, /* f3: 0111 0000 1111 0011 */
+ {SBBX_Dp, 2,11,11,L0|L1}, /* f4: 0111 0000 1111 0100 */
+ {SBBX_Hp, 2,11,11,L0|L1}, /* f5: 0111 0000 1111 0101 */
+ {SBBX_Dm, 2,11,11,L0|L1}, /* f6: 0111 0000 1111 0110 */
+ {SBBX_Hm, 2,11,11,L0|L1}, /* f7: 0111 0000 1111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f8: 0111 0000 1111 1000 */
+ {EQAX_B, 2,11,11,L0|L1}, /* f9: 0111 0000 1111 1001 */
+ {EQAX_D, 2,11,11,L0|L1}, /* fa: 0111 0000 1111 1010 */
+ {EQAX_H, 2,11,11,L0|L1}, /* fb: 0111 0000 1111 1011 */
+ {EQAX_Dp, 2,11,11,L0|L1}, /* fc: 0111 0000 1111 1100 */
+ {EQAX_Hp, 2,11,11,L0|L1}, /* fd: 0111 0000 1111 1101 */
+ {EQAX_Dm, 2,11,11,L0|L1}, /* fe: 0111 0000 1111 1110 */
+ {EQAX_Hm, 2,11,11,L0|L1} /* ff: 0111 0000 1111 1111 */
+};
+
+/* prefix 74 */
+static struct opcode_s op74[256] =
+{
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0111 0100 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0111 0100 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0111 0100 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0111 0100 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0111 0100 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0111 0100 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0111 0100 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0111 0100 0000 0111 */
+ {ANI_V_xx, 3,11,11,L0|L1}, /* 08: 0111 0100 0000 1000 xxxx xxxx */
+ {ANI_A_xx, 3,11,11,L0|L1}, /* 09: 0111 0100 0000 1001 xxxx xxxx */
+ {ANI_B_xx, 3,11,11,L0|L1}, /* 0a: 0111 0100 0000 1010 xxxx xxxx */
+ {ANI_C_xx, 3,11,11,L0|L1}, /* 0b: 0111 0100 0000 1011 xxxx xxxx */
+ {ANI_D_xx, 3,11,11,L0|L1}, /* 0c: 0111 0100 0000 1100 xxxx xxxx */
+ {ANI_E_xx, 3,11,11,L0|L1}, /* 0d: 0111 0100 0000 1101 xxxx xxxx */
+ {ANI_H_xx, 3,11,11,L0|L1}, /* 0e: 0111 0100 0000 1110 xxxx xxxx */
+ {ANI_L_xx, 3,11,11,L0|L1}, /* 0f: 0111 0100 0000 1111 xxxx xxxx */
+
+ {XRI_V_xx, 3,11,11,L0|L1}, /* 10: 0111 0100 0001 0000 xxxx xxxx */
+ {XRI_A_xx, 3,11,11,L0|L1}, /* 11: 0111 0100 0001 0001 xxxx xxxx */
+ {XRI_B_xx, 3,11,11,L0|L1}, /* 12: 0111 0100 0001 0010 xxxx xxxx */
+ {XRI_C_xx, 3,11,11,L0|L1}, /* 13: 0111 0100 0001 0011 xxxx xxxx */
+ {XRI_D_xx, 3,11,11,L0|L1}, /* 14: 0111 0100 0001 0100 xxxx xxxx */
+ {XRI_E_xx, 3,11,11,L0|L1}, /* 15: 0111 0100 0001 0101 xxxx xxxx */
+ {XRI_H_xx, 3,11,11,L0|L1}, /* 16: 0111 0100 0001 0110 xxxx xxxx */
+ {XRI_L_xx, 3,11,11,L0|L1}, /* 17: 0111 0100 0001 0111 xxxx xxxx */
+ {ORI_V_xx, 3,11,11,L0|L1}, /* 18: 0111 0100 0001 1000 xxxx xxxx */
+ {ORI_A_xx, 3,11,11,L0|L1}, /* 19: 0111 0100 0001 1001 xxxx xxxx */
+ {ORI_B_xx, 3,11,11,L0|L1}, /* 1a: 0111 0100 0001 1010 xxxx xxxx */
+ {ORI_C_xx, 3,11,11,L0|L1}, /* 1b: 0111 0100 0001 1011 xxxx xxxx */
+ {ORI_D_xx, 3,11,11,L0|L1}, /* 1c: 0111 0100 0001 1100 xxxx xxxx */
+ {ORI_E_xx, 3,11,11,L0|L1}, /* 1d: 0111 0100 0001 1101 xxxx xxxx */
+ {ORI_H_xx, 3,11,11,L0|L1}, /* 1e: 0111 0100 0001 1110 xxxx xxxx */
+ {ORI_L_xx, 3,11,11,L0|L1}, /* 1f: 0111 0100 0001 1111 xxxx xxxx */
+
+ {ADINC_V_xx, 3,11,11,L0|L1}, /* 20: 0111 0100 0010 0000 xxxx xxxx */
+ {ADINC_A_xx, 3,11,11,L0|L1}, /* 21: 0111 0100 0010 0001 xxxx xxxx */
+ {ADINC_B_xx, 3,11,11,L0|L1}, /* 22: 0111 0100 0010 0010 xxxx xxxx */
+ {ADINC_C_xx, 3,11,11,L0|L1}, /* 23: 0111 0100 0010 0011 xxxx xxxx */
+ {ADINC_D_xx, 3,11,11,L0|L1}, /* 24: 0111 0100 0010 0100 xxxx xxxx */
+ {ADINC_E_xx, 3,11,11,L0|L1}, /* 25: 0111 0100 0010 0101 xxxx xxxx */
+ {ADINC_H_xx, 3,11,11,L0|L1}, /* 26: 0111 0100 0010 0110 xxxx xxxx */
+ {ADINC_L_xx, 3,11,11,L0|L1}, /* 27: 0111 0100 0010 0111 xxxx xxxx */
+ {GTI_V_xx, 3,11,11,L0|L1}, /* 28: 0111 0100 0010 1000 xxxx xxxx */
+ {GTI_A_xx, 3,11,11,L0|L1}, /* 29: 0111 0100 0010 1001 xxxx xxxx */
+ {GTI_B_xx, 3,11,11,L0|L1}, /* 2a: 0111 0100 0010 1010 xxxx xxxx */
+ {GTI_C_xx, 3,11,11,L0|L1}, /* 2b: 0111 0100 0010 1011 xxxx xxxx */
+ {GTI_D_xx, 3,11,11,L0|L1}, /* 2c: 0111 0100 0010 1100 xxxx xxxx */
+ {GTI_E_xx, 3,11,11,L0|L1}, /* 2d: 0111 0100 0010 1101 xxxx xxxx */
+ {GTI_H_xx, 3,11,11,L0|L1}, /* 2e: 0111 0100 0010 1110 xxxx xxxx */
+ {GTI_L_xx, 3,11,11,L0|L1}, /* 2f: 0111 0100 0010 1111 xxxx xxxx */
+
+ {SUINB_V_xx, 3,11,11,L0|L1}, /* 30: 0111 0100 0011 0000 xxxx xxxx */
+ {SUINB_A_xx, 3,11,11,L0|L1}, /* 31: 0111 0100 0011 0001 xxxx xxxx */
+ {SUINB_B_xx, 3,11,11,L0|L1}, /* 32: 0111 0100 0011 0010 xxxx xxxx */
+ {SUINB_C_xx, 3,11,11,L0|L1}, /* 33: 0111 0100 0011 0011 xxxx xxxx */
+ {SUINB_D_xx, 3,11,11,L0|L1}, /* 34: 0111 0100 0011 0100 xxxx xxxx */
+ {SUINB_E_xx, 3,11,11,L0|L1}, /* 35: 0111 0100 0011 0101 xxxx xxxx */
+ {SUINB_H_xx, 3,11,11,L0|L1}, /* 36: 0111 0100 0011 0110 xxxx xxxx */
+ {SUINB_L_xx, 3,11,11,L0|L1}, /* 37: 0111 0100 0011 0111 xxxx xxxx */
+ {LTI_V_xx, 3,11,11,L0|L1}, /* 38: 0111 0100 0011 1000 xxxx xxxx */
+ {LTI_A_xx, 3,11,11,L0|L1}, /* 39: 0111 0100 0011 1001 xxxx xxxx */
+ {LTI_B_xx, 3,11,11,L0|L1}, /* 3a: 0111 0100 0011 1010 xxxx xxxx */
+ {LTI_C_xx, 3,11,11,L0|L1}, /* 3b: 0111 0100 0011 1011 xxxx xxxx */
+ {LTI_D_xx, 3,11,11,L0|L1}, /* 3c: 0111 0100 0011 1100 xxxx xxxx */
+ {LTI_E_xx, 3,11,11,L0|L1}, /* 3d: 0111 0100 0011 1101 xxxx xxxx */
+ {LTI_H_xx, 3,11,11,L0|L1}, /* 3e: 0111 0100 0011 1110 xxxx xxxx */
+ {LTI_L_xx, 3,11,11,L0|L1}, /* 3f: 0111 0100 0011 1111 xxxx xxxx */
+
+ {ADI_V_xx, 3,11,11,L0|L1}, /* 40: 0111 0100 0100 0000 xxxx xxxx */
+ {ADI_A_xx, 3,11,11,L0|L1}, /* 41: 0111 0100 0100 0001 xxxx xxxx */
+ {ADI_B_xx, 3,11,11,L0|L1}, /* 42: 0111 0100 0100 0010 xxxx xxxx */
+ {ADI_C_xx, 3,11,11,L0|L1}, /* 43: 0111 0100 0100 0011 xxxx xxxx */
+ {ADI_D_xx, 3,11,11,L0|L1}, /* 44: 0111 0100 0100 0100 xxxx xxxx */
+ {ADI_E_xx, 3,11,11,L0|L1}, /* 45: 0111 0100 0100 0101 xxxx xxxx */
+ {ADI_H_xx, 3,11,11,L0|L1}, /* 46: 0111 0100 0100 0110 xxxx xxxx */
+ {ADI_L_xx, 3,11,11,L0|L1}, /* 47: 0111 0100 0100 0111 xxxx xxxx */
+ {ONI_V_xx, 3,11,11,L0|L1}, /* 48: 0111 0100 0100 1000 xxxx xxxx */
+ {ONI_A_xx, 3,11,11,L0|L1}, /* 49: 0111 0100 0100 1001 xxxx xxxx */
+ {ONI_B_xx, 3,11,11,L0|L1}, /* 4a: 0111 0100 0100 1010 xxxx xxxx */
+ {ONI_C_xx, 3,11,11,L0|L1}, /* 4b: 0111 0100 0100 1011 xxxx xxxx */
+ {ONI_D_xx, 3,11,11,L0|L1}, /* 4c: 0111 0100 0100 1100 xxxx xxxx */
+ {ONI_E_xx, 3,11,11,L0|L1}, /* 4d: 0111 0100 0100 1101 xxxx xxxx */
+ {ONI_H_xx, 3,11,11,L0|L1}, /* 4e: 0111 0100 0100 1110 xxxx xxxx */
+ {ONI_L_xx, 3,11,11,L0|L1}, /* 4f: 0111 0100 0100 1111 xxxx xxxx */
+
+ {ACI_V_xx, 3,11,11,L0|L1}, /* 50: 0111 0100 0101 0000 xxxx xxxx */
+ {ACI_A_xx, 3,11,11,L0|L1}, /* 51: 0111 0100 0101 0001 xxxx xxxx */
+ {ACI_B_xx, 3,11,11,L0|L1}, /* 52: 0111 0100 0101 0010 xxxx xxxx */
+ {ACI_C_xx, 3,11,11,L0|L1}, /* 53: 0111 0100 0101 0011 xxxx xxxx */
+ {ACI_D_xx, 3,11,11,L0|L1}, /* 54: 0111 0100 0101 0100 xxxx xxxx */
+ {ACI_E_xx, 3,11,11,L0|L1}, /* 55: 0111 0100 0101 0101 xxxx xxxx */
+ {ACI_H_xx, 3,11,11,L0|L1}, /* 56: 0111 0100 0101 0110 xxxx xxxx */
+ {ACI_L_xx, 3,11,11,L0|L1}, /* 57: 0111 0100 0101 0111 xxxx xxxx */
+ {OFFI_V_xx, 3,11,11,L0|L1}, /* 58: 0111 0100 0101 1000 xxxx xxxx */
+ {OFFI_A_xx, 3,11,11,L0|L1}, /* 59: 0111 0100 0101 1001 xxxx xxxx */
+ {OFFI_B_xx, 3,11,11,L0|L1}, /* 5a: 0111 0100 0101 1010 xxxx xxxx */
+ {OFFI_C_xx, 3,11,11,L0|L1}, /* 5b: 0111 0100 0101 1011 xxxx xxxx */
+ {OFFI_D_xx, 3,11,11,L0|L1}, /* 5c: 0111 0100 0101 1100 xxxx xxxx */
+ {OFFI_E_xx, 3,11,11,L0|L1}, /* 5d: 0111 0100 0101 1101 xxxx xxxx */
+ {OFFI_H_xx, 3,11,11,L0|L1}, /* 5e: 0111 0100 0101 1110 xxxx xxxx */
+ {OFFI_L_xx, 3,11,11,L0|L1}, /* 5f: 0111 0100 0101 1111 xxxx xxxx */
+
+ {SUI_V_xx, 3,11,11,L0|L1}, /* 60: 0111 0100 0110 0000 xxxx xxxx */
+ {SUI_A_xx, 3,11,11,L0|L1}, /* 61: 0111 0100 0110 0001 xxxx xxxx */
+ {SUI_B_xx, 3,11,11,L0|L1}, /* 62: 0111 0100 0110 0010 xxxx xxxx */
+ {SUI_C_xx, 3,11,11,L0|L1}, /* 63: 0111 0100 0110 0011 xxxx xxxx */
+ {SUI_D_xx, 3,11,11,L0|L1}, /* 64: 0111 0100 0110 0100 xxxx xxxx */
+ {SUI_E_xx, 3,11,11,L0|L1}, /* 65: 0111 0100 0110 0101 xxxx xxxx */
+ {SUI_H_xx, 3,11,11,L0|L1}, /* 66: 0111 0100 0110 0110 xxxx xxxx */
+ {SUI_L_xx, 3,11,11,L0|L1}, /* 67: 0111 0100 0110 0111 xxxx xxxx */
+ {NEI_V_xx, 3,11,11,L0|L1}, /* 68: 0111 0100 0110 1000 xxxx xxxx */
+ {NEI_A_xx, 3,11,11,L0|L1}, /* 69: 0111 0100 0110 1001 xxxx xxxx */
+ {NEI_B_xx, 3,11,11,L0|L1}, /* 6a: 0111 0100 0110 1010 xxxx xxxx */
+ {NEI_C_xx, 3,11,11,L0|L1}, /* 6b: 0111 0100 0110 1011 xxxx xxxx */
+ {NEI_D_xx, 3,11,11,L0|L1}, /* 6c: 0111 0100 0110 1100 xxxx xxxx */
+ {NEI_E_xx, 3,11,11,L0|L1}, /* 6d: 0111 0100 0110 1101 xxxx xxxx */
+ {NEI_H_xx, 3,11,11,L0|L1}, /* 6e: 0111 0100 0110 1110 xxxx xxxx */
+ {NEI_L_xx, 3,11,11,L0|L1}, /* 6f: 0111 0100 0110 1111 xxxx xxxx */
+
+ {SBI_V_xx, 3,11,11,L0|L1}, /* 70: 0111 0100 0111 0000 xxxx xxxx */
+ {SBI_A_xx, 3,11,11,L0|L1}, /* 71: 0111 0100 0111 0001 xxxx xxxx */
+ {SBI_B_xx, 3,11,11,L0|L1}, /* 72: 0111 0100 0111 0010 xxxx xxxx */
+ {SBI_C_xx, 3,11,11,L0|L1}, /* 73: 0111 0100 0111 0011 xxxx xxxx */
+ {SBI_D_xx, 3,11,11,L0|L1}, /* 74: 0111 0100 0111 0100 xxxx xxxx */
+ {SBI_E_xx, 3,11,11,L0|L1}, /* 75: 0111 0100 0111 0101 xxxx xxxx */
+ {SBI_H_xx, 3,11,11,L0|L1}, /* 76: 0111 0100 0111 0110 xxxx xxxx */
+ {SBI_L_xx, 3,11,11,L0|L1}, /* 77: 0111 0100 0111 0111 xxxx xxxx */
+ {EQI_V_xx, 3,11,11,L0|L1}, /* 78: 0111 0100 0111 1000 xxxx xxxx */
+ {EQI_A_xx, 3,11,11,L0|L1}, /* 79: 0111 0100 0111 1001 xxxx xxxx */
+ {EQI_B_xx, 3,11,11,L0|L1}, /* 7a: 0111 0100 0111 1010 xxxx xxxx */
+ {EQI_C_xx, 3,11,11,L0|L1}, /* 7b: 0111 0100 0111 1011 xxxx xxxx */
+ {EQI_D_xx, 3,11,11,L0|L1}, /* 7c: 0111 0100 0111 1100 xxxx xxxx */
+ {EQI_E_xx, 3,11,11,L0|L1}, /* 7d: 0111 0100 0111 1101 xxxx xxxx */
+ {EQI_H_xx, 3,11,11,L0|L1}, /* 7e: 0111 0100 0111 1110 xxxx xxxx */
+ {EQI_L_xx, 3,11,11,L0|L1}, /* 7f: 0111 0100 0111 1111 xxxx xxxx */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0111 0100 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0111 0100 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0111 0100 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0111 0100 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0111 0100 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0111 0100 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0111 0100 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0111 0100 1000 0111 */
+ {ANAW_wa, 3,14,11,L0|L1}, /* 88: 0111 0100 1000 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0111 0100 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0111 0100 1000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0111 0100 1000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0111 0100 1000 1100 */
+ {DAN_EA_BC, 2,11,11,L0|L1}, /* 8d: 0111 0100 1000 1101 */
+ {DAN_EA_DE, 2,11,11,L0|L1}, /* 8e: 0111 0100 1000 1110 */
+ {DAN_EA_HL, 2,11,11,L0|L1}, /* 8f: 0111 0100 1000 1111 */
+
+ {XRAW_wa, 3,14,11,L0|L1}, /* 90: 0111 0100 1001 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0111 0100 1001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 92: 0111 0100 1001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 93: 0111 0100 1001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 94: 0111 0100 1001 0100 */
+ {DXR_EA_BC, 2,11,11,L0|L1}, /* 95: 0111 0100 1001 0101 */
+ {DXR_EA_DE, 2,11,11,L0|L1}, /* 96: 0111 0100 1001 0110 */
+ {DXR_EA_HL, 2,11,11,L0|L1}, /* 97: 0111 0100 1001 0111 */
+ {ORAW_wa, 3,14,11,L0|L1}, /* 98: 0111 0100 1001 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0111 0100 1001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0111 0100 1001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0111 0100 1001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0111 0100 1001 1100 */
+ {DOR_EA_BC, 2,11,11,L0|L1}, /* 9d: 0111 0100 1001 1101 */
+ {DOR_EA_DE, 2,11,11,L0|L1}, /* 9e: 0111 0100 1001 1110 */
+ {DOR_EA_HL, 2,11,11,L0|L1}, /* 9f: 0111 0100 1001 1111 */
+
+ {ADDNCW_wa, 3,14,11,L0|L1}, /* a0: 0111 0100 1010 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0111 0100 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0111 0100 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0111 0100 1010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a4: 0111 0100 1010 0100 */
+ {DADDNC_EA_BC, 2,11,11,L0|L1}, /* a5: 0111 0100 1010 0101 */
+ {DADDNC_EA_DE, 2,11,11,L0|L1}, /* a6: 0111 0100 1010 0110 */
+ {DADDNC_EA_HL, 2,11,11,L0|L1}, /* a7: 0111 0100 1010 0111 */
+ {GTAW_wa, 3,14,11,L0|L1}, /* a8: 0111 0100 1010 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0111 0100 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0111 0100 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0111 0100 1010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ac: 0111 0100 1010 1100 */
+ {DGT_EA_BC, 2,11,11,L0|L1}, /* ad: 0111 0100 1010 1101 */
+ {DGT_EA_DE, 2,11,11,L0|L1}, /* ae: 0111 0100 1010 1110 */
+ {DGT_EA_HL, 2,11,11,L0|L1}, /* af: 0111 0100 1010 1111 */
+
+ {SUBNBW_wa, 3,14,11,L0|L1}, /* b0: 0111 0100 1011 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0111 0100 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0111 0100 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0111 0100 1011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b4: 0111 0100 1011 0100 */
+ {DSUBNB_EA_BC, 2,11,11,L0|L1}, /* b5: 0111 0100 1011 0101 */
+ {DSUBNB_EA_DE, 2,11,11,L0|L1}, /* b6: 0111 0100 1011 0110 */
+ {DSUBNB_EA_HL, 2,11,11,L0|L1}, /* b7: 0111 0100 1011 0111 */
+ {LTAW_wa, 3,14,11,L0|L1}, /* b8: 0111 0100 1011 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0111 0100 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0111 0100 1011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bb: 0111 0100 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0111 0100 1011 1100 */
+ {DLT_EA_BC, 2,11,11,L0|L1}, /* bd: 0111 0100 1011 1101 */
+ {DLT_EA_DE, 2,11,11,L0|L1}, /* be: 0111 0100 1011 1110 */
+ {DLT_EA_HL, 2,11,11,L0|L1}, /* bf: 0111 0100 1011 1111 */
+
+ {ADDW_wa, 3,14,11,L0|L1}, /* c0: 0111 0100 1100 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* c1: 0111 0100 1100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c2: 0111 0100 1100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c3: 0111 0100 1100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c4: 0111 0100 1100 0100 */
+ {DADD_EA_BC, 2,11,11,L0|L1}, /* c5: 0111 0100 1100 0101 */
+ {DADD_EA_DE, 2,11,11,L0|L1}, /* c6: 0111 0100 1100 0110 */
+ {DADD_EA_HL, 2,11,11,L0|L1}, /* c7: 0111 0100 1100 0111 */
+ {ONAW_wa, 3,14,11,L0|L1}, /* c8: 0111 0100 1100 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* c9: 0111 0100 1100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ca: 0111 0100 1100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cb: 0111 0100 1100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cc: 0111 0100 1100 1100 */
+ {DON_EA_BC, 2,11,11,L0|L1}, /* cd: 0111 0100 1100 1101 */
+ {DON_EA_DE, 2,11,11,L0|L1}, /* ce: 0111 0100 1100 1110 */
+ {DON_EA_HL, 2,11,11,L0|L1}, /* cf: 0111 0100 1100 1111 */
+
+ {ADCW_wa, 3,14,11,L0|L1}, /* d0: 0111 0100 1101 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* d1: 0111 0100 1101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d2: 0111 0100 1101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d3: 0111 0100 1101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d4: 0111 0100 1101 0100 */
+ {DADC_EA_BC, 2,11,11,L0|L1}, /* d5: 0111 0100 1101 0101 */
+ {DADC_EA_DE, 2,11,11,L0|L1}, /* d6: 0111 0100 1101 0110 */
+ {DADC_EA_HL, 2,11,11,L0|L1}, /* d7: 0111 0100 1101 0111 */
+ {OFFAW_wa, 3,14,11,L0|L1}, /* d8: 0111 0100 1101 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* d9: 0111 0100 1101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* da: 0111 0100 1101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* db: 0111 0100 1101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* dc: 0111 0100 1101 1100 */
+ {DOFF_EA_BC, 2,11,11,L0|L1}, /* dd: 0111 0100 1101 1101 */
+ {DOFF_EA_DE, 2,11,11,L0|L1}, /* de: 0111 0100 1101 1110 */
+ {DOFF_EA_HL, 2,11,11,L0|L1}, /* df: 0111 0100 1101 1111 */
+
+ {SUBW_wa, 3,14,11,L0|L1}, /* e0: 0111 0100 1110 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* e1: 0111 0100 1110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e2: 0111 0100 1110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e3: 0111 0100 1110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e4: 0111 0100 1110 0100 */
+ {DSUB_EA_BC, 2,11,11,L0|L1}, /* e5: 0111 0100 1110 0101 */
+ {DSUB_EA_DE, 2,11,11,L0|L1}, /* e6: 0111 0100 1110 0110 */
+ {DSUB_EA_HL, 2,11,11,L0|L1}, /* e7: 0111 0100 1110 0111 */
+ {NEAW_wa, 3,14,11,L0|L1}, /* e8: 0111 0100 1110 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* e9: 0111 0100 1110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ea: 0111 0100 1110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* eb: 0111 0100 1110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ec: 0111 0100 1110 1100 */
+ {DNE_EA_BC, 2,11,11,L0|L1}, /* ed: 0111 0100 1110 1101 */
+ {DNE_EA_DE, 2,11,11,L0|L1}, /* ee: 0111 0100 1110 1110 */
+ {DNE_EA_HL, 2,11,11,L0|L1}, /* ef: 0111 0100 1110 1111 */
+
+ {SBBW_wa, 3,14,11,L0|L1}, /* f0: 0111 0100 1111 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* f1: 0111 0100 1111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f2: 0111 0100 1111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f3: 0111 0100 1111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f4: 0111 0100 1111 0100 */
+ {DSBB_EA_BC, 2,11,11,L0|L1}, /* f5: 0111 0100 1111 0101 */
+ {DSBB_EA_DE, 2,11,11,L0|L1}, /* f6: 0111 0100 1111 0110 */
+ {DSBB_EA_HL, 2,11,11,L0|L1}, /* f7: 0111 0100 1111 0111 */
+ {EQAW_wa, 3,14,11,L0|L1}, /* f8: 0111 0100 1111 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* f9: 0111 0100 1111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fa: 0111 0100 1111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fb: 0111 0100 1111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fc: 0111 0100 1111 1100 */
+ {DEQ_EA_BC, 2,11,11,L0|L1}, /* fd: 0111 0100 1111 1101 */
+ {DEQ_EA_DE, 2,11,11,L0|L1}, /* fe: 0111 0100 1111 1110 */
+ {DEQ_EA_HL, 2,11,11,L0|L1} /* ff: 0111 0100 1111 1111 */
+};
+
+/* main opcodes */
+static struct opcode_s opXX_7810[256] =
+{
+ {NOP, 1, 4, 4,L0|L1}, /* 00: 0000 0000 */
+ {LDAW_wa, 2,10,10,L0|L1}, /* 01: 0000 0001 oooo oooo */
+ {INX_SP, 1, 7, 7,L0|L1}, /* 02: 0000 0010 */
+ {DCX_SP, 1, 7, 7,L0|L1}, /* 03: 0000 0011 */
+ {LXI_S_w, 3,10,10,L0|L1}, /* 04: 0000 0100 llll llll hhhh hhhh */
+ {ANIW_wa_xx, 3,19,19,L0|L1}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 06: */
+ {ANI_A_xx, 2, 7, 7,L0|L1}, /* 07: 0000 0111 xxxx xxxx */
+ {MOV_A_EAH, 1, 4, 4,L0|L1}, /* 08: 0000 1000 */
+ {MOV_A_EAL, 1, 4, 4,L0|L1}, /* 09: 0000 1001 */
+ {MOV_A_B, 1, 4, 4,L0|L1}, /* 0a: 0000 1010 */
+ {MOV_A_C, 1, 4, 4,L0|L1}, /* 0b: 0000 1011 */
+ {MOV_A_D, 1, 4, 4,L0|L1}, /* 0c: 0000 1100 */
+ {MOV_A_E, 1, 4, 4,L0|L1}, /* 0d: 0000 1101 */
+ {MOV_A_H, 1, 4, 4,L0|L1}, /* 0e: 0000 1110 */
+ {MOV_A_L, 1, 4, 4,L0|L1}, /* 0f: 0000 1111 */
+
+ {EXA, 1, 4, 4,L0|L1}, /* 10: 0001 0000 */
+ {EXX, 1, 4, 4,L0|L1}, /* 11: 0001 0001 */
+ {INX_BC, 1, 7, 7,L0|L1}, /* 12: 0001 0010 */
+ {DCX_BC, 1, 7, 7,L0|L1}, /* 13: 0001 0011 */
+ {LXI_B_w, 3,10,10,L0|L1}, /* 14: 0001 0100 llll llll hhhh hhhh */
+ {ORIW_wa_xx, 3,19,19,L0|L1}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
+ {XRI_A_xx, 2, 7, 7,L0|L1}, /* 16: 0001 0110 xxxx xxxx */
+ {ORI_A_xx, 2, 7, 7,L0|L1}, /* 17: 0001 0111 xxxx xxxx */
+ {MOV_EAH_A, 1, 4, 4,L0|L1}, /* 18: 0001 1000 */
+ {MOV_EAL_A, 1, 4, 4,L0|L1}, /* 19: 0001 1001 */
+ {MOV_B_A, 1, 4, 4,L0|L1}, /* 1a: 0001 1010 */
+ {MOV_C_A, 1, 4, 4,L0|L1}, /* 1b: 0001 1011 */
+ {MOV_D_A, 1, 4, 4,L0|L1}, /* 1c: 0001 1100 */
+ {MOV_E_A, 1, 4, 4,L0|L1}, /* 1d: 0001 1101 */
+ {MOV_H_A, 1, 4, 4,L0|L1}, /* 1e: 0001 1110 */
+ {MOV_L_A, 1, 4, 4,L0|L1}, /* 1f: 0001 1111 */
+
+ {INRW_wa, 2,16,16,L0|L1}, /* 20: 0010 0000 oooo oooo */
+ {JB, 1, 4, 4,L0|L1}, /* 21: 0010 0001 */
+ {INX_DE, 1, 7, 7,L0|L1}, /* 22: 0010 0010 */
+ {DCX_DE, 1, 7, 7,L0|L1}, /* 23: 0010 0011 */
+ {LXI_D_w, 3,10,10,L0|L1}, /* 24: 0010 0100 llll llll hhhh hhhh */
+ {GTIW_wa_xx, 3,19,19,L0|L1}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
+ {ADINC_A_xx, 2, 7, 7,L0|L1}, /* 26: 0010 0110 xxxx xxxx */
+ {GTI_A_xx, 2, 7, 7,L0|L1}, /* 27: 0010 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 28: */
+ {LDAX_B, 2, 7, 7,L0|L1}, /* 29: 0010 1001 dddd dddd */
+ {LDAX_D, 2, 7, 7,L0|L1}, /* 2a: 0010 1010 dddd dddd */
+ {LDAX_H, 2, 7, 7,L0|L1}, /* 2b: 0010 1011 dddd dddd */
+ {LDAX_Dp, 2, 7, 7,L0|L1}, /* 2c: 0010 1100 dddd dddd */
+ {LDAX_Hp, 2, 7, 7,L0|L1}, /* 2d: 0010 1101 dddd dddd */
+ {LDAX_Dm, 2, 7, 7,L0|L1}, /* 2e: 0010 1110 dddd dddd */
+ {LDAX_Hm, 2, 7, 7,L0|L1}, /* 2f: 0010 1111 dddd dddd */
+
+ {DCRW_wa, 2,16,16,L0|L1}, /* 30: 0011 0000 oooo oooo */
+ {BLOCK, 1,13,13,L0|L1}, /* 31: 0011 0001 */ /* 7810 */
+ {INX_HL, 1, 7, 7,L0|L1}, /* 32: 0011 0010 */
+ {DCX_HL, 1, 7, 7,L0|L1}, /* 33: 0011 0011 */
+ {LXI_H_w, 3,10,10, L1}, /* 34: 0011 0100 llll llll hhhh hhhh */
+ {LTIW_wa_xx, 3,19,19,L0|L1}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
+ {SUINB_A_xx, 2, 7, 7,L0|L1}, /* 36: 0011 0110 xxxx xxxx */
+ {LTI_A_xx, 2, 7, 7,L0|L1}, /* 37: 0011 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 38: */
+ {STAX_B, 2, 7, 7,L0|L1}, /* 39: 0011 1001 dddd dddd */
+ {STAX_D, 2, 7, 7,L0|L1}, /* 3a: 0011 1010 dddd dddd */
+ {STAX_H, 2, 7, 7,L0|L1}, /* 3b: 0011 1011 dddd dddd */
+ {STAX_Dp, 2, 7, 7,L0|L1}, /* 3c: 0011 1100 dddd dddd */
+ {STAX_Hp, 2, 7, 7,L0|L1}, /* 3d: 0011 1101 dddd dddd */
+ {STAX_Dm, 2, 7, 7,L0|L1}, /* 3e: 0011 1110 dddd dddd */
+ {STAX_Hm, 2, 7, 7,L0|L1}, /* 3f: 0011 1111 dddd dddd */
+
+ {CALL_w, 3,16,16,L0|L1}, /* 40: 0100 0000 llll llll hhhh hhhh */
+ {INR_A, 1, 4, 4,L0|L1}, /* 41: 0100 0001 */
+ {INR_B, 1, 4, 4,L0|L1}, /* 42: 0100 0010 */
+ {INR_C, 1, 4, 4,L0|L1}, /* 43: 0100 0011 */
+ {LXI_EA_s, 3,10,10,L0|L1}, /* 44: 0100 0100 llll llll hhhh hhhh */
+ {ONIW_wa_xx, 3,19,19,L0|L1}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
+ {ADI_A_xx, 2, 7, 7,L0|L1}, /* 46: 0100 0110 xxxx xxxx */
+ {ONI_A_xx, 2, 7, 7,L0|L1}, /* 47: 0100 0111 xxxx xxxx */
+ {PRE_48, 1, 0, 0,L0|L1}, /* 48: prefix */
+ {MVIX_BC_xx, 2,10,10,L0|L1}, /* 49: 0100 1001 xxxx xxxx */
+ {MVIX_DE_xx, 2,10,10,L0|L1}, /* 4a: 0100 1010 xxxx xxxx */
+ {MVIX_HL_xx, 2,10,10,L0|L1}, /* 4b: 0100 1011 xxxx xxxx */
+ {PRE_4C, 1, 0, 0,L0|L1}, /* 4c: prefix */
+ {PRE_4D, 1, 4, 4,L0|L1}, /* 4d: prefix */
+ {JRE, 2,10,10,L0|L1}, /* 4e: 0100 111d dddd dddd */
+ {JRE, 2,10,10,L0|L1}, /* 4f: 0100 111d dddd dddd */
+
+ {EXH, 1, 4, 4,L0|L1}, /* 50: 0101 0000 */ /* 7810 */
+ {DCR_A, 1, 4, 4,L0|L1}, /* 51: 0101 0001 */
+ {DCR_B, 1, 4, 4,L0|L1}, /* 52: 0101 0010 */
+ {DCR_C, 1, 4, 4,L0|L1}, /* 53: 0101 0011 */
+ {JMP_w, 3,10,10,L0|L1}, /* 54: 0101 0100 llll llll hhhh hhhh */
+ {OFFIW_wa_xx, 3,19,19,L0|L1}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
+ {ACI_A_xx, 2, 7, 7,L0|L1}, /* 56: 0101 0110 xxxx xxxx */
+ {OFFI_A_xx, 2, 7, 7,L0|L1}, /* 57: 0101 0111 xxxx xxxx */
+ {BIT_0_wa, 2,10,10,L0|L1}, /* 58: 0101 1000 oooo oooo */ /* 7810 */
+ {BIT_1_wa, 2,10,10,L0|L1}, /* 59: 0101 1001 oooo oooo */ /* 7810 */
+ {BIT_2_wa, 2,10,10,L0|L1}, /* 5a: 0101 1010 oooo oooo */ /* 7810 */
+ {BIT_3_wa, 2,10,10,L0|L1}, /* 5b: 0101 1011 oooo oooo */ /* 7810 */
+ {BIT_4_wa, 2,10,10,L0|L1}, /* 5c: 0101 1100 oooo oooo */ /* 7810 */
+ {BIT_5_wa, 2,10,10,L0|L1}, /* 5d: 0101 1101 oooo oooo */ /* 7810 */
+ {BIT_6_wa, 2,10,10,L0|L1}, /* 5e: 0101 1110 oooo oooo */ /* 7810 */
+ {BIT_7_wa, 2,10,10,L0|L1}, /* 5f: 0101 1111 oooo oooo */ /* 7810 */
+
+ {PRE_60, 1, 0, 0,L0|L1}, /* 60: */
+ {DAA, 1, 4, 4,L0|L1}, /* 61: 0110 0001 */
+ {RETI, 1,13,13,L0|L1}, /* 62: 0110 0010 */
+ {STAW_wa, 2,10,10,L0|L1}, /* 63: 0110 0011 oooo oooo */
+ {PRE_64, 1, 0, 0,L0|L1}, /* 64: */
+ {NEIW_wa_xx, 3,19,19,L0|L1}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
+ {SUI_A_xx, 2, 7, 7,L0|L1}, /* 66: 0110 0110 xxxx xxxx */
+ {NEI_A_xx, 2, 7, 7,L0|L1}, /* 67: 0110 0111 xxxx xxxx */
+ {MVI_V_xx, 2, 7, 7,L0|L1}, /* 68: 0110 1000 xxxx xxxx */
+ {MVI_A_xx, 2, 7, 7,L0 }, /* 69: 0110 1001 xxxx xxxx */
+ {MVI_B_xx, 2, 7, 7,L0|L1}, /* 6a: 0110 1010 xxxx xxxx */
+ {MVI_C_xx, 2, 7, 7,L0|L1}, /* 6b: 0110 1011 xxxx xxxx */
+ {MVI_D_xx, 2, 7, 7,L0|L1}, /* 6c: 0110 1100 xxxx xxxx */
+ {MVI_E_xx, 2, 7, 7,L0|L1}, /* 6d: 0110 1101 xxxx xxxx */
+ {MVI_H_xx, 2, 7, 7,L0|L1}, /* 6e: 0110 1110 xxxx xxxx */
+ {MVI_L_xx, 2, 7, 7, L1}, /* 6f: 0110 1111 xxxx xxxx */
+
+ {PRE_70, 1, 0, 0,L0|L1}, /* 70: */
+ {MVIW_wa_xx, 3,13,13,L0|L1}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
+ {SOFTI, 1,16,16,L0|L1}, /* 72: 0111 0010 */
+ {illegal, 1, 0, 0,L0|L1}, /* 73: */
+ {PRE_74, 1, 0, 0,L0|L1}, /* 74: prefix */
+ {EQIW_wa_xx, 3,19,19,L0|L1}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
+ {SBI_A_xx, 2, 7, 7,L0|L1}, /* 76: 0111 0110 xxxx xxxx */
+ {EQI_A_xx, 2, 7, 7,L0|L1}, /* 77: 0111 0111 xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 78: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 79: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7a: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7b: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7c: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7d: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7e: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7f: 0111 1xxx xxxx xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 80: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 81: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 82: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 83: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 84: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 85: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 86: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 87: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 88: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 89: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8f: 100x xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 90: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 91: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 92: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 93: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 94: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 95: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 96: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 97: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 98: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 99: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9f: 100x xxxx */
+
+ {POP_VA, 1,10,10,L0|L1}, /* a0: 1010 0000 */
+ {POP_BC, 1,10,10,L0|L1}, /* a1: 1010 0001 */
+ {POP_DE, 1,10,10,L0|L1}, /* a2: 1010 0010 */
+ {POP_HL, 1,10,10,L0|L1}, /* a3: 1010 0011 */
+ {POP_EA, 1,10,10,L0|L1}, /* a4: 1010 0100 */
+ {DMOV_EA_BC, 1, 4, 4,L0|L1}, /* a5: 1010 0101 */
+ {DMOV_EA_DE, 1, 4, 4,L0|L1}, /* a6: 1010 0110 */
+ {DMOV_EA_HL, 1, 4, 4,L0|L1}, /* a7: 1010 0111 */
+ {INX_EA, 1, 7, 7,L0|L1}, /* a8: 1010 1000 */
+ {DCX_EA, 1, 7, 7,L0|L1}, /* a9: 1010 1001 */
+ {EI, 1, 4, 4,L0|L1}, /* aa: 1010 1010 */
+ {LDAX_D_xx, 2, 7, 7,L0|L1}, /* ab: 1010 1011 dddd dddd */
+ {LDAX_H_A, 1, 7, 7,L0|L1}, /* ac: 1010 1100 */
+ {LDAX_H_B, 1, 7, 7,L0|L1}, /* ad: 1010 1101 */
+ {LDAX_H_EA, 1, 7, 7,L0|L1}, /* ae: 1010 1110 */
+ {LDAX_H_xx, 2, 7, 7,L0|L1}, /* af: 1010 1111 dddd dddd */
+
+ {PUSH_VA, 1,13,13,L0|L1}, /* b0: 1011 0000 */
+ {PUSH_BC, 1,13,13,L0|L1}, /* b1: 1011 0001 */
+ {PUSH_DE, 1,13,13,L0|L1}, /* b2: 1011 0010 */
+ {PUSH_HL, 1,13,13,L0|L1}, /* b3: 1011 0011 */
+ {PUSH_EA, 1,13,13,L0|L1}, /* b4: 1011 0100 */
+ {DMOV_BC_EA, 1, 4, 4,L0|L1}, /* b5: 1011 0101 */
+ {DMOV_DE_EA, 1, 4, 4,L0|L1}, /* b6: 1011 0110 */
+ {DMOV_HL_EA, 1, 4, 4,L0|L1}, /* b7: 1011 0111 */
+ {RET, 1,10,10,L0|L1}, /* b8: 1011 1000 */
+ {RETS, 1,10,10,L0|L1}, /* b9: 1011 1001 */
+ {DI, 1, 4, 4,L0|L1}, /* ba: 1011 1010 */
+ {STAX_D_xx, 2, 7, 7,L0|L1}, /* bb: 1011 1011 dddd dddd */
+ {STAX_H_A, 1, 7, 7,L0|L1}, /* bc: 1011 1100 */
+ {STAX_H_B, 1, 7, 7,L0|L1}, /* bd: 1011 1101 */
+ {STAX_H_EA, 1, 7, 7,L0|L1}, /* be: 1011 1110 */
+ {STAX_H_xx, 2, 7, 7,L0|L1}, /* bf: 1011 1111 dddd dddd */
+
+ {JR, 1,10,10,L0|L1}, /* c0: 1100 0000 */
+ {JR, 1,10,10,L0|L1}, /* c1: 1100 0001 */
+ {JR, 1,10,10,L0|L1}, /* c2: 1100 0010 */
+ {JR, 1,10,10,L0|L1}, /* c3: 1100 0011 */
+ {JR, 1,10,10,L0|L1}, /* c4: 1100 0100 */
+ {JR, 1,10,10,L0|L1}, /* c5: 1100 0101 */
+ {JR, 1,10,10,L0|L1}, /* c6: 1100 0110 */
+ {JR, 1,10,10,L0|L1}, /* c7: 1100 0111 */
+ {JR, 1,10,10,L0|L1}, /* c8: 1100 1000 */
+ {JR, 1,10,10,L0|L1}, /* c9: 1100 1001 */
+ {JR, 1,10,10,L0|L1}, /* ca: 1100 1010 */
+ {JR, 1,10,10,L0|L1}, /* cb: 1100 1011 */
+ {JR, 1,10,10,L0|L1}, /* cc: 1100 1100 */
+ {JR, 1,10,10,L0|L1}, /* cd: 1100 1101 */
+ {JR, 1,10,10,L0|L1}, /* ce: 1100 1110 */
+ {JR, 1,10,10,L0|L1}, /* cf: 1100 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* d0: 1101 0000 */
+ {JR, 1,10,10,L0|L1}, /* d1: 1101 0001 */
+ {JR, 1,10,10,L0|L1}, /* d2: 1101 0010 */
+ {JR, 1,10,10,L0|L1}, /* d3: 1101 0011 */
+ {JR, 1,10,10,L0|L1}, /* d4: 1101 0100 */
+ {JR, 1,10,10,L0|L1}, /* d5: 1101 0101 */
+ {JR, 1,10,10,L0|L1}, /* d6: 1101 0110 */
+ {JR, 1,10,10,L0|L1}, /* d7: 1101 0111 */
+ {JR, 1,10,10,L0|L1}, /* d8: 1101 1000 */
+ {JR, 1,10,10,L0|L1}, /* d9: 1101 1001 */
+ {JR, 1,10,10,L0|L1}, /* da: 1101 1010 */
+ {JR, 1,10,10,L0|L1}, /* db: 1101 1011 */
+ {JR, 1,10,10,L0|L1}, /* dc: 1101 1100 */
+ {JR, 1,10,10,L0|L1}, /* dd: 1101 1101 */
+ {JR, 1,10,10,L0|L1}, /* de: 1101 1110 */
+ {JR, 1,10,10,L0|L1}, /* df: 1101 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* e0: 1110 0000 */
+ {JR, 1,10,10,L0|L1}, /* e1: 1110 0001 */
+ {JR, 1,10,10,L0|L1}, /* e2: 1110 0010 */
+ {JR, 1,10,10,L0|L1}, /* e3: 1110 0011 */
+ {JR, 1,10,10,L0|L1}, /* e4: 1110 0100 */
+ {JR, 1,10,10,L0|L1}, /* e5: 1110 0101 */
+ {JR, 1,10,10,L0|L1}, /* e6: 1110 0110 */
+ {JR, 1,10,10,L0|L1}, /* e7: 1110 0111 */
+ {JR, 1,10,10,L0|L1}, /* e8: 1110 1000 */
+ {JR, 1,10,10,L0|L1}, /* e9: 1110 1001 */
+ {JR, 1,10,10,L0|L1}, /* ea: 1110 1010 */
+ {JR, 1,10,10,L0|L1}, /* eb: 1110 1011 */
+ {JR, 1,10,10,L0|L1}, /* ec: 1110 1100 */
+ {JR, 1,10,10,L0|L1}, /* ed: 1110 1101 */
+ {JR, 1,10,10,L0|L1}, /* ee: 1110 1110 */
+ {JR, 1,10,10,L0|L1}, /* ef: 1110 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* f0: 1111 0000 */
+ {JR, 1,10,10,L0|L1}, /* f1: 1111 0001 */
+ {JR, 1,10,10,L0|L1}, /* f2: 1111 0010 */
+ {JR, 1,10,10,L0|L1}, /* f3: 1111 0011 */
+ {JR, 1,10,10,L0|L1}, /* f4: 1111 0100 */
+ {JR, 1,10,10,L0|L1}, /* f5: 1111 0101 */
+ {JR, 1,10,10,L0|L1}, /* f6: 1111 0110 */
+ {JR, 1,10,10,L0|L1}, /* f7: 1111 0111 */
+ {JR, 1,10,10,L0|L1}, /* f8: 1111 1000 */
+ {JR, 1,10,10,L0|L1}, /* f9: 1111 1001 */
+ {JR, 1,10,10,L0|L1}, /* fa: 1111 1010 */
+ {JR, 1,10,10,L0|L1}, /* fb: 1111 1011 */
+ {JR, 1,10,10,L0|L1}, /* fc: 1111 1100 */
+ {JR, 1,10,10,L0|L1}, /* fd: 1111 1101 */
+ {JR, 1,10,10,L0|L1}, /* fe: 1111 1110 */
+ {JR, 1,10,10,L0|L1} /* ff: 1111 1111 */
+};
+
+static struct opcode_s opXX_7807[256] =
+{
+ {NOP, 1, 4, 4,L0|L1}, /* 00: 0000 0000 */
+ {LDAW_wa, 2,10,10,L0|L1}, /* 01: 0000 0001 oooo oooo */
+ {INX_SP, 1, 7, 7,L0|L1}, /* 02: 0000 0010 */
+ {DCX_SP, 1, 7, 7,L0|L1}, /* 03: 0000 0011 */
+ {LXI_S_w, 3,10,10,L0|L1}, /* 04: 0000 0100 llll llll hhhh hhhh */
+ {ANIW_wa_xx, 3,19,19,L0|L1}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 06: */
+ {ANI_A_xx, 2, 7, 7,L0|L1}, /* 07: 0000 0111 xxxx xxxx */
+ {MOV_A_EAH, 1, 4, 4,L0|L1}, /* 08: 0000 1000 */
+ {MOV_A_EAL, 1, 4, 4,L0|L1}, /* 09: 0000 1001 */
+ {MOV_A_B, 1, 4, 4,L0|L1}, /* 0a: 0000 1010 */
+ {MOV_A_C, 1, 4, 4,L0|L1}, /* 0b: 0000 1011 */
+ {MOV_A_D, 1, 4, 4,L0|L1}, /* 0c: 0000 1100 */
+ {MOV_A_E, 1, 4, 4,L0|L1}, /* 0d: 0000 1101 */
+ {MOV_A_H, 1, 4, 4,L0|L1}, /* 0e: 0000 1110 */
+ {MOV_A_L, 1, 4, 4,L0|L1}, /* 0f: 0000 1111 */
+
+ {illegal, 1,13, 4,L0|L1}, /* 10: 0001 0000 */ /* 7807 */
+ {illegal, 1,13, 4,L0|L1}, /* 11: 0001 0001 */ /* 7807 */
+ {INX_BC, 1, 7, 7,L0|L1}, /* 12: 0001 0010 */
+ {DCX_BC, 1, 7, 7,L0|L1}, /* 13: 0001 0011 */
+ {LXI_B_w, 3,10,10,L0|L1}, /* 14: 0001 0100 llll llll hhhh hhhh */
+ {ORIW_wa_xx, 3,19,19,L0|L1}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
+ {XRI_A_xx, 2, 7, 7,L0|L1}, /* 16: 0001 0110 xxxx xxxx */
+ {ORI_A_xx, 2, 7, 7,L0|L1}, /* 17: 0001 0111 xxxx xxxx */
+ {MOV_EAH_A, 1, 4, 4,L0|L1}, /* 18: 0001 1000 */
+ {MOV_EAL_A, 1, 4, 4,L0|L1}, /* 19: 0001 1001 */
+ {MOV_B_A, 1, 4, 4,L0|L1}, /* 1a: 0001 1010 */
+ {MOV_C_A, 1, 4, 4,L0|L1}, /* 1b: 0001 1011 */
+ {MOV_D_A, 1, 4, 4,L0|L1}, /* 1c: 0001 1100 */
+ {MOV_E_A, 1, 4, 4,L0|L1}, /* 1d: 0001 1101 */
+ {MOV_H_A, 1, 4, 4,L0|L1}, /* 1e: 0001 1110 */
+ {MOV_L_A, 1, 4, 4,L0|L1}, /* 1f: 0001 1111 */
+
+ {INRW_wa, 2,16,16,L0|L1}, /* 20: 0010 0000 oooo oooo */
+ {JB, 1, 4, 4,L0|L1}, /* 21: 0010 0001 */
+ {INX_DE, 1, 7, 7,L0|L1}, /* 22: 0010 0010 */
+ {DCX_DE, 1, 7, 7,L0|L1}, /* 23: 0010 0011 */
+ {LXI_D_w, 3,10,10,L0|L1}, /* 24: 0010 0100 llll llll hhhh hhhh */
+ {GTIW_wa_xx, 3,19,19,L0|L1}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
+ {ADINC_A_xx, 2, 7, 7,L0|L1}, /* 26: 0010 0110 xxxx xxxx */
+ {GTI_A_xx, 2, 7, 7,L0|L1}, /* 27: 0010 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 28: */
+ {LDAX_B, 2, 7, 7,L0|L1}, /* 29: 0010 1001 dddd dddd */
+ {LDAX_D, 2, 7, 7,L0|L1}, /* 2a: 0010 1010 dddd dddd */
+ {LDAX_H, 2, 7, 7,L0|L1}, /* 2b: 0010 1011 dddd dddd */
+ {LDAX_Dp, 2, 7, 7,L0|L1}, /* 2c: 0010 1100 dddd dddd */
+ {LDAX_Hp, 2, 7, 7,L0|L1}, /* 2d: 0010 1101 dddd dddd */
+ {LDAX_Dm, 2, 7, 7,L0|L1}, /* 2e: 0010 1110 dddd dddd */
+ {LDAX_Hm, 2, 7, 7,L0|L1}, /* 2f: 0010 1111 dddd dddd */
+
+ {DCRW_wa, 2,16,16,L0|L1}, /* 30: 0011 0000 oooo oooo */
+ {illegal, 2, 8, 8,L0|L1}, /* 31: 0011 0001 bbbb bbbb */ /* 7807 */
+ {INX_HL, 1, 7, 7,L0|L1}, /* 32: 0011 0010 */
+ {DCX_HL, 1, 7, 7,L0|L1}, /* 33: 0011 0011 */
+ {LXI_H_w, 3,10,10, L1}, /* 34: 0011 0100 llll llll hhhh hhhh */
+ {LTIW_wa_xx, 3,19,19,L0|L1}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
+ {SUINB_A_xx, 2, 7, 7,L0|L1}, /* 36: 0011 0110 xxxx xxxx */
+ {LTI_A_xx, 2, 7, 7,L0|L1}, /* 37: 0011 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 38: */
+ {STAX_B, 2, 7, 7,L0|L1}, /* 39: 0011 1001 dddd dddd */
+ {STAX_D, 2, 7, 7,L0|L1}, /* 3a: 0011 1010 dddd dddd */
+ {STAX_H, 2, 7, 7,L0|L1}, /* 3b: 0011 1011 dddd dddd */
+ {STAX_Dp, 2, 7, 7,L0|L1}, /* 3c: 0011 1100 dddd dddd */
+ {STAX_Hp, 2, 7, 7,L0|L1}, /* 3d: 0011 1101 dddd dddd */
+ {STAX_Dm, 2, 7, 7,L0|L1}, /* 3e: 0011 1110 dddd dddd */
+ {STAX_Hm, 2, 7, 7,L0|L1}, /* 3f: 0011 1111 dddd dddd */
+
+ {CALL_w, 3,16,16,L0|L1}, /* 40: 0100 0000 llll llll hhhh hhhh */
+ {INR_A, 1, 4, 4,L0|L1}, /* 41: 0100 0001 */
+ {INR_B, 1, 4, 4,L0|L1}, /* 42: 0100 0010 */
+ {INR_C, 1, 4, 4,L0|L1}, /* 43: 0100 0011 */
+ {LXI_EA_s, 3,10,10,L0|L1}, /* 44: 0100 0100 llll llll hhhh hhhh */
+ {ONIW_wa_xx, 3,19,19,L0|L1}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
+ {ADI_A_xx, 2, 7, 7,L0|L1}, /* 46: 0100 0110 xxxx xxxx */
+ {ONI_A_xx, 2, 7, 7,L0|L1}, /* 47: 0100 0111 xxxx xxxx */
+ {PRE_48, 1, 0, 0,L0|L1}, /* 48: prefix */
+ {MVIX_BC_xx, 2,10,10,L0|L1}, /* 49: 0100 1001 xxxx xxxx */
+ {MVIX_DE_xx, 2,10,10,L0|L1}, /* 4a: 0100 1010 xxxx xxxx */
+ {MVIX_HL_xx, 2,10,10,L0|L1}, /* 4b: 0100 1011 xxxx xxxx */
+ {PRE_4C, 1, 0, 0,L0|L1}, /* 4c: prefix */
+ {PRE_4D, 1, 4, 4,L0|L1}, /* 4d: prefix */
+ {JRE, 2,10,10,L0|L1}, /* 4e: 0100 111d dddd dddd */
+ {JRE, 2,10,10,L0|L1}, /* 4f: 0100 111d dddd dddd */
+
+ {SKN_bit, 2,13,13,L0|L1}, /* 50: 0101 0000 bbbb bbbb */ /* 7807 */
+ {DCR_A, 1, 4, 4,L0|L1}, /* 51: 0101 0001 */
+ {DCR_B, 1, 4, 4,L0|L1}, /* 52: 0101 0010 */
+ {DCR_C, 1, 4, 4,L0|L1}, /* 53: 0101 0011 */
+ {JMP_w, 3,10,10,L0|L1}, /* 54: 0101 0100 llll llll hhhh hhhh */
+ {OFFIW_wa_xx, 3,19,19,L0|L1}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
+ {ACI_A_xx, 2, 7, 7,L0|L1}, /* 56: 0101 0110 xxxx xxxx */
+ {OFFI_A_xx, 2, 7, 7,L0|L1}, /* 57: 0101 0111 xxxx xxxx */
+ {SETB, 2,13,13,L0|L1}, /* 58: 0101 1000 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 59: 0101 1001 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5a: 0101 1010 bbbb bbbb */ /* 7807 */
+ {CLR, 2,13,13,L0|L1}, /* 5b: 0101 1011 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5c: 0101 1100 bbbb bbbb */ /* 7807 */
+ {SK_bit, 2,10,10,L0|L1}, /* 5d: 0101 1101 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5e: 0101 1110 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5f: 0101 1111 bbbb bbbb */ /* 7807 */
+
+ {PRE_60, 1, 0, 0,L0|L1}, /* 60: */
+ {DAA, 1, 4, 4,L0|L1}, /* 61: 0110 0001 */
+ {RETI, 1,13,13,L0|L1}, /* 62: 0110 0010 */
+ {STAW_wa, 2,10,10,L0|L1}, /* 63: 0110 0011 oooo oooo */
+ {PRE_64, 1, 0, 0,L0|L1}, /* 64: */
+ {NEIW_wa_xx, 3,19,19,L0|L1}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
+ {SUI_A_xx, 2, 7, 7,L0|L1}, /* 66: 0110 0110 xxxx xxxx */
+ {NEI_A_xx, 2, 7, 7,L0|L1}, /* 67: 0110 0111 xxxx xxxx */
+ {MVI_V_xx, 2, 7, 7,L0|L1}, /* 68: 0110 1000 xxxx xxxx */
+ {MVI_A_xx, 2, 7, 7,L0 }, /* 69: 0110 1001 xxxx xxxx */
+ {MVI_B_xx, 2, 7, 7,L0|L1}, /* 6a: 0110 1010 xxxx xxxx */
+ {MVI_C_xx, 2, 7, 7,L0|L1}, /* 6b: 0110 1011 xxxx xxxx */
+ {MVI_D_xx, 2, 7, 7,L0|L1}, /* 6c: 0110 1100 xxxx xxxx */
+ {MVI_E_xx, 2, 7, 7,L0|L1}, /* 6d: 0110 1101 xxxx xxxx */
+ {MVI_H_xx, 2, 7, 7,L0|L1}, /* 6e: 0110 1110 xxxx xxxx */
+ {MVI_L_xx, 2, 7, 7, L1}, /* 6f: 0110 1111 xxxx xxxx */
+
+ {PRE_70, 1, 0, 0,L0|L1}, /* 70: */
+ {MVIW_wa_xx, 3,13,13,L0|L1}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
+ {SOFTI, 1,16,16,L0|L1}, /* 72: 0111 0010 */
+ {illegal, 1, 0, 0,L0|L1}, /* 73: */
+ {PRE_74, 1, 0, 0,L0|L1}, /* 74: prefix */
+ {EQIW_wa_xx, 3,19,19,L0|L1}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
+ {SBI_A_xx, 2, 7, 7,L0|L1}, /* 76: 0111 0110 xxxx xxxx */
+ {EQI_A_xx, 2, 7, 7,L0|L1}, /* 77: 0111 0111 xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 78: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 79: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7a: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7b: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7c: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7d: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7e: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7f: 0111 1xxx xxxx xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 80: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 81: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 82: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 83: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 84: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 85: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 86: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 87: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 88: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 89: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8f: 100x xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 90: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 91: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 92: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 93: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 94: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 95: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 96: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 97: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 98: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 99: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9f: 100x xxxx */
+
+ {POP_VA, 1,10,10,L0|L1}, /* a0: 1010 0000 */
+ {POP_BC, 1,10,10,L0|L1}, /* a1: 1010 0001 */
+ {POP_DE, 1,10,10,L0|L1}, /* a2: 1010 0010 */
+ {POP_HL, 1,10,10,L0|L1}, /* a3: 1010 0011 */
+ {POP_EA, 1,10,10,L0|L1}, /* a4: 1010 0100 */
+ {DMOV_EA_BC, 1, 4, 4,L0|L1}, /* a5: 1010 0101 */
+ {DMOV_EA_DE, 1, 4, 4,L0|L1}, /* a6: 1010 0110 */
+ {DMOV_EA_HL, 1, 4, 4,L0|L1}, /* a7: 1010 0111 */
+ {INX_EA, 1, 7, 7,L0|L1}, /* a8: 1010 1000 */
+ {DCX_EA, 1, 7, 7,L0|L1}, /* a9: 1010 1001 */
+ {EI, 1, 4, 4,L0|L1}, /* aa: 1010 1010 */
+ {LDAX_D_xx, 2, 7, 7,L0|L1}, /* ab: 1010 1011 dddd dddd */
+ {LDAX_H_A, 1, 7, 7,L0|L1}, /* ac: 1010 1100 */
+ {LDAX_H_B, 1, 7, 7,L0|L1}, /* ad: 1010 1101 */
+ {LDAX_H_EA, 1, 7, 7,L0|L1}, /* ae: 1010 1110 */
+ {LDAX_H_xx, 2, 7, 7,L0|L1}, /* af: 1010 1111 dddd dddd */
+
+ {PUSH_VA, 1,13,13,L0|L1}, /* b0: 1011 0000 */
+ {PUSH_BC, 1,13,13,L0|L1}, /* b1: 1011 0001 */
+ {PUSH_DE, 1,13,13,L0|L1}, /* b2: 1011 0010 */
+ {PUSH_HL, 1,13,13,L0|L1}, /* b3: 1011 0011 */
+ {PUSH_EA, 1,13,13,L0|L1}, /* b4: 1011 0100 */
+ {DMOV_BC_EA, 1, 4, 4,L0|L1}, /* b5: 1011 0101 */
+ {DMOV_DE_EA, 1, 4, 4,L0|L1}, /* b6: 1011 0110 */
+ {DMOV_HL_EA, 1, 4, 4,L0|L1}, /* b7: 1011 0111 */
+ {RET, 1,10,10,L0|L1}, /* b8: 1011 1000 */
+ {RETS, 1,10,10,L0|L1}, /* b9: 1011 1001 */
+ {DI, 1, 4, 4,L0|L1}, /* ba: 1011 1010 */
+ {STAX_D_xx, 2, 7, 7,L0|L1}, /* bb: 1011 1011 dddd dddd */
+ {STAX_H_A, 1, 7, 7,L0|L1}, /* bc: 1011 1100 */
+ {STAX_H_B, 1, 7, 7,L0|L1}, /* bd: 1011 1101 */
+ {STAX_H_EA, 1, 7, 7,L0|L1}, /* be: 1011 1110 */
+ {STAX_H_xx, 2, 7, 7,L0|L1}, /* bf: 1011 1111 dddd dddd */
+
+ {JR, 1,10,10,L0|L1}, /* c0: 1100 0000 */
+ {JR, 1,10,10,L0|L1}, /* c1: 1100 0001 */
+ {JR, 1,10,10,L0|L1}, /* c2: 1100 0010 */
+ {JR, 1,10,10,L0|L1}, /* c3: 1100 0011 */
+ {JR, 1,10,10,L0|L1}, /* c4: 1100 0100 */
+ {JR, 1,10,10,L0|L1}, /* c5: 1100 0101 */
+ {JR, 1,10,10,L0|L1}, /* c6: 1100 0110 */
+ {JR, 1,10,10,L0|L1}, /* c7: 1100 0111 */
+ {JR, 1,10,10,L0|L1}, /* c8: 1100 1000 */
+ {JR, 1,10,10,L0|L1}, /* c9: 1100 1001 */
+ {JR, 1,10,10,L0|L1}, /* ca: 1100 1010 */
+ {JR, 1,10,10,L0|L1}, /* cb: 1100 1011 */
+ {JR, 1,10,10,L0|L1}, /* cc: 1100 1100 */
+ {JR, 1,10,10,L0|L1}, /* cd: 1100 1101 */
+ {JR, 1,10,10,L0|L1}, /* ce: 1100 1110 */
+ {JR, 1,10,10,L0|L1}, /* cf: 1100 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* d0: 1101 0000 */
+ {JR, 1,10,10,L0|L1}, /* d1: 1101 0001 */
+ {JR, 1,10,10,L0|L1}, /* d2: 1101 0010 */
+ {JR, 1,10,10,L0|L1}, /* d3: 1101 0011 */
+ {JR, 1,10,10,L0|L1}, /* d4: 1101 0100 */
+ {JR, 1,10,10,L0|L1}, /* d5: 1101 0101 */
+ {JR, 1,10,10,L0|L1}, /* d6: 1101 0110 */
+ {JR, 1,10,10,L0|L1}, /* d7: 1101 0111 */
+ {JR, 1,10,10,L0|L1}, /* d8: 1101 1000 */
+ {JR, 1,10,10,L0|L1}, /* d9: 1101 1001 */
+ {JR, 1,10,10,L0|L1}, /* da: 1101 1010 */
+ {JR, 1,10,10,L0|L1}, /* db: 1101 1011 */
+ {JR, 1,10,10,L0|L1}, /* dc: 1101 1100 */
+ {JR, 1,10,10,L0|L1}, /* dd: 1101 1101 */
+ {JR, 1,10,10,L0|L1}, /* de: 1101 1110 */
+ {JR, 1,10,10,L0|L1}, /* df: 1101 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* e0: 1110 0000 */
+ {JR, 1,10,10,L0|L1}, /* e1: 1110 0001 */
+ {JR, 1,10,10,L0|L1}, /* e2: 1110 0010 */
+ {JR, 1,10,10,L0|L1}, /* e3: 1110 0011 */
+ {JR, 1,10,10,L0|L1}, /* e4: 1110 0100 */
+ {JR, 1,10,10,L0|L1}, /* e5: 1110 0101 */
+ {JR, 1,10,10,L0|L1}, /* e6: 1110 0110 */
+ {JR, 1,10,10,L0|L1}, /* e7: 1110 0111 */
+ {JR, 1,10,10,L0|L1}, /* e8: 1110 1000 */
+ {JR, 1,10,10,L0|L1}, /* e9: 1110 1001 */
+ {JR, 1,10,10,L0|L1}, /* ea: 1110 1010 */
+ {JR, 1,10,10,L0|L1}, /* eb: 1110 1011 */
+ {JR, 1,10,10,L0|L1}, /* ec: 1110 1100 */
+ {JR, 1,10,10,L0|L1}, /* ed: 1110 1101 */
+ {JR, 1,10,10,L0|L1}, /* ee: 1110 1110 */
+ {JR, 1,10,10,L0|L1}, /* ef: 1110 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* f0: 1111 0000 */
+ {JR, 1,10,10,L0|L1}, /* f1: 1111 0001 */
+ {JR, 1,10,10,L0|L1}, /* f2: 1111 0010 */
+ {JR, 1,10,10,L0|L1}, /* f3: 1111 0011 */
+ {JR, 1,10,10,L0|L1}, /* f4: 1111 0100 */
+ {JR, 1,10,10,L0|L1}, /* f5: 1111 0101 */
+ {JR, 1,10,10,L0|L1}, /* f6: 1111 0110 */
+ {JR, 1,10,10,L0|L1}, /* f7: 1111 0111 */
+ {JR, 1,10,10,L0|L1}, /* f8: 1111 1000 */
+ {JR, 1,10,10,L0|L1}, /* f9: 1111 1001 */
+ {JR, 1,10,10,L0|L1}, /* fa: 1111 1010 */
+ {JR, 1,10,10,L0|L1}, /* fb: 1111 1011 */
+ {JR, 1,10,10,L0|L1}, /* fc: 1111 1100 */
+ {JR, 1,10,10,L0|L1}, /* fd: 1111 1101 */
+ {JR, 1,10,10,L0|L1}, /* fe: 1111 1110 */
+ {JR, 1,10,10,L0|L1} /* ff: 1111 1111 */
+};
+
diff --git a/src/emu/cpu/upd7810/upd7810.c b/src/emu/cpu/upd7810/upd7810.c
new file mode 100644
index 00000000000..c726934a4b1
--- /dev/null
+++ b/src/emu/cpu/upd7810/upd7810.c
@@ -0,0 +1,2019 @@
+/*****************************************************************************
+ *
+ * upd7810.c
+ * Portable uPD7810/11, 7810H/11H, 78C10/C11/C14 emulator V0.3
+ *
+ * Copyright (c) 2001 Juergen Buchmueller, all rights reserved.
+ *
+ * Copyright (C) 1998,1999,2000 Juergen Buchmueller, all rights reserved.
+ * You can contact me at juergen@mame.net or pullmoll@stop1984.com
+ *
+ * - This source code is released as freeware for non-commercial purposes
+ * as part of the M.A.M.E. (Multiple Arcade Machine Emulator) project.
+ * The licensing terms of MAME apply to this piece of code for the MAME
+ * project and derviative works, as defined by the MAME license. You
+ * may opt to make modifications, improvements or derivative works under
+ * that same conditions, and the MAME project may opt to keep
+ * modifications, improvements or derivatives under their terms exclusively.
+ *
+ * - Alternatively you can choose to apply the terms of the "GPL" (see
+ * below) to this - and only this - piece of code or your derivative works.
+ * Note that in no case your choice can have any impact on any other
+ * source code of the MAME project, or binary, or executable, be it closely
+ * or losely related to this piece of code.
+ *
+ * - At your choice you are also free to remove either licensing terms from
+ * this file and continue to use it under only one of the two licenses. Do this
+ * if you think that licenses are not compatible (enough) for you, or if you
+ * consider either license 'too restrictive' or 'too free'.
+ *
+ * - GPL (GNU General Public License)
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ *
+ * This work is based on the
+ * "NEC Electronics User's Manual, April 1987"
+ *
+ * NS20030115:
+ * - fixed INRW_wa()
+ * - TODO: add 7807, differences are listed below.
+ * I only added support for these opcodes needed by homedata.c (yes, I am
+ * lazy):
+ * 4C CE (MOV A,PT)
+ * 48 AC (EXA)
+ * 48 AD (EXR)
+ * 48 AE (EXH)
+ * 48 AF (EXX)
+ * 50 xx (SKN bit)
+ * 58 xx (SETB)
+ * 5B xx (CLR)
+ * 5D xx (SK bit)
+ *
+ *****************************************************************************/
+/* Hau around 23 May 2004
+ gta, gti, dgt fixed
+ working reg opcodes fixed
+ sio input fixed
+--
+ PeT around 19 February 2002
+ type selection/gamemaster support added
+ gamemaster init hack? added
+ ORAX added
+ jre negativ fixed
+ prefixed opcodes skipping fixed
+ interrupts fixed and improved
+ sub(and related)/add/daa flags fixed
+ mvi ports,... fixed
+ rll, rlr, drll, drlr fixed
+ rets fixed
+ l0, l1 skipping fixed
+ calt fixed
+*/
+
+/*
+
+7807 DESCRIPTION
+
+
+
+ PA0 1 64 Vcc
+ PA1 2 63 Vdd
+ PA2 3 62 PD7/AD7
+ PA3 4 61 PD6/AD6
+ PA4 5 60 PD5/AD5
+ PA5 6 59 PD4/AD4
+ PA6 7 58 PD3/AD3
+ PA7 8 57 PD2/AD2
+ PB0 9 56 PD1/AD1
+ PB1 10 55 PD0/AD0
+ PB2 11 54 PF7/AB15
+ PB3 12 53 PF6/AB14
+ PB4 13 52 PF5/AB13
+ PB5 14 51 PF4/AB12
+ PB6 15 50 PF3/AB11
+ PB7 16 49 PF2/AB10
+ PC0 17 48 PF1/AB9
+ PC1 18 47 PF0/AB8
+ PC2 19 46 ALE
+ PC3 20 45 WR*
+ PC4 21 44 RD*
+ PC5 22 43 HLDA
+ PC6 23 42 HOLD
+ PC7 24 41 PT7
+ NMI* 25 40 PT6
+ INT1 26 39 PT5
+ MODE1 27 38 PT4
+RESET* 28 37 PT3
+ MODE0 29 36 PT2
+ X2 30 35 PT1
+ X1 31 34 PT0
+ Vss 32 33 Vth
+
+PA, PB, PC, PD, and PF is bidirectional I/O port
+and PT is comparator input port in uPD7808.
+uPD7807 uses PD port as data I/O and bottom address output,
+and uses PF port as top address output.
+
+NMI* is non maskable interrupt input signal (negative edge trigger).
+
+INT1 is interrupt input (positive edge trigger). It can be used as
+AC zero-cross input or trigger source of 16bit timer counter.
+
+MODE0 and MODE1 is input terminal which decides total amount of
+external memory of uPD7807 (4KByte, 16KBYte, and 64KByte).
+It also decides number of PF ports used as top address output.
+ 4KByte mode: PF0~PF3=address output, PF4~PF7=data I/O port
+16KByte mode: PF0~PF5=address output, PF6~PF7=data I/O port
+64KByte mode: PF0~PF7=address output
+
+RESET* is system rest terminal.
+
+X1 and X2 does clock signal generation (connect OSC and condenser).
+
+Vth is used to determine threshold voltage for PT port.
+PT0~PT7 is connected to + input of each comparator,
+and Vth deterimnes voltage connected to - input of PT0~PT7.
+But the voltage of Vth is not directly connected to comapators.
+It is connected via 16-level programmable voltage separate circuit.
+
+HOLD and HLDA is terminal for DMA. RD*, WR*, and ALE is bus
+interface signal (they are same type of Intel 8085).
+Unlike 8085, I/O address space is not available, so IO /M* signal
+does not exist. Read/write of external memory can be done
+by RD*, WR*, and ALE only.
+
+Vcc and Vss is main power source. Vdd is backup power source
+for internal RWM (32 Byte).
+
+
+PA and PB is I/O port. They have control register MA and MB.
+If control register is set to 1, the port is input.
+If control register is set to 0, the port is output.
+They are set to 1 by reset.
+
+PT is input-only port. It is consisted of input terminal PT0~PT7
+and Vth (set threshold voltage). Each PT input has analog comparator
+and latch, and + input of analog comparator is connected to
+PT terminal. Every - input of analog comparator is connected
+to devided voltage of Vth. Voltage dividing level can be set by
+bottom 4bits of MT (mode T) register. The range is 1/16~16/16 of Vth.
+
+Other internal I/Os are
+8bit timer (x2): Upcounter. If the counter matches to specified value,
+the timer is reset and counts again from 0.
+You can also set it to generate interrupt, or invert output flip-flop
+when the counter matches to specified value.
+Furthermore, you can output that flip-flop output to PC4/TO output,
+connect it to clock input of timer/event counter or watchdog timer.
+Or you can use it as bitrate clock of serial interface.
+Note: There is only 1 output flip-flop for 2 timers.
+If you use it for timer output of 1 timer, another timer cannot be used
+for other than interrupt generator.
+Clock input for timer can be switched between internal clock (2 type)
+or PC3/TI input. You can set 1 timer's match-output as another timer's
+clock input, so that you can use them as 1 16bit timer.
+
+16bit timer/event counter (x1): It can be used as
+- Interval timer
+- External event counter
+- Frequency measurement
+- Pulse width measurement
+- Programmable rectangle wave output
+- One pulse output
+Related terminals are PC5/CI input, PC6/CO0 output, and PC7/CO1.
+You can measure CI input's H duration, or you can output timing signal
+(with phase difference) to CO0 and CO1.
+
+serial I/F (x1): has 3 modes.
+- Asynchronous mode
+- Synchronous mode
+- I/O interface mode
+In all 3 modes, bitrate can be internal fixed clock, or timer output,
+or external clock.
+In asynchronous mode, you can
+- switch 7bit/8bit data
+- set parity ON/OFF and EVEN/ODD
+- set 1/2 stop bit
+
+
+
+
+DIFFERENCES BETWEEN 7810 and 7807
+
+--------------------------
+8bit transfer instructions
+--------------------------
+
+7810
+inst. 1st byte 2nd byte state action
+EXX 00001001 4 Swap BC DE HL
+EXA 00001000 4 Swap VA EA
+EXH 01010000 4 Swap HL
+BLOCK 00110001 13(C+1) (DE)+ <- (HL)+, C <- C - 1, until CY
+
+7807
+inst. 1st byte 2nd byte state action
+EXR 01001000 10101101 8 Swap VA BC DE HL EA
+EXX 01001000 10101111 8 Swap BC DE HL
+EXA 01001000 10101100 8 Swap VA EA
+EXH 01001000 10101110 8 Swap HL
+BLOCK D+ 00010000 13(C+1) (DE)+ <- (HL)+, C <- C - 1, until CY
+BLOCK D- 00010001 13(C+1) (DE)- <- (HL)-, C <- C - 1, until CY
+
+
+---------------------------
+16bit transfer instructions
+---------------------------
+All instructions are same except operand sr4 of DMOV instruction.
+7810
+V0-sr4 -function
+ 0-ECNT-timer/event counter upcounter
+ 1-ECPT-timer/event counter capture
+
+7807
+V1-V0- sr4 -function
+ 0- 0-ECNT -timer/event counter upcounter
+ 0- 1-ECPT0-timer/event counter capture 0
+ 1- 0-ECPT1-timer/event counter capture 1
+
+
+-----------------------------------------
+8bit operation instructions for registers
+-----------------------------------------
+All instructions are same.
+
+
+--------------------------------------
+8bit operation instructions for memory
+--------------------------------------
+All instructions are same.
+
+
+-----------------------------------------
+Operation instructions for immediate data
+-----------------------------------------
+uPD7807 has read-only PT port and special register group sr5 for it.
+ins. 1st byte 2nd byte 3rd 4th state func
+GTI sr5, byte 01100100 s0101sss dd 14 !CY sr5 - byte - 1
+LTI sr5, byte 01100100 s0111sss dd 14 CY sr5 - byte
+NEI sr5, byte 01100100 s1101sss dd 14 !Z sr5 - byte
+EQI sr5, byte 01100100 s1111sss dd 14 Z sr5 - byte
+ONI sr5, byte 01100100 s1001sss dd 14 !Z sr5 & byte
+OFFI sr5, byte 01100100 s1011sss dd 14 Z sr5 & byte
+
+S5-S4-S3-S2-S1-S0-sr -sr1-sr2-sr5-register function
+ 0 0 1 1 1 0 --- PT --- PT comparator input port T data
+ 1 0 0 1 0 0 WDM WDM --- --- watchdog timer mode register
+ 1 0 0 1 0 1 MT --- --- --- port T mode
+
+7807 doesn't have registers below
+ 0 0 1 0 0 0 ANM ANM ANM A/D channel mode
+ 1 0 0 0 0 0 --- CR0 --- A/D conversion result 0
+ 1 0 0 0 0 1 --- CR1 --- A/D conversion result 1
+ 1 0 0 0 1 0 --- CR2 --- A/D conversion result 2
+ 1 0 0 0 1 1 --- CR3 --- A/D conversion result 3
+ 1 0 1 0 0 0 ZCM --- --- zero cross mode
+
+Special register operand (includes registers for I/O ports) has
+6 groups - sr, sr1, sr2, sr3, sr4, and sr5. Among these groups,
+sr, sr1, sr2, and sr5 includes registers described in the table
+below, and expressed as bit pattern S5-S0.
+
+S5S4S3S2S1S0 sr sr1 sr2 sr5 register function
+0 0 0 0 0 0 PA PA PA PA port A
+0 0 0 0 0 1 PB PB PB PB port B
+0 0 0 0 1 0 PC PC PC PC port C
+0 0 0 0 1 1 PD PD PD PD port D
+0 0 0 1 0 1 PF PF PF PF port F
+0 0 0 1 1 0 MKH MKH MKH MKH mask high
+0 0 0 1 1 1 MKL MKL MKL MKL mask low
+0 0 1 0 0 1 SMH SMH SMH SMH serial mode high
+0 0 1 0 1 0 SML --- --- --- serial mode low
+0 0 1 0 1 1 EOM EOM EOM EOM timer/event counter output mode
+0 0 1 1 0 0 ETMM --- --- --- timer/event counter mode
+0 0 1 1 0 1 TMM TMM TMM TMM timer mode
+0 0 1 1 1 0 --- PT --- PT port T
+0 1 0 0 0 0 MM --- --- --- memory mapping
+0 1 0 0 0 1 MCC --- --- --- mode control C
+0 1 0 0 1 0 MA --- --- --- mode A
+0 1 0 0 1 1 MB --- --- --- mode B
+0 1 0 1 0 0 MC --- --- --- mode C
+0 1 0 1 1 1 MF --- --- --- mode F
+0 1 1 0 0 0 TXB --- --- --- Tx buffer
+0 1 1 0 0 1 --- RXB --- --- Rx buffer
+0 1 1 0 1 0 TM0 --- --- --- timer register 0
+0 1 1 0 1 1 TM1 --- --- --- timer register 1
+1 0 0 1 0 0 WDM WDM --- --- watchdog timer mode
+1 0 0 1 0 1 MT --- --- --- mode T
+
+For sr and sr1, all 6bits (S5, S4, S3, S2, S1, and S0) are used.
+For sr2 and sr5, only 4bits (S3, S2, S1, AND S0) are used.
+They are expressed as 'ssssss' and 's sss' in operation code.
+Note that 's sss' (of sr2 and sr5) is located separately.
+S0 is rightmost bit (LSB).
+
+
+--------------------------------------------
+Operation instructions for working registers
+--------------------------------------------
+All instructions are same.
+
+
+--------------------------------------------------------------------------
+16bit operation instructions and divider/multiplier operation instructions
+--------------------------------------------------------------------------
+All instructions are same.
+
+
+------------------------------------------
+Increment/decrement operation instructions
+------------------------------------------
+All instructions are same.
+
+
+----------------------------
+Other operation instructions
+----------------------------
+7807 has CMC instruction (inverts CY flag).
+ins. 1st byte 2nd byte 3rd 4th state func
+CMC 01001000 10101010 8 CY <- !CY
+
+
+---------------------------
+Rotation/shift instructions
+---------------------------
+All instructions are same.
+
+
+-----------------------------
+Jump/call/return instructions
+-----------------------------
+All instructions are same.
+
+
+-----------------
+Skip instructions
+-----------------
+7807 doesn't have this
+ins. 1st byte 2nd byte 3rd 4th state func
+BIT bit, wa 01011bbb wwwwwwww 10* bit skip if (V.wa).bit = 1
+
+Instead, 7807 has these bit manipulation instructions.
+ins. 1st byte 2nd byte 3rd 4th state func
+MOV CY, bit 01011111 bbbbbbbb 10* CY <- (bit)
+MOV bit, CY 01011010 bbbbbbbb 13* (bit) <- CY
+AND CY, bit 00110001 bbbbbbbb 10* CY <- CY & (bit)
+OR CY, bit 01011100 bbbbbbbb 10* CY <- CY | (bit)
+XOR CY, bit 01011110 bbbbbbbb 10* CY <- CY ^ (bit)
+SETB bit 01011000 bbbbbbbb 13* (bit) <- 1
+CLR bit 01011011 bbbbbbbb 13* (bit) <- 0
+NOT bit 01011001 bbbbbbbb 13* (bit) <- !(bit)
+SK bit 01011101 bbbbbbbb 10* (b) skip if (bit) = 1
+SKN bit 01010000 bbbbbbbb 10* !(b) skip if (bit) = 0
+
+
+------------------------
+CPU control instructions
+------------------------
+ins. 1st byte 2nd byte 3rd 4th state func
+HLT 01001000 00111011 11/12 halt
+11 state in uPD7807 and uPD7810, 12 state in uPD78C10.
+
+STOP 01001000 10111011 12 stop
+7807 doesn't have STOP instruction.
+
+*/
+
+
+#include "debugger.h"
+#include "upd7810.h"
+
+static UPD7810 upd7810;
+static int upd7810_icount;
+
+#define CY 0x01
+#define F1 0x02
+#define L0 0x04
+#define L1 0x08
+#define HC 0x10
+#define SK 0x20
+#define Z 0x40
+#define F7 0x80
+
+/* IRR flags */
+#define INTNMI 0x0001
+#define INTFT0 0x0002
+#define INTFT1 0x0004
+#define INTF1 0x0008
+#define INTF2 0x0010
+#define INTFE0 0x0020
+#define INTFE1 0x0040
+#define INTFEIN 0x0080
+#define INTFAD 0x0100
+#define INTFSR 0x0200
+#define INTFST 0x0400
+#define INTER 0x0800
+#define INTOV 0x1000
+
+/* ITF flags */
+#define INTAN4 0x0001
+#define INTAN5 0x0002
+#define INTAN6 0x0004
+#define INTAN7 0x0008
+#define INTSB 0x0010
+
+#define PPC upd7810.ppc.w.l
+#define PC upd7810.pc.w.l
+#define PCL upd7810.pc.b.l
+#define PCH upd7810.pc.b.h
+#define PCD upd7810.pc.d
+#define SP upd7810.sp.w.l
+#define SPL upd7810.sp.b.l
+#define SPH upd7810.sp.b.h
+#define SPD upd7810.sp.d
+#define PSW upd7810.psw
+#define OP upd7810.op
+#define OP2 upd7810.op2
+#define IFF upd7810.iff
+#define EA upd7810.ea.w.l
+#define EAL upd7810.ea.b.l
+#define EAH upd7810.ea.b.h
+#define VA upd7810.va.w.l
+#define V upd7810.va.b.h
+#define A upd7810.va.b.l
+#define VAD upd7810.va.d
+#define BC upd7810.bc.w.l
+#define B upd7810.bc.b.h
+#define C upd7810.bc.b.l
+#define DE upd7810.de.w.l
+#define D upd7810.de.b.h
+#define E upd7810.de.b.l
+#define HL upd7810.hl.w.l
+#define H upd7810.hl.b.h
+#define L upd7810.hl.b.l
+#define EA2 upd7810.ea2.w.l
+#define VA2 upd7810.va2.w.l
+#define BC2 upd7810.bc2.w.l
+#define DE2 upd7810.de2.w.l
+#define HL2 upd7810.hl2.w.l
+
+#define OVC0 upd7810.ovc0
+#define OVC1 upd7810.ovc1
+#define OVCE upd7810.ovce
+#define OVCF upd7810.ovcf
+#define OVCS upd7810.ovcs
+#define EDGES upd7810.edges
+
+#define CNT0 upd7810.cnt.b.l
+#define CNT1 upd7810.cnt.b.h
+#define TM0 upd7810.tm.b.l
+#define TM1 upd7810.tm.b.h
+#define ECNT upd7810.ecnt.w.l
+#define ECPT upd7810.ecnt.w.h
+#define ETM0 upd7810.etm.w.l
+#define ETM1 upd7810.etm.w.h
+
+#define MA upd7810.ma
+#define MB upd7810.mb
+#define MCC upd7810.mcc
+#define MC upd7810.mc
+#define MM upd7810.mm
+#define MF upd7810.mf
+#define TMM upd7810.tmm
+#define ETMM upd7810.etmm
+#define EOM upd7810.eom
+#define SML upd7810.sml
+#define SMH upd7810.smh
+#define ANM upd7810.anm
+#define MKL upd7810.mkl
+#define MKH upd7810.mkh
+#define ZCM upd7810.zcm
+
+#define CR0 upd7810.cr0
+#define CR1 upd7810.cr1
+#define CR2 upd7810.cr2
+#define CR3 upd7810.cr3
+#define RXB upd7810.rxb
+#define TXB upd7810.txb
+
+#define RXD upd7810.rxd
+#define TXD upd7810.txd
+#define SCK upd7810.sck
+#define TI upd7810.ti
+#define TO upd7810.to
+#define CI upd7810.ci
+#define CO0 upd7810.co0
+#define CO1 upd7810.co1
+
+#define IRR upd7810.irr
+#define ITF upd7810.itf
+
+struct opcode_s {
+ void (*opfunc)(void);
+ UINT8 oplen;
+ UINT8 cycles;
+ UINT8 cycles_skip;
+ UINT8 mask_l0_l1;
+};
+
+#define RDOP(O) O = cpu_readop(PCD); PC++
+#define RDOPARG(A) A = cpu_readop_arg(PCD); PC++
+#define RM(A) program_read_byte_8(A)
+#define WM(A,V) program_write_byte_8(A,V)
+
+#define ZHC_ADD(after,before,carry) \
+ if (after == 0) PSW |= Z; else PSW &= ~Z; \
+ if (after == before) \
+ PSW = (PSW&~CY) | (carry); \
+ else if (after < before) \
+ PSW |= CY; \
+ else \
+ PSW &= ~CY; \
+ if ((after & 15) < (before & 15)) \
+ PSW |= HC; \
+ else \
+ PSW &= ~HC; \
+
+#define ZHC_SUB(after,before,carry) \
+ if (after == 0) PSW |= Z; else PSW &= ~Z; \
+ if (before == after) \
+ PSW = (PSW & ~CY) | (carry); \
+ else if (after > before) \
+ PSW |= CY; \
+ else \
+ PSW &= ~CY; \
+ if ((after & 15) > (before & 15)) \
+ PSW |= HC; \
+ else \
+ PSW &= ~HC; \
+
+#define SKIP_CY if (CY == (PSW & CY)) PSW |= SK
+#define SKIP_NC if (0 == (PSW & CY)) PSW |= SK
+#define SKIP_Z if (Z == (PSW & Z)) PSW |= SK
+#define SKIP_NZ if (0 == (PSW & Z)) PSW |= SK
+#define SET_Z(n) if (n) PSW &= ~Z; else PSW |= Z
+
+static UINT8 RP(offs_t port)
+{
+ UINT8 data = 0xff;
+ switch (port)
+ {
+ case UPD7810_PORTA:
+ if (upd7810.ma) // NS20031301 no need to read if the port is set as output
+ upd7810.pa_in = io_read_byte_8(port);
+ data = (upd7810.pa_in & upd7810.ma) | (upd7810.pa_out & ~upd7810.ma);
+ break;
+ case UPD7810_PORTB:
+ if (upd7810.mb) // NS20031301 no need to read if the port is set as output
+ upd7810.pb_in = io_read_byte_8(port);
+ data = (upd7810.pb_in & upd7810.mb) | (upd7810.pb_out & ~upd7810.mb);
+ break;
+ case UPD7810_PORTC:
+ if (upd7810.mc) // NS20031301 no need to read if the port is set as output
+ upd7810.pc_in = io_read_byte_8(port);
+ data = (upd7810.pc_in & upd7810.mc) | (upd7810.pc_out & ~upd7810.mc);
+ if (upd7810.mcc & 0x01) /* PC0 = TxD output */
+ data = (data & ~0x01) | (upd7810.txd & 1 ? 0x01 : 0x00);
+ if (upd7810.mcc & 0x02) /* PC1 = RxD input */
+ data = (data & ~0x02) | (upd7810.rxd & 1 ? 0x02 : 0x00);
+ if (upd7810.mcc & 0x04) /* PC2 = SCK input/output */
+ data = (data & ~0x04) | (upd7810.sck & 1 ? 0x04 : 0x00);
+ if (upd7810.mcc & 0x08) /* PC3 = TI input */
+ data = (data & ~0x08) | (upd7810.ti & 1 ? 0x08 : 0x00);
+ if (upd7810.mcc & 0x10) /* PC4 = TO output */
+ data = (data & ~0x10) | (upd7810.to & 1 ? 0x10 : 0x00);
+ if (upd7810.mcc & 0x20) /* PC5 = CI input */
+ data = (data & ~0x20) | (upd7810.ci & 1 ? 0x20 : 0x00);
+ if (upd7810.mcc & 0x40) /* PC6 = CO0 output */
+ data = (data & ~0x40) | (upd7810.co0 & 1 ? 0x40 : 0x00);
+ if (upd7810.mcc & 0x80) /* PC7 = CO1 output */
+ data = (data & ~0x80) | (upd7810.co1 & 1 ? 0x80 : 0x00);
+ break;
+ case UPD7810_PORTD:
+ upd7810.pd_in = io_read_byte_8(port);
+ switch (upd7810.mm & 0x07)
+ {
+ case 0x00: /* PD input mode, PF port mode */
+ data = upd7810.pd_in;
+ break;
+ case 0x01: /* PD output mode, PF port mode */
+ data = upd7810.pd_out;
+ break;
+ default: /* PD extension mode, PF port/extension mode */
+ data = 0xff; /* what do we see on the port here? */
+ break;
+ }
+ break;
+ case UPD7810_PORTF:
+ upd7810.pf_in = io_read_byte_8(port);
+ switch (upd7810.mm & 0x06)
+ {
+ case 0x00: /* PD input/output mode, PF port mode */
+ data = (upd7810.pf_in & upd7810.mf) | (upd7810.pf_out & ~upd7810.mf);
+ break;
+ case 0x02: /* PD extension mode, PF0-3 extension mode, PF4-7 port mode */
+ data = (upd7810.pf_in & upd7810.mf) | (upd7810.pf_out & ~upd7810.mf);
+ data |= 0x0f; /* what would we see on the lower bits here? */
+ break;
+ case 0x04: /* PD extension mode, PF0-5 extension mode, PF6-7 port mode */
+ data = (upd7810.pf_in & upd7810.mf) | (upd7810.pf_out & ~upd7810.mf);
+ data |= 0x3f; /* what would we see on the lower bits here? */
+ break;
+ case 0x06:
+ data = 0xff; /* what would we see on the lower bits here? */
+ break;
+ }
+ break;
+ case UPD7807_PORTT: // NS20031301 partial implementation
+ data = io_read_byte_8(port);
+ break;
+ default:
+ logerror("uPD7810 internal error: RP() called with invalid port number\n");
+ }
+ return data;
+}
+
+static void WP(offs_t port, UINT8 data)
+{
+ switch (port)
+ {
+ case UPD7810_PORTA:
+ upd7810.pa_out = data;
+// data = (data & ~upd7810.ma) | (upd7810.pa_in & upd7810.ma);
+ data = (data & ~upd7810.ma) | (upd7810.ma); // NS20031401
+ io_write_byte_8(port, data);
+ break;
+ case UPD7810_PORTB:
+ upd7810.pb_out = data;
+// data = (data & ~upd7810.mb) | (upd7810.pb_in & upd7810.mb);
+ data = (data & ~upd7810.mb) | (upd7810.mb); // NS20031401
+ io_write_byte_8(port, data);
+ break;
+ case UPD7810_PORTC:
+ upd7810.pc_out = data;
+// data = (data & ~upd7810.mc) | (upd7810.pc_in & upd7810.mc);
+ data = (data & ~upd7810.mc) | (upd7810.mc); // NS20031401
+ if (upd7810.mcc & 0x01) /* PC0 = TxD output */
+ data = (data & ~0x01) | (upd7810.txd & 1 ? 0x01 : 0x00);
+ if (upd7810.mcc & 0x02) /* PC1 = RxD input */
+ data = (data & ~0x02) | (upd7810.rxd & 1 ? 0x02 : 0x00);
+ if (upd7810.mcc & 0x04) /* PC2 = SCK input/output */
+ data = (data & ~0x04) | (upd7810.sck & 1 ? 0x04 : 0x00);
+ if (upd7810.mcc & 0x08) /* PC3 = TI input */
+ data = (data & ~0x08) | (upd7810.ti & 1 ? 0x08 : 0x00);
+ if (upd7810.mcc & 0x10) /* PC4 = TO output */
+ data = (data & ~0x10) | (upd7810.to & 1 ? 0x10 : 0x00);
+ if (upd7810.mcc & 0x20) /* PC5 = CI input */
+ data = (data & ~0x20) | (upd7810.ci & 1 ? 0x20 : 0x00);
+ if (upd7810.mcc & 0x40) /* PC6 = CO0 output */
+ data = (data & ~0x40) | (upd7810.co0 & 1 ? 0x40 : 0x00);
+ if (upd7810.mcc & 0x80) /* PC7 = CO1 output */
+ data = (data & ~0x80) | (upd7810.co1 & 1 ? 0x80 : 0x00);
+ io_write_byte_8(port, data);
+ break;
+ case UPD7810_PORTD:
+ upd7810.pd_out = data;
+ switch (upd7810.mm & 0x07)
+ {
+ case 0x00: /* PD input mode, PF port mode */
+ data = upd7810.pd_in;
+ break;
+ case 0x01: /* PD output mode, PF port mode */
+ data = upd7810.pd_out;
+ break;
+ default: /* PD extension mode, PF port/extension mode */
+ return;
+ }
+ io_write_byte_8(port, data);
+ break;
+ case UPD7810_PORTF:
+ upd7810.pf_out = data;
+ data = (data & ~upd7810.mf) | (upd7810.pf_in & upd7810.mf);
+ switch (upd7810.mm & 0x06)
+ {
+ case 0x00: /* PD input/output mode, PF port mode */
+ break;
+ case 0x02: /* PD extension mode, PF0-3 extension mode, PF4-7 port mode */
+ data |= 0x0f; /* what would come out for the lower bits here? */
+ break;
+ case 0x04: /* PD extension mode, PF0-5 extension mode, PF6-7 port mode */
+ data |= 0x3f; /* what would come out for the lower bits here? */
+ break;
+ case 0x06:
+ data |= 0xff; /* what would come out for the lower bits here? */
+ break;
+ }
+ io_write_byte_8(port, data);
+ break;
+ default:
+ logerror("uPD7810 internal error: RP() called with invalid port number\n");
+ }
+}
+
+static void upd7810_take_irq(void)
+{
+ UINT16 vector = 0;
+ int irqline = 0;
+
+ /* global interrupt disable? */
+ if (0 == IFF)
+ return;
+
+ /* check the interrupts in priority sequence */
+ if ((IRR & INTFT0) && 0 == (MKL & 0x02))
+ {
+ switch (upd7810.config.type)
+ {
+ case TYPE_7810_GAMEMASTER:
+ vector = 0xff2a;
+ break;
+ default:
+ vector = 0x0008;
+ }
+ if (!((IRR & INTFT1) && 0 == (MKL & 0x04)))
+ IRR&=~INTFT0;
+ }
+ else
+ if ((IRR & INTFT1) && 0 == (MKL & 0x04))
+ {
+ switch (upd7810.config.type)
+ {
+ case TYPE_7810_GAMEMASTER:
+ vector = 0xff2a;
+ break;
+ default:
+ vector = 0x0008;
+ }
+ IRR&=~INTFT1;
+ }
+ else
+ if ((IRR & INTF1) && 0 == (MKL & 0x08))
+ {
+ irqline = UPD7810_INTF1;
+ vector = 0x0010;
+ if (!((IRR & INTF2) && 0 == (MKL & 0x10)))
+ IRR&=~INTF1;
+ }
+ else
+ if ((IRR & INTF2) && 0 == (MKL & 0x10))
+ {
+ irqline = UPD7810_INTF2;
+ vector = 0x0010;
+ IRR&=~INTF2;
+ }
+ else
+ if ((IRR & INTFE0) && 0 == (MKL & 0x20))
+ {
+ switch (upd7810.config.type)
+ {
+ case TYPE_7810_GAMEMASTER:
+ vector = 0xff2d;
+ break;
+ default:
+ vector = 0x0018;
+ }
+ if (!((IRR & INTFE1) && 0 == (MKL & 0x40)))
+ IRR&=~INTFE0;
+ }
+ else
+ if ((IRR & INTFE1) && 0 == (MKL & 0x40))
+ {
+ switch (upd7810.config.type)
+ {
+ case TYPE_7810_GAMEMASTER:
+ vector = 0xff2d;
+ break;
+ default:
+ vector = 0x0018;
+ }
+ IRR&=~INTFE1;
+ }
+ else
+ if ((IRR & INTFEIN) && 0 == (MKL & 0x80))
+ {
+ vector = 0x0020;
+ }
+ else
+ if ((IRR & INTFAD) && 0 == (MKH & 0x01))
+ {
+ vector = 0x0020;
+ }
+ else
+ if ((IRR & INTFSR) && 0 == (MKH & 0x02))
+ {
+ vector = 0x0028;
+ IRR&=~INTFSR;
+ }
+ else
+ if ((IRR & INTFST) && 0 == (MKH & 0x04))
+ {
+ vector = 0x0028;
+ IRR&=~INTFST;
+ }
+ if (vector)
+ {
+ /* acknowledge external IRQ */
+ if (irqline)
+ (*upd7810.irq_callback)(irqline);
+ SP--;
+ WM( SP, PSW );
+ SP--;
+ WM( SP, PCH );
+ SP--;
+ WM( SP, PCL );
+ IFF = 0;
+ PSW &= ~(SK|L0|L1);
+ PC = vector;
+ change_pc( PCD );
+ }
+}
+
+static void upd7810_write_EOM(void)
+{
+ if (EOM & 0x01) /* output LV0 content ? */
+ {
+ switch (EOM & 0x0e)
+ {
+ case 0x02: /* toggle CO0 */
+ CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
+ break;
+ case 0x04: /* reset CO0 */
+ CO0 = 0;
+ break;
+ case 0x08: /* set CO0 */
+ CO0 = 1;
+ break;
+ }
+ }
+ if (EOM & 0x10) /* output LV0 content ? */
+ {
+ switch (EOM & 0xe0)
+ {
+ case 0x20: /* toggle CO1 */
+ CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
+ break;
+ case 0x40: /* reset CO1 */
+ CO1 = 0;
+ break;
+ case 0x80: /* set CO1 */
+ CO1 = 1;
+ break;
+ }
+ }
+}
+
+static void upd7810_write_TXB(void)
+{
+ upd7810.txbuf = 1;
+}
+
+#define PAR7(n) ((((n)>>6)^((n)>>5)^((n)>>4)^((n)>>3)^((n)>>2)^((n)>>1)^((n)))&1)
+#define PAR8(n) ((((n)>>7)^((n)>>6)^((n)>>5)^((n)>>4)^((n)>>3)^((n)>>2)^((n)>>1)^((n)))&1)
+
+static void upd7810_sio_output(void)
+{
+ /* shift out more bits? */
+ if (upd7810.txcnt > 0)
+ {
+ TXD = upd7810.txs & 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TXD,TXD);
+ upd7810.txs >>= 1;
+ upd7810.txcnt--;
+ if (0 == upd7810.txcnt)
+ IRR |= INTFST; /* serial transfer completed */
+ }
+ else
+ if (SMH & 0x04) /* send enable ? */
+ {
+ /* nothing written into the transmitter buffer ? */
+ if (0 == upd7810.txbuf)
+ return;
+ upd7810.txbuf = 0;
+
+ if (SML & 0x03) /* asynchronous mode ? */
+ {
+ switch (SML & 0xfc)
+ {
+ case 0x48: /* 7bits, no parity, 1 stop bit */
+ case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ /* insert start bit in bit0, stop bit int bit8 */
+ upd7810.txs = (TXB << 1) | (1 << 8);
+ upd7810.txcnt = 9;
+ break;
+ case 0x4c: /* 8bits, no parity, 1 stop bit */
+ case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ /* insert start bit in bit0, stop bit int bit9 */
+ upd7810.txs = (TXB << 1) | (1 << 9);
+ upd7810.txcnt = 10;
+ break;
+ case 0x58: /* 7bits, odd parity, 1 stop bit */
+ /* insert start bit in bit0, parity in bit 8, stop bit in bit9 */
+ upd7810.txs = (TXB << 1) | (PAR7(TXB) << 8) | (1 << 9);
+ upd7810.txcnt = 10;
+ break;
+ case 0x5c: /* 8bits, odd parity, 1 stop bit */
+ /* insert start bit in bit0, parity in bit 9, stop bit int bit10 */
+ upd7810.txs = (TXB << 1) | (PAR8(TXB) << 9) | (1 << 10);
+ upd7810.txcnt = 11;
+ break;
+ case 0x78: /* 7bits, even parity, 1 stop bit */
+ /* insert start bit in bit0, parity in bit 8, stop bit in bit9 */
+ upd7810.txs = (TXB << 1) | ((PAR7(TXB) ^ 1) << 8) | (1 << 9);
+ upd7810.txcnt = 10;
+ break;
+ case 0x7c: /* 8bits, even parity, 1 stop bit */
+ /* insert start bit in bit0, parity in bit 9, stop bit int bit10 */
+ upd7810.txs = (TXB << 1) | ((PAR8(TXB) ^ 1) << 9) | (1 << 10);
+ upd7810.txcnt = 11;
+ break;
+ case 0xc8: /* 7bits, no parity, 2 stop bits */
+ case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ /* insert start bit in bit0, stop bits int bit8+9 */
+ upd7810.txs = (TXB << 1) | (3 << 8);
+ upd7810.txcnt = 10;
+ break;
+ case 0xcc: /* 8bits, no parity, 2 stop bits */
+ case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ /* insert start bit in bit0, stop bits in bits9+10 */
+ upd7810.txs = (TXB << 1) | (3 << 9);
+ upd7810.txcnt = 11;
+ break;
+ case 0xd8: /* 7bits, odd parity, 2 stop bits */
+ /* insert start bit in bit0, parity in bit 8, stop bits in bits9+10 */
+ upd7810.txs = (TXB << 1) | (PAR7(TXB) << 8) | (3 << 9);
+ upd7810.txcnt = 11;
+ break;
+ case 0xdc: /* 8bits, odd parity, 2 stop bits */
+ /* insert start bit in bit0, parity in bit 9, stop bits int bit10+11 */
+ upd7810.txs = (TXB << 1) | (PAR8(TXB) << 9) | (3 << 10);
+ upd7810.txcnt = 12;
+ break;
+ case 0xf8: /* 7bits, even parity, 2 stop bits */
+ /* insert start bit in bit0, parity in bit 8, stop bits in bit9+10 */
+ upd7810.txs = (TXB << 1) | ((PAR7(TXB) ^ 1) << 8) | (3 << 9);
+ upd7810.txcnt = 11;
+ break;
+ case 0xfc: /* 8bits, even parity, 2 stop bits */
+ /* insert start bit in bit0, parity in bit 9, stop bits int bits10+10 */
+ upd7810.txs = (TXB << 1) | ((PAR8(TXB) ^ 1) << 9) | (1 << 10);
+ upd7810.txcnt = 12;
+ break;
+ }
+ }
+ else
+ {
+ /* synchronous mode */
+ upd7810.txs = TXB;
+ upd7810.txcnt = 8;
+ }
+ }
+}
+
+static void upd7810_sio_input(void)
+{
+ /* sample next bit? */
+ if (upd7810.rxcnt > 0)
+ {
+ if (upd7810.config.io_callback)
+ RXD = (*upd7810.config.io_callback)(UPD7810_RXD,RXD);
+ upd7810.rxs = (upd7810.rxs >> 1) | ((UINT16)RXD << 15);
+ upd7810.rxcnt--;
+ if (0 == upd7810.rxcnt)
+ {
+ /* reset the TSK bit */
+ SMH &= ~0x40;
+ /* serial receive completed interrupt */
+ IRR |= INTFSR;
+ /* now extract the data from the shift register */
+ if (SML & 0x03) /* asynchronous mode ? */
+ {
+ switch (SML & 0xfc)
+ {
+ case 0x48: /* 7bits, no parity, 1 stop bit */
+ case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ upd7810.rxs >>= 16 - 9;
+ RXB = (upd7810.rxs >> 1) & 0x7f;
+ if ((1 << 8) != (upd7810.rxs & (1 | (1 << 8))))
+ IRR |= INTER; /* framing error */
+ break;
+ case 0x4c: /* 8bits, no parity, 1 stop bit */
+ case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ upd7810.rxs >>= 16 - 10;
+ RXB = (upd7810.rxs >> 1) & 0xff;
+ if ((1 << 9) != (upd7810.rxs & (1 | (1 << 9))))
+ IRR |= INTER; /* framing error */
+ break;
+ case 0x58: /* 7bits, odd parity, 1 stop bit */
+ upd7810.rxs >>= 16 - 10;
+ RXB = (upd7810.rxs >> 1) & 0x7f;
+ if ((1 << 9) != (upd7810.rxs & (1 | (1 << 9))))
+ IRR |= INTER; /* framing error */
+ if (PAR7(RXB) != ((upd7810.rxs >> 8) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0x5c: /* 8bits, odd parity, 1 stop bit */
+ upd7810.rxs >>= 16 - 11;
+ RXB = (upd7810.rxs >> 1) & 0xff;
+ if ((1 << 10) != (upd7810.rxs & (1 | (1 << 10))))
+ IRR |= INTER; /* framing error */
+ if (PAR8(RXB) != ((upd7810.rxs >> 9) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0x78: /* 7bits, even parity, 1 stop bit */
+ upd7810.rxs >>= 16 - 10;
+ RXB = (upd7810.rxs >> 1) & 0x7f;
+ if ((1 << 9) != (upd7810.rxs & (1 | (1 << 9))))
+ IRR |= INTER; /* framing error */
+ if (PAR7(RXB) != ((upd7810.rxs >> 8) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0x7c: /* 8bits, even parity, 1 stop bit */
+ upd7810.rxs >>= 16 - 11;
+ RXB = (upd7810.rxs >> 1) & 0xff;
+ if ((1 << 10) != (upd7810.rxs & (1 | (1 << 10))))
+ IRR |= INTER; /* framing error */
+ if (PAR8(RXB) != ((upd7810.rxs >> 9) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0xc8: /* 7bits, no parity, 2 stop bits */
+ case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ upd7810.rxs >>= 16 - 10;
+ RXB = (upd7810.rxs >> 1) & 0x7f;
+ if ((3 << 9) != (upd7810.rxs & (1 | (3 << 9))))
+ IRR |= INTER; /* framing error */
+ if (PAR7(RXB) != ((upd7810.rxs >> 8) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0xcc: /* 8bits, no parity, 2 stop bits */
+ case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ upd7810.rxs >>= 16 - 11;
+ RXB = (upd7810.rxs >> 1) & 0xff;
+ if ((3 << 10) != (upd7810.rxs & (1 | (3 << 10))))
+ IRR |= INTER; /* framing error */
+ if (PAR8(RXB) != ((upd7810.rxs >> 9) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0xd8: /* 7bits, odd parity, 2 stop bits */
+ upd7810.rxs >>= 16 - 11;
+ RXB = (upd7810.rxs >> 1) & 0x7f;
+ if ((3 << 10) != (upd7810.rxs & (1 | (3 << 10))))
+ IRR |= INTER; /* framing error */
+ if (PAR7(RXB) != ((upd7810.rxs >> 8) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0xdc: /* 8bits, odd parity, 2 stop bits */
+ upd7810.rxs >>= 16 - 12;
+ RXB = (upd7810.rxs >> 1) & 0xff;
+ if ((3 << 11) != (upd7810.rxs & (1 | (3 << 11))))
+ IRR |= INTER; /* framing error */
+ if (PAR8(RXB) != ((upd7810.rxs >> 9) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0xf8: /* 7bits, even parity, 2 stop bits */
+ upd7810.rxs >>= 16 - 11;
+ RXB = (upd7810.rxs >> 1) & 0x7f;
+ if ((3 << 10) != (upd7810.rxs & (1 | (3 << 10))))
+ IRR |= INTER; /* framing error */
+ if (PAR7(RXB) != ((upd7810.rxs >> 8) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ case 0xfc: /* 8bits, even parity, 2 stop bits */
+ upd7810.rxs >>= 16 - 12;
+ RXB = (upd7810.rxs >> 1) & 0xff;
+ if ((3 << 11) != (upd7810.rxs & (1 | (3 << 11))))
+ IRR |= INTER; /* framing error */
+ if (PAR8(RXB) != ((upd7810.rxs >> 9) & 1))
+ IRR |= INTER; /* parity error */
+ break;
+ }
+ }
+ else
+ {
+ upd7810.rxs >>= 16 - 8;
+ RXB = upd7810.rxs;
+// upd7810.rxcnt = 8;
+ }
+ }
+ }
+ else
+ if (SMH & 0x08) /* receive enable ? */
+ {
+ if (SML & 0x03) /* asynchronous mode ? */
+ {
+ switch (SML & 0xfc)
+ {
+ case 0x48: /* 7bits, no parity, 1 stop bit */
+ case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ upd7810.rxcnt = 9;
+ break;
+ case 0x4c: /* 8bits, no parity, 1 stop bit */
+ case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ upd7810.rxcnt = 10;
+ break;
+ case 0x58: /* 7bits, odd parity, 1 stop bit */
+ upd7810.rxcnt = 10;
+ break;
+ case 0x5c: /* 8bits, odd parity, 1 stop bit */
+ upd7810.rxcnt = 11;
+ break;
+ case 0x78: /* 7bits, even parity, 1 stop bit */
+ upd7810.rxcnt = 10;
+ break;
+ case 0x7c: /* 8bits, even parity, 1 stop bit */
+ upd7810.rxcnt = 11;
+ break;
+ case 0xc8: /* 7bits, no parity, 2 stop bits */
+ case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ upd7810.rxcnt = 10;
+ break;
+ case 0xcc: /* 8bits, no parity, 2 stop bits */
+ case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ upd7810.rxcnt = 11;
+ break;
+ case 0xd8: /* 7bits, odd parity, 2 stop bits */
+ upd7810.rxcnt = 11;
+ break;
+ case 0xdc: /* 8bits, odd parity, 2 stop bits */
+ upd7810.rxcnt = 12;
+ break;
+ case 0xf8: /* 7bits, even parity, 2 stop bits */
+ upd7810.rxcnt = 11;
+ break;
+ case 0xfc: /* 8bits, even parity, 2 stop bits */
+ upd7810.rxcnt = 12;
+ break;
+ }
+ }
+ else
+ /* TSK bit set ? */
+ if (SMH & 0x40)
+ {
+ upd7810.rxcnt = 8;
+ }
+ }
+}
+
+static void upd7810_timers(int cycles)
+{
+ /**** TIMER 0 ****/
+ if (TMM & 0x10) /* timer 0 upcounter reset ? */
+ CNT0 = 0;
+ else
+ {
+ switch (TMM & 0x0c) /* timer 0 clock source */
+ {
+ case 0x00: /* clock divided by 12 */
+ OVC0 += cycles;
+ while (OVC0 >= 12)
+ {
+ OVC0 -= 12;
+ CNT0++;
+ if (CNT0 == TM0)
+ {
+ CNT0 = 0;
+ IRR |= INTFT0;
+ /* timer F/F source is timer 0 ? */
+ if (0x00 == (TMM & 0x03))
+ {
+ TO ^= 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TO,TO);
+ }
+ /* timer 1 chained with timer 0 ? */
+ if ((TMM & 0xe0) == 0x60)
+ {
+ CNT1++;
+ if (CNT1 == TM1)
+ {
+ IRR |= INTFT1;
+ CNT1 = 0;
+ /* timer F/F source is timer 1 ? */
+ if (0x01 == (TMM & 0x03))
+ {
+ TO ^= 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TO,TO);
+ }
+ }
+ }
+ }
+ }
+ break;
+ case 0x04: /* clock divided by 384 */
+ OVC0 += cycles;
+ while (OVC0 >= 384)
+ {
+ OVC0 -= 384;
+ CNT0++;
+ if (CNT0 == TM0)
+ {
+ CNT0 = 0;
+ IRR |= INTFT0;
+ /* timer F/F source is timer 0 ? */
+ if (0x00 == (TMM & 0x03))
+ {
+ TO ^= 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TO,TO);
+ }
+ /* timer 1 chained with timer 0 ? */
+ if ((TMM & 0xe0) == 0x60)
+ {
+ CNT1++;
+ if (CNT1 == TM1)
+ {
+ CNT1 = 0;
+ IRR |= INTFT1;
+ /* timer F/F source is timer 1 ? */
+ if (0x01 == (TMM & 0x03))
+ {
+ TO ^= 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TO,TO);
+ }
+ }
+ }
+ }
+ }
+ break;
+ case 0x08: /* external signal at TI */
+ break;
+ case 0x0c: /* disabled */
+ break;
+ }
+ }
+
+ /**** TIMER 1 ****/
+ if (TMM & 0x80) /* timer 1 upcounter reset ? */
+ CNT1 = 0;
+ else
+ {
+ switch (TMM & 0x60) /* timer 1 clock source */
+ {
+ case 0x00: /* clock divided by 12 */
+ OVC1 += cycles;
+ while (OVC1 >= 12)
+ {
+ OVC1 -= 12;
+ CNT1++;
+ if (CNT1 == TM1)
+ {
+ CNT1 = 0;
+ IRR |= INTFT1;
+ /* timer F/F source is timer 1 ? */
+ if (0x01 == (TMM & 0x03))
+ {
+ TO ^= 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TO,TO);
+ }
+ }
+ }
+ break;
+ case 0x20: /* clock divided by 384 */
+ OVC1 += cycles;
+ while (OVC1 >= 384)
+ {
+ OVC1 -= 384;
+ CNT1++;
+ if (CNT1 == TM1)
+ {
+ CNT1 = 0;
+ IRR |= INTFT1;
+ /* timer F/F source is timer 1 ? */
+ if (0x01 == (TMM & 0x03))
+ {
+ TO ^= 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TO,TO);
+ }
+ }
+ }
+ break;
+ case 0x40: /* external signal at TI */
+ break;
+ case 0x60: /* clocked with timer 0 */
+ break;
+ }
+ }
+
+ /**** TIMER F/F ****/
+ /* timer F/F source is clock divided by 3 ? */
+ if (0x02 == (TMM & 0x03))
+ {
+ OVCF += cycles;
+ while (OVCF >= 3)
+ {
+ TO ^= 1;
+ if (upd7810.config.io_callback)
+ (*upd7810.config.io_callback)(UPD7810_TO,TO);
+ OVCF -= 3;
+ }
+ }
+
+ /**** ETIMER ****/
+ /* ECNT clear */
+ if (0x00 == (ETMM & 0x0c))
+ ECNT = 0;
+ else
+ if (0x00 == (ETMM & 0x03) || (0x01 == (ETMM & 0x03) && CI))
+ {
+ OVCE += cycles;
+ /* clock divided by 12 */
+ while (OVCE >= 12)
+ {
+ OVCE -= 12;
+ ECNT++;
+ switch (ETMM & 0x0c)
+ {
+ case 0x00: /* clear ECNT */
+ break;
+ case 0x04: /* free running */
+ if (0 == ECNT)
+ ITF |= INTOV; /* set overflow flag if counter wrapped */
+ break;
+ case 0x08: /* reset at falling edge of CI or TO */
+ break;
+ case 0x0c: /* reset if ECNT == ETM1 */
+ if (ETM1 == ECNT)
+ ECNT = 0;
+ break;
+ }
+ switch (ETMM & 0x30)
+ {
+ case 0x00: /* set CO0 if ECNT == ETM0 */
+ if (ETM0 == ECNT)
+ {
+ switch (EOM & 0x0e)
+ {
+ case 0x02: /* toggle CO0 */
+ CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
+ break;
+ case 0x04: /* reset CO0 */
+ CO0 = 0;
+ break;
+ case 0x08: /* set CO0 */
+ CO0 = 1;
+ break;
+ }
+ }
+ break;
+ case 0x10: /* prohibited */
+ break;
+ case 0x20: /* set CO0 if ECNT == ETM0 or at falling CI input */
+ if (ETM0 == ECNT)
+ {
+ switch (EOM & 0x0e)
+ {
+ case 0x02: /* toggle CO0 */
+ CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
+ break;
+ case 0x04: /* reset CO0 */
+ CO0 = 0;
+ break;
+ case 0x08: /* set CO0 */
+ CO0 = 1;
+ break;
+ }
+ }
+ break;
+ case 0x30: /* latch CO0 if ECNT == ETM0 or ECNT == ETM1 */
+ if (ETM0 == ECNT || ETM1 == ECNT)
+ {
+ switch (EOM & 0x0e)
+ {
+ case 0x02: /* toggle CO0 */
+ CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
+ break;
+ case 0x04: /* reset CO0 */
+ CO0 = 0;
+ break;
+ case 0x08: /* set CO0 */
+ CO0 = 1;
+ break;
+ }
+ }
+ break;
+ }
+ switch (ETMM & 0xc0)
+ {
+ case 0x00: /* lacth CO1 if ECNT == ETM1 */
+ if (ETM1 == ECNT)
+ {
+ switch (EOM & 0xe0)
+ {
+ case 0x20: /* toggle CO1 */
+ CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
+ break;
+ case 0x40: /* reset CO1 */
+ CO1 = 0;
+ break;
+ case 0x80: /* set CO1 */
+ CO1 = 1;
+ break;
+ }
+ }
+ break;
+ case 0x40: /* prohibited */
+ break;
+ case 0x80: /* latch CO1 if ECNT == ETM1 or falling edge of CI input */
+ if (ETM1 == ECNT)
+ {
+ switch (EOM & 0xe0)
+ {
+ case 0x20: /* toggle CO1 */
+ CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
+ break;
+ case 0x40: /* reset CO1 */
+ CO1 = 0;
+ break;
+ case 0x80: /* set CO1 */
+ CO1 = 1;
+ break;
+ }
+ }
+ break;
+ case 0xc0: /* latch CO1 if ECNT == ETM0 or ECNT == ETM1 */
+ if (ETM0 == ECNT || ETM1 == ECNT)
+ {
+ switch (EOM & 0xe0)
+ {
+ case 0x20: /* toggle CO1 */
+ CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
+ break;
+ case 0x40: /* reset CO1 */
+ CO1 = 0;
+ break;
+ case 0x80: /* set CO1 */
+ CO1 = 1;
+ break;
+ }
+ }
+ break;
+ }
+ }
+ }
+
+ /**** SIO ****/
+ switch (SMH & 0x03)
+ {
+ case 0x00: /* interval timer F/F */
+ break;
+ case 0x01: /* internal clock divided by 384 */
+ OVCS += cycles;
+ while (OVCS >= 384)
+ {
+ OVCS -= 384;
+ if (0 == (EDGES ^= 1))
+ upd7810_sio_input();
+ else
+ upd7810_sio_output();
+ }
+ break;
+ case 0x02: /* internal clock divided by 24 */
+ OVCS += cycles;
+ while (OVCS >= 24)
+ {
+ OVCS -= 24;
+ if (0 == (EDGES ^= 1))
+ upd7810_sio_input();
+ else
+ upd7810_sio_output();
+ }
+ break;
+ }
+}
+
+void upd7810_init(int index, int clock, const void *config, int (*irqcallback)(int))
+{
+ upd7810.config = *(const UPD7810_CONFIG*) config;
+ upd7810.irq_callback = irqcallback;
+
+ state_save_register_item("upd7810", index, upd7810.ppc.w.l);
+ state_save_register_item("upd7810", index, upd7810.pc.w.l);
+ state_save_register_item("upd7810", index, upd7810.sp.w.l);
+ state_save_register_item("upd7810", index, upd7810.psw);
+ state_save_register_item("upd7810", index, upd7810.op);
+ state_save_register_item("upd7810", index, upd7810.op2);
+ state_save_register_item("upd7810", index, upd7810.iff);
+ state_save_register_item("upd7810", index, upd7810.ea.w.l);
+ state_save_register_item("upd7810", index, upd7810.va.w.l);
+ state_save_register_item("upd7810", index, upd7810.bc.w.l);
+ state_save_register_item("upd7810", index, upd7810.de.w.l);
+ state_save_register_item("upd7810", index, upd7810.hl.w.l);
+ state_save_register_item("upd7810", index, upd7810.ea2.w.l);
+ state_save_register_item("upd7810", index, upd7810.va2.w.l);
+ state_save_register_item("upd7810", index, upd7810.bc2.w.l);
+ state_save_register_item("upd7810", index, upd7810.de2.w.l);
+ state_save_register_item("upd7810", index, upd7810.hl2.w.l);
+ state_save_register_item("upd7810", index, upd7810.cnt.d);
+ state_save_register_item("upd7810", index, upd7810.tm.d);
+ state_save_register_item("upd7810", index, upd7810.ecnt.d);
+ state_save_register_item("upd7810", index, upd7810.etm.d);
+ state_save_register_item("upd7810", index, upd7810.ma);
+ state_save_register_item("upd7810", index, upd7810.mb);
+ state_save_register_item("upd7810", index, upd7810.mcc);
+ state_save_register_item("upd7810", index, upd7810.mc);
+ state_save_register_item("upd7810", index, upd7810.mm);
+ state_save_register_item("upd7810", index, upd7810.mf);
+ state_save_register_item("upd7810", index, upd7810.tmm);
+ state_save_register_item("upd7810", index, upd7810.etmm);
+ state_save_register_item("upd7810", index, upd7810.eom);
+ state_save_register_item("upd7810", index, upd7810.sml);
+ state_save_register_item("upd7810", index, upd7810.smh);
+ state_save_register_item("upd7810", index, upd7810.anm);
+ state_save_register_item("upd7810", index, upd7810.mkl);
+ state_save_register_item("upd7810", index, upd7810.mkh);
+ state_save_register_item("upd7810", index, upd7810.zcm);
+ state_save_register_item("upd7810", index, upd7810.pa_out);
+ state_save_register_item("upd7810", index, upd7810.pb_out);
+ state_save_register_item("upd7810", index, upd7810.pc_out);
+ state_save_register_item("upd7810", index, upd7810.pd_out);
+ state_save_register_item("upd7810", index, upd7810.pf_out);
+ state_save_register_item("upd7810", index, upd7810.cr0);
+ state_save_register_item("upd7810", index, upd7810.cr1);
+ state_save_register_item("upd7810", index, upd7810.cr2);
+ state_save_register_item("upd7810", index, upd7810.cr3);
+ state_save_register_item("upd7810", index, upd7810.txb);
+ state_save_register_item("upd7810", index, upd7810.rxb);
+ state_save_register_item("upd7810", index, upd7810.txd);
+ state_save_register_item("upd7810", index, upd7810.rxd);
+ state_save_register_item("upd7810", index, upd7810.sck);
+ state_save_register_item("upd7810", index, upd7810.ti);
+ state_save_register_item("upd7810", index, upd7810.to);
+ state_save_register_item("upd7810", index, upd7810.ci);
+ state_save_register_item("upd7810", index, upd7810.co0);
+ state_save_register_item("upd7810", index, upd7810.co1);
+ state_save_register_item("upd7810", index, upd7810.irr);
+ state_save_register_item("upd7810", index, upd7810.itf);
+ state_save_register_item("upd7810", index, upd7810.ovc0);
+ state_save_register_item("upd7810", index, upd7810.ovc1);
+ state_save_register_item("upd7810", index, upd7810.ovcf);
+ state_save_register_item("upd7810", index, upd7810.ovcs);
+ state_save_register_item("upd7810", index, upd7810.edges);
+}
+
+#include "7810tbl.c"
+#include "7810ops.c"
+
+static void upd7810_reset (void)
+{
+ UPD7810_CONFIG save_config;
+ int (*save_irqcallback)(int);
+
+ save_config = upd7810.config;
+ save_irqcallback = upd7810.irq_callback;
+ memset(&upd7810, 0, sizeof(upd7810));
+ upd7810.config = save_config;
+ upd7810.irq_callback = save_irqcallback;
+
+ upd7810.opXX = opXX_7810;
+ ETMM = 0xff;
+ TMM = 0xff;
+ MA = 0xff;
+ MB = 0xff;
+ switch (upd7810.config.type)
+ {
+ case TYPE_7810_GAMEMASTER:
+ // needed for lcd screen/ram selection; might be internal in cpu and therefor not needed; 0x10 written in some games
+ MC = 0xff&~0x7;
+ WP( UPD7810_PORTC, 1 ); //hyper space
+ PCD=0x8000;
+ break;
+ default:
+ MC = 0xff;
+ }
+ MF = 0xff;
+ // gamemaster falling block "and"s to enable interrupts
+ MKL = 0xff;
+ MKH = 0xff; //?
+}
+
+static void upd7807_reset (void)
+{
+ upd7810_reset();
+ upd7810.opXX = opXX_7807;
+}
+
+static void upd7810_exit (void)
+{
+}
+
+static int upd7810_execute (int cycles)
+{
+ const struct opcode_s *opXX = upd7810.opXX;
+
+ upd7810_icount = cycles;
+
+ do
+ {
+ int cc = 0;
+
+ CALL_MAME_DEBUG;
+
+ PPC = PC;
+ RDOP(OP);
+
+ /*
+ * clear L0 and/or L1 flags for all opcodes except
+ * L0 for "MVI L,xx" or "LXI H,xxxx"
+ * L1 for "MVI A,xx"
+ */
+ PSW &= ~opXX[OP].mask_l0_l1;
+
+ /* skip flag set and not SOFTI opcode? */
+ if ((PSW & SK) && (OP != 0x72))
+ {
+ if (opXX[OP].cycles)
+ {
+ cc = opXX[OP].cycles_skip;
+ PC += opXX[OP].oplen - 1;
+ }
+ else
+ {
+ RDOP(OP2);
+ switch (OP)
+ {
+ case 0x48:
+ cc = op48[OP2].cycles_skip;
+ PC += op48[OP2].oplen - 2;
+ break;
+ case 0x4c:
+ cc = op4C[OP2].cycles_skip;
+ PC += op4C[OP2].oplen - 2;
+ break;
+ case 0x4d:
+ cc = op4D[OP2].cycles_skip;
+ PC += op4D[OP2].oplen - 2;
+ break;
+ case 0x60:
+ cc = op60[OP2].cycles_skip;
+ PC += op60[OP2].oplen - 2;
+ break;
+ case 0x64:
+ cc = op64[OP2].cycles_skip;
+ PC += op64[OP2].oplen - 2;
+ break;
+ case 0x70:
+ cc = op70[OP2].cycles_skip;
+ PC += op70[OP2].oplen - 2;
+ break;
+ case 0x74:
+ cc = op74[OP2].cycles_skip;
+ PC += op74[OP2].oplen - 2;
+ break;
+ default:
+ fatalerror("uPD7810 internal error: check cycle counts for main");
+ }
+ }
+ PSW &= ~SK;
+ upd7810_timers( cc );
+ change_pc( PCD );
+ }
+ else
+ {
+ cc = opXX[OP].cycles;
+ upd7810_timers( cc );
+ (*opXX[OP].opfunc)();
+ }
+ upd7810_icount -= cc;
+ upd7810_take_irq();
+
+ } while (upd7810_icount > 0);
+
+ return cycles - upd7810_icount;
+}
+
+static void upd7810_get_context (void *dst)
+{
+ if (dst)
+ memcpy(dst, &upd7810, sizeof(upd7810));
+}
+
+static void upd7810_set_context (void *src)
+{
+ if (src)
+ memcpy(&upd7810, src, sizeof(upd7810));
+}
+
+static void set_irq_line(int irqline, int state)
+{
+ if (state != CLEAR_LINE)
+ {
+ if (irqline == INPUT_LINE_NMI)
+ {
+ /* no nested NMIs ? */
+// if (0 == (IRR & INTNMI))
+ {
+ IRR |= INTNMI;
+ SP--;
+ WM( SP, PSW );
+ SP--;
+ WM( SP, PCH );
+ SP--;
+ WM( SP, PCL );
+ IFF = 0;
+ PSW &= ~(SK|L0|L1);
+ PC = 0x0004;
+ change_pc( PCD );
+ }
+ }
+ else
+ if (irqline == UPD7810_INTF1)
+ IRR |= INTF1;
+ else
+ if (irqline == UPD7810_INTF2)
+ IRR |= INTF2;
+ // gamemaster hack
+ else
+ if (irqline == UPD7810_INTFE1)
+ IRR |= INTFE1;
+ else
+ logerror("upd7810_set_irq_line invalid irq line #%d\n", irqline);
+ }
+ /* resetting interrupt requests is done with the SKIT/SKNIT opcodes only! */
+}
+
+
+/**************************************************************************
+ * Generic set_info
+ **************************************************************************/
+
+static void upd7810_set_info(UINT32 state, cpuinfo *info)
+{
+ switch (state)
+ {
+ /* --- the following bits of info are set as 64-bit signed integers --- */
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: set_irq_line(UPD7810_INTF1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF2: set_irq_line(UPD7810_INTF2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTFE1: set_irq_line(UPD7810_INTFE1, info->i); break;
+
+ case CPUINFO_INT_PC: PC = info->i; change_pc(PCD); break;
+ case CPUINFO_INT_REGISTER + UPD7810_PC: PC = info->i; break;
+ case CPUINFO_INT_SP:
+ case CPUINFO_INT_REGISTER + UPD7810_SP: SP = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_PSW: PSW = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_A: A = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_V: V = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA: EA = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA: VA = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC: BC = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE: DE = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL: HL = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA2: EA2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA2: VA2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC2: BC2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE2: DE2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL2: HL2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT0: CNT0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT1: CNT1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM0: TM0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM1: TM1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECNT: ECNT = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECPT: ECPT = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM0: ETM0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM1: ETM1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MA: MA = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MB: MB = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MCC: MCC = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MC: MC = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MM: MM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MF: MF = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TMM: TMM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETMM: ETMM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EOM: EOM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SML: SML = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SMH: SMH = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ANM: ANM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKL: MKL = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKH: MKH = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ZCM: ZCM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXB: TXB = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXB: RXB = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR0: CR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR1: CR1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR2: CR2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR3: CR3 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXD: TXD = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXD: RXD = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SCK: SCK = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TI: TI = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TO: TO = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CI: CI = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO0: CO0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO1: CO1 = info->i; break;
+ }
+}
+
+
+
+/**************************************************************************
+ * Generic get_info
+ **************************************************************************/
+
+void upd7810_get_info(UINT32 state, cpuinfo *info)
+{
+ switch (state)
+ {
+ /* --- the following bits of info are returned as 64-bit signed integers --- */
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(upd7810); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = CPU_IS_LE; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = (IRR & INTNMI) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: info->i = (IRR & INTF1) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF2: info->i = (IRR & INTF2) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTFE1: info->i = (IRR & INTFE1) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
+
+ case CPUINFO_INT_PC:
+ case CPUINFO_INT_REGISTER + UPD7810_PC: info->i = PC; break;
+ case CPUINFO_INT_SP:
+ case CPUINFO_INT_REGISTER + UPD7810_SP: info->i = SP; break;
+ case CPUINFO_INT_REGISTER + UPD7810_PSW: info->i = PSW; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA: info->i = EA; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA: info->i = VA; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC: info->i = BC; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE: info->i = DE; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL: info->i = HL; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA2: info->i = EA2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA2: info->i = VA2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC2: info->i = BC2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE2: info->i = DE2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL2: info->i = HL2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT0: info->i = CNT0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT1: info->i = CNT1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM0: info->i = TM0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM1: info->i = TM1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECNT: info->i = ECNT; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECPT: info->i = ECPT; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM0: info->i = ETM0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM1: info->i = ETM1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MA: info->i = MA; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MB: info->i = MB; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MCC: info->i = MCC; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MC: info->i = MC; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MM: info->i = MM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MF: info->i = MF; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TMM: info->i = TMM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETMM: info->i = ETMM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EOM: info->i = EOM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SML: info->i = SML; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SMH: info->i = SMH; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ANM: info->i = ANM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKL: info->i = MKL; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKH: info->i = MKH; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ZCM: info->i = ZCM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXB: info->i = TXB; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXB: info->i = RXB; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR0: info->i = CR0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR1: info->i = CR1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR2: info->i = CR2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR3: info->i = CR3; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXD: info->i = TXD; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXD: info->i = RXD; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SCK: info->i = SCK; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TI: info->i = TI; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TO: info->i = TO; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CI: info->i = CI; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO0: info->i = CO0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO1: info->i = CO1; break;
+
+ /* --- the following bits of info are returned as pointers to data or functions --- */
+ case CPUINFO_PTR_SET_INFO: info->setinfo = upd7810_set_info; break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = upd7810_get_context; break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = upd7810_set_context; break;
+ case CPUINFO_PTR_INIT: info->init = upd7810_init; break;
+ case CPUINFO_PTR_RESET: info->reset = upd7810_reset; break;
+ case CPUINFO_PTR_EXIT: info->exit = upd7810_exit; break;
+ case CPUINFO_PTR_EXECUTE: info->execute = upd7810_execute; break;
+ case CPUINFO_PTR_BURN: info->burn = NULL; break;
+#ifdef MAME_DEBUG
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7810_dasm; break;
+#endif /* MAME_DEBUG */
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &upd7810_icount; break;
+
+ /* --- the following bits of info are returned as NULL-terminated strings --- */
+ case CPUINFO_STR_NAME: strcpy(info->s, "uPD7810"); break;
+ case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "NEC uPD7810"); break;
+ case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "0.3"); break;
+ case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright (c) 2001 Juergen Buchmueller, all rights reserved."); break;
+
+ case CPUINFO_STR_FLAGS:
+ sprintf(info->s, "%s:%s:%s:%s:%s:%s",
+ upd7810.psw & 0x40 ? "ZF":"--",
+ upd7810.psw & 0x20 ? "SK":"--",
+ upd7810.psw & 0x10 ? "HC":"--",
+ upd7810.psw & 0x08 ? "L1":"--",
+ upd7810.psw & 0x04 ? "L0":"--",
+ upd7810.psw & 0x01 ? "CY":"--");
+ break;
+
+ case CPUINFO_STR_REGISTER + UPD7810_PC: sprintf(info->s, "PC :%04X", upd7810.pc.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SP: sprintf(info->s, "SP :%04X", upd7810.sp.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_PSW: sprintf(info->s, "PSW :%02X", upd7810.psw); break;
+ case CPUINFO_STR_REGISTER + UPD7810_A: sprintf(info->s, "A :%02X", upd7810.va.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_V: sprintf(info->s, "V :%02X", upd7810.va.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_EA: sprintf(info->s, "EA :%04X", upd7810.ea.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_BC: sprintf(info->s, "BC :%04X", upd7810.bc.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_DE: sprintf(info->s, "DE :%04X", upd7810.de.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_HL: sprintf(info->s, "HL :%04X", upd7810.hl.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_A2: sprintf(info->s, "A' :%02X", upd7810.va2.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_V2: sprintf(info->s, "V' :%02X", upd7810.va2.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_EA2: sprintf(info->s, "EA' :%04X", upd7810.ea2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_BC2: sprintf(info->s, "BC' :%04X", upd7810.bc2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_DE2: sprintf(info->s, "DE' :%04X", upd7810.de2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_HL2: sprintf(info->s, "HL' :%04X", upd7810.hl2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CNT0: sprintf(info->s, "CNT0:%02X", upd7810.cnt.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CNT1: sprintf(info->s, "CNT1:%02X", upd7810.cnt.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TM0: sprintf(info->s, "TM0 :%02X", upd7810.tm.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TM1: sprintf(info->s, "TM1 :%02X", upd7810.tm.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ECNT: sprintf(info->s, "ECNT:%04X", upd7810.ecnt.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ECPT: sprintf(info->s, "ECPT:%04X", upd7810.ecnt.w.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ETM0: sprintf(info->s, "ETM0:%04X", upd7810.etm.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ETM1: sprintf(info->s, "ETM1:%04X", upd7810.etm.w.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MA: sprintf(info->s, "MA :%02X", upd7810.ma); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MB: sprintf(info->s, "MB :%02X", upd7810.mb); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MCC: sprintf(info->s, "MCC :%02X", upd7810.mcc); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MC: sprintf(info->s, "MC :%02X", upd7810.mc); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MM: sprintf(info->s, "MM :%02X", upd7810.mm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MF: sprintf(info->s, "MF :%02X", upd7810.mf); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TMM: sprintf(info->s, "TMM :%02X", upd7810.tmm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ETMM: sprintf(info->s, "ETMM:%02X", upd7810.etmm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_EOM: sprintf(info->s, "EOM :%02X", upd7810.eom); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SML: sprintf(info->s, "SML :%02X", upd7810.sml); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SMH: sprintf(info->s, "SMH :%02X", upd7810.smh); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ANM: sprintf(info->s, "ANM :%02X", upd7810.anm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MKL: sprintf(info->s, "MKL :%02X", upd7810.mkl); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MKH: sprintf(info->s, "MKH :%02X", upd7810.mkh); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ZCM: sprintf(info->s, "ZCM :%02X", upd7810.zcm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR0: sprintf(info->s, "CR0 :%02X", upd7810.cr0); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR1: sprintf(info->s, "CR1 :%02X", upd7810.cr1); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR2: sprintf(info->s, "CR2 :%02X", upd7810.cr2); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR3: sprintf(info->s, "CR3 :%02X", upd7810.cr3); break;
+ case CPUINFO_STR_REGISTER + UPD7810_RXB: sprintf(info->s, "RXB :%02X", upd7810.rxb); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TXB: sprintf(info->s, "TXB :%02X", upd7810.txb); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TXD: sprintf(info->s, "TXD :%d", upd7810.txd); break;
+ case CPUINFO_STR_REGISTER + UPD7810_RXD: sprintf(info->s, "RXD :%d", upd7810.rxd); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SCK: sprintf(info->s, "SCK :%d", upd7810.sck); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TI: sprintf(info->s, "TI :%d", upd7810.ti); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TO: sprintf(info->s, "TO :%d", upd7810.to); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CI: sprintf(info->s, "CI :%d", upd7810.ci); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CO0: sprintf(info->s, "CO0 :%d", upd7810.co0 & 1); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CO1: sprintf(info->s, "CO1 :%d", upd7810.co1 & 1); break;
+ }
+}
+
+
+/**************************************************************************
+ * CPU-specific set_info
+ **************************************************************************/
+
+void upd7807_get_info(UINT32 state, cpuinfo *info)
+{
+ switch (state)
+ {
+ /* --- the following bits of info are returned as pointers to data or functions --- */
+ case CPUINFO_PTR_RESET: info->reset = upd7807_reset; break;
+#ifdef MAME_DEBUG
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = upd7807_dasm; break;
+#endif /* MAME_DEBUG */
+
+ /* --- the following bits of info are returned as NULL-terminated strings --- */
+ case CPUINFO_STR_NAME: strcpy(info->s, "uPD7807"); break;
+
+ default: upd7810_get_info(state, info); break;
+ }
+}
diff --git a/src/emu/cpu/upd7810/upd7810.h b/src/emu/cpu/upd7810/upd7810.h
new file mode 100644
index 00000000000..bd68a1499b2
--- /dev/null
+++ b/src/emu/cpu/upd7810/upd7810.h
@@ -0,0 +1,157 @@
+#ifndef _UPD7810_H_
+#define _UPD7810_H_
+
+#include "cpuintrf.h"
+
+/*
+ all types have internal ram at 0xff00-0xffff
+ 7810
+ 7811 (4kbyte),7812(8),7814(16) have internal rom at 0x0000
+*/
+
+// unfortunatly memory configuration differs with internal rom size
+typedef enum {
+ TYPE_7810,
+ TYPE_7810_GAMEMASTER, // a few modifications until internal rom dumped
+ TYPE_7807
+// TYPE_78C10, // stop instruction added
+// TYPE_78IV,
+// TYPE_78K0,
+// TYPE_78K0S
+// millions of subtypes
+} UPD7810_TYPE;
+
+/* Supply an instance of this function in your driver code:
+ * It will be called whenever an output signal changes or a new
+ * input line state is to be sampled.
+ */
+typedef int (*upd7810_io_callback)(int ioline, int state);
+
+// use it as reset parameter in the Machine struct
+typedef struct {
+ UPD7810_TYPE type;
+ upd7810_io_callback io_callback;
+} UPD7810_CONFIG;
+
+enum {
+ UPD7810_PC=1, UPD7810_SP, UPD7810_PSW,
+ UPD7810_EA, UPD7810_V, UPD7810_A, UPD7810_VA,
+ UPD7810_BC, UPD7810_B, UPD7810_C, UPD7810_DE, UPD7810_D, UPD7810_E, UPD7810_HL, UPD7810_H, UPD7810_L,
+ UPD7810_EA2, UPD7810_V2, UPD7810_A2, UPD7810_VA2,
+ UPD7810_BC2, UPD7810_B2, UPD7810_C2, UPD7810_DE2, UPD7810_D2, UPD7810_E2, UPD7810_HL2, UPD7810_H2, UPD7810_L2,
+ UPD7810_CNT0, UPD7810_CNT1, UPD7810_TM0, UPD7810_TM1, UPD7810_ECNT, UPD7810_ECPT, UPD7810_ETM0, UPD7810_ETM1,
+ UPD7810_MA, UPD7810_MB, UPD7810_MCC, UPD7810_MC, UPD7810_MM, UPD7810_MF,
+ UPD7810_TMM, UPD7810_ETMM, UPD7810_EOM, UPD7810_SML, UPD7810_SMH,
+ UPD7810_ANM, UPD7810_MKL, UPD7810_MKH, UPD7810_ZCM,
+ UPD7810_TXB, UPD7810_RXB, UPD7810_CR0, UPD7810_CR1, UPD7810_CR2, UPD7810_CR3,
+ UPD7810_TXD, UPD7810_RXD, UPD7810_SCK, UPD7810_TI, UPD7810_TO, UPD7810_CI, UPD7810_CO0, UPD7810_CO1
+};
+
+/* port numbers for PA,PB,PC,PD and PF */
+enum {
+ UPD7810_PORTA, UPD7810_PORTB, UPD7810_PORTC, UPD7810_PORTD, UPD7810_PORTF
+};
+
+enum {
+ UPD7807_PORTA, UPD7807_PORTB, UPD7807_PORTC, UPD7807_PORTD, UPD7807_PORTF,
+ UPD7807_PORTT
+};
+
+/* IRQ lines */
+#define UPD7810_INTF1 0
+#define UPD7810_INTF2 1
+#define UPD7810_INTFE1 4
+
+extern void upd7810_get_info(UINT32 state, cpuinfo *info);
+extern void upd7807_get_info(UINT32 state, cpuinfo *info);
+
+typedef struct {
+ PAIR ppc; /* previous program counter */
+ PAIR pc; /* program counter */
+ PAIR sp; /* stack pointer */
+ UINT8 op; /* opcode */
+ UINT8 op2; /* opcode part 2 */
+ UINT8 iff; /* interrupt enable flip flop */
+ UINT8 psw; /* processor status word */
+ PAIR ea; /* extended accumulator */
+ PAIR va; /* accumulator + vector register */
+ PAIR bc; /* 8bit B and C registers / 16bit BC register */
+ PAIR de; /* 8bit D and E registers / 16bit DE register */
+ PAIR hl; /* 8bit H and L registers / 16bit HL register */
+ PAIR ea2; /* alternate register set */
+ PAIR va2;
+ PAIR bc2;
+ PAIR de2;
+ PAIR hl2;
+ PAIR cnt; /* 8 bit timer counter */
+ PAIR tm; /* 8 bit timer 0/1 comparator inputs */
+ PAIR ecnt; /* timer counter register / capture register */
+ PAIR etm; /* timer 0/1 comparator inputs */
+ UINT8 ma; /* port A input or output mask */
+ UINT8 mb; /* port B input or output mask */
+ UINT8 mcc; /* port C control/port select */
+ UINT8 mc; /* port C input or output mask */
+ UINT8 mm; /* memory mapping */
+ UINT8 mf; /* port F input or output mask */
+ UINT8 tmm; /* timer 0 and timer 1 operating parameters */
+ UINT8 etmm; /* 16-bit multifunction timer/event counter */
+ UINT8 eom; /* 16-bit timer/event counter output control */
+ UINT8 sml; /* serial interface parameters low */
+ UINT8 smh; /* -"- high */
+ UINT8 anm; /* analog to digital converter operating parameters */
+ UINT8 mkl; /* interrupt mask low */
+ UINT8 mkh; /* -"- high */
+ UINT8 zcm; /* bias circuitry for ac zero-cross detection */
+ UINT8 pa_in; /* port A,B,C,D,F inputs */
+ UINT8 pb_in;
+ UINT8 pc_in;
+ UINT8 pd_in;
+ UINT8 pf_in;
+ UINT8 pa_out; /* port A,B,C,D,F outputs */
+ UINT8 pb_out;
+ UINT8 pc_out;
+ UINT8 pd_out;
+ UINT8 pf_out;
+ UINT8 cr0; /* analog digital conversion register 0 */
+ UINT8 cr1; /* analog digital conversion register 1 */
+ UINT8 cr2; /* analog digital conversion register 2 */
+ UINT8 cr3; /* analog digital conversion register 3 */
+ UINT8 txb; /* transmitter buffer */
+ UINT8 rxb; /* receiver buffer */
+ UINT8 txd; /* port C control line states */
+ UINT8 rxd;
+ UINT8 sck;
+ UINT8 ti;
+ UINT8 to;
+ UINT8 ci;
+ UINT8 co0;
+ UINT8 co1;
+ UINT16 irr; /* interrupt request register */
+ UINT16 itf; /* interrupt test flag register */
+
+/* internal helper variables */
+ UINT16 txs; /* transmitter shift register */
+ UINT16 rxs; /* receiver shift register */
+ UINT8 txcnt; /* transmitter shift register bit count */
+ UINT8 rxcnt; /* receiver shift register bit count */
+ UINT8 txbuf; /* transmitter buffer was written */
+ INT32 ovc0; /* overflow counter for timer 0 (for clock div 12/384) */
+ INT32 ovc1; /* overflow counter for timer 0 (for clock div 12/384) */
+ INT32 ovce; /* overflow counter for ecnt */
+ INT32 ovcf; /* overflow counter for fixed clock div 3 mode */
+ INT32 ovcs; /* overflow counter for serial I/O */
+ UINT8 edges; /* rising/falling edge flag for serial I/O */
+ const struct opcode_s *opXX; /* opcode table */
+ const struct opcode_s *op48;
+ const struct opcode_s *op4C;
+ UPD7810_CONFIG config;
+ int (*irq_callback)(int irqline);
+} UPD7810;
+
+#ifdef MAME_DEBUG
+offs_t upd7810_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+offs_t upd7807_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
+#endif
+
+#endif
+