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author Michael Zapf <michael.zapf@mizapf.de>2014-02-12 11:56:42 +0000
committer Michael Zapf <michael.zapf@mizapf.de>2014-02-12 11:56:42 +0000
commit2e3eafc3fb83ddff0e65513ebd2343b7f3ab3269 (patch)
tree169f8c727f784dee174c0c59f35793d725c24ba7 /src/emu/cpu/tms9900
parentf48385742c080117a2cdc3e46c7106915422ffda (diff)
(MESS) Minor debugging stuff and using freq constant (nw)
Diffstat (limited to 'src/emu/cpu/tms9900')
-rw-r--r--src/emu/cpu/tms9900/tms9995.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/emu/cpu/tms9900/tms9995.c b/src/emu/cpu/tms9900/tms9995.c
index a73d6f924f0..60e61cd7338 100644
--- a/src/emu/cpu/tms9900/tms9995.c
+++ b/src/emu/cpu/tms9900/tms9995.c
@@ -125,6 +125,7 @@ enum
// Log addresses of executed opcodes
#define TRACE_EXEC 0
+#define TRACE_CYCLES 0
// This is the previous debugging approach which will be replaced by the
// specific switches above
@@ -1501,7 +1502,7 @@ void tms9995_device::next_command()
void tms9995_device::command_completed()
{
// Pseudo state at the end of the current instruction cycle sequence
- if (VERBOSE>4)
+ if (TRACE_CYCLES)
{
LOG("tms9995: +++++ Instruction %04x (%s) completed", m_instruction->IR, opname[m_instruction->command]);
int cycles = m_first_cycle - m_icount;