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author Quench <Quench0@users.noreply.github.com>2008-12-11 06:29:44 +0000
committer Quench <Quench0@users.noreply.github.com>2008-12-11 06:29:44 +0000
commit51ea0b3e29138766e448c1ea22212c0f1a674fe1 (patch)
treea5f1e5bfc0bd0ee28336dff4429653781c5835fe /src/emu/cpu/tms32010
parent506da3c4321292afd7c635aff2c1310c6d78d5f9 (diff)
Pointer-ified the TMS32010 core.
Diffstat (limited to 'src/emu/cpu/tms32010')
-rw-r--r--src/emu/cpu/tms32010/tms32010.c1035
-rw-r--r--src/emu/cpu/tms32010/tms32010.h18
2 files changed, 518 insertions, 535 deletions
diff --git a/src/emu/cpu/tms32010/tms32010.c b/src/emu/cpu/tms32010/tms32010.c
index 16fb6b846d1..43ca40d0e09 100644
--- a/src/emu/cpu/tms32010/tms32010.c
+++ b/src/emu/cpu/tms32010/tms32010.c
@@ -56,9 +56,6 @@
#include "tms32010.h"
-#define CLK 1 /* Moved the clock timing back into the driver */
-
-
#ifndef INLINE
#define INLINE static inline
#endif
@@ -76,7 +73,8 @@
-typedef struct /* Page 3-6 shows all registers */
+typedef struct _tms32010_state tms32010_state; /* Page 3-6 shows all registers */
+struct _tms32010_state
{
/******************** CPU Internal Registers *******************/
UINT16 PC;
@@ -89,25 +87,37 @@ typedef struct /* Page 3-6 shows all registers */
UINT16 AR[2];
UINT16 STACK[4];
- /********************** Status data ****************************/
PAIR opcode;
int INTF; /* Pending Interrupt flag */
+ int icount;
+ PAIR oldacc;
+ UINT16 memaccess;
+ int addr_mask;
+
+ const device_config *device;
+ const address_space *program;
+ const address_space *data;
+ const address_space *io;
+};
- const device_config *device;
- const address_space *program;
- const address_space *data;
- const address_space *io;
-} tms32010_Regs;
-static tms32010_Regs R;
-static PAIR oldacc;
-static UINT16 memaccess;
-static int tms32010_icount;
-static int addr_mask;
-typedef void (*opcode_fn) (void);
+/* opcode table entry */
+typedef struct _tms32010_opcode tms32010_opcode;
+struct _tms32010_opcode
+{
+ UINT8 cycles;
+ void (*function)(tms32010_state *);
+};
+/* opcode table entry (Opcode 7F has sub-opcodes) */
+typedef struct _tms32010_opcode_7F tms32010_opcode_7F;
+struct _tms32010_opcode_7F
+{
+ UINT8 cycles;
+ void (*function)(tms32010_state *);
+};
-/******** The following is the Status (Flag) register definition. *********/
+/********* The following is the Status (Flag) register definition. *********/
/* 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
/* OV | OVM | INTM | 1 | 1 | 1 | 1 | ARP | 1 | 1 | 1 | 1 | 1 | 1 | 1 | DP */
#define OV_FLAG 0x8000 /* OV (Overflow flag) 1 indicates an overflow */
@@ -116,15 +126,15 @@ typedef void (*opcode_fn) (void);
#define ARP_REG 0x0100 /* ARP (Auxiliary Register Pointer) */
#define DP_REG 0x0001 /* DP (Data memory Pointer (bank) bit) */
-#define OV ( R.STR & OV_FLAG) /* OV (Overflow flag) */
-#define OVM ( R.STR & OVM_FLAG) /* OVM (Overflow Mode bit) 1 indicates an overflow */
-#define INTM ( R.STR & INTM_FLAG) /* INTM (Interrupt enable flag) 0 enables maskable interrupts */
-#define ARP ((R.STR & ARP_REG) >> 8) /* ARP (Auxiliary Register Pointer) */
-#define DP ((R.STR & DP_REG) << 7) /* DP (Data memory Pointer bit) */
+#define OV ( cpustate->STR & OV_FLAG) /* OV (Overflow flag) */
+#define OVM ( cpustate->STR & OVM_FLAG) /* OVM (Overflow Mode bit) 1 indicates an overflow */
+#define INTM ( cpustate->STR & INTM_FLAG) /* INTM (Interrupt enable flag) 0 enables maskable interrupts */
+#define ARP ((cpustate->STR & ARP_REG) >> 8) /* ARP (Auxiliary Register Pointer) */
+#define DP ((cpustate->STR & DP_REG) << 7) /* DP (Data memory Pointer bit) */
-#define DMA_DP (DP | (R.opcode.b.l & 0x7f)) /* address used in direct memory access operations */
-#define DMA_DP1 (0x80 | R.opcode.b.l) /* address used in direct memory access operations for sst instruction */
-#define IND (R.AR[ARP] & 0xff) /* address used in indirect memory access operations */
+#define DMA_DP (DP | (cpustate->opcode.b.l & 0x7f)) /* address used in direct memory access operations */
+#define DMA_DP1 (0x80 | cpustate->opcode.b.l) /* address used in direct memory access operations for sst instruction */
+#define IND (cpustate->AR[ARP] & 0xff) /* address used in indirect memory access operations */
@@ -133,105 +143,114 @@ typedef void (*opcode_fn) (void);
* Shortcuts
************************************************************************/
-INLINE void CLR(UINT16 flag) { R.STR &= ~flag; R.STR |= 0x1efe; }
-INLINE void SET(UINT16 flag) { R.STR |= flag; R.STR |= 0x1efe; }
+INLINE void CLR(tms32010_state *cpustate, UINT16 flag) { cpustate->STR &= ~flag; cpustate->STR |= 0x1efe; }
+INLINE void SET(tms32010_state *cpustate, UINT16 flag) { cpustate->STR |= flag; cpustate->STR |= 0x1efe; }
-INLINE void CALCULATE_ADD_OVERFLOW(INT32 addval)
+INLINE void CALCULATE_ADD_OVERFLOW(tms32010_state *cpustate, INT32 addval)
{
- if ((INT32)(~(oldacc.d ^ addval) & (oldacc.d ^ R.ACC.d)) < 0) {
- SET(OV_FLAG);
+ if ((INT32)(~(cpustate->oldacc.d ^ addval) & (cpustate->oldacc.d ^ cpustate->ACC.d)) < 0) {
+ SET(cpustate, OV_FLAG);
if (OVM)
- R.ACC.d = ((INT32)oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ cpustate->ACC.d = ((INT32)cpustate->oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
-INLINE void CALCULATE_SUB_OVERFLOW(INT32 subval)
+INLINE void CALCULATE_SUB_OVERFLOW(tms32010_state *cpustate, INT32 subval)
{
- if ((INT32)((oldacc.d ^ subval) & (oldacc.d ^ R.ACC.d)) < 0) {
- SET(OV_FLAG);
+ if ((INT32)((cpustate->oldacc.d ^ subval) & (cpustate->oldacc.d ^ cpustate->ACC.d)) < 0) {
+ SET(cpustate, OV_FLAG);
if (OVM)
- R.ACC.d = ((INT32)oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ cpustate->ACC.d = ((INT32)cpustate->oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
-INLINE UINT16 POP_STACK(void)
+INLINE UINT16 POP_STACK(tms32010_state *cpustate)
{
- UINT16 data = R.STACK[3];
- R.STACK[3] = R.STACK[2];
- R.STACK[2] = R.STACK[1];
- R.STACK[1] = R.STACK[0];
- return (data & addr_mask);
+ UINT16 data = cpustate->STACK[3];
+ cpustate->STACK[3] = cpustate->STACK[2];
+ cpustate->STACK[2] = cpustate->STACK[1];
+ cpustate->STACK[1] = cpustate->STACK[0];
+ return (data & cpustate->addr_mask);
}
-INLINE void PUSH_STACK(UINT16 data)
+INLINE void PUSH_STACK(tms32010_state *cpustate, UINT16 data)
{
- R.STACK[0] = R.STACK[1];
- R.STACK[1] = R.STACK[2];
- R.STACK[2] = R.STACK[3];
- R.STACK[3] = (data & addr_mask);
+ cpustate->STACK[0] = cpustate->STACK[1];
+ cpustate->STACK[1] = cpustate->STACK[2];
+ cpustate->STACK[2] = cpustate->STACK[3];
+ cpustate->STACK[3] = (data & cpustate->addr_mask);
}
-INLINE void GET_MEM_ADDR(UINT16 DMA)
+inline void UPDATE_AR(tms32010_state *cpustate)
{
- if (R.opcode.b.l & 0x80)
- memaccess = IND;
- else
- memaccess = DMA;
-}
-INLINE void UPDATE_AR(void)
-{
- if (R.opcode.b.l & 0x30) {
- UINT16 tmpAR = R.AR[ARP];
- if (R.opcode.b.l & 0x20) tmpAR++ ;
- if (R.opcode.b.l & 0x10) tmpAR-- ;
- R.AR[ARP] = (R.AR[ARP] & 0xfe00) | (tmpAR & 0x01ff);
+ if (cpustate->opcode.b.l & 0x30) {
+ UINT16 tmpAR = cpustate->AR[ARP];
+ if (cpustate->opcode.b.l & 0x20) tmpAR++ ;
+ if (cpustate->opcode.b.l & 0x10) tmpAR-- ;
+ cpustate->AR[ARP] = (cpustate->AR[ARP] & 0xfe00) | (tmpAR & 0x01ff);
}
}
-INLINE void UPDATE_ARP(void)
+INLINE void UPDATE_ARP(tms32010_state *cpustate)
{
- if (~R.opcode.b.l & 0x08) {
- if (R.opcode.b.l & 0x01) SET(ARP_REG);
- else CLR(ARP_REG);
+ if (~cpustate->opcode.b.l & 0x08) {
+ if (cpustate->opcode.b.l & 0x01) SET(cpustate, ARP_REG);
+ else CLR(cpustate, ARP_REG);
}
}
-INLINE void getdata(UINT8 shift,UINT8 signext)
+INLINE void getdata(tms32010_state *cpustate, UINT8 shift,UINT8 signext)
{
- GET_MEM_ADDR(DMA_DP);
- R.ALU.d = (UINT16)M_RDRAM(memaccess);
- if (signext) R.ALU.d = (INT16)R.ALU.d;
- R.ALU.d <<= shift;
- if (R.opcode.b.l & 0x80) {
- UPDATE_AR();
- UPDATE_ARP();
+ if (cpustate->opcode.b.l & 0x80)
+ cpustate->memaccess = IND;
+ else
+ cpustate->memaccess = DMA_DP;
+
+ cpustate->ALU.d = (UINT16)M_RDRAM(cpustate->memaccess);
+ if (signext) cpustate->ALU.d = (INT16)cpustate->ALU.d;
+ cpustate->ALU.d <<= shift;
+ if (cpustate->opcode.b.l & 0x80) {
+ UPDATE_AR(cpustate);
+ UPDATE_ARP(cpustate);
}
}
-INLINE void putdata(UINT16 data)
+INLINE void putdata(tms32010_state *cpustate, UINT16 data)
{
- GET_MEM_ADDR(DMA_DP);
- if (R.opcode.b.l & 0x80) {
- UPDATE_AR();
- UPDATE_ARP();
+ if (cpustate->opcode.b.l & 0x80)
+ cpustate->memaccess = IND;
+ else
+ cpustate->memaccess = DMA_DP;
+
+ if (cpustate->opcode.b.l & 0x80) {
+ UPDATE_AR(cpustate);
+ UPDATE_ARP(cpustate);
}
- M_WRTRAM(memaccess,data);
+ M_WRTRAM(cpustate->memaccess,data);
}
-INLINE void putdata_sar(UINT8 data)
+INLINE void putdata_sar(tms32010_state *cpustate, UINT8 data)
{
- GET_MEM_ADDR(DMA_DP);
- if (R.opcode.b.l & 0x80) {
- UPDATE_AR();
- UPDATE_ARP();
+ if (cpustate->opcode.b.l & 0x80)
+ cpustate->memaccess = IND;
+ else
+ cpustate->memaccess = DMA_DP;
+
+ if (cpustate->opcode.b.l & 0x80) {
+ UPDATE_AR(cpustate);
+ UPDATE_ARP(cpustate);
}
- M_WRTRAM(memaccess,R.AR[data]);
+ M_WRTRAM(cpustate->memaccess,cpustate->AR[data]);
}
-INLINE void putdata_sst(UINT16 data)
+INLINE void putdata_sst(tms32010_state *cpustate, UINT16 data)
{
- GET_MEM_ADDR(DMA_DP1); /* Page 1 only */
- if (R.opcode.b.l & 0x80) {
- UPDATE_AR();
+ if (cpustate->opcode.b.l & 0x80)
+ cpustate->memaccess = IND;
+ else
+ cpustate->memaccess = DMA_DP1; /* Page 1 only */
+
+ if (cpustate->opcode.b.l & 0x80) {
+ UPDATE_AR(cpustate);
}
- M_WRTRAM(memaccess,data);
+ M_WRTRAM(cpustate->memaccess,data);
}
@@ -243,469 +262,439 @@ INLINE void putdata_sst(UINT16 data)
/* This following function is here to fill in the void for */
/* the opcode call function. This function is never called. */
-static void other_7F_opcodes(void) { }
+static void opcodes_7F(tms32010_state *cpustate) { }
-static void illegal(void)
+static void illegal(tms32010_state *cpustate)
{
- logerror("TMS32010: PC=%04x, Illegal opcode = %04x\n", (R.PC-1), R.opcode.w.l);
+ logerror("TMS32010: PC=%04x, Illegal opcode = %04x\n", (cpustate->PC-1), cpustate->opcode.w.l);
}
-static void abst(void)
+static void abst(tms32010_state *cpustate)
{
- if ( (INT32)(R.ACC.d) < 0 ) {
- R.ACC.d = -R.ACC.d;
- if (OVM && (R.ACC.d == 0x80000000)) R.ACC.d-- ;
- }
+ if ( (INT32)(cpustate->ACC.d) < 0 ) {
+ cpustate->ACC.d = -cpustate->ACC.d;
+ if (OVM && (cpustate->ACC.d == 0x80000000)) cpustate->ACC.d-- ;
+ }
}
-/*** The manual does not mention overflow with the ADD? instructions *****
- *** however I implemented overflow, coz it doesnt make sense otherwise **
- *** and newer generations of this type of chip supported it. I think ****
- *** the manual is wrong (apart from other errors the manual has). *******
+/*** The manual doesn't mention overflow with the ADD? instructions however ***
+ *** overflow is implemented here, because it makes little sense otherwise ****
+ *** while newer generations of this type of chip supported it. The ***********
+ *** manual may be wrong wrong (apart from other errors the manual has). ******
-static void add_sh(void) { getdata(R.opcode.b.h,1); R.ACC.d += R.ALU.d; }
-static void addh(void) { getdata(0,0); R.ACC.d += (R.ALU.d << 16); }
+static void add_sh(cpustate) { getdata(cpustate, cpustate->opcode.b.h,1); cpustate->ACC.d += cpustate->ALU.d; }
+static void addh(cpustate) { getdata(cpustate, 0,0); cpustate->ACC.d += (cpustate->ALU.d << 16); }
***/
-static void add_sh(void)
+static void add_sh(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata((R.opcode.b.h & 0xf),1);
- R.ACC.d += R.ALU.d;
- CALCULATE_ADD_OVERFLOW(R.ALU.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, (cpustate->opcode.b.h & 0xf),1);
+ cpustate->ACC.d += cpustate->ALU.d;
+ CALCULATE_ADD_OVERFLOW(cpustate, cpustate->ALU.d);
}
-static void addh(void)
+static void addh(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata(0,0);
- R.ACC.w.h += R.ALU.w.l;
- if ((INT16)(~(oldacc.w.h ^ R.ALU.w.h) & (oldacc.w.h ^ R.ACC.w.h)) < 0) {
- SET(OV_FLAG);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.w.h += cpustate->ALU.w.l;
+ if ((INT16)(~(cpustate->oldacc.w.h ^ cpustate->ALU.w.h) & (cpustate->oldacc.w.h ^ cpustate->ACC.w.h)) < 0) {
+ SET(cpustate, OV_FLAG);
if (OVM)
- R.ACC.w.h = ((INT16)oldacc.w.h < 0) ? 0x8000 : 0x7fff;
+ cpustate->ACC.w.h = ((INT16)cpustate->oldacc.w.h < 0) ? 0x8000 : 0x7fff;
}
}
-static void adds(void)
+static void adds(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata(0,0);
- R.ACC.d += R.ALU.d;
- CALCULATE_ADD_OVERFLOW(R.ALU.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.d += cpustate->ALU.d;
+ CALCULATE_ADD_OVERFLOW(cpustate, cpustate->ALU.d);
}
-static void and(void)
+static void and(tms32010_state *cpustate)
{
- getdata(0,0);
- R.ACC.d &= R.ALU.d;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.d &= cpustate->ALU.d;
}
-static void apac(void)
+static void apac(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- R.ACC.d += R.Preg.d;
- CALCULATE_ADD_OVERFLOW(R.Preg.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ cpustate->ACC.d += cpustate->Preg.d;
+ CALCULATE_ADD_OVERFLOW(cpustate, cpustate->Preg.d);
}
-static void br(void)
+static void br(tms32010_state *cpustate)
{
- R.PC = M_RDOP_ARG(R.PC);
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
}
-static void banz(void)
+static void banz(tms32010_state *cpustate)
{
- if (R.AR[ARP] & 0x01ff)
- R.PC = M_RDOP_ARG(R.PC);
+ if (cpustate->AR[ARP] & 0x01ff)
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
- R.ALU.w.l = R.AR[ARP];
- R.ALU.w.l-- ;
- R.AR[ARP] = (R.AR[ARP] & 0xfe00) | (R.ALU.w.l & 0x01ff);
+ cpustate->PC++ ;
+ cpustate->ALU.w.l = cpustate->AR[ARP];
+ cpustate->ALU.w.l-- ;
+ cpustate->AR[ARP] = (cpustate->AR[ARP] & 0xfe00) | (cpustate->ALU.w.l & 0x01ff);
}
-static void bgez(void)
+static void bgez(tms32010_state *cpustate)
{
- if ( (INT32)(R.ACC.d) >= 0 )
- R.PC = M_RDOP_ARG(R.PC);
+ if ( (INT32)(cpustate->ACC.d) >= 0 )
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void bgz(void)
+static void bgz(tms32010_state *cpustate)
{
- if ( (INT32)(R.ACC.d) > 0 )
- R.PC = M_RDOP_ARG(R.PC);
+ if ( (INT32)(cpustate->ACC.d) > 0 )
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void bioz(void)
+static void bioz(tms32010_state *cpustate)
{
if (BIO_IN != CLEAR_LINE)
- R.PC = M_RDOP_ARG(R.PC);
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void blez(void)
+static void blez(tms32010_state *cpustate)
{
- if ( (INT32)(R.ACC.d) <= 0 )
- R.PC = M_RDOP_ARG(R.PC);
+ if ( (INT32)(cpustate->ACC.d) <= 0 )
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void blz(void)
+static void blz(tms32010_state *cpustate)
{
- if ( (INT32)(R.ACC.d) < 0 )
- R.PC = M_RDOP_ARG(R.PC);
+ if ( (INT32)(cpustate->ACC.d) < 0 )
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void bnz(void)
+static void bnz(tms32010_state *cpustate)
{
- if (R.ACC.d != 0)
- R.PC = M_RDOP_ARG(R.PC);
+ if (cpustate->ACC.d != 0)
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void bv(void)
+static void bv(tms32010_state *cpustate)
{
if (OV) {
- R.PC = M_RDOP_ARG(R.PC);
- CLR(OV_FLAG);
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
+ CLR(cpustate, OV_FLAG);
}
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void bz(void)
+static void bz(tms32010_state *cpustate)
{
- if (R.ACC.d == 0)
- R.PC = M_RDOP_ARG(R.PC);
+ if (cpustate->ACC.d == 0)
+ cpustate->PC = M_RDOP_ARG(cpustate->PC);
else
- R.PC++ ;
+ cpustate->PC++ ;
}
-static void cala(void)
+static void cala(tms32010_state *cpustate)
{
- PUSH_STACK(R.PC);
- R.PC = R.ACC.w.l & addr_mask;
+ PUSH_STACK(cpustate, cpustate->PC);
+ cpustate->PC = cpustate->ACC.w.l & cpustate->addr_mask;
}
-static void call(void)
+static void call(tms32010_state *cpustate)
{
- R.PC++ ;
- PUSH_STACK(R.PC);
- R.PC = M_RDOP_ARG((R.PC - 1)) & addr_mask;
+ cpustate->PC++ ;
+ PUSH_STACK(cpustate, cpustate->PC);
+ cpustate->PC = M_RDOP_ARG((cpustate->PC - 1)) & cpustate->addr_mask;
}
-static void dint(void)
+static void dint(tms32010_state *cpustate)
{
- SET(INTM_FLAG);
+ SET(cpustate, INTM_FLAG);
}
-static void dmov(void)
+static void dmov(tms32010_state *cpustate)
{
- getdata(0,0);
- M_WRTRAM((memaccess + 1),R.ALU.w.l);
+ getdata(cpustate, 0,0);
+ M_WRTRAM((cpustate->memaccess + 1),cpustate->ALU.w.l);
}
-static void eint(void)
+static void eint(tms32010_state *cpustate)
{
- CLR(INTM_FLAG);
+ CLR(cpustate, INTM_FLAG);
}
-static void in_p(void)
+static void in_p(tms32010_state *cpustate)
{
- R.ALU.w.l = P_IN( (R.opcode.b.h & 7) );
- putdata(R.ALU.w.l);
+ cpustate->ALU.w.l = P_IN( (cpustate->opcode.b.h & 7) );
+ putdata(cpustate, cpustate->ALU.w.l);
}
-static void lac_sh(void)
+static void lac_sh(tms32010_state *cpustate)
{
- getdata((R.opcode.b.h & 0x0f),1);
- R.ACC.d = R.ALU.d;
+ getdata(cpustate, (cpustate->opcode.b.h & 0x0f),1);
+ cpustate->ACC.d = cpustate->ALU.d;
}
-static void lack(void)
+static void lack(tms32010_state *cpustate)
{
- R.ACC.d = R.opcode.b.l;
+ cpustate->ACC.d = cpustate->opcode.b.l;
}
-static void lar_ar0(void)
+static void lar_ar0(tms32010_state *cpustate)
{
- getdata(0,0);
- R.AR[0] = R.ALU.w.l;
+ getdata(cpustate, 0,0);
+ cpustate->AR[0] = cpustate->ALU.w.l;
}
-static void lar_ar1(void)
+static void lar_ar1(tms32010_state *cpustate)
{
- getdata(0,0);
- R.AR[1] = R.ALU.w.l;
+ getdata(cpustate, 0,0);
+ cpustate->AR[1] = cpustate->ALU.w.l;
}
-static void lark_ar0(void)
+static void lark_ar0(tms32010_state *cpustate)
{
- R.AR[0] = R.opcode.b.l;
+ cpustate->AR[0] = cpustate->opcode.b.l;
}
-static void lark_ar1(void)
+static void lark_ar1(tms32010_state *cpustate)
{
- R.AR[1] = R.opcode.b.l;
+ cpustate->AR[1] = cpustate->opcode.b.l;
}
-static void larp_mar(void)
+static void larp_mar(tms32010_state *cpustate)
{
- if (R.opcode.b.l & 0x80) {
- UPDATE_AR();
- UPDATE_ARP();
+ if (cpustate->opcode.b.l & 0x80) {
+ UPDATE_AR(cpustate);
+ UPDATE_ARP(cpustate);
}
}
-static void ldp(void)
+static void ldp(tms32010_state *cpustate)
{
- getdata(0,0);
- if (R.ALU.d & 1)
- SET(DP_REG);
+ getdata(cpustate, 0,0);
+ if (cpustate->ALU.d & 1)
+ SET(cpustate, DP_REG);
else
- CLR(DP_REG);
+ CLR(cpustate, DP_REG);
}
-static void ldpk(void)
+static void ldpk(tms32010_state *cpustate)
{
- if (R.opcode.b.l & 1)
- SET(DP_REG);
+ if (cpustate->opcode.b.l & 1)
+ SET(cpustate, DP_REG);
else
- CLR(DP_REG);
+ CLR(cpustate, DP_REG);
}
-static void lst(void)
+static void lst(tms32010_state *cpustate)
{
- R.opcode.b.l |= 0x08; /* Next arp not supported here, so mask it */
- getdata(0,0);
- R.ALU.w.l &= (~INTM_FLAG); /* Must not affect INTM */
- R.STR &= INTM_FLAG;
- R.STR |= R.ALU.w.l;
- R.STR |= 0x1efe;
+ cpustate->opcode.b.l |= 0x08; /* Next arp not supported here, so mask it */
+ getdata(cpustate, 0,0);
+ cpustate->ALU.w.l &= (~INTM_FLAG); /* Must not affect INTM */
+ cpustate->STR &= INTM_FLAG;
+ cpustate->STR |= cpustate->ALU.w.l;
+ cpustate->STR |= 0x1efe;
}
-static void lt(void)
+static void lt(tms32010_state *cpustate)
{
- getdata(0,0);
- R.Treg = R.ALU.w.l;
+ getdata(cpustate, 0,0);
+ cpustate->Treg = cpustate->ALU.w.l;
}
-static void lta(void)
+static void lta(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata(0,0);
- R.Treg = R.ALU.w.l;
- R.ACC.d += R.Preg.d;
- CALCULATE_ADD_OVERFLOW(R.Preg.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, 0,0);
+ cpustate->Treg = cpustate->ALU.w.l;
+ cpustate->ACC.d += cpustate->Preg.d;
+ CALCULATE_ADD_OVERFLOW(cpustate, cpustate->Preg.d);
}
-static void ltd(void)
+static void ltd(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata(0,0);
- R.Treg = R.ALU.w.l;
- M_WRTRAM((memaccess + 1),R.ALU.w.l);
- R.ACC.d += R.Preg.d;
- CALCULATE_ADD_OVERFLOW(R.Preg.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, 0,0);
+ cpustate->Treg = cpustate->ALU.w.l;
+ M_WRTRAM((cpustate->memaccess + 1),cpustate->ALU.w.l);
+ cpustate->ACC.d += cpustate->Preg.d;
+ CALCULATE_ADD_OVERFLOW(cpustate, cpustate->Preg.d);
}
-static void mpy(void)
+static void mpy(tms32010_state *cpustate)
{
- getdata(0,0);
- R.Preg.d = (INT16)R.ALU.w.l * (INT16)R.Treg;
- if (R.Preg.d == 0x40000000) R.Preg.d = 0xc0000000;
+ getdata(cpustate, 0,0);
+ cpustate->Preg.d = (INT16)cpustate->ALU.w.l * (INT16)cpustate->Treg;
+ if (cpustate->Preg.d == 0x40000000) cpustate->Preg.d = 0xc0000000;
}
-static void mpyk(void)
+static void mpyk(tms32010_state *cpustate)
{
- R.Preg.d = (INT16)R.Treg * ((INT16)(R.opcode.w.l << 3) >> 3);
+ cpustate->Preg.d = (INT16)cpustate->Treg * ((INT16)(cpustate->opcode.w.l << 3) >> 3);
}
-static void nop(void)
+static void nop(tms32010_state *cpustate)
{
/* Nothing to do */
}
-static void or(void)
+static void or(tms32010_state *cpustate)
{
- getdata(0,0);
- R.ACC.w.l |= R.ALU.w.l;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.w.l |= cpustate->ALU.w.l;
}
-static void out_p(void)
+static void out_p(tms32010_state *cpustate)
{
- getdata(0,0);
- P_OUT( (R.opcode.b.h & 7), R.ALU.w.l );
+ getdata(cpustate, 0,0);
+ P_OUT( (cpustate->opcode.b.h & 7), cpustate->ALU.w.l );
}
-static void pac(void)
+static void pac(tms32010_state *cpustate)
{
- R.ACC.d = R.Preg.d;
+ cpustate->ACC.d = cpustate->Preg.d;
}
-static void pop(void)
+static void pop(tms32010_state *cpustate)
{
- R.ACC.w.l = POP_STACK();
- R.ACC.w.h = 0x0000;
+ cpustate->ACC.w.l = POP_STACK(cpustate);
+ cpustate->ACC.w.h = 0x0000;
}
-static void push(void)
+static void push(tms32010_state *cpustate)
{
- PUSH_STACK(R.ACC.w.l);
+ PUSH_STACK(cpustate, cpustate->ACC.w.l);
}
-static void ret(void)
+static void ret(tms32010_state *cpustate)
{
- R.PC = POP_STACK();
+ cpustate->PC = POP_STACK(cpustate);
}
-static void rovm(void)
+static void rovm(tms32010_state *cpustate)
{
- CLR(OVM_FLAG);
+ CLR(cpustate, OVM_FLAG);
}
-static void sach_sh(void)
+static void sach_sh(tms32010_state *cpustate)
{
- R.ALU.d = (R.ACC.d << (R.opcode.b.h & 7));
- putdata(R.ALU.w.h);
+ cpustate->ALU.d = (cpustate->ACC.d << (cpustate->opcode.b.h & 7));
+ putdata(cpustate, cpustate->ALU.w.h);
}
-static void sacl(void)
+static void sacl(tms32010_state *cpustate)
{
- putdata(R.ACC.w.l);
+ putdata(cpustate, cpustate->ACC.w.l);
}
-static void sar_ar0(void)
+static void sar_ar0(tms32010_state *cpustate)
{
- putdata_sar(0);
+ putdata_sar(cpustate, 0);
}
-static void sar_ar1(void)
+static void sar_ar1(tms32010_state *cpustate)
{
- putdata_sar(1);
+ putdata_sar(cpustate, 1);
}
-static void sovm(void)
+static void sovm(tms32010_state *cpustate)
{
- SET(OVM_FLAG);
+ SET(cpustate, OVM_FLAG);
}
-static void spac(void)
+static void spac(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- R.ACC.d -= R.Preg.d;
- CALCULATE_SUB_OVERFLOW(R.Preg.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ cpustate->ACC.d -= cpustate->Preg.d;
+ CALCULATE_SUB_OVERFLOW(cpustate, cpustate->Preg.d);
}
-static void sst(void)
+static void sst(tms32010_state *cpustate)
{
- putdata_sst(R.STR);
+ putdata_sst(cpustate, cpustate->STR);
}
-static void sub_sh(void)
+static void sub_sh(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata((R.opcode.b.h & 0x0f),1);
- R.ACC.d -= R.ALU.d;
- CALCULATE_SUB_OVERFLOW(R.ALU.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, (cpustate->opcode.b.h & 0x0f),1);
+ cpustate->ACC.d -= cpustate->ALU.d;
+ CALCULATE_SUB_OVERFLOW(cpustate, cpustate->ALU.d);
}
-static void subc(void)
+static void subc(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata(15,0);
- R.ALU.d = (INT32) R.ACC.d - R.ALU.d;
- if ((INT32)((oldacc.d ^ R.ALU.d) & (oldacc.d ^ R.ACC.d)) < 0)
- SET(OV_FLAG);
- if ( (INT32)(R.ALU.d) >= 0 )
- R.ACC.d = ((R.ALU.d << 1) + 1);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, 15,0);
+ cpustate->ALU.d = (INT32) cpustate->ACC.d - cpustate->ALU.d;
+ if ((INT32)((cpustate->oldacc.d ^ cpustate->ALU.d) & (cpustate->oldacc.d ^ cpustate->ACC.d)) < 0)
+ SET(cpustate, OV_FLAG);
+ if ( (INT32)(cpustate->ALU.d) >= 0 )
+ cpustate->ACC.d = ((cpustate->ALU.d << 1) + 1);
else
- R.ACC.d = (R.ACC.d << 1);
+ cpustate->ACC.d = (cpustate->ACC.d << 1);
}
-static void subh(void)
+static void subh(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata(16,0);
- R.ACC.d -= R.ALU.d;
- CALCULATE_SUB_OVERFLOW(R.ALU.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, 16,0);
+ cpustate->ACC.d -= cpustate->ALU.d;
+ CALCULATE_SUB_OVERFLOW(cpustate, cpustate->ALU.d);
}
-static void subs(void)
+static void subs(tms32010_state *cpustate)
{
- oldacc.d = R.ACC.d;
- getdata(0,0);
- R.ACC.d -= R.ALU.d;
- CALCULATE_SUB_OVERFLOW(R.ALU.d);
+ cpustate->oldacc.d = cpustate->ACC.d;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.d -= cpustate->ALU.d;
+ CALCULATE_SUB_OVERFLOW(cpustate, cpustate->ALU.d);
}
-static void tblr(void)
+static void tblr(tms32010_state *cpustate)
{
- R.ALU.d = M_RDROM((R.ACC.w.l & addr_mask));
- putdata(R.ALU.w.l);
- R.STACK[0] = R.STACK[1];
+ cpustate->ALU.d = M_RDROM((cpustate->ACC.w.l & cpustate->addr_mask));
+ putdata(cpustate, cpustate->ALU.w.l);
+ cpustate->STACK[0] = cpustate->STACK[1];
}
-static void tblw(void)
+static void tblw(tms32010_state *cpustate)
{
- getdata(0,0);
- M_WRTROM(((R.ACC.w.l & addr_mask)),R.ALU.w.l);
- R.STACK[0] = R.STACK[1];
+ getdata(cpustate, 0,0);
+ M_WRTROM(((cpustate->ACC.w.l & cpustate->addr_mask)),cpustate->ALU.w.l);
+ cpustate->STACK[0] = cpustate->STACK[1];
}
-static void xor(void)
+static void xor(tms32010_state *cpustate)
{
- getdata(0,0);
- R.ACC.w.l ^= R.ALU.w.l;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.w.l ^= cpustate->ALU.w.l;
}
-static void zac(void)
+static void zac(tms32010_state *cpustate)
{
- R.ACC.d = 0;
+ cpustate->ACC.d = 0;
}
-static void zalh(void)
+static void zalh(tms32010_state *cpustate)
{
- getdata(0,0);
- R.ACC.w.h = R.ALU.w.l;
- R.ACC.w.l = 0x0000;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.w.h = cpustate->ALU.w.l;
+ cpustate->ACC.w.l = 0x0000;
}
-static void zals(void)
+static void zals(tms32010_state *cpustate)
{
- getdata(0,0);
- R.ACC.w.l = R.ALU.w.l;
- R.ACC.w.h = 0x0000;
+ getdata(cpustate, 0,0);
+ cpustate->ACC.w.l = cpustate->ALU.w.l;
+ cpustate->ACC.w.h = 0x0000;
}
-/***********************************************************************
- * Cycle Timings
- ***********************************************************************/
-
-static const unsigned cycles_main[256]=
-{
-/*00*/ 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK,
-/*10*/ 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK,
-/*20*/ 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK,
-/*30*/ 1*CLK, 1*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 1*CLK, 1*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK,
-/*40*/ 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK,
-/*50*/ 1*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK,
-/*60*/ 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 3*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK,
-/*70*/ 1*CLK, 1*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 3*CLK, 1*CLK, 0*CLK,
-/*80*/ 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK,
-/*90*/ 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK,
-/*A0*/ 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK,
-/*B0*/ 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK,
-/*C0*/ 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK,
-/*D0*/ 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK,
-/*E0*/ 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK,
-/*F0*/ 0*CLK, 0*CLK, 0*CLK, 0*CLK, 2*CLK, 2*CLK, 2*CLK, 0*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK, 2*CLK
-};
-
-static const unsigned cycles_7F_other[32]=
-{
-/*80*/ 1*CLK, 1*CLK, 1*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 1*CLK, 1*CLK, 1*CLK, 1*CLK, 2*CLK, 2*CLK, 1*CLK, 1*CLK,
-/*90*/ 1*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 0*CLK, 2*CLK, 2*CLK, 0*CLK, 0*CLK
-};
-
/***********************************************************************
- * Opcode Table
+ * Opcode Table (Cycles, Instruction)
***********************************************************************/
-static const opcode_fn opcode_main[256]=
-{
-/*00*/ add_sh ,add_sh ,add_sh ,add_sh ,add_sh ,add_sh ,add_sh ,add_sh
-/*08*/ ,add_sh ,add_sh ,add_sh ,add_sh ,add_sh ,add_sh ,add_sh ,add_sh
-/*10*/ ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh
-/*18*/ ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh ,sub_sh
-/*20*/ ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh
-/*28*/ ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh ,lac_sh
-/*30*/ ,sar_ar0 ,sar_ar1 ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*38*/ ,lar_ar0 ,lar_ar1 ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*40*/ ,in_p ,in_p ,in_p ,in_p ,in_p ,in_p ,in_p ,in_p
-/*48*/ ,out_p ,out_p ,out_p ,out_p ,out_p ,out_p ,out_p ,out_p
-/*50*/ ,sacl ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*58*/ ,sach_sh ,sach_sh ,sach_sh ,sach_sh ,sach_sh ,sach_sh ,sach_sh ,sach_sh
-/*60*/ ,addh ,adds ,subh ,subs ,subc ,zalh ,zals ,tblr
-/*68*/ ,larp_mar ,dmov ,lt ,ltd ,lta ,mpy ,ldpk ,ldp
-/*70*/ ,lark_ar0 ,lark_ar1 ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*78*/ ,xor ,and ,or ,lst ,sst ,tblw ,lack ,other_7F_opcodes
-/*80*/ ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk
-/*88*/ ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk
-/*90*/ ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk
-/*98*/ ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk ,mpyk
-/*A0*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*A8*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*B0*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*B8*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*C0*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*C8*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*D0*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*D8*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*E0*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*E8*/ ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*F0*/ ,illegal ,illegal ,illegal ,illegal ,banz ,bv ,bioz ,illegal
-/*F8*/ ,call ,br ,blz ,blez ,bgz ,bgez ,bnz ,bz
+static const tms32010_opcode opcode_main[256]=
+{
+/*00*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
+/*08*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
+/*10*/ {1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },
+/*18*/ {1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },
+/*20*/ {1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },
+/*28*/ {1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },
+/*30*/ {1, sar_ar0 },{1, sar_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*38*/ {1, lar_ar0 },{1, lar_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*40*/ {2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },
+/*48*/ {2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },
+/*50*/ {1, sacl },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*58*/ {1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },
+/*60*/ {1, addh },{1, adds },{1, subh },{1, subs },{1, subc },{1, zalh },{1, zals },{3, tblr },
+/*68*/ {1, larp_mar},{1, dmov },{1, lt },{1, ltd },{1, lta },{1, mpy },{1, ldpk },{1, ldp },
+/*70*/ {1, lark_ar0},{1, lark_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*78*/ {1, xor },{1, and },{1, or },{1, lst },{1, sst },{3, tblw },{1, lack },{0, opcodes_7F },
+/*80*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*88*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*90*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*98*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*A0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*A8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*B0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*B8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*C0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*C8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*D0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*D8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*E0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*E8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*F0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{2, banz },{2, bv },{2, bioz },{0, illegal },
+/*F8*/ {2, call },{2, br },{2, blz },{2, blez },{2, bgz },{2, bgez },{2, bnz },{2, bz }
};
-static const opcode_fn opcode_7F_other[32]=
+static const tms32010_opcode_7F opcode_7F[32]=
{
-/*80*/ nop ,dint ,eint ,illegal ,illegal ,illegal ,illegal ,illegal
-/*88*/ ,abst ,zac ,rovm ,sovm ,cala ,ret ,pac ,apac
-/*90*/ ,spac ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal ,illegal
-/*98*/ ,illegal ,illegal ,illegal ,illegal ,push ,pop ,illegal ,illegal
+/*80*/ {1, nop },{1, dint },{1, eint },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*88*/ {1, abst },{1, zac },{1, rovm },{1, sovm },{2, cala },{2, ret },{1, pac },{1, apac },
+/*90*/ {1, spac },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*98*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{2, push },{2, pop },{0, illegal },{0, illegal }
};
@@ -715,68 +704,74 @@ static const opcode_fn opcode_7F_other[32]=
****************************************************************************/
static CPU_INIT( tms32010 )
{
- state_save_register_device_item(device, 0, R.PC);
- state_save_register_device_item(device, 0, R.PREVPC);
- state_save_register_device_item(device, 0, R.STR);
- state_save_register_device_item(device, 0, R.ACC.d);
- state_save_register_device_item(device, 0, R.ALU.d);
- state_save_register_device_item(device, 0, R.Preg.d);
- state_save_register_device_item(device, 0, R.Treg);
- state_save_register_device_item(device, 0, R.AR[0]);
- state_save_register_device_item(device, 0, R.AR[1]);
- state_save_register_device_item(device, 0, R.STACK[0]);
- state_save_register_device_item(device, 0, R.STACK[1]);
- state_save_register_device_item(device, 0, R.STACK[2]);
- state_save_register_device_item(device, 0, R.STACK[3]);
- state_save_register_device_item(device, 0, R.INTF);
- state_save_register_device_item(device, 0, R.opcode.d);
-
- R.device = device;
- R.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
- R.data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
- R.io = memory_find_address_space(device, ADDRESS_SPACE_IO);
+ tms32010_state *cpustate = device->token;
+
+ state_save_register_device_item(device, 0, cpustate->PC);
+ state_save_register_device_item(device, 0, cpustate->PREVPC);
+ state_save_register_device_item(device, 0, cpustate->STR);
+ state_save_register_device_item(device, 0, cpustate->ACC.d);
+ state_save_register_device_item(device, 0, cpustate->ALU.d);
+ state_save_register_device_item(device, 0, cpustate->Preg.d);
+ state_save_register_device_item(device, 0, cpustate->Treg);
+ state_save_register_device_item(device, 0, cpustate->AR[0]);
+ state_save_register_device_item(device, 0, cpustate->AR[1]);
+ state_save_register_device_item(device, 0, cpustate->STACK[0]);
+ state_save_register_device_item(device, 0, cpustate->STACK[1]);
+ state_save_register_device_item(device, 0, cpustate->STACK[2]);
+ state_save_register_device_item(device, 0, cpustate->STACK[3]);
+ state_save_register_device_item(device, 0, cpustate->INTF);
+ state_save_register_device_item(device, 0, cpustate->icount);
+ state_save_register_device_item(device, 0, cpustate->opcode.d);
+ state_save_register_device_item(device, 0, cpustate->oldacc.d);
+ state_save_register_device_item(device, 0, cpustate->memaccess);
+ state_save_register_device_item(device, 0, cpustate->addr_mask);
+
+ cpustate->device = device;
+ cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
+ cpustate->data = memory_find_address_space(device, ADDRESS_SPACE_DATA);
+ cpustate->io = memory_find_address_space(device, ADDRESS_SPACE_IO);
}
+
/****************************************************************************
* Reset registers to their initial values
****************************************************************************/
static CPU_RESET( tms32010 )
{
- R.PC = 0;
- R.STR = 0x7efe; // OV cleared
- R.ACC.d = 0;
- R.INTF = TMS32010_INT_NONE;
- addr_mask = 0x0fff; /* TMS32010 can only address 0x0fff */
- /* however other TMS3201x devices */
- /* can address up to 0xffff (incase */
- /* their support is ever added). */
+ tms32010_state *cpustate = device->token;
+
+ cpustate->PC = 0;
+ cpustate->STR = 0x7efe; // OV cleared
+ cpustate->ACC.d = 0;
+ cpustate->INTF = TMS32010_INT_NONE;
+ cpustate->addr_mask = 0x0fff; /* TMS32010 can only address 0x0fff */
+ /* however other TMS3201x devices */
+ /* can address up to 0xffff (incase */
+ /* their support is ever added). */
}
/****************************************************************************
* Shut down CPU emulation
****************************************************************************/
-static CPU_EXIT( tms32010 )
-{
- /* nothing to do ? */
-}
+static CPU_EXIT( tms32010 ) { }
/****************************************************************************
* Issue an interrupt if necessary
****************************************************************************/
-static int Ext_IRQ(void)
+static int Ext_IRQ(tms32010_state *cpustate)
{
if (INTM == 0)
{
logerror("TMS32010: EXT INTERRUPT\n");
- R.INTF = TMS32010_INT_NONE;
- SET(INTM_FLAG);
- PUSH_STACK(R.PC);
- R.PC = 0x0002;
- return (3*CLK); /* 3 cycles used due to PUSH and DINT operation ? */
+ cpustate->INTF = TMS32010_INT_NONE;
+ SET(cpustate, INTM_FLAG);
+ PUSH_STACK(cpustate, cpustate->PC);
+ cpustate->PC = 0x0002;
+ return (3); /* 3 cycles used due to PUSH and DINT operation ? */
}
- return (0*CLK);
+ return (0);
}
@@ -786,62 +781,46 @@ static int Ext_IRQ(void)
****************************************************************************/
static CPU_EXECUTE( tms32010 )
{
- tms32010_icount = cycles;
+ tms32010_state *cpustate = device->token;
+ cpustate->icount = cycles;
do
{
- if (R.INTF) {
- /* Dont service INT if prev instruction was MPY, MPYK or EINT */
- if ((R.opcode.b.h != 0x6d) && ((R.opcode.b.h & 0xe0) != 0x80) && (R.opcode.w.l != 0x7f82))
- tms32010_icount -= Ext_IRQ();
+ if (cpustate->INTF) {
+ /* Dont service INT if previous instruction was MPY, MPYK or EINT */
+ if ((cpustate->opcode.b.h != 0x6d) && ((cpustate->opcode.b.h & 0xe0) != 0x80) && (cpustate->opcode.w.l != 0x7f82))
+ cpustate->icount -= Ext_IRQ(cpustate);
}
- R.PREVPC = R.PC;
+ cpustate->PREVPC = cpustate->PC;
- debugger_instruction_hook(device, R.PC);
+ debugger_instruction_hook(device, cpustate->PC);
- R.opcode.d = M_RDOP(R.PC);
- R.PC++;
+ cpustate->opcode.d = M_RDOP(cpustate->PC);
+ cpustate->PC++;
- if (R.opcode.b.h != 0x7f) { /* Do all opcodes except the 7Fxx ones */
- tms32010_icount -= cycles_main[R.opcode.b.h];
- (*(opcode_main[R.opcode.b.h]))();
+ if (cpustate->opcode.b.h != 0x7f) { /* Do all opcodes except the 7Fxx ones */
+ cpustate->icount -= opcode_main[cpustate->opcode.b.h].cycles;
+ (*opcode_main[cpustate->opcode.b.h].function)(cpustate);
}
else { /* Opcode major byte 7Fxx has many opcodes in its minor byte */
- tms32010_icount -= cycles_7F_other[(R.opcode.b.l & 0x1f)];
- (*(opcode_7F_other[(R.opcode.b.l & 0x1f)]))();
+ cpustate->icount -= opcode_7F[(cpustate->opcode.b.l & 0x1f)].cycles;
+ (*opcode_7F[(cpustate->opcode.b.l & 0x1f)].function)(cpustate);
}
- } while (tms32010_icount>0);
+ } while (cpustate->icount > 0);
- return cycles - tms32010_icount;
+ return cycles - cpustate->icount;
}
-/****************************************************************************
- * Get all registers in given buffer
- ****************************************************************************/
-static CPU_GET_CONTEXT( tms32010 )
-{
- if( dst )
- *(tms32010_Regs*)dst = R;
-}
-
-/****************************************************************************
- * Set all registers to given values
- ****************************************************************************/
-static CPU_SET_CONTEXT( tms32010 )
-{
- if (src)
- R = *(tms32010_Regs*)src;
-}
/****************************************************************************
* Set IRQ line state
****************************************************************************/
-static void set_irq_line(int irqline, int state)
+static void set_irq_line(tms32010_state *cpustate, int irqline, int state)
{
/* Pending Interrupts cannot be cleared! */
- if (state == ASSERT_LINE) R.INTF |= TMS32010_INT_PENDING;
+ if (state == ASSERT_LINE) cpustate->INTF |= TMS32010_INT_PENDING;
}
@@ -861,23 +840,25 @@ ADDRESS_MAP_END
static CPU_SET_INFO( tms32010 )
{
+ tms32010_state *cpustate = device->token;
+
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32010_PC: R.PC = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PC: cpustate->PC = info->i; break;
/* This is actually not a stack pointer, but the stack contents */
/* Stack is a 4 level First In Last Out stack */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS32010_STK3: R.STACK[3] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_STR: R.STR = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_ACC: R.ACC.d = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_PREG: R.Preg.d = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_TREG: R.Treg = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR0: R.AR[0] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR1: R.AR[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STK3: cpustate->STACK[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STR: cpustate->STR = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_ACC: cpustate->ACC.d = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PREG: cpustate->Preg.d = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_TREG: cpustate->Treg = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR0: cpustate->AR[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR1: cpustate->AR[1] = info->i; break;
}
}
@@ -889,19 +870,21 @@ static CPU_SET_INFO( tms32010 )
CPU_GET_INFO( tms32010 )
{
+ tms32010_state *cpustate = (device != NULL) ? device->token : NULL;
+
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(R); break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms32010_state); break;
case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1*CLK; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 3*CLK; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 16; break;
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 12; break;
@@ -913,73 +896,73 @@ CPU_GET_INFO( tms32010 )
case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_IO: info->i = 5; break;
case CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACE_IO: info->i = -1; break;
- case CPUINFO_INT_INPUT_STATE + 0: info->i = (R.INTF & TMS32010_INT_PENDING) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->INTF & TMS32010_INT_PENDING) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = R.PREVPC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32010_PC: info->i = R.PC; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PC: info->i = cpustate->PC; break;
/* This is actually not a stack pointer, but the stack contents */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS32010_STK3: info->i = R.STACK[3]; break;
- case CPUINFO_INT_REGISTER + TMS32010_ACC: info->i = R.ACC.d; break;
- case CPUINFO_INT_REGISTER + TMS32010_STR: info->i = R.STR; break;
- case CPUINFO_INT_REGISTER + TMS32010_PREG: info->i = R.Preg.d; break;
- case CPUINFO_INT_REGISTER + TMS32010_TREG: info->i = R.Treg; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR0: info->i = R.AR[0]; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR1: info->i = R.AR[1]; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STK3: info->i = cpustate->STACK[3]; break;
+ case CPUINFO_INT_REGISTER + TMS32010_ACC: info->i = cpustate->ACC.d; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STR: info->i = cpustate->STR; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PREG: info->i = cpustate->Preg.d; break;
+ case CPUINFO_INT_REGISTER + TMS32010_TREG: info->i = cpustate->Treg; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR0: info->i = cpustate->AR[0]; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR1: info->i = cpustate->AR[1]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32010); break;
- case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(tms32010); break;
- case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(tms32010); break;
+ case CPUINFO_PTR_GET_CONTEXT: info->getcontext = CPU_GET_CONTEXT_NAME(dummy); break;
+ case CPUINFO_PTR_SET_CONTEXT: info->setcontext = CPU_SET_CONTEXT_NAME(dummy); break;
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(tms32010); break;
- case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32010); break;
+ case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(tms32010); break;
case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(tms32010); break;
- case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32010); break;
- case CPUINFO_PTR_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32010); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms32010_icount; break;
+ case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32010); break;
+ case CPUINFO_PTR_BURN: info->burn = NULL; break;
+ case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32010); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32010_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS32010"); break;
- case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Texas Instruments TMS32010"); break;
- case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.22"); break;
- case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32010"); break;
+ case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Texas Instruments TMS32010"); break;
+ case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.22"); break;
+ case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
- R.STR & 0x8000 ? 'O':'.',
- R.STR & 0x4000 ? 'M':'.',
- R.STR & 0x2000 ? 'I':'.',
- R.STR & 0x1000 ? '.':'?',
- R.STR & 0x0800 ? 'a':'?',
- R.STR & 0x0400 ? 'r':'?',
- R.STR & 0x0200 ? 'p':'?',
- R.STR & 0x0100 ? '1':'0',
- R.STR & 0x0080 ? '.':'?',
- R.STR & 0x0040 ? '.':'?',
- R.STR & 0x0020 ? '.':'?',
- R.STR & 0x0010 ? '.':'?',
- R.STR & 0x0008 ? '.':'?',
- R.STR & 0x0004 ? 'd':'?',
- R.STR & 0x0002 ? 'p':'?',
- R.STR & 0x0001 ? '1':'0');
+ cpustate->STR & 0x8000 ? 'O':'.',
+ cpustate->STR & 0x4000 ? 'M':'.',
+ cpustate->STR & 0x2000 ? 'I':'.',
+ cpustate->STR & 0x1000 ? '.':'?',
+ cpustate->STR & 0x0800 ? 'a':'?',
+ cpustate->STR & 0x0400 ? 'r':'?',
+ cpustate->STR & 0x0200 ? 'p':'?',
+ cpustate->STR & 0x0100 ? '1':'0',
+ cpustate->STR & 0x0080 ? '.':'?',
+ cpustate->STR & 0x0040 ? '.':'?',
+ cpustate->STR & 0x0020 ? '.':'?',
+ cpustate->STR & 0x0010 ? '.':'?',
+ cpustate->STR & 0x0008 ? '.':'?',
+ cpustate->STR & 0x0004 ? 'd':'?',
+ cpustate->STR & 0x0002 ? 'p':'?',
+ cpustate->STR & 0x0001 ? '1':'0');
break;
- case CPUINFO_STR_REGISTER + TMS32010_PC: sprintf(info->s, "PC:%04X", R.PC); break;
+ case CPUINFO_STR_REGISTER + TMS32010_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
case CPUINFO_STR_REGISTER + TMS32010_SP: sprintf(info->s, "SP:%X", 0); /* fake stack pointer */ break;
- case CPUINFO_STR_REGISTER + TMS32010_STR: sprintf(info->s, "STR:%04X", R.STR); break;
- case CPUINFO_STR_REGISTER + TMS32010_ACC: sprintf(info->s, "ACC:%08X", R.ACC.d); break;
- case CPUINFO_STR_REGISTER + TMS32010_PREG: sprintf(info->s, "P:%08X", R.Preg.d); break;
- case CPUINFO_STR_REGISTER + TMS32010_TREG: sprintf(info->s, "T:%04X", R.Treg); break;
- case CPUINFO_STR_REGISTER + TMS32010_AR0: sprintf(info->s, "AR0:%04X", R.AR[0]); break;
- case CPUINFO_STR_REGISTER + TMS32010_AR1: sprintf(info->s, "AR1:%04X", R.AR[1]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK0: sprintf(info->s, "STK0:%04X", R.STACK[0]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK1: sprintf(info->s, "STK1:%04X", R.STACK[1]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK2: sprintf(info->s, "STK2:%04X", R.STACK[2]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK3: sprintf(info->s, "STK3:%04X", R.STACK[3]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STR: sprintf(info->s, "STR:%04X", cpustate->STR); break;
+ case CPUINFO_STR_REGISTER + TMS32010_ACC: sprintf(info->s, "ACC:%08X", cpustate->ACC.d); break;
+ case CPUINFO_STR_REGISTER + TMS32010_PREG: sprintf(info->s, "P:%08X", cpustate->Preg.d); break;
+ case CPUINFO_STR_REGISTER + TMS32010_TREG: sprintf(info->s, "T:%04X", cpustate->Treg); break;
+ case CPUINFO_STR_REGISTER + TMS32010_AR0: sprintf(info->s, "AR0:%04X", cpustate->AR[0]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_AR1: sprintf(info->s, "AR1:%04X", cpustate->AR[1]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK0: sprintf(info->s, "STK0:%04X", cpustate->STACK[0]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK1: sprintf(info->s, "STK1:%04X", cpustate->STACK[1]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK2: sprintf(info->s, "STK2:%04X", cpustate->STACK[2]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK3: sprintf(info->s, "STK3:%04X", cpustate->STACK[3]); break;
}
}
diff --git a/src/emu/cpu/tms32010/tms32010.h b/src/emu/cpu/tms32010/tms32010.h
index aaa03fa0a09..ab46605ccea 100644
--- a/src/emu/cpu/tms32010/tms32010.h
+++ b/src/emu/cpu/tms32010/tms32010.h
@@ -59,21 +59,21 @@ CPU_GET_INFO( tms32010 );
* Read the state of the BIO pin
*/
-#define TMS32010_BIO_In (memory_read_word_16be(R.io, TMS32010_BIO<<1))
+#define TMS32010_BIO_In (memory_read_word_16be(cpustate->io, TMS32010_BIO<<1))
/****************************************************************************
* Input a word from given I/O port
*/
-#define TMS32010_In(Port) (memory_read_word_16be(R.io, (Port)<<1))
+#define TMS32010_In(Port) (memory_read_word_16be(cpustate->io, (Port)<<1))
/****************************************************************************
* Output a word to given I/O port
*/
-#define TMS32010_Out(Port,Value) (memory_write_word_16be(R.io, (Port)<<1,Value))
+#define TMS32010_Out(Port,Value) (memory_write_word_16be(cpustate->io, (Port)<<1,Value))
@@ -81,14 +81,14 @@ CPU_GET_INFO( tms32010 );
* Read a word from given ROM memory location
*/
-#define TMS32010_ROM_RDMEM(A) (memory_read_word_16be(R.program, (A)<<1))
+#define TMS32010_ROM_RDMEM(A) (memory_read_word_16be(cpustate->program, (A)<<1))
/****************************************************************************
* Write a word to given ROM memory location
*/
-#define TMS32010_ROM_WRMEM(A,V) (memory_write_word_16be(R.program, (A)<<1,V))
+#define TMS32010_ROM_WRMEM(A,V) (memory_write_word_16be(cpustate->program, (A)<<1,V))
@@ -96,14 +96,14 @@ CPU_GET_INFO( tms32010 );
* Read a word from given RAM memory location
*/
-#define TMS32010_RAM_RDMEM(A) (memory_read_word_16be(R.data, (A)<<1))
+#define TMS32010_RAM_RDMEM(A) (memory_read_word_16be(cpustate->data, (A)<<1))
/****************************************************************************
* Write a word to given RAM memory location
*/
-#define TMS32010_RAM_WRMEM(A,V) (memory_write_word_16be(R.data, (A)<<1,V))
+#define TMS32010_RAM_WRMEM(A,V) (memory_write_word_16be(cpustate->data, (A)<<1,V))
@@ -113,7 +113,7 @@ CPU_GET_INFO( tms32010 );
* used to greatly speed up emulation
*/
-#define TMS32010_RDOP(A) (memory_decrypted_read_word(R.program, (A)<<1))
+#define TMS32010_RDOP(A) (memory_decrypted_read_word(cpustate->program, (A)<<1))
/****************************************************************************
@@ -122,7 +122,7 @@ CPU_GET_INFO( tms32010 );
* that use different encoding mechanisms for opcodes and opcode arguments
*/
-#define TMS32010_RDOP_ARG(A) (memory_raw_read_word(R.program, (A)<<1))
+#define TMS32010_RDOP_ARG(A) (memory_raw_read_word(cpustate->program, (A)<<1))