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author Miodrag Milanovic <mmicko@gmail.com>2015-07-29 08:34:21 +0200
committer Miodrag Milanovic <mmicko@gmail.com>2015-07-29 08:34:21 +0200
commit1b452e3bfb48e9c77e705a60ab285c382d457e8a (patch)
treeec86ee0e176d53492a6f034a473c728cc6896ad7 /src/emu/cpu/sm510
parentb038bdab5ba511f2af2c23e24b3508062a42b3b3 (diff)
Cleanups and version bumpmame0164
Diffstat (limited to 'src/emu/cpu/sm510')
-rw-r--r--src/emu/cpu/sm510/sm510.c30
-rw-r--r--src/emu/cpu/sm510/sm510.h10
-rw-r--r--src/emu/cpu/sm510/sm510d.c8
-rw-r--r--src/emu/cpu/sm510/sm510op.c4
-rw-r--r--src/emu/cpu/sm510/sm511core.c8
5 files changed, 30 insertions, 30 deletions
diff --git a/src/emu/cpu/sm510/sm510.c b/src/emu/cpu/sm510/sm510.c
index 09029709849..ef4f704590b 100644
--- a/src/emu/cpu/sm510/sm510.c
+++ b/src/emu/cpu/sm510/sm510.c
@@ -6,14 +6,14 @@
- SM510: 2.7Kx8 ROM, 128x4 RAM(32x4 for LCD)
- SM511: 4Kx8 ROM, 128x4 RAM(32x4 for LCD), melody controller
- SM512: 4Kx8 ROM, 128x4 RAM(48x4 for LCD), melody controller
-
+
Other chips that may be in the same family, investigate more when one of
them needs to get emulated: SM500, SM530/31, SM4A, SM3903, ..
References:
- 1990 Sharp Microcomputers Data Book
- 1996 Sharp Microcomputer Databook
-
+
TODO:
- proper support for LFSR program counter in debugger
- callback for lcd screen as MAME bitmap (when needed)
@@ -146,12 +146,12 @@ void sm510_base_device::device_reset()
m_op = m_prev_op = 0;
do_branch(3, 7, 0);
m_prev_pc = m_pc;
-
+
// lcd is on (Bp on, BC off, bs(y) off)
m_bp = true;
m_bc = false;
m_y = 0;
-
+
m_r = 0;
m_write_r(0, 0, 0xff);
m_melody_rd &= ~1;
@@ -168,11 +168,11 @@ inline UINT16 sm510_base_device::get_lcd_row(int column, UINT8* ram)
// output 0 if lcd blackpate/bleeder is off, or in case row doesn't exist
if (ram == NULL || m_bc || !m_bp)
return 0;
-
+
UINT16 rowdata = 0;
for (int i = 0; i < 0x10; i++)
rowdata |= (ram[i] >> column & 1) << i;
-
+
return rowdata;
}
@@ -185,12 +185,12 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::lcd_timer_cb)
m_write_sega(h | SM510_PORT_SEGA, get_lcd_row(h, m_lcd_ram_a), 0xffff);
m_write_segb(h | SM510_PORT_SEGB, get_lcd_row(h, m_lcd_ram_b), 0xffff);
m_write_segc(h | SM510_PORT_SEGC, get_lcd_row(h, m_lcd_ram_c), 0xffff);
-
+
// bs output from L/X and Y regs
UINT8 bs = (m_l >> h & 1) | ((m_x*2) >> h & 2);
m_write_segbs(h | SM510_PORT_SEGBS, (m_bc || !m_bp) ? 0 : bs, 0xffff);
}
-
+
// schedule next timeout
m_lcd_timer->adjust(attotime::from_ticks(0x200, unscaled_clock()));
}
@@ -222,10 +222,10 @@ void sm510_base_device::clock_melody()
0, 0, 8, 8, 9, 9, 10,10,11,12,12,13,14,15, 8*2, 8*2,
0, 0, 8, 9, 9, 10,10,11,11,12,13,14,14,15, 8*2, 9*2
};
-
+
UINT8 cmd = m_melody_rom[m_melody_address] & 0x3f;
UINT8 out = 0;
-
+
// clock duty cycle if tone is active
if ((cmd & 0xf) > 1)
{
@@ -245,7 +245,7 @@ void sm510_base_device::clock_melody()
// rest tell signal
m_melody_rd |= 2;
}
-
+
// clock time base on F8(d7)
if ((m_div & 0x7f) == 0)
{
@@ -255,7 +255,7 @@ void sm510_base_device::clock_melody()
if (m_melody_step_count == 0)
m_melody_address++;
}
-
+
// output to R pin
if (out != m_r)
{
@@ -293,7 +293,7 @@ bool sm510_base_device::wake_me_up()
// after waking up, but we leave it unchanged
m_halt = false;
do_branch(1, 0, 0);
-
+
standard_irq_callback(0);
return true;
}
@@ -305,7 +305,7 @@ void sm510_base_device::execute_set_input(int line, int state)
{
if (line != SM510_INPUT_LINE_K)
return;
-
+
// set K input lines active state
m_k_active = (state != 0);
}
@@ -317,7 +317,7 @@ TIMER_CALLBACK_MEMBER(sm510_base_device::div_timer_cb)
// 1S signal on overflow(falling edge of f1)
if (m_div == 0)
m_1s = true;
-
+
clock_melody();
}
diff --git a/src/emu/cpu/sm510/sm510.h b/src/emu/cpu/sm510/sm510.h
index b50cea20957..8dd7446b884 100644
--- a/src/emu/cpu/sm510/sm510.h
+++ b/src/emu/cpu/sm510/sm510.h
@@ -134,7 +134,7 @@ protected:
int m_stack_levels;
UINT16 m_stack[2];
int m_icount;
-
+
UINT8 m_acc;
UINT8 m_bl;
UINT8 m_bm;
@@ -177,7 +177,7 @@ protected:
bool wake_me_up();
void init_divider();
TIMER_CALLBACK_MEMBER(div_timer_cb);
-
+
// other i/o handlers
devcb_read8 m_read_k;
devcb_read_line m_read_ba;
@@ -251,12 +251,12 @@ protected:
void op_rm();
void op_sm();
-
+
void op_pre();
void op_sme();
void op_rme();
void op_tmel();
-
+
void op_skip();
void op_cend();
void op_idiv();
@@ -274,7 +274,7 @@ protected:
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
virtual void execute_one();
virtual void get_opcode_param();
-
+
virtual void update_w_latch() { m_write_s(0, m_w, 0xff); } // W is connected directly to S
};
diff --git a/src/emu/cpu/sm510/sm510d.c b/src/emu/cpu/sm510/sm510d.c
index fec8bc44bbd..70e6b2c8ed6 100644
--- a/src/emu/cpu/sm510/sm510d.c
+++ b/src/emu/cpu/sm510/sm510d.c
@@ -103,7 +103,7 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
param = oprom[s_next_pc[pc & 0x3f]];
len++;
}
-
+
// extended opcode
bool is_extended = (instr == mEXT);
if (is_extended)
@@ -131,12 +131,12 @@ static offs_t sm510_common_disasm(const UINT8 *lut_mnemonic, const UINT8 *lut_ex
UINT16 address = (param << 4 & 0xc00) | (mask << 6 & 0x3c0) | (param & 0x03f);
dst += sprintf(dst, "$%03X", address);
}
-
+
// show param offset
if (bits >= 8)
dst += sprintf(dst, " [$%03X]", pc + s_next_pc[pc & 0x3f]);
}
-
+
return len | s_flags[instr] | DASMFLAG_SUPPORTED;
}
@@ -210,6 +210,6 @@ CPU_DISASSEMBLE(sm511)
UINT8 ext[0x100];
memset(ext, 0, 0x100);
memcpy(ext + 0x30, sm511_extended, 0x10);
-
+
return sm510_common_disasm(sm511_mnemonic, ext, buffer, pc, oprom, opram);
}
diff --git a/src/emu/cpu/sm510/sm510op.c b/src/emu/cpu/sm510/sm510op.c
index bb0f4975511..cf99cbc5ae4 100644
--- a/src/emu/cpu/sm510/sm510op.c
+++ b/src/emu/cpu/sm510/sm510op.c
@@ -57,12 +57,12 @@ inline UINT8 sm510_base_device::bitmask(UINT16 param)
void sm510_base_device::op_lb()
{
// LB x: load BM/BL with 4-bit immediate value (partial)
-
+
// SM510 WIP..
// bm and bl(low) are probably ok!
m_bm = (m_bm & 4) | (m_op & 3);
m_bl = (m_op >> 2 & 3);
-
+
// bl(high) is still unclear, official doc is confusing
UINT8 hi = 0;
switch (m_bl)
diff --git a/src/emu/cpu/sm510/sm511core.c b/src/emu/cpu/sm510/sm511core.c
index d5dcf94cc7c..2347721ff90 100644
--- a/src/emu/cpu/sm510/sm511core.c
+++ b/src/emu/cpu/sm510/sm511core.c
@@ -102,7 +102,7 @@ void sm511_device::execute_one()
switch (m_op)
{
case 0x00: op_rot(); break;
-// case 0x01: op_xxx(); break; // ?
+// case 0x01: op_xxx(); break; // ?
case 0x02: op_sbm(); break;
case 0x03: op_atpl(); break;
case 0x08: op_add(); break;
@@ -119,7 +119,7 @@ void sm511_device::execute_one()
case 0x5a: op_ta0(); break;
case 0x5b: op_tabl(); break;
case 0x5c: op_atx(); break;
-// case 0x5d: op_cend(); break;
+// case 0x5d: op_cend(); break;
case 0x5e: op_tal(); break;
case 0x5f: op_lbl(); break;
@@ -127,14 +127,14 @@ void sm511_device::execute_one()
case 0x62: op_wr(); break;
case 0x63: op_ws(); break;
case 0x64: op_incb(); break;
-// case 0x65: op_idiv(); break;
+// case 0x65: op_idiv(); break;
case 0x66: op_rc(); break;
case 0x67: op_sc(); break;
case 0x6c: op_decb(); break;
case 0x6d: op_ptw(); break;
case 0x6e: op_rtn0(); break;
case 0x6f: op_rtn1(); break;
-
+
// extended opcodes
case 0x60:
m_op = m_op << 8 | m_param;