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author Aaron Giles <aaron@aarongiles.com>2008-11-13 06:59:57 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-11-13 06:59:57 +0000
commit63d10ee9bfbb5bc4adb2754a6b0fa790ea0a2851 (patch)
tree99e2b37ce2640e230780a124c7b7743674b7cf33 /src/emu/cpu/pdp1
parent451a03ff700ed296c16df3620b25042a449cc68f (diff)
Massive API cleanup/change. The primary goal is that all CPU-
related APIs now take a device pointer instead of an index. All functions that take a CPU device are prefixed with cpu_* All functions that are globally related to cpu execution are prefixed with cpuexec_*. Below is a list of some of the mappings: cpu_boost_interleave -> cpuexec_boost_interleave cpunum_suspend -> cpu_suspend cpunum_resume -> cpu_resume cpunum_is_suspended -> cpu_is_suspended cpunum_get_clock -> cpu_get_clock cpunum_set_clock -> cpu_set_clock cpunum_get_clockscale -> cpu_get_clockscale cpunum_set_clockscale -> cpu_set_clockscale cpunum_get_localtime -> cpu_get_local_time cpunum_gettotalcycles -> cpu_get_total_cycles activecpu_eat_cycles -> cpu_eat_cycles activecpu_adjust_icount -> cpu_adjust_icount cpu_trigger -> cpuexec_trigger cpu_triggertime -> cpuexec_triggertime cpunum_set_input_line -> cpu_set_input_line cpunum_set_irq_callback -> cpu_set_irq_callback In addition, a number of functions retain the same name but now require a specific CPU parameter to be passed in: cpu_yield cpu_spin cpu_spinuntil_time cpu_spinuntil_int cpu_spinuntil_trigger cpu_triggerint Merged cpuint.c into cpuexec.c. One side-effect of this change is that driver reset callbacks are called AFTER the CPUs and devices are reset. This means that if you make changes to the CPU state and expect the reset vectors to recognize the changes in your reset routine, you will need to manually reset the CPU after making the change (since it has already been reset). Added a number of inline helper functions to cpuintrf.h for managing addresses Removed cpu_gettotalcpu(). This information is rarely needed outside of the core and can be obtained by looking at the machine->cpu[] array. Changed CPU interrupt acknowledge callbacks to pass a CPU device instead of machine/cpunum pair. Changed VBLANK and periodic timer callbacks to pass a CPU device instead of machine/cpunum pair. Renamed all information getters from cpu_* to cpu_get_* and from cputype_* to cputype_get_*.
Diffstat (limited to 'src/emu/cpu/pdp1')
-rw-r--r--src/emu/cpu/pdp1/pdp1.c84
-rw-r--r--src/emu/cpu/pdp1/tx0.c116
2 files changed, 100 insertions, 100 deletions
diff --git a/src/emu/cpu/pdp1/pdp1.c b/src/emu/cpu/pdp1/pdp1.c
index 8650e681567..f847c42d91a 100644
--- a/src/emu/cpu/pdp1/pdp1.c
+++ b/src/emu/cpu/pdp1/pdp1.c
@@ -1027,11 +1027,11 @@ CPU_GET_INFO( pdp1 )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &pdp1_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "PDP1"); break;
- case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "DEC PDP-1"); break;
- case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "2.0"); break;
- case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
- case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(),
+ case CPUINFO_STR_NAME: strcpy(info->s, "PDP1"); break;
+ case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "DEC PDP-1"); break;
+ case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CORE_CREDITS: strcpy(info->s,
"Brian Silverman (original Java Source)\n"
"Vadim Gerasimov (original Java Source)\n"
"Chris Salomon (MESS driver)\n"
@@ -1039,7 +1039,7 @@ CPU_GET_INFO( pdp1 )
break;
case CPUINFO_STR_FLAGS:
- sprintf(info->s = cpuintrf_temp_str(), "%c%c%c%c%c%c-%c%c%c%c%c%c",
+ sprintf(info->s, "%c%c%c%c%c%c-%c%c%c%c%c%c",
(FLAGS & 040) ? '1' : '.',
(FLAGS & 020) ? '2' : '.',
(FLAGS & 010) ? '3' : '.',
@@ -1055,42 +1055,42 @@ CPU_GET_INFO( pdp1 )
break;
- case CPUINFO_STR_REGISTER + PDP1_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:0%06o", PC); break;
- case CPUINFO_STR_REGISTER + PDP1_IR: sprintf(info->s = cpuintrf_temp_str(), "IR:0%02o", IR); break;
- case CPUINFO_STR_REGISTER + PDP1_MB: sprintf(info->s = cpuintrf_temp_str(), "MB:0%06o", MB); break;
- case CPUINFO_STR_REGISTER + PDP1_MA: sprintf(info->s = cpuintrf_temp_str(), "MA:0%06o", MA); break;
- case CPUINFO_STR_REGISTER + PDP1_AC: sprintf(info->s = cpuintrf_temp_str(), "AC:0%06o", AC); break;
- case CPUINFO_STR_REGISTER + PDP1_IO: sprintf(info->s = cpuintrf_temp_str(), "IO:0%06o", IO); break;
- case CPUINFO_STR_REGISTER + PDP1_OV: sprintf(info->s = cpuintrf_temp_str(), "OV:%X", OV); break;
- case CPUINFO_STR_REGISTER + PDP1_PF: sprintf(info->s = cpuintrf_temp_str(), "FLAGS:0%02o", FLAGS); break;
- case CPUINFO_STR_REGISTER + PDP1_PF1: sprintf(info->s = cpuintrf_temp_str(), "FLAG1:%X", READFLAG(1)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF2: sprintf(info->s = cpuintrf_temp_str(), "FLAG2:%X", READFLAG(2)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF3: sprintf(info->s = cpuintrf_temp_str(), "FLAG3:%X", READFLAG(3)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF4: sprintf(info->s = cpuintrf_temp_str(), "FLAG4:%X", READFLAG(4)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF5: sprintf(info->s = cpuintrf_temp_str(), "FLAG5:%X", READFLAG(5)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF6: sprintf(info->s = cpuintrf_temp_str(), "FLAG6:%X", READFLAG(6)); break;
- case CPUINFO_STR_REGISTER + PDP1_TA: sprintf(info->s = cpuintrf_temp_str(), "TA:0%06o", pdp1.ta); break;
- case CPUINFO_STR_REGISTER + PDP1_TW: sprintf(info->s = cpuintrf_temp_str(), "TW:0%06o", pdp1.tw); break;
- case CPUINFO_STR_REGISTER + PDP1_SS: sprintf(info->s = cpuintrf_temp_str(), "SS:0%02o", SENSE_SW); break;
- case CPUINFO_STR_REGISTER + PDP1_SS1: sprintf(info->s = cpuintrf_temp_str(), "SENSE1:%X", READSENSE(1)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS2: sprintf(info->s = cpuintrf_temp_str(), "SENSE2:%X", READSENSE(2)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS3: sprintf(info->s = cpuintrf_temp_str(), "SENSE3:%X", READSENSE(3)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS4: sprintf(info->s = cpuintrf_temp_str(), "SENSE4:%X", READSENSE(4)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS5: sprintf(info->s = cpuintrf_temp_str(), "SENSE5:%X", READSENSE(5)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS6: sprintf(info->s = cpuintrf_temp_str(), "SENSE6:%X", READSENSE(6)); break;
- case CPUINFO_STR_REGISTER + PDP1_SNGL_STEP: sprintf(info->s = cpuintrf_temp_str(), "SNGLSTEP:%X", pdp1.sngl_step); break;
- case CPUINFO_STR_REGISTER + PDP1_SNGL_INST: sprintf(info->s = cpuintrf_temp_str(), "SNGLINST:%X", pdp1.sngl_inst); break;
- case CPUINFO_STR_REGISTER + PDP1_EXTEND_SW: sprintf(info->s = cpuintrf_temp_str(), "EXS:%X", pdp1.extend_sw); break;
- case CPUINFO_STR_REGISTER + PDP1_RUN: sprintf(info->s = cpuintrf_temp_str(), "RUN:%X", pdp1.run); break;
- case CPUINFO_STR_REGISTER + PDP1_CYC: sprintf(info->s = cpuintrf_temp_str(), "CYC:%X", pdp1.cycle); break;
- case CPUINFO_STR_REGISTER + PDP1_DEFER: sprintf(info->s = cpuintrf_temp_str(), "DF:%X", pdp1.defer); break;
- case CPUINFO_STR_REGISTER + PDP1_BRK_CTR: sprintf(info->s = cpuintrf_temp_str(), "BRKCTR:%X", pdp1.brk_ctr); break;
- case CPUINFO_STR_REGISTER + PDP1_RIM: sprintf(info->s = cpuintrf_temp_str(), "RIM:%X", pdp1.rim); break;
- case CPUINFO_STR_REGISTER + PDP1_SBM: sprintf(info->s = cpuintrf_temp_str(), "SBM:%X", pdp1.sbm); break;
- case CPUINFO_STR_REGISTER + PDP1_EXD: sprintf(info->s = cpuintrf_temp_str(), "EXD:%X", EXD); break;
- case CPUINFO_STR_REGISTER + PDP1_IOC: sprintf(info->s = cpuintrf_temp_str(), "IOC:%X", pdp1.ioc); break;
- case CPUINFO_STR_REGISTER + PDP1_IOH: sprintf(info->s = cpuintrf_temp_str(), "IOH:%X", pdp1.ioh); break;
- case CPUINFO_STR_REGISTER + PDP1_IOS: sprintf(info->s = cpuintrf_temp_str(), "IOS:%X", pdp1.ios); break;
+ case CPUINFO_STR_REGISTER + PDP1_PC: sprintf(info->s, "PC:0%06o", PC); break;
+ case CPUINFO_STR_REGISTER + PDP1_IR: sprintf(info->s, "IR:0%02o", IR); break;
+ case CPUINFO_STR_REGISTER + PDP1_MB: sprintf(info->s, "MB:0%06o", MB); break;
+ case CPUINFO_STR_REGISTER + PDP1_MA: sprintf(info->s, "MA:0%06o", MA); break;
+ case CPUINFO_STR_REGISTER + PDP1_AC: sprintf(info->s, "AC:0%06o", AC); break;
+ case CPUINFO_STR_REGISTER + PDP1_IO: sprintf(info->s, "IO:0%06o", IO); break;
+ case CPUINFO_STR_REGISTER + PDP1_OV: sprintf(info->s, "OV:%X", OV); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF: sprintf(info->s, "FLAGS:0%02o", FLAGS); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF1: sprintf(info->s, "FLAG1:%X", READFLAG(1)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF2: sprintf(info->s, "FLAG2:%X", READFLAG(2)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF3: sprintf(info->s, "FLAG3:%X", READFLAG(3)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF4: sprintf(info->s, "FLAG4:%X", READFLAG(4)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF5: sprintf(info->s, "FLAG5:%X", READFLAG(5)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF6: sprintf(info->s, "FLAG6:%X", READFLAG(6)); break;
+ case CPUINFO_STR_REGISTER + PDP1_TA: sprintf(info->s, "TA:0%06o", pdp1.ta); break;
+ case CPUINFO_STR_REGISTER + PDP1_TW: sprintf(info->s, "TW:0%06o", pdp1.tw); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS: sprintf(info->s, "SS:0%02o", SENSE_SW); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS1: sprintf(info->s, "SENSE1:%X", READSENSE(1)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS2: sprintf(info->s, "SENSE2:%X", READSENSE(2)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS3: sprintf(info->s, "SENSE3:%X", READSENSE(3)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS4: sprintf(info->s, "SENSE4:%X", READSENSE(4)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS5: sprintf(info->s, "SENSE5:%X", READSENSE(5)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS6: sprintf(info->s, "SENSE6:%X", READSENSE(6)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SNGL_STEP: sprintf(info->s, "SNGLSTEP:%X", pdp1.sngl_step); break;
+ case CPUINFO_STR_REGISTER + PDP1_SNGL_INST: sprintf(info->s, "SNGLINST:%X", pdp1.sngl_inst); break;
+ case CPUINFO_STR_REGISTER + PDP1_EXTEND_SW: sprintf(info->s, "EXS:%X", pdp1.extend_sw); break;
+ case CPUINFO_STR_REGISTER + PDP1_RUN: sprintf(info->s, "RUN:%X", pdp1.run); break;
+ case CPUINFO_STR_REGISTER + PDP1_CYC: sprintf(info->s, "CYC:%X", pdp1.cycle); break;
+ case CPUINFO_STR_REGISTER + PDP1_DEFER: sprintf(info->s, "DF:%X", pdp1.defer); break;
+ case CPUINFO_STR_REGISTER + PDP1_BRK_CTR: sprintf(info->s, "BRKCTR:%X", pdp1.brk_ctr); break;
+ case CPUINFO_STR_REGISTER + PDP1_RIM: sprintf(info->s, "RIM:%X", pdp1.rim); break;
+ case CPUINFO_STR_REGISTER + PDP1_SBM: sprintf(info->s, "SBM:%X", pdp1.sbm); break;
+ case CPUINFO_STR_REGISTER + PDP1_EXD: sprintf(info->s, "EXD:%X", EXD); break;
+ case CPUINFO_STR_REGISTER + PDP1_IOC: sprintf(info->s, "IOC:%X", pdp1.ioc); break;
+ case CPUINFO_STR_REGISTER + PDP1_IOH: sprintf(info->s, "IOH:%X", pdp1.ioh); break;
+ case CPUINFO_STR_REGISTER + PDP1_IOS: sprintf(info->s, "IOS:%X", pdp1.ios); break;
}
}
diff --git a/src/emu/cpu/pdp1/tx0.c b/src/emu/cpu/pdp1/tx0.c
index e7a0a383b4f..1e0320d2c73 100644
--- a/src/emu/cpu/pdp1/tx0.c
+++ b/src/emu/cpu/pdp1/tx0.c
@@ -521,24 +521,24 @@ CPU_GET_INFO( tx0_64kw )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
- case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
- case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
- case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
- case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Raphael Nabet"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s = cpuintrf_temp_str(), ""); break;
-
- case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:0%06o", PC); break;
- case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s = cpuintrf_temp_str(), "IR:0%02o", IR); break;
- case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s = cpuintrf_temp_str(), "MBR:0%06o", MBR); break;
- case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s = cpuintrf_temp_str(), "MAR:0%06o", MAR); break;
- case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s = cpuintrf_temp_str(), "AC:0%06o", AC); break;
- case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s = cpuintrf_temp_str(), "LR:0%06o", LR); break;
- case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s = cpuintrf_temp_str(), "XR:0%05o", XR); break;
- case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s = cpuintrf_temp_str(), "PF:0%02o", PF); break; break;
- case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s = cpuintrf_temp_str(), "TBR:0%06o", tx0.tbr); break;
- case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s = cpuintrf_temp_str(), "TAC:0%06o", tx0.tac); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
+
+ case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
+ case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
+ case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
+ case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
+ case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
+ case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
+ case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
+ case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break; break;
+ case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", tx0.tbr); break;
+ case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", tx0.tac); break;
case CPUINFO_STR_REGISTER + TX0_TSS00:
case CPUINFO_STR_REGISTER + TX0_TSS01:
case CPUINFO_STR_REGISTER + TX0_TSS02:
@@ -554,17 +554,17 @@ CPU_GET_INFO( tx0_64kw )
case CPUINFO_STR_REGISTER + TX0_TSS14:
case CPUINFO_STR_REGISTER + TX0_TSS15:
case CPUINFO_STR_REGISTER + TX0_TSS16:
- case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s = cpuintrf_temp_str(), "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
- case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "CMSEL:0%06o", tx0.cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s = cpuintrf_temp_str(), "LRSEL:0%06o", tx0.lr_sel); break;
- case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC0:%X", tx0.stop_cyc0); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC1:%X", tx0.stop_cyc1); break;
- case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s = cpuintrf_temp_str(), "RUN:%X", tx0.run); break;
- case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s = cpuintrf_temp_str(), "RIM:%X", tx0.rim); break;
- case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s = cpuintrf_temp_str(), "CYCLE:%X", tx0.cycle); break;
- case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s = cpuintrf_temp_str(), "IOH:%X", tx0.ioh); break;
- case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s = cpuintrf_temp_str(), "IOS:%X", tx0.ios); break;
+ case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
+ case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", tx0.cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", tx0.lr_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", tx0.stop_cyc0); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", tx0.stop_cyc1); break;
+ case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", tx0.run); break;
+ case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", tx0.rim); break;
+ case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", tx0.cycle); break;
+ case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", tx0.ioh); break;
+ case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", tx0.ios); break;
}
}
@@ -647,24 +647,24 @@ CPU_GET_INFO( tx0_8kw )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
- case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
- case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
- case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
- case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Raphael Nabet"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s = cpuintrf_temp_str(), ""); break;
-
- case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:0%06o", PC); break;
- case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s = cpuintrf_temp_str(), "IR:0%02o", IR); break;
- case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s = cpuintrf_temp_str(), "MBR:0%06o", MBR); break;
- case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s = cpuintrf_temp_str(), "MAR:0%06o", MAR); break;
- case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s = cpuintrf_temp_str(), "AC:0%06o", AC); break;
- case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s = cpuintrf_temp_str(), "LR:0%06o", LR); break;
- case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s = cpuintrf_temp_str(), "XR:0%05o", XR); break;
- case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s = cpuintrf_temp_str(), "PF:0%02o", PF); break; break;
- case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s = cpuintrf_temp_str(), "TBR:0%06o", tx0.tbr); break;
- case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s = cpuintrf_temp_str(), "TAC:0%06o", tx0.tac); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
+
+ case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
+ case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
+ case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
+ case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
+ case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
+ case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
+ case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
+ case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break; break;
+ case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", tx0.tbr); break;
+ case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", tx0.tac); break;
case CPUINFO_STR_REGISTER + TX0_TSS00:
case CPUINFO_STR_REGISTER + TX0_TSS01:
case CPUINFO_STR_REGISTER + TX0_TSS02:
@@ -680,17 +680,17 @@ CPU_GET_INFO( tx0_8kw )
case CPUINFO_STR_REGISTER + TX0_TSS14:
case CPUINFO_STR_REGISTER + TX0_TSS15:
case CPUINFO_STR_REGISTER + TX0_TSS16:
- case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s = cpuintrf_temp_str(), "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
- case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "CMSEL:0%06o", tx0.cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s = cpuintrf_temp_str(), "LRSEL:0%06o", tx0.lr_sel); break;
- case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC0:%X", tx0.stop_cyc0); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC1:%X", tx0.stop_cyc1); break;
- case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s = cpuintrf_temp_str(), "RUN:%X", tx0.run); break;
- case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s = cpuintrf_temp_str(), "RIM:%X", tx0.rim); break;
- case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s = cpuintrf_temp_str(), "CYCLE:%X", tx0.cycle); break;
- case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s = cpuintrf_temp_str(), "IOH:%X", tx0.ioh); break;
- case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s = cpuintrf_temp_str(), "IOS:%X", tx0.ios); break;
+ case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
+ case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", tx0.cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", tx0.lr_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", tx0.stop_cyc0); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", tx0.stop_cyc1); break;
+ case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", tx0.run); break;
+ case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", tx0.rim); break;
+ case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", tx0.cycle); break;
+ case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", tx0.ioh); break;
+ case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", tx0.ios); break;
}
}