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author Andrew Gardner <andrew-gardner@users.noreply.github.com>2008-08-04 04:07:29 +0000
committer Andrew Gardner <andrew-gardner@users.noreply.github.com>2008-08-04 04:07:29 +0000
commitd20e6b61517c0d8ad87660a2caa1c131df74d188 (patch)
tree8c2e0b7eb9e997344661536b58af93574e13dd46 /src/emu/cpu/dsp56k/dsp56mem.c
parent77e548383ad2b9dd80fdcf69a870ea10b001ac98 (diff)
Improved Dsp56k CPU interrupt handling. Polygonet Commanders now advances past its first dsp handshake.
Diffstat (limited to 'src/emu/cpu/dsp56k/dsp56mem.c')
-rw-r--r--src/emu/cpu/dsp56k/dsp56mem.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/emu/cpu/dsp56k/dsp56mem.c b/src/emu/cpu/dsp56k/dsp56mem.c
index 62ba428491f..3d6427e710e 100644
--- a/src/emu/cpu/dsp56k/dsp56mem.c
+++ b/src/emu/cpu/dsp56k/dsp56mem.c
@@ -409,7 +409,6 @@ static void HCP_bit_set(UINT16 value)
HSR &= ~(0x0004);
HSR |= (value << 2);
- // TODO: Define Host Command through the IRQ structure
if (value && HCIE_bit())
dsp56k_add_pending_interrupt("Host Command");
}
@@ -509,6 +508,8 @@ static void RREQ_bit_set(UINT8 value)
/**************************************/
/* Command Vector Register (CVR) Bits */
/**************************************/
+static UINT8 HV_bits() { return (CVR & 0x1f); }
+
static void CVR_set(UINT8 value)
{
/* A single, unified place to run all callbacks for each of the bits */
@@ -522,9 +523,6 @@ static void HC_bit_set(UINT8 value)
CVR &= ~(0x80);
CVR |= (value << 7);
- // TODO: 5-9 Do I push a host-command interrupt here? Doesn't seem like it, but maybe i'll have to poll for it somewhere else?
- // TODO: 5-9 The exception routine clears this bit after it executes.
-
HCP_bit_set(value); // 5-9 & 5-11
}
static void HV_bits_set(UINT8 value)