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author Andrew Gardner <andrew-gardner@users.noreply.github.com>2008-10-19 17:14:14 +0000
committer Andrew Gardner <andrew-gardner@users.noreply.github.com>2008-10-19 17:14:14 +0000
commit9014e91a6295fc23e4ff97ac5737e067e66d3258 (patch)
treef3d53fa6f103f4c718712b2692889429ef40813a /src/emu/cpu/dsp56k/dsp56mem.c
parenta9c0fd7295f758391dc552191c13410a020a363f (diff)
Rewrite of the Motorola DSP56k CPU core. (Andrew Gardner)
* Added additional branch, move and bitfield ops. * Plygonet now passes its memory test and uploads a new program. [[Next step is to install an opbase handler and let the dsp56k run further into its new proggie.]]
Diffstat (limited to 'src/emu/cpu/dsp56k/dsp56mem.c')
-rw-r--r--src/emu/cpu/dsp56k/dsp56mem.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/emu/cpu/dsp56k/dsp56mem.c b/src/emu/cpu/dsp56k/dsp56mem.c
index cb6303e9287..708bfba527c 100644
--- a/src/emu/cpu/dsp56k/dsp56mem.c
+++ b/src/emu/cpu/dsp56k/dsp56mem.c
@@ -31,7 +31,7 @@ static void mem_reset(void)
/* Work */
static READ16_HANDLER( peripheral_register_r )
{
- logerror("Peripheral read 0x%04x\n", O2A(offset));
+ // (printf) logerror("Peripheral read 0x%04x\n", O2A(offset));
switch (O2A(offset))
{
@@ -168,7 +168,7 @@ static WRITE16_HANDLER( peripheral_register_w )
// Its primary behavior is RAM
// COMBINE_DATA(&dsp56k_peripheral_ram[offset]);
- logerror("Peripheral write 0x%04x = %04x\n", O2A(offset), data);
+ // (printf) logerror("Peripheral write 0x%04x = %04x\n", O2A(offset), data);
// 4-8
switch (O2A(offset))
@@ -929,3 +929,10 @@ static void dsp56k_io_reset(void)
external_x_wait_states_set(0x1f);
external_p_wait_states_set(0x1f);
}
+
+
+/* MISC*/
+UINT16 dsp56k_get_peripheral_memory(UINT16 addr)
+{
+ return dsp56k_peripheral_ram[A2O(addr)];
+}