diff options
author | 2008-05-22 03:05:13 +0000 | |
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committer | 2008-05-22 03:05:13 +0000 | |
commit | 1561edf04991b5de3e77f2d06f3187543cff2066 (patch) | |
tree | a22146dd372e3736a6c558ecc9e8b5ff916a5790 /src/emu/cpu/drcuml.c | |
parent | 6767bc23e9a98897799fe910ce2bdff24b6c2586 (diff) |
UML changes:
* Added new opcode LZCNT which returns the number of leading zeros in
a parameter.
* Added new opcode XTRACT which is a combined rotate/mask (basically
rlwinm from PowerPC)
* Added new opcode INSERT which is a combined rotate/mask/blend
(basically rlwimi from PowerPC). Best. Opcode. Ever.
* Updated all back-ends to support these new opcodes.
* Fixed several bugs relating to shifts/rotates and optimizing out
cases incorrectly.
MIPS3 DRC changes:
* Updated to use INSERT and XTRACT where appropriate
* Cleaned up register usage to enable an additional direct mapping;
this means Linux gets 1 now and Windows gets 3
Diffstat (limited to 'src/emu/cpu/drcuml.c')
-rw-r--r-- | src/emu/cpu/drcuml.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/src/emu/cpu/drcuml.c b/src/emu/cpu/drcuml.c index c356dd15627..1056d751230 100644 --- a/src/emu/cpu/drcuml.c +++ b/src/emu/cpu/drcuml.c @@ -19,12 +19,6 @@ * Extend registers to 16? Depends on if PPC can use them * New instructions? - - EXTRACT dst,src,shift,mask - dst = (src >> shift) & mask - - - INSERT dst,src,shift,mask - dst = (dst & ~mask) | ((src << shift) & mask) - - VALID opcode_desc,handle,param checksum/compare code referenced by opcode_desc; if not matching, generate exception with handle,param @@ -239,6 +233,8 @@ static const drcuml_opcode_valid opcode_valid_list[] = OPVALID_ENTRY_2(SEXT1, 4|8, NONE, IRM, IANY4) OPVALID_ENTRY_2(SEXT2, 4|8, NONE, IRM, IANY4) OPVALID_ENTRY_2(SEXT4, 8, NONE, IRM, IANY4) + OPVALID_ENTRY_4(XTRACT, 4|8, NONE, IRM, IANY, IANY, IANY) + OPVALID_ENTRY_4(INSERT, 4|8, NONE, IRM, IANY, IANY, IANY) OPVALID_ENTRY_3(ADD, 4|8, SZVC, IRM, IANY, IANY) OPVALID_ENTRY_3(ADDC, 4|8, SZVC, IRM, IANY, IANY) OPVALID_ENTRY_3(SUB, 4|8, SZVC, IRM, IANY, IANY) @@ -252,6 +248,7 @@ static const drcuml_opcode_valid opcode_valid_list[] = OPVALID_ENTRY_2(TEST, 4|8, SZ, IANY, IANY) OPVALID_ENTRY_3(OR, 4|8, SZ, IRM, IANY, IANY) OPVALID_ENTRY_3(XOR, 4|8, SZ, IRM, IANY, IANY) + OPVALID_ENTRY_2(LZCNT, 4|8, NONE, IRM, IANY) OPVALID_ENTRY_3(SHL, 4|8, SZC, IRM, IANY, IANY) OPVALID_ENTRY_3(SHR, 4|8, SZC, IRM, IANY, IANY) OPVALID_ENTRY_3(SAR, 4|8, SZC, IRM, IANY, IANY) |