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author Nicola Salmoria <nicola@mamedev.org>2008-08-20 12:00:14 +0000
committer Nicola Salmoria <nicola@mamedev.org>2008-08-20 12:00:14 +0000
commit12269d8aa72758929465fb3a173ca82e5672c449 (patch)
treebdd7cd5e2cd641d4366df45c5b3fefea7e804665 /src/emu/cpu/alph8201
parent57d3cb91e366be87cc03633a2d18607622a16670 (diff)
added 8303 ROM to the games using it and updated MCU simulation to match the new findings
Diffstat (limited to 'src/emu/cpu/alph8201')
-rw-r--r--src/emu/cpu/alph8201/8201dasm.c40
-rw-r--r--src/emu/cpu/alph8201/alph8201.c11
2 files changed, 40 insertions, 11 deletions
diff --git a/src/emu/cpu/alph8201/8201dasm.c b/src/emu/cpu/alph8201/8201dasm.c
index b99300c6fa2..96cff9a6b58 100644
--- a/src/emu/cpu/alph8201/8201dasm.c
+++ b/src/emu/cpu/alph8201/8201dasm.c
@@ -67,8 +67,8 @@ opcode mnemonic function flags
1110--xx mirror for the above
1111--xx mirror for the above
-Bugs:
-[1] the Z flag is not updated correctly after a LD A,Rn instruction. Fixed in 8301.
+Notes:
+[1] bug: the Z flag is not updated correctly after a LD A,Rn instruction. Fixed in 8302 (possibly 8301).
8302 CONFIRMED OPCODES:
@@ -125,6 +125,34 @@ opcode mnemonic function flags
11111110 LD A,(IX0+A) A=[IX0+A] --
11111111 RET restore PC --
+
+8303 CONFIRMED OPCODES:
+----------------------
+all of the 8302 ones, with stricter decoding for the following:
+
+11010000 imm JNC imm branch if !C --
+11010001 imm JZ imm branch if Z --
+1101001- imm J imm branch --
+
+additionally, this opcode is modified to support 11-bit instead of 10-bit
+external addressing, this wasn't used in games however.
+
+1011-0aa LD MB,i modified so that bit 3 is shifted to bit 2 before loading MB.
+
+and these new opcodes are added:
+
+110101--
+11010100 imm LD A,(R77:$%02X)
+11010101 imm LD (R77:$%02X),A
+11010110 imm LD PC,(R77:$%02X) [1]
+11010111 imm LD (R77:$%02X),PC [2]
+
+Notes:
+[1] appears to be LD PC,x in the disassembly, however it's LD LP0,x for kouyakyu
+ which uses a 8304, so the opcode was probably changed again.
+[2] appears to be LD x,PC in the disassembly, however it's LD x,LP0 for hvoltage
+ which uses a 8304 (or 8404?), so the opcode was probably changed again.
+
****************************************************/
@@ -181,10 +209,10 @@ static const char *const Formats[] = {
/* -------------- 830x only ------------- */
- FMT("1101_0100 I", "LD A,(R7:$%02X)"), // D4 : 8303+ only? exctscc2, bullfgtr; not sure if R7 or R77
- FMT("1101_0101 I", "LD (R7:$%02X),A"), // D5 : 8303+ only? exctscc2, bullfgtr, kouyakyu; not sure if R7 or R77
- FMT("1101_0110 I", "LD LP0,(R7:$%02X)"), // D6 : 8303+ only? kouyakyu; not sure if R7 or R77
- FMT("1101_0111 I", "LD (R7:$%02X),LP0"), // D7 : 8303+ only? hvoltage; not sure if R7 or R77
+ FMT("1101_0100 I", "LD A,(R77:$%02X)"), // D4 : 8303+ only. exctscc2, bullfgtr
+ FMT("1101_0101 I", "LD (R77:$%02X),A"), // D5 : 8303+ only. exctscc2, bullfgtr, kouyakyu
+ FMT("1101_0110 I", "LD LP0,(R77:$%02X)"), // D6 : 8303+ only. kouyakyu
+ FMT("1101_0111 I", "LD (R77:$%02X),LP0"), // D7 : 8303+ only. hvoltage
FMT("1101_1000 I", "LD A,($%02X)"), // D8 : equites
FMT("1101_1001 I", "LD ($%02X),A"), // D9 : equites
FMT("1101_1010 I", "CMP A,$%02X"), // DA :
diff --git a/src/emu/cpu/alph8201/alph8201.c b/src/emu/cpu/alph8201/alph8201.c
index ad020ceccca..955f02ec79e 100644
--- a/src/emu/cpu/alph8201/alph8201.c
+++ b/src/emu/cpu/alph8201/alph8201.c
@@ -21,7 +21,7 @@ Talbot 1982 8201?
Champion Base Ball 1983 8201 (schematics)
Exciting Soccer 1983 8301?
Champion Base Ball II 1983 8302 (pcb, unofficial schematics)
-Exciting Soccer II 1984 8303?
+Exciting Soccer II 1984 8303 (uses 8303+ opcodes)
Equites 1984 8303 (post)
Bull Fighter 1984 8303 (post)
Splendor Blast 1985 8303 (post)
@@ -585,10 +585,11 @@ static void ld_rb_a(void) { regPTR = R.A; }
static void exg_ix0_ix1(void) { UINT8 t=IX1; IX1 = IX0; IX0 = t; }
static void exg_ix0_ix2(void) { UINT8 t=IX2; IX2 = IX0; IX0 = t; }
-static void op_d4(void) { R.A = M_RDMEM( ((RD_REG(7) & 3) << 8) | M_RDMEM_OPCODE() ); }
-static void op_d5(void) { M_WRMEM( ((RD_REG(7) & 3) << 8) | M_RDMEM_OPCODE(), R.A ); }
-static void op_d6(void) { LP0 = M_RDMEM( ((RD_REG(7) & 3) << 8) | M_RDMEM_OPCODE() ); }
-static void op_d7(void) { M_WRMEM( ((RD_REG(7) & 3) << 8) | M_RDMEM_OPCODE(), LP0 ); }
+static void op_d4(void) { R.A = M_RDMEM( ((regRAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE() ); }
+static void op_d5(void) { M_WRMEM( ((regRAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE(), R.A ); }
+static void op_d6(void) { LP0 = M_RDMEM( ((regRAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE() ); }
+static void op_d7(void) { M_WRMEM( ((regRAM[(7<<3)+7] & 3) << 8) | M_RDMEM_OPCODE(), LP0 ); }
+
static void ld_a_abs(void) { R.A = M_RDMEM( ((R.mb & 3) << 8) | M_RDMEM_OPCODE() ); }
static void ld_abs_a(void) { M_WRMEM( ((R.mb & 3) << 8) | M_RDMEM_OPCODE(), R.A ); }