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author Curt Coder <curtcoder@mail.com>2013-10-20 15:35:36 +0000
committer Curt Coder <curtcoder@mail.com>2013-10-20 15:35:36 +0000
commit9d32b2dd7415603186c2585353880a33e574170a (patch)
tree2830a467108fd3c71d14ff55b87f2b956d603902 /src/emu/bus/s100
parentc49b925dfe49da32d3c2da4dcef513978fe3b74c (diff)
(MESS) s100: Moved under emu/bus. (nw)
Diffstat (limited to 'src/emu/bus/s100')
-rw-r--r--src/emu/bus/s100/dj2db.c525
-rw-r--r--src/emu/bus/s100/dj2db.h91
-rw-r--r--src/emu/bus/s100/djdma.c130
-rw-r--r--src/emu/bus/s100/djdma.h54
-rw-r--r--src/emu/bus/s100/mm65k16s.c270
-rw-r--r--src/emu/bus/s100/mm65k16s.h58
-rw-r--r--src/emu/bus/s100/nsmdsa.c123
-rw-r--r--src/emu/bus/s100/nsmdsa.h61
-rw-r--r--src/emu/bus/s100/nsmdsad.c125
-rw-r--r--src/emu/bus/s100/nsmdsad.h62
-rw-r--r--src/emu/bus/s100/s100.c270
-rw-r--r--src/emu/bus/s100/s100.h286
-rw-r--r--src/emu/bus/s100/wunderbus.c582
-rw-r--r--src/emu/bus/s100/wunderbus.h77
14 files changed, 2714 insertions, 0 deletions
diff --git a/src/emu/bus/s100/dj2db.c b/src/emu/bus/s100/dj2db.c
new file mode 100644
index 00000000000..03ebb1afdb1
--- /dev/null
+++ b/src/emu/bus/s100/dj2db.c
@@ -0,0 +1,525 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs Disk Jockey 2D/B floppy controller board emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+/*
+
+ TODO:
+
+ - stall logic (read from fdc data register halts CPU until intrq/drq from FDC)
+
+*/
+
+#include "dj2db.h"
+
+
+
+//**************************************************************************
+// MACROS/CONSTANTS
+//**************************************************************************
+
+#define MB8866_TAG "14b"
+#define S1602_TAG "14d"
+#define BR1941_TAG "13d"
+
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type S100_DJ2DB = &device_creator<s100_dj2db_device>;
+
+
+//-------------------------------------------------
+// ROM( dj2db )
+//-------------------------------------------------
+
+ROM_START( dj2db )
+ ROM_REGION( 0x400, "dj2db", ROMREGION_INVERT ) // 2708, inverted data outputs
+ ROM_LOAD( "bv-2 f8.11d", 0x000, 0x400, CRC(b6218d0b) SHA1(e4b2ae886c0dd7717e2e02ae2e202115d8ec2def) )
+
+ ROM_REGION( 0x220, "proms", 0 )
+ ROM_LOAD( "8c-b f8.8c", 0x000, 0x200, NO_DUMP ) // 6301
+ ROM_LOAD( "3d.3d", 0x200, 0x20, NO_DUMP ) // 6331
+ROM_END
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *s100_dj2db_device::device_rom_region() const
+{
+ return ROM_NAME( dj2db );
+}
+
+
+//-------------------------------------------------
+// COM8116_INTERFACE( brg_intf )
+//-------------------------------------------------
+
+WRITE_LINE_MEMBER( s100_dj2db_device::fr_w )
+{
+ // S1602 RRC/TRC
+}
+
+
+//-------------------------------------------------
+// wd17xx_interface fdc_intf
+//-------------------------------------------------
+
+static SLOT_INTERFACE_START( s100_dj2db_floppies )
+ SLOT_INTERFACE( "8dsdd", FLOPPY_8_DSDD )
+SLOT_INTERFACE_END
+
+void s100_dj2db_device::fdc_intrq_w(bool state)
+{
+ if (state) m_bus->rdy_w(CLEAR_LINE);
+
+ switch (m_j1a->read())
+ {
+ case 0: m_bus->vi0_w(state); break;
+ case 1: m_bus->vi1_w(state); break;
+ case 2: m_bus->vi2_w(state); break;
+ case 3: m_bus->vi3_w(state); break;
+ case 4: m_bus->vi4_w(state); break;
+ case 5: m_bus->vi5_w(state); break;
+ case 6: m_bus->vi6_w(state); break;
+ case 7: m_bus->vi7_w(state); break;
+ case 8: m_bus->int_w(state); break;
+ }
+}
+
+void s100_dj2db_device::fdc_drq_w(bool state)
+{
+ if (state) m_bus->rdy_w(CLEAR_LINE);
+}
+
+
+//-------------------------------------------------
+// MACHINE_CONFIG_FRAGMENT( s100_dj2db )
+//-------------------------------------------------
+
+static MACHINE_CONFIG_FRAGMENT( s100_dj2db )
+ MCFG_COM8116_ADD(BR1941_TAG, XTAL_5_0688MHz, NULL, DEVWRITELINE(DEVICE_SELF, s100_dj2db_device, fr_w), NULL)
+ MCFG_MB8866x_ADD(MB8866_TAG, XTAL_10MHz/5)
+
+ MCFG_FLOPPY_DRIVE_ADD(MB8866_TAG":0", s100_dj2db_floppies, "8dsdd", floppy_image_device::default_floppy_formats)
+ MCFG_FLOPPY_DRIVE_ADD(MB8866_TAG":1", s100_dj2db_floppies, NULL, floppy_image_device::default_floppy_formats)
+ MCFG_FLOPPY_DRIVE_ADD(MB8866_TAG":2", s100_dj2db_floppies, NULL, floppy_image_device::default_floppy_formats)
+ MCFG_FLOPPY_DRIVE_ADD(MB8866_TAG":3", s100_dj2db_floppies, NULL, floppy_image_device::default_floppy_formats)
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor s100_dj2db_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( s100_dj2db );
+}
+
+
+//-------------------------------------------------
+// INPUT_PORTS( mm65k16s )
+//-------------------------------------------------
+
+static INPUT_PORTS_START( dj2db )
+ PORT_START("SW1")
+ PORT_DIPNAME( 0xf8, 0xf8, "Power-On Jump Address" ) PORT_DIPLOCATION("SW1:1,2,3,4,5") PORT_CONDITION("SW1", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0xf8, "F800H" )
+ PORT_DIPSETTING( 0xf0, "F000H" )
+ PORT_DIPSETTING( 0xe8, "E800H" )
+ PORT_DIPSETTING( 0xe0, "E000H" )
+ PORT_DIPSETTING( 0xd8, "D800H" )
+ PORT_DIPSETTING( 0xd0, "D000H" )
+ PORT_DIPSETTING( 0xc8, "C800H" )
+ PORT_DIPSETTING( 0xc0, "C000H" )
+ PORT_DIPSETTING( 0xb8, "B800H" )
+ PORT_DIPSETTING( 0xb0, "B000H" )
+ PORT_DIPSETTING( 0xa8, "A800H" )
+ PORT_DIPSETTING( 0xa0, "A000H" )
+ PORT_DIPSETTING( 0x98, "9800H" )
+ PORT_DIPSETTING( 0x90, "9000H" )
+ PORT_DIPSETTING( 0x88, "8800H" )
+ PORT_DIPSETTING( 0x80, "8000H" )
+ PORT_DIPSETTING( 0x78, "7800H" )
+ PORT_DIPSETTING( 0x70, "7000H" )
+ PORT_DIPSETTING( 0x68, "6800H" )
+ PORT_DIPSETTING( 0x60, "6000H" )
+ PORT_DIPSETTING( 0x58, "5800H" )
+ PORT_DIPSETTING( 0x50, "5000H" )
+ PORT_DIPSETTING( 0x48, "4800H" )
+ PORT_DIPSETTING( 0x40, "4000H" )
+ PORT_DIPSETTING( 0x38, "3800H" )
+ PORT_DIPSETTING( 0x30, "3000H" )
+ PORT_DIPSETTING( 0x28, "2800H" )
+ PORT_DIPSETTING( 0x20, "2000H" )
+ PORT_DIPSETTING( 0x18, "1800H" )
+ PORT_DIPSETTING( 0x10, "1000H" )
+ PORT_DIPSETTING( 0x08, "0800H" )
+ PORT_DIPSETTING( 0x00, "0000H" )
+ PORT_DIPNAME( 0x04, 0x04, "Phantom Line" ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPSETTING( 0x04, "Disabled" )
+ PORT_DIPSETTING( 0x00, "Enabled" )
+ PORT_DIPNAME( 0x02, 0x02, "Bus Speed" ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPSETTING( 0x02, "2 MHz" )
+ PORT_DIPSETTING( 0x00, "4/6 MHz" )
+ PORT_DIPNAME( 0x01, 0x01, "Power-On Jump" ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPSETTING( 0x01, "Disabled" )
+ PORT_DIPSETTING( 0x00, "Enabled" )
+
+ PORT_START("SW2")
+ PORT_DIPNAME( 0x0f, 0x0f, "Baud Rate" ) PORT_DIPLOCATION("SW2:1,2,3,4")
+ PORT_DIPSETTING( 0x08, "110" )
+ PORT_DIPSETTING( 0x0e, "1200" )
+ PORT_DIPSETTING( 0x07, "9600" )
+ PORT_DIPSETTING( 0x0f, "19200" )
+ PORT_DIPNAME( 0x10, 0x00, "Word Length" ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPSETTING( 0x10, "8 Bits" )
+ PORT_DIPSETTING( 0x00, "7 Bits" )
+ PORT_DIPNAME( 0x20, 0x20, "Stop Bit Count" ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPSETTING( 0x20, "2 Stop Bits" )
+ PORT_DIPSETTING( 0x00, "1 Stop Bit" )
+ PORT_DIPNAME( 0x40, 0x40, "Parity" ) PORT_DIPLOCATION("SW2:7") PORT_CONDITION("SW2", 0x80, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x40, "Even Parity" )
+ PORT_DIPSETTING( 0x00, "Odd Parity" )
+ PORT_DIPNAME( 0x80, 0x80, "Parity" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+ PORT_START("J4")
+ PORT_DIPNAME( 0x01, 0x00, "Power Up" )
+ PORT_DIPSETTING( 0x00, "Inactive" )
+ PORT_DIPSETTING( 0x01, "Active" )
+
+ PORT_START("J2")
+ PORT_DIPNAME( 0x01, 0x01, "Generate PHANTOM Signal" )
+ PORT_DIPSETTING( 0x01, "Disabled" )
+ PORT_DIPSETTING( 0x00, "Enabled" )
+
+ PORT_START("J3A")
+ PORT_DIPNAME( 0xff, 0x00, "Bank Select" )
+ PORT_DIPSETTING( 0x00, "Disabled" )
+ PORT_DIPSETTING( 0x01, "DATA 0" )
+ PORT_DIPSETTING( 0x02, "DATA 1" )
+ PORT_DIPSETTING( 0x04, "DATA 2" )
+ PORT_DIPSETTING( 0x08, "DATA 2" )
+ PORT_DIPSETTING( 0x10, "DATA 3" )
+ PORT_DIPSETTING( 0x20, "DATA 4" )
+ PORT_DIPSETTING( 0x40, "DATA 6" )
+ PORT_DIPSETTING( 0x80, "DATA 7" )
+
+ PORT_START("J1A")
+ PORT_DIPNAME( 0x0f, 0x09, "Interrupt" )
+ PORT_DIPSETTING( 0x09, "Disabled")
+ PORT_DIPSETTING( 0x00, "VI0")
+ PORT_DIPSETTING( 0x01, "VI1")
+ PORT_DIPSETTING( 0x02, "VI2")
+ PORT_DIPSETTING( 0x03, "VI3")
+ PORT_DIPSETTING( 0x04, "VI4")
+ PORT_DIPSETTING( 0x05, "VI5")
+ PORT_DIPSETTING( 0x06, "VI6")
+ PORT_DIPSETTING( 0x07, "VI7")
+ PORT_DIPSETTING( 0x08, "PINT")
+INPUT_PORTS_END
+
+
+//-------------------------------------------------
+// input_ports - device-specific input ports
+//-------------------------------------------------
+
+ioport_constructor s100_dj2db_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( dj2db );
+}
+
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_dj2db_device - constructor
+//-------------------------------------------------
+
+s100_dj2db_device::s100_dj2db_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100_DJ2DB, "DJ2DB", tag, owner, clock, "dj2db", __FILE__),
+ device_s100_card_interface(mconfig, *this),
+ m_fdc(*this, MB8866_TAG),
+ m_dbrg(*this, BR1941_TAG),
+ m_floppy0(*this, MB8866_TAG":0"),
+ m_floppy1(*this, MB8866_TAG":1"),
+ m_floppy2(*this, MB8866_TAG":2"),
+ m_floppy3(*this, MB8866_TAG":3"),
+ m_floppy(NULL),
+ m_rom(*this, "dj2db"),
+ m_ram(*this, "ram"),
+ m_j1a(*this, "J1A"),
+ m_j3a(*this, "J3A"),
+ m_j4(*this, "J4"),
+ m_sw1(*this, "SW1"),
+ m_drive(0),
+ m_head(1),
+ m_int_enbl(0),
+ m_access_enbl(0),
+ m_board_enbl(1),
+ m_phantom(1)
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_dj2db_device::device_start()
+{
+ // allocate memory
+ m_ram.allocate(0x400);
+
+ // floppy callbacks
+ m_fdc->setup_intrq_cb(wd_fdc_t::line_cb(FUNC(s100_dj2db_device::fdc_intrq_w), this));
+ m_fdc->setup_drq_cb(wd_fdc_t::line_cb(FUNC(s100_dj2db_device::fdc_drq_w), this));
+
+ // state saving
+ save_item(NAME(m_drive));
+ save_item(NAME(m_head));
+ save_item(NAME(m_int_enbl));
+ save_item(NAME(m_access_enbl));
+ save_item(NAME(m_board_enbl));
+ save_item(NAME(m_phantom));
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void s100_dj2db_device::device_reset()
+{
+ m_board_enbl = m_j4->read();
+}
+
+
+//-------------------------------------------------
+// s100_smemr_r - memory read
+//-------------------------------------------------
+
+UINT8 s100_dj2db_device::s100_smemr_r(address_space &space, offs_t offset)
+{
+ UINT8 data = 0;
+
+// if (!(m_board_enbl & m_phantom)) return 0;
+
+ if ((offset >= 0xf800) && (offset < 0xfbf8))
+ {
+ data = m_rom->base()[offset & 0x3ff] ^ 0xff;
+ }
+ else if (offset == 0xfbf8) // SERIAL IN
+ {
+ // UART inverted data
+ }
+ else if (offset == 0xfbf9) // SERIAL STAT
+ {
+ /*
+
+ bit description
+
+ 0 PE
+ 1 OE
+ 2 DR
+ 3 TBRE
+ 4 FE
+ 5
+ 6
+ 7
+
+ */
+ }
+ else if (offset == 0xfbfa) // DISK STAT
+ {
+ /*
+
+ bit description
+
+ 0 HEAD
+ 1 DATA RQ
+ 2 INT RQ
+ 3 _TWO SIDED
+ 4 _INDEX
+ 5
+ 6
+ 7 _READY
+
+ */
+
+ data |= !m_head;
+ data |= !m_fdc->drq_r() << 1;
+ data |= !m_fdc->intrq_r() << 2;
+ data |= (m_floppy ? m_floppy->twosid_r() : 1) << 3;
+ data |= (m_floppy ? m_floppy->idx_r() : 1) << 4;
+ data |= (m_floppy ? m_floppy->ready_r() : 1) << 7;
+ }
+ else if ((offset >= 0xfbfc) && (offset < 0xfc00))
+ {
+ m_bus->rdy_w(ASSERT_LINE);
+
+ data = m_fdc->gen_r(offset & 0x03);
+ }
+ else if ((offset >= 0xfc00) && (offset < 0x10000))
+ {
+ data = m_ram[offset & 0x3ff];
+ }
+ else
+ {
+ return 0;
+ }
+
+ // LS241 inverts data
+ return data ^ 0xff;
+}
+
+
+//-------------------------------------------------
+// s100_mwrt_w - memory write
+//-------------------------------------------------
+
+void s100_dj2db_device::s100_mwrt_w(address_space &space, offs_t offset, UINT8 data)
+{
+// if (!(m_board_enbl & m_phantom)) return;
+
+ // LS96 inverts data
+ data ^= 0xff;
+
+ if (offset == 0xfbf8) // SERIAL OUT
+ {
+ // UART inverted data
+ }
+ else if (offset == 0xfbf9) // DRIVE SEL
+ {
+ /*
+
+ bit description
+
+ 0 DRIVE 1
+ 1 DRIVE 2
+ 2 DRIVE 3
+ 3 DRIVE 4
+ 4 IN USE / SIDE SELECT
+ 5 INT ENBL
+ 6 _ACCESS ENBL
+ 7 START
+
+ */
+
+ // drive select
+ m_floppy = NULL;
+
+ if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
+ if (BIT(data, 1)) m_floppy = m_floppy1->get_device();
+ if (BIT(data, 2)) m_floppy = m_floppy2->get_device();
+ if (BIT(data, 3)) m_floppy = m_floppy3->get_device();
+
+ m_fdc->set_floppy(m_floppy);
+
+ // side select
+ if (m_floppy)
+ {
+ m_floppy->ss_w(BIT(data, 4));
+ m_floppy->mon_w(0);
+ }
+
+ // interrupt enable
+ m_int_enbl = BIT(data, 5);
+
+ // access enable
+ m_access_enbl = BIT(data, 6);
+
+ // master reset
+ if (!BIT(data, 7)) m_fdc->reset();
+ }
+ else if (offset == 0xfbfa) // FUNCTION SEL
+ {
+ /*
+
+ bit description
+
+ 0 DOUBLE
+ 1 8A SET
+ 2 8A CLEAR
+ 3 LEDOFF
+ 4
+ 5
+ 6
+ 7
+
+ */
+
+ // density select
+ m_fdc->dden_w(BIT(data, 0));
+ }
+ else if (offset == 0xfbfb) // WAIT ENBL
+ {
+ fatalerror("Z80 WAIT not supported by MAME core\n");
+ }
+ else if ((offset >= 0xfbfc) && (offset < 0xfc00))
+ {
+ m_fdc->gen_w(offset & 0x03, data);
+ }
+ else if ((offset >= 0xfc00) && (offset < 0x10000))
+ {
+ m_ram[offset & 0x3ff] = data;
+ }
+}
+
+
+//-------------------------------------------------
+// s100_sinp_r - I/O read
+//-------------------------------------------------
+
+UINT8 s100_dj2db_device::s100_sinp_r(address_space &space, offs_t offset)
+{
+ return 0;
+}
+
+
+//-------------------------------------------------
+// s100_sout_w - I/O write
+//-------------------------------------------------
+
+void s100_dj2db_device::s100_sout_w(address_space &space, offs_t offset, UINT8 data)
+{
+ if (offset == 0x41)
+ {
+ m_board_enbl = (data & m_j3a->read()) ? 1 : 0;
+ }
+}
+
+
+//-------------------------------------------------
+// s100_phantom_w - phantom
+//-------------------------------------------------
+
+void s100_dj2db_device::s100_phantom_w(int state)
+{
+ if (!BIT(m_sw1->read(), 2))
+ {
+ m_phantom = state;
+ }
+ else
+ {
+ m_phantom = 1;
+ }
+}
diff --git a/src/emu/bus/s100/dj2db.h b/src/emu/bus/s100/dj2db.h
new file mode 100644
index 00000000000..ce444f11a22
--- /dev/null
+++ b/src/emu/bus/s100/dj2db.h
@@ -0,0 +1,91 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs Disk Jockey 2D/B floppy controller board emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __S100_DJ2DB__
+#define __S100_DJ2DB__
+
+#include "emu.h"
+#include "s100.h"
+#include "machine/com8116.h"
+#include "machine/wd_fdc.h"
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> s100_dj2db_device
+
+class s100_dj2db_device : public device_t,
+ public device_s100_card_interface
+{
+public:
+ // construction/destruction
+ s100_dj2db_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual const rom_entry *device_rom_region() const;
+ virtual machine_config_constructor device_mconfig_additions() const;
+ virtual ioport_constructor device_input_ports() const;
+
+ // not really public
+ DECLARE_WRITE_LINE_MEMBER( fr_w );
+ void fdc_intrq_w(bool state);
+ void fdc_drq_w(bool state);
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+ // device_s100_card_interface overrides
+ virtual UINT8 s100_smemr_r(address_space &space, offs_t offset);
+ virtual void s100_mwrt_w(address_space &space, offs_t offset, UINT8 data);
+ virtual UINT8 s100_sinp_r(address_space &space, offs_t offset);
+ virtual void s100_sout_w(address_space &space, offs_t offset, UINT8 data);
+ virtual void s100_phantom_w(int state);
+
+private:
+ // internal state
+ required_device<mb8866_t> m_fdc;
+ required_device<com8116_device> m_dbrg;
+ required_device<floppy_connector> m_floppy0;
+ required_device<floppy_connector> m_floppy1;
+ required_device<floppy_connector> m_floppy2;
+ required_device<floppy_connector> m_floppy3;
+ floppy_image_device *m_floppy;
+ required_memory_region m_rom;
+ optional_shared_ptr<UINT8> m_ram;
+ required_ioport m_j1a;
+ required_ioport m_j3a;
+ required_ioport m_j4;
+ required_ioport m_sw1;
+
+ // floppy state
+ int m_drive; // selected drive
+ int m_head; // head loaded
+ int m_int_enbl; // interrupt enable
+
+ // S-100 bus state
+ int m_access_enbl; // access enable
+ int m_board_enbl; // board enable
+ int m_phantom; // phantom
+};
+
+
+// device type definition
+extern const device_type S100_DJ2DB;
+
+
+#endif
diff --git a/src/emu/bus/s100/djdma.c b/src/emu/bus/s100/djdma.c
new file mode 100644
index 00000000000..6a8b4403f26
--- /dev/null
+++ b/src/emu/bus/s100/djdma.c
@@ -0,0 +1,130 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs Disk Jockey/DMA floppy controller board emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "djdma.h"
+
+
+
+//**************************************************************************
+// MACROS/CONSTANTS
+//**************************************************************************
+
+#define Z80_TAG "14a"
+
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type S100_DJDMA = &device_creator<s100_djdma_device>;
+
+
+//-------------------------------------------------
+// ROM( djdma )
+//-------------------------------------------------
+
+ROM_START( djdma )
+ ROM_REGION( 0x1000, Z80_TAG, 0 )
+ ROM_LOAD( "djdma 2.5 26c2.16d", 0x0000, 0x1000, CRC(71ff1924) SHA1(6907575954836364826b8fdef3c108bb93bf3d25) )
+
+ ROM_REGION( 0x500, "proms", 0 )
+ ROM_LOAD( "djdma2x.3d", 0x000, 0x200, CRC(f9b1648b) SHA1(1ebe6dc8ccfbfa6c7dc98cb65fbc9fa21e3b687f) )
+ ROM_LOAD( "dj-11c-a.11c", 0x200, 0x200, CRC(0c6c4af0) SHA1(8fdcd34e3d07add793ff9ba27c77af864e1731bb) )
+ ROM_LOAD( "dja-12b.12b", 0x400, 0x100, CRC(040044af) SHA1(d069dc0e6b680cb8848d165aff6681ed2d750961) )
+
+ ROM_REGION( 0x104, "plds", 0 )
+ ROM_LOAD( "djdma-2b.2b", 0x000, 0x104, CRC(d6925f2c) SHA1(1e58dfb7b8a2a5bbaa6589d4018042626fd5ceaf) ) // PAL16R4
+ ROM_LOAD( "djdma 2c 81d5.2c", 0x0000, 0x10, NO_DUMP ) // ?
+ROM_END
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *s100_djdma_device::device_rom_region() const
+{
+ return ROM_NAME( djdma );
+}
+
+
+//-------------------------------------------------
+// ADDRESS_MAP( djdma_mem )
+//-------------------------------------------------
+
+static ADDRESS_MAP_START( djdma_mem, AS_PROGRAM, 8, s100_djdma_device )
+ AM_RANGE(0x0000, 0x0fff) AM_ROM AM_REGION("14a", 0)
+ADDRESS_MAP_END
+
+
+//-------------------------------------------------
+// ADDRESS_MAP( djdma_io )
+//-------------------------------------------------
+
+static ADDRESS_MAP_START( djdma_io, AS_IO, 8, s100_djdma_device )
+ADDRESS_MAP_END
+
+
+//-------------------------------------------------
+// MACHINE_CONFIG_FRAGMENT( s100_djdma )
+//-------------------------------------------------
+
+static MACHINE_CONFIG_FRAGMENT( s100_djdma )
+ MCFG_CPU_ADD(Z80_TAG, Z80, XTAL_4MHz)
+ MCFG_CPU_PROGRAM_MAP(djdma_mem)
+ MCFG_CPU_IO_MAP(djdma_io)
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor s100_djdma_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( s100_djdma );
+}
+
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_djdma_device - constructor
+//-------------------------------------------------
+
+s100_djdma_device::s100_djdma_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100_DJDMA, "DJDMA", tag, owner, clock, "djdma", __FILE__),
+ device_s100_card_interface(mconfig, *this)
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_djdma_device::device_start()
+{
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void s100_djdma_device::device_reset()
+{
+}
diff --git a/src/emu/bus/s100/djdma.h b/src/emu/bus/s100/djdma.h
new file mode 100644
index 00000000000..2f36218bb5c
--- /dev/null
+++ b/src/emu/bus/s100/djdma.h
@@ -0,0 +1,54 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs Disk Jockey/DMA floppy controller board emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __S100_DJDMA__
+#define __S100_DJDMA__
+
+#include "emu.h"
+#include "s100.h"
+#include "cpu/z80/z80.h"
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> s100_djdma_device
+
+class s100_djdma_device : public device_t,
+ public device_s100_card_interface
+{
+public:
+ // construction/destruction
+ s100_djdma_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const;
+ virtual const rom_entry *device_rom_region() const;
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+private:
+ // internal state
+};
+
+
+// device type definition
+extern const device_type S100_DJDMA;
+
+
+#endif
diff --git a/src/emu/bus/s100/mm65k16s.c b/src/emu/bus/s100/mm65k16s.c
new file mode 100644
index 00000000000..6bc4ab13a84
--- /dev/null
+++ b/src/emu/bus/s100/mm65k16s.c
@@ -0,0 +1,270 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs MM65K16S memory board emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "mm65k16s.h"
+
+
+
+//**************************************************************************
+// MACROS/CONSTANTS
+//**************************************************************************
+
+
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type S100_MM65K16S = &device_creator<s100_mm65k16s_device>;
+
+
+//-------------------------------------------------
+// ROM( mm65k16s )
+//-------------------------------------------------
+
+ROM_START( mm65k16s )
+ ROM_REGION( 0x10000, "proms", 0 )
+ ROM_LOAD( "82s100.6c", 0x0000, 0x10000, NO_DUMP )
+
+ ROM_REGION( 0x10, "plds", 0 )
+ ROM_LOAD( "pal14l4.6d", 0x0000, 0x10, NO_DUMP )
+ ROM_LOAD( "pal16l2.16d", 0x0000, 0x10, NO_DUMP )
+ROM_END
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *s100_mm65k16s_device::device_rom_region() const
+{
+ return ROM_NAME( mm65k16s );
+}
+
+
+//-------------------------------------------------
+// INPUT_PORTS( mm65k16s )
+//-------------------------------------------------
+
+static INPUT_PORTS_START( mm65k16s )
+ PORT_START("J6754")
+ PORT_DIPNAME( 0x01, 0x00, "Bank A Lower 32K" )
+ PORT_DIPSETTING( 0x01, "Disabled" )
+ PORT_DIPSETTING( 0x00, "Enabled" )
+ PORT_DIPNAME( 0x02, 0x00, "Bank A Upper 32K" )
+ PORT_DIPSETTING( 0x02, "Disabled" )
+ PORT_DIPSETTING( 0x00, "Enabled" )
+ PORT_DIPNAME( 0x04, 0x00, "Bank B Lower 32K" )
+ PORT_DIPSETTING( 0x04, "Disabled" )
+ PORT_DIPSETTING( 0x00, "Enabled" )
+ PORT_DIPNAME( 0x08, 0x00, "Bank B Upper 32K" )
+ PORT_DIPSETTING( 0x08, "Disabled" )
+ PORT_DIPSETTING( 0x00, "Enabled" )
+
+ PORT_START("J2")
+ PORT_DIPNAME( 0x01, 0x00, "Bank A Recognizes Phantom" )
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+ PORT_START("J1")
+ PORT_DIPNAME( 0x01, 0x00, "Bank B Recognizes Phantom" )
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+
+ PORT_START("5D")
+ PORT_DIPNAME( 0x03, 0x00, "First 16K Memory Addressing" ) PORT_DIPLOCATION("5D:1,2")
+ PORT_DIPSETTING( 0x00, "Block 0 (0000H-3FFFH)" )
+ PORT_DIPSETTING( 0x02, "Block 1 (4000H-7FFFH)" )
+ PORT_DIPSETTING( 0x01, "Block 2 (8000H-BFFFH)" )
+ PORT_DIPSETTING( 0x03, "Block 3 (C000H-FFFFH" )
+ PORT_DIPNAME( 0x0c, 0x08, "Second 16K Memory Addressing" ) PORT_DIPLOCATION("5D:3,4")
+ PORT_DIPSETTING( 0x00, "Block 0 (0000H-3FFFH)" )
+ PORT_DIPSETTING( 0x08, "Block 1 (4000H-7FFFH)" )
+ PORT_DIPSETTING( 0x04, "Block 2 (8000H-BFFFH)" )
+ PORT_DIPSETTING( 0x0c, "Block 3 (C000H-FFFFH" )
+ PORT_DIPNAME( 0x30, 0x10, "Third 16K Memory Addressing" ) PORT_DIPLOCATION("5D:5,6")
+ PORT_DIPSETTING( 0x00, "Block 0 (0000H-3FFFH)" )
+ PORT_DIPSETTING( 0x20, "Block 1 (4000H-7FFFH)" )
+ PORT_DIPSETTING( 0x10, "Block 2 (8000H-BFFFH)" )
+ PORT_DIPSETTING( 0x30, "Block 3 (C000H-FFFFH" )
+ PORT_DIPNAME( 0xc0, 0xc0, "Fourth 16K Memory Addressing" ) PORT_DIPLOCATION("5D:7,8")
+ PORT_DIPSETTING( 0x00, "Block 0 (0000H-3FFFH)" )
+ PORT_DIPSETTING( 0x80, "Block 1 (4000H-7FFFH)" )
+ PORT_DIPSETTING( 0x40, "Block 2 (8000H-BFFFH)" )
+ PORT_DIPSETTING( 0xc0, "Block 3 (C000H-FFFFH" )
+
+ PORT_START("PAGE07")
+ PORT_DIPNAME( 0x0f, 0x00, "2K Segment Disable" )
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, "Page 0" )
+ PORT_DIPSETTING( 0x01, "Page 1" )
+ PORT_DIPSETTING( 0x02, "Page 2" )
+ PORT_DIPSETTING( 0x03, "Page 3" )
+ PORT_DIPSETTING( 0x04, "Page 4" )
+ PORT_DIPSETTING( 0x05, "Page 5" )
+ PORT_DIPSETTING( 0x06, "Page 6" )
+ PORT_DIPSETTING( 0x07, "Page 7" )
+
+ PORT_START("J3")
+ PORT_DIPNAME( 0x01, 0x01, "Addressing Mode" )
+ PORT_DIPSETTING( 0x01, "Extended Addressing" )
+ PORT_DIPSETTING( 0x00, "Bank Select" )
+
+ PORT_START("1C")
+ PORT_DIPNAME( 0xff, 0x00, "Extended Addressing" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x01)
+ PORT_DIPSETTING( 0x00, "000000H" )
+ // ...
+ PORT_DIPSETTING( 0xff, "FF0000H" )
+ PORT_DIPNAME( 0xff, 0x40, "Bank Select Port" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "00H" )
+ // ...
+ PORT_DIPSETTING( 0x40, "40H" )
+ // ...
+ PORT_DIPSETTING( 0xff, "FFH" )
+
+ PORT_START("A0A7")
+ PORT_DIPNAME( 0x01, 0x01, "Bank Select Data Bit A0" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x01, "1" )
+ PORT_DIPNAME( 0x02, 0x00, "Bank Select Data Bit A1" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x02, "1" )
+ PORT_DIPNAME( 0x04, 0x00, "Bank Select Data Bit A2" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x04, "1" )
+ PORT_DIPNAME( 0x08, 0x00, "Bank Select Data Bit A3" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x08, "1" )
+ PORT_DIPNAME( 0x10, 0x00, "Bank Select Data Bit A4" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x10, "1" )
+ PORT_DIPNAME( 0x20, 0x00, "Bank Select Data Bit A5" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x20, "1" )
+ PORT_DIPNAME( 0x40, 0x00, "Bank Select Data Bit A6" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x40, "1" )
+ PORT_DIPNAME( 0x80, 0x00, "Bank Select Data Bit A7" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x80, "1" )
+
+ PORT_START("0B7B")
+ PORT_DIPNAME( 0x01, 0x00, "Bank Select Data Bit 0B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x01, "1" )
+ PORT_DIPNAME( 0x02, 0x00, "Bank Select Data Bit 1B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x02, "1" )
+ PORT_DIPNAME( 0x04, 0x00, "Bank Select Data Bit 2B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x04, "1" )
+ PORT_DIPNAME( 0x08, 0x00, "Bank Select Data Bit 3B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x08, "1" )
+ PORT_DIPNAME( 0x10, 0x00, "Bank Select Data Bit 4B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x10, "1" )
+ PORT_DIPNAME( 0x20, 0x00, "Bank Select Data Bit 5B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x20, "1" )
+ PORT_DIPNAME( 0x40, 0x00, "Bank Select Data Bit 6B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x40, "1" )
+ PORT_DIPNAME( 0x80, 0x00, "Bank Select Data Bit 7B" ) PORT_CONDITION("J3", 0x01, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, "0" )
+ PORT_DIPSETTING( 0x80, "1" )
+INPUT_PORTS_END
+
+
+//-------------------------------------------------
+// input_ports - device-specific input ports
+//-------------------------------------------------
+
+ioport_constructor s100_mm65k16s_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( mm65k16s );
+}
+
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_mm65k16s_device - constructor
+//-------------------------------------------------
+
+s100_mm65k16s_device::s100_mm65k16s_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100_MM65K16S, "MM65K16S", tag, owner, clock, "mm65k16s", __FILE__),
+ device_s100_card_interface(mconfig, *this),
+ m_ram(*this, "ram")
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_mm65k16s_device::device_start()
+{
+ m_ram.allocate(0x10000);
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void s100_mm65k16s_device::device_reset()
+{
+}
+
+
+//-------------------------------------------------
+// s100_smemr_r - memory read
+//-------------------------------------------------
+
+UINT8 s100_mm65k16s_device::s100_smemr_r(address_space &space, offs_t offset)
+{
+ UINT8 data = 0;
+
+ if (offset < 0xf800)
+ {
+ data = m_ram[offset];
+ }
+
+ return data;
+}
+
+
+//-------------------------------------------------
+// s100_mwrt_w - memory write
+//-------------------------------------------------
+
+void s100_mm65k16s_device::s100_mwrt_w(address_space &space, offs_t offset, UINT8 data)
+{
+ if (offset < 0xf800)
+ {
+ m_ram[offset] = data;
+ }
+}
+
+
+//-------------------------------------------------
+// s100_phantom_w - phantom
+//-------------------------------------------------
+
+void s100_mm65k16s_device::s100_phantom_w(int state)
+{
+}
diff --git a/src/emu/bus/s100/mm65k16s.h b/src/emu/bus/s100/mm65k16s.h
new file mode 100644
index 00000000000..54928dd30c4
--- /dev/null
+++ b/src/emu/bus/s100/mm65k16s.h
@@ -0,0 +1,58 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs MM65K16S memory board emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __S100_MM65K16S__
+#define __S100_MM65K16S__
+
+#include "emu.h"
+#include "s100.h"
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> s100_mm65k16s_device
+
+class s100_mm65k16s_device : public device_t,
+ public device_s100_card_interface
+{
+public:
+ // construction/destruction
+ s100_mm65k16s_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual const rom_entry *device_rom_region() const;
+ virtual ioport_constructor device_input_ports() const;
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+ // device_s100_card_interface overrides
+ virtual UINT8 s100_smemr_r(address_space &space, offs_t offset);
+ virtual void s100_mwrt_w(address_space &space, offs_t offset, UINT8 data);
+ virtual void s100_phantom_w(int state);
+
+private:
+ optional_shared_ptr<UINT8> m_ram;
+};
+
+
+// device type definition
+extern const device_type S100_MM65K16S;
+
+
+#endif
diff --git a/src/emu/bus/s100/nsmdsa.c b/src/emu/bus/s100/nsmdsa.c
new file mode 100644
index 00000000000..ecbc9668fa9
--- /dev/null
+++ b/src/emu/bus/s100/nsmdsa.c
@@ -0,0 +1,123 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ North Star MICRO-DISK System MDS-A (Single Density) emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "nsmdsa.h"
+
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type S100_MDS_A = &device_creator<s100_mds_a_device>;
+
+
+//-------------------------------------------------
+// ROM( mds_a )
+//-------------------------------------------------
+
+ROM_START( mds_a )
+ ROM_REGION( 0x100, "psel", 0 )
+ ROM_LOAD( "psel.7g", 0x000, 0x100, NO_DUMP ) // 74S287
+
+ ROM_REGION( 0x100, "pgm", 0 )
+ ROM_LOAD( "pgml.3f", 0x000, 0x100, NO_DUMP ) // 74S287
+ ROM_LOAD( "pgmr.3e", 0x000, 0x100, NO_DUMP ) // 74S287
+ ROM_LOAD( "horizon.bin", 0x000, 0x100, CRC(754e53e5) SHA1(875e42942d639b972252b87d86c3dc2133304967) BAD_DUMP )
+ROM_END
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *s100_mds_a_device::device_rom_region() const
+{
+ return ROM_NAME( mds_a );
+}
+
+
+//-------------------------------------------------
+// SLOT_INTERFACE( mds_a_floppies )
+//-------------------------------------------------
+
+static SLOT_INTERFACE_START( mds_a_floppies )
+ SLOT_INTERFACE( "525sd", FLOPPY_525_SD ) // Shugart SA-400
+SLOT_INTERFACE_END
+
+
+//-------------------------------------------------
+// MACHINE_CONFIG_FRAGMENT( mds_a )
+//-------------------------------------------------
+
+static MACHINE_CONFIG_FRAGMENT( mds_a )
+ MCFG_FLOPPY_DRIVE_ADD("floppy0", mds_a_floppies, "525sd", floppy_image_device::default_floppy_formats)
+ MCFG_FLOPPY_DRIVE_ADD("floppy1", mds_a_floppies, "525sd", floppy_image_device::default_floppy_formats)
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor s100_mds_a_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( mds_a );
+}
+
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_mds_a_device - constructor
+//-------------------------------------------------
+
+s100_mds_a_device::s100_mds_a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100_MDS_A, "MDS-A", tag, owner, clock, "nsmdsa", __FILE__),
+ device_s100_card_interface(mconfig, *this),
+ m_floppy0(*this, "floppy0"),
+ m_floppy1(*this, "floppy1"),
+ m_psel_rom(*this, "psel"),
+ m_pgm_rom(*this, "pgm")
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_mds_a_device::device_start()
+{
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void s100_mds_a_device::device_reset()
+{
+}
+
+
+//-------------------------------------------------
+// s100_smemr_r - memory read
+//-------------------------------------------------
+
+UINT8 s100_mds_a_device::s100_smemr_r(address_space &space, offs_t offset)
+{
+ return 0;
+}
diff --git a/src/emu/bus/s100/nsmdsa.h b/src/emu/bus/s100/nsmdsa.h
new file mode 100644
index 00000000000..16393b1fb74
--- /dev/null
+++ b/src/emu/bus/s100/nsmdsa.h
@@ -0,0 +1,61 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ North Star MICRO-DISK System MDS-A (Single Density) emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __S100_MDS_A__
+#define __S100_MDS_A__
+
+#include "emu.h"
+#include "s100.h"
+#include "imagedev/floppy.h"
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> s100_mds_a_device
+
+class s100_mds_a_device : public device_t,
+ public device_s100_card_interface
+{
+public:
+ // construction/destruction
+ s100_mds_a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual const rom_entry *device_rom_region() const;
+ virtual machine_config_constructor device_mconfig_additions() const;
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+ // device_s100_card_interface overrides
+ virtual UINT8 s100_smemr_r(address_space &space, offs_t offset);
+
+private:
+ required_device<floppy_connector> m_floppy0;
+ required_device<floppy_connector> m_floppy1;
+ required_memory_region m_psel_rom;
+ required_memory_region m_pgm_rom;
+};
+
+
+// device type definition
+extern const device_type S100_MDS_A;
+
+
+
+#endif
diff --git a/src/emu/bus/s100/nsmdsad.c b/src/emu/bus/s100/nsmdsad.c
new file mode 100644
index 00000000000..00aa0b47cbd
--- /dev/null
+++ b/src/emu/bus/s100/nsmdsad.c
@@ -0,0 +1,125 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ North Star MICRO-DISK System MDS-A-D (Double Density) emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "nsmdsad.h"
+
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type S100_MDS_AD = &device_creator<s100_mds_ad_device>;
+
+
+//-------------------------------------------------
+// ROM( mds_ad )
+//-------------------------------------------------
+
+ROM_START( mds_ad )
+ ROM_REGION( 0x100, "dsel", 0 )
+ ROM_LOAD( "dsel.11c", 0x000, 0x100, NO_DUMP ) // 82S129
+
+ ROM_REGION( 0x100, "dpgm", 0 )
+ ROM_LOAD( "dpgm.9d", 0x000, 0x100, CRC(7aafa134) SHA1(bf1552c4818f30473798af4f54e65e1957e0db48) )
+
+ ROM_REGION( 0x100, "dwe", 0 )
+ ROM_LOAD( "dwe.4c", 0x000, 0x100, NO_DUMP ) // 82S129
+ROM_END
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *s100_mds_ad_device::device_rom_region() const
+{
+ return ROM_NAME( mds_ad );
+}
+
+
+//-------------------------------------------------
+// SLOT_INTERFACE( mds_ad_floppies )
+//-------------------------------------------------
+
+static SLOT_INTERFACE_START( mds_ad_floppies )
+ SLOT_INTERFACE( "525dd", FLOPPY_525_DD ) // Shugart SA-400
+SLOT_INTERFACE_END
+
+
+//-------------------------------------------------
+// MACHINE_CONFIG_FRAGMENT( mds_ad )
+//-------------------------------------------------
+
+static MACHINE_CONFIG_FRAGMENT( mds_ad )
+ MCFG_FLOPPY_DRIVE_ADD("floppy0", mds_ad_floppies, "525dd", floppy_image_device::default_floppy_formats)
+ MCFG_FLOPPY_DRIVE_ADD("floppy1", mds_ad_floppies, "525dd", floppy_image_device::default_floppy_formats)
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor s100_mds_ad_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( mds_ad );
+}
+
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_mds_ad_device - constructor
+//-------------------------------------------------
+
+s100_mds_ad_device::s100_mds_ad_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100_MDS_AD, "MDS-A-D", tag, owner, clock, "nsmdsad", __FILE__),
+ device_s100_card_interface(mconfig, *this),
+ m_floppy0(*this, "floppy0"),
+ m_floppy1(*this, "floppy1"),
+ m_dsel_rom(*this, "dsel"),
+ m_dpgm_rom(*this, "dpgm"),
+ m_dwe_rom(*this, "dwe")
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_mds_ad_device::device_start()
+{
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void s100_mds_ad_device::device_reset()
+{
+}
+
+
+//-------------------------------------------------
+// s100_smemr_r - memory read
+//-------------------------------------------------
+
+UINT8 s100_mds_ad_device::s100_smemr_r(address_space &space, offs_t offset)
+{
+ return 0;
+}
diff --git a/src/emu/bus/s100/nsmdsad.h b/src/emu/bus/s100/nsmdsad.h
new file mode 100644
index 00000000000..a7692fd61df
--- /dev/null
+++ b/src/emu/bus/s100/nsmdsad.h
@@ -0,0 +1,62 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ North Star MICRO-DISK System MDS-A-D (Double Density) emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __S100_MDS_AD__
+#define __S100_MDS_AD__
+
+#include "emu.h"
+#include "s100.h"
+#include "imagedev/floppy.h"
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> s100_mds_ad_device
+
+class s100_mds_ad_device : public device_t,
+ public device_s100_card_interface
+{
+public:
+ // construction/destruction
+ s100_mds_ad_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual const rom_entry *device_rom_region() const;
+ virtual machine_config_constructor device_mconfig_additions() const;
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+ // device_s100_card_interface overrides
+ virtual UINT8 s100_smemr_r(address_space &space, offs_t offset);
+
+private:
+ required_device<floppy_connector> m_floppy0;
+ required_device<floppy_connector> m_floppy1;
+ required_memory_region m_dsel_rom;
+ required_memory_region m_dpgm_rom;
+ required_memory_region m_dwe_rom;
+};
+
+
+// device type definition
+extern const device_type S100_MDS_AD;
+
+
+
+#endif
diff --git a/src/emu/bus/s100/s100.c b/src/emu/bus/s100/s100.c
new file mode 100644
index 00000000000..a16fd7e08ee
--- /dev/null
+++ b/src/emu/bus/s100/s100.c
@@ -0,0 +1,270 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ S-100 (IEEE-696/1983) bus emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "emu.h"
+#include "emuopts.h"
+#include "s100.h"
+
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+const device_type S100_SLOT = &device_creator<s100_slot_device>;
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_slot_device - constructor
+//-------------------------------------------------
+s100_slot_device::s100_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100_SLOT, "S100 slot", tag, owner, clock, "s100_slot", __FILE__),
+ device_slot_interface(mconfig, *this)
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_slot_device::device_start()
+{
+ m_bus = machine().device<s100_device>(S100_TAG);
+ device_s100_card_interface *dev = dynamic_cast<device_s100_card_interface *>(get_card_device());
+ if (dev) m_bus->add_s100_card(dev);
+}
+
+
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+const device_type S100 = &device_creator<s100_device>;
+
+
+//-------------------------------------------------
+// device_config_complete - perform any
+// operations now that the configuration is
+// complete
+//-------------------------------------------------
+
+void s100_device::device_config_complete()
+{
+ // inherit a copy of the static data
+ const s100_bus_interface *intf = reinterpret_cast<const s100_bus_interface *>(static_config());
+ if (intf != NULL)
+ {
+ *static_cast<s100_bus_interface *>(this) = *intf;
+ }
+
+ // or initialize to defaults if none provided
+ else
+ {
+ memset(&m_out_int_cb, 0, sizeof(m_out_int_cb));
+ memset(&m_out_nmi_cb, 0, sizeof(m_out_nmi_cb));
+ memset(&m_out_vi0_cb, 0, sizeof(m_out_vi0_cb));
+ memset(&m_out_vi1_cb, 0, sizeof(m_out_vi1_cb));
+ memset(&m_out_vi2_cb, 0, sizeof(m_out_vi2_cb));
+ memset(&m_out_vi3_cb, 0, sizeof(m_out_vi3_cb));
+ memset(&m_out_vi4_cb, 0, sizeof(m_out_vi4_cb));
+ memset(&m_out_vi5_cb, 0, sizeof(m_out_vi5_cb));
+ memset(&m_out_vi6_cb, 0, sizeof(m_out_vi6_cb));
+ memset(&m_out_vi7_cb, 0, sizeof(m_out_vi7_cb));
+ memset(&m_out_dma0_cb, 0, sizeof(m_out_dma0_cb));
+ memset(&m_out_dma1_cb, 0, sizeof(m_out_dma1_cb));
+ memset(&m_out_dma2_cb, 0, sizeof(m_out_dma2_cb));
+ memset(&m_out_dma3_cb, 0, sizeof(m_out_dma3_cb));
+ memset(&m_out_rdy_cb, 0, sizeof(m_out_rdy_cb));
+ memset(&m_out_hold_cb, 0, sizeof(m_out_hold_cb));
+ memset(&m_out_error_cb, 0, sizeof(m_out_error_cb));
+ }
+}
+
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_device - constructor
+//-------------------------------------------------
+
+s100_device::s100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100, "S100", tag, owner, clock, "s100", __FILE__)
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_device::device_start()
+{
+ // resolve callbacks
+ m_out_int_func.resolve(m_out_int_cb, *this);
+ m_out_nmi_func.resolve(m_out_nmi_cb, *this);
+ m_out_vi0_func.resolve(m_out_vi0_cb, *this);
+ m_out_vi1_func.resolve(m_out_vi1_cb, *this);
+ m_out_vi2_func.resolve(m_out_vi2_cb, *this);
+ m_out_vi3_func.resolve(m_out_vi3_cb, *this);
+ m_out_vi4_func.resolve(m_out_vi4_cb, *this);
+ m_out_vi5_func.resolve(m_out_vi5_cb, *this);
+ m_out_vi6_func.resolve(m_out_vi6_cb, *this);
+ m_out_vi7_func.resolve(m_out_vi7_cb, *this);
+ m_out_dma0_func.resolve(m_out_dma0_cb, *this);
+ m_out_dma1_func.resolve(m_out_dma1_cb, *this);
+ m_out_dma2_func.resolve(m_out_dma2_cb, *this);
+ m_out_dma3_func.resolve(m_out_dma3_cb, *this);
+ m_out_rdy_func.resolve(m_out_rdy_cb, *this);
+ m_out_hold_func.resolve(m_out_hold_cb, *this);
+ m_out_error_func.resolve(m_out_error_cb, *this);
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void s100_device::device_reset()
+{
+}
+
+
+//-------------------------------------------------
+// add_s100_card - add S100 card
+//-------------------------------------------------
+
+void s100_device::add_s100_card(device_s100_card_interface *card)
+{
+ card->m_bus = this;
+ m_device_list.append(*card);
+}
+
+
+//-------------------------------------------------
+// smemr_r - memory read
+//-------------------------------------------------
+
+READ8_MEMBER( s100_device::smemr_r )
+{
+ UINT8 data = 0;
+
+ device_s100_card_interface *entry = m_device_list.first();
+
+ while (entry)
+ {
+ data |= entry->s100_smemr_r(space, offset);
+ entry = entry->next();
+ }
+
+ return data;
+}
+
+
+//-------------------------------------------------
+// mwrt_w - memory write
+//-------------------------------------------------
+
+WRITE8_MEMBER( s100_device::mwrt_w )
+{
+ device_s100_card_interface *entry = m_device_list.first();
+
+ while (entry)
+ {
+ entry->s100_mwrt_w(space, offset, data);
+ entry = entry->next();
+ }
+}
+
+
+//-------------------------------------------------
+// sinp_r - I/O read
+//-------------------------------------------------
+
+READ8_MEMBER( s100_device::sinp_r )
+{
+ UINT8 data = 0;
+
+ device_s100_card_interface *entry = m_device_list.first();
+
+ while (entry)
+ {
+ data |= entry->s100_sinp_r(space, offset);
+ entry = entry->next();
+ }
+
+ return data;
+}
+
+
+//-------------------------------------------------
+// sout_w - I/O write
+//-------------------------------------------------
+
+WRITE8_MEMBER( s100_device::sout_w )
+{
+ device_s100_card_interface *entry = m_device_list.first();
+
+ while (entry)
+ {
+ entry->s100_sout_w(space, offset, data);
+ entry = entry->next();
+ }
+}
+
+
+WRITE_LINE_MEMBER( s100_device::int_w ) { m_out_nmi_func(state); }
+WRITE_LINE_MEMBER( s100_device::nmi_w ) { m_out_nmi_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi0_w ) { m_out_vi0_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi1_w ) { m_out_vi1_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi2_w ) { m_out_vi2_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi3_w ) { m_out_vi3_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi4_w ) { m_out_vi4_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi5_w ) { m_out_vi5_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi6_w ) { m_out_vi6_func(state); }
+WRITE_LINE_MEMBER( s100_device::vi7_w ) { m_out_vi7_func(state); }
+WRITE_LINE_MEMBER( s100_device::dma0_w ) { m_out_dma0_func(state); }
+WRITE_LINE_MEMBER( s100_device::dma1_w ) { m_out_dma1_func(state); }
+WRITE_LINE_MEMBER( s100_device::dma2_w ) { m_out_dma2_func(state); }
+WRITE_LINE_MEMBER( s100_device::dma3_w ) { m_out_dma3_func(state); }
+WRITE_LINE_MEMBER( s100_device::rdy_w ) { m_out_rdy_func(state); }
+WRITE_LINE_MEMBER( s100_device::hold_w ) { m_out_hold_func(state); }
+WRITE_LINE_MEMBER( s100_device::error_w ) { m_out_error_func(state); }
+
+
+
+//**************************************************************************
+// DEVICE S100 CARD INTERFACE
+//**************************************************************************
+
+//-------------------------------------------------
+// device_s100_card_interface - constructor
+//-------------------------------------------------
+
+device_s100_card_interface::device_s100_card_interface(const machine_config &mconfig, device_t &device)
+ : device_slot_card_interface(mconfig, device)
+{
+}
+
+
+//-------------------------------------------------
+// ~device_s100_card_interface - destructor
+//-------------------------------------------------
+
+device_s100_card_interface::~device_s100_card_interface()
+{
+}
diff --git a/src/emu/bus/s100/s100.h b/src/emu/bus/s100/s100.h
new file mode 100644
index 00000000000..f213cc15289
--- /dev/null
+++ b/src/emu/bus/s100/s100.h
@@ -0,0 +1,286 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ S-100 (IEEE Std 696-1983) bus emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************
+
+ +8 V (B) 1 51 +8 V (B)
+ +16 V (B) 2 52 -16 V (B)
+ XRDY (S) 3 53 0 V
+ VI0* (S) 4 54 SLAVE CLR* (B)
+ VI1* (S) 5 55 TMA0* (M)
+ VI2* (S) 6 56 TMA1* (M)
+ VI3* (S) 7 57 TMA2* (M)
+ VI4* (S) 8 58 sXTRQ* (M)
+ VI5* (S) 9 59 A19 (M)
+ VI6* (S) 10 60 SIXTN* (S)
+ VI7* (S) 11 61 A20 (M)
+ NMI* (S) 12 62 A21 (M)
+ PWRFAIL* (B) 13 63 A22 (M)
+ TMA3* (M) 14 64 A23 (M)
+ A18 (M) 15 65 NDEF
+ A16 (M) 16 66 NDEF
+ A17 (M) 17 67 PHANTOM* (M/S)
+ SDSB* (M) 18 68 MWRT (B)
+ CDSB* (M) 19 69 RFU
+ 0 V 20 70 0 V
+ NDEF 21 71 RFU
+ ADSB* (M) 22 72 RDY (S)
+ DODSB* (M) 23 73 INT* (S)
+ phi (B) 24 74 HOLD* (M)
+ pSTVAL* (M) 25 75 RESET* (B)
+ pHLDA (M) 26 76 pSYNC (M)
+ RFU 27 77 pWR* (M)
+ RFU 28 78 pDBIN (M)
+ A5 (M) 29 79 A0 (M)
+ A4 (M) 30 80 A1 (M)
+ A3 (M) 31 81 A2 (M)
+ A15 (M) 32 82 A6 (M)
+ A12 (M) 33 83 A7 (M)
+ A9 (M) 34 84 A8 (M)
+ DO1 (M)/ED1 (M/S) 35 85 A13 (M)
+ DO0 (M)/ED0 (M/S) 36 86 A14 (M)
+ A10 (M) 37 87 A11 (M)
+ DO4 (M)/ED4 (M/S) 38 88 DO2 (M)/ED2 (M/S)
+ DO5 (M)/ED5 (M/S) 39 89 DO3 (M)/ED3 (M/S)
+ DO6 (M)/ED6 (M/S) 40 90 DO7 (M)/ED7 (M/S)
+ DI2 (M)/OD2 (M/S) 41 91 DI4 (M)/OD4 (M/S)
+ DI3 (M)/OD3 (M/S) 42 92 DI5 (M)/OD5 (M/S)
+ DI7 (M)/OD7 (M/S) 43 93 DI6 (M)/OD6 (M/S)
+ sM1 (M) 44 94 DI1 (M)/OD1 (M/S)
+ sOUT (M) 45 95 DI0 (M)/OD0 (M/S)
+ sINP (M) 46 96 sINTA (M)
+ sMEMR (M) 47 97 sWO* (M)
+ sHLTA (M) 48 98 ERROR* (S)
+ CLOCK (B) 49 99 POC* (B)
+ 0 V 50 100 0 V
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __S100__
+#define __S100__
+
+#include "emu.h"
+
+
+
+//**************************************************************************
+// CONSTANTS
+//**************************************************************************
+
+#define S100_TAG "s100"
+
+
+
+//**************************************************************************
+// INTERFACE CONFIGURATION MACROS
+//**************************************************************************
+
+#define MCFG_S100_BUS_ADD(_config) \
+ MCFG_DEVICE_ADD(S100_TAG, S100, 0) \
+ MCFG_DEVICE_CONFIG(_config)
+
+
+#define S100_INTERFACE(_name) \
+ const s100_bus_interface (_name) =
+
+
+#define MCFG_S100_SLOT_ADD(_tag, _slot_intf, _def_slot) \
+ MCFG_DEVICE_ADD(_tag, S100_SLOT, 0) \
+ MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> s100_slot_device
+
+class s100_device;
+
+class s100_slot_device : public device_t,
+ public device_slot_interface
+{
+public:
+ // construction/destruction
+ s100_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // device-level overrides
+ virtual void device_start();
+
+private:
+ s100_device *m_bus;
+};
+
+
+// device type definition
+extern const device_type S100_SLOT;
+
+
+// ======================> s100_bus_interface
+
+struct s100_bus_interface
+{
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_nmi_cb;
+ devcb_write_line m_out_vi0_cb;
+ devcb_write_line m_out_vi1_cb;
+ devcb_write_line m_out_vi2_cb;
+ devcb_write_line m_out_vi3_cb;
+ devcb_write_line m_out_vi4_cb;
+ devcb_write_line m_out_vi5_cb;
+ devcb_write_line m_out_vi6_cb;
+ devcb_write_line m_out_vi7_cb;
+ devcb_write_line m_out_dma0_cb;
+ devcb_write_line m_out_dma1_cb;
+ devcb_write_line m_out_dma2_cb;
+ devcb_write_line m_out_dma3_cb;
+ devcb_write_line m_out_rdy_cb;
+ devcb_write_line m_out_hold_cb;
+ devcb_write_line m_out_error_cb;
+};
+
+class device_s100_card_interface;
+
+
+// ======================> s100_device
+
+class s100_device : public device_t,
+ public s100_bus_interface
+{
+public:
+ // construction/destruction
+ s100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ void add_s100_card(device_s100_card_interface *card);
+
+ DECLARE_READ8_MEMBER( smemr_r );
+ DECLARE_WRITE8_MEMBER( mwrt_w );
+
+ DECLARE_READ8_MEMBER( sinp_r );
+ DECLARE_WRITE8_MEMBER( sout_w );
+
+ DECLARE_WRITE_LINE_MEMBER( int_w );
+ DECLARE_WRITE_LINE_MEMBER( nmi_w );
+ DECLARE_WRITE_LINE_MEMBER( vi0_w );
+ DECLARE_WRITE_LINE_MEMBER( vi1_w );
+ DECLARE_WRITE_LINE_MEMBER( vi2_w );
+ DECLARE_WRITE_LINE_MEMBER( vi3_w );
+ DECLARE_WRITE_LINE_MEMBER( vi4_w );
+ DECLARE_WRITE_LINE_MEMBER( vi5_w );
+ DECLARE_WRITE_LINE_MEMBER( vi6_w );
+ DECLARE_WRITE_LINE_MEMBER( vi7_w );
+ DECLARE_WRITE_LINE_MEMBER( dma0_w );
+ DECLARE_WRITE_LINE_MEMBER( dma1_w );
+ DECLARE_WRITE_LINE_MEMBER( dma2_w );
+ DECLARE_WRITE_LINE_MEMBER( dma3_w );
+ DECLARE_WRITE_LINE_MEMBER( rdy_w );
+ DECLARE_WRITE_LINE_MEMBER( hold_w );
+ DECLARE_WRITE_LINE_MEMBER( error_w );
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_config_complete();
+
+private:
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_nmi_func;
+ devcb_resolved_write_line m_out_vi0_func;
+ devcb_resolved_write_line m_out_vi1_func;
+ devcb_resolved_write_line m_out_vi2_func;
+ devcb_resolved_write_line m_out_vi3_func;
+ devcb_resolved_write_line m_out_vi4_func;
+ devcb_resolved_write_line m_out_vi5_func;
+ devcb_resolved_write_line m_out_vi6_func;
+ devcb_resolved_write_line m_out_vi7_func;
+ devcb_resolved_write_line m_out_dma0_func;
+ devcb_resolved_write_line m_out_dma1_func;
+ devcb_resolved_write_line m_out_dma2_func;
+ devcb_resolved_write_line m_out_dma3_func;
+ devcb_resolved_write_line m_out_rdy_func;
+ devcb_resolved_write_line m_out_hold_func;
+ devcb_resolved_write_line m_out_error_func;
+
+ simple_list<device_s100_card_interface> m_device_list;
+};
+
+
+// device type definition
+extern const device_type S100;
+
+
+// ======================> device_s100_card_interface
+
+// class representing interface-specific live s100 card
+class device_s100_card_interface : public device_slot_card_interface
+{
+ friend class s100_device;
+
+public:
+ // construction/destruction
+ device_s100_card_interface(const machine_config &mconfig, device_t &device);
+ virtual ~device_s100_card_interface();
+
+ device_s100_card_interface *next() const { return m_next; }
+
+ // interrupts
+ virtual void s100_int_w(int state) { };
+ virtual void s100_nmi_w(int state) { };
+ virtual UINT8 s100_sinta_r(offs_t offset) { return 0; };
+
+ // vectored interrupts
+ virtual void s100_vi0_w(int state) { };
+ virtual void s100_vi1_w(int state) { };
+ virtual void s100_vi2_w(int state) { };
+ virtual void s100_vi3_w(int state) { };
+ virtual void s100_vi4_w(int state) { };
+ virtual void s100_vi5_w(int state) { };
+ virtual void s100_vi6_w(int state) { };
+ virtual void s100_vi7_w(int state) { };
+
+ // memory access
+ virtual UINT8 s100_smemr_r(address_space &space, offs_t offset) { return 0; };
+ virtual void s100_mwrt_w(address_space &space, offs_t offset, UINT8 data) { };
+
+ // I/O access
+ virtual UINT8 s100_sinp_r(address_space &space, offs_t offset) { return 0; };
+ virtual void s100_sout_w(address_space &space, offs_t offset, UINT8 data) { };
+
+ // configuration access
+ virtual void s100_phlda_w(int state) { }
+ virtual void s100_shalta_w(int state) { }
+ virtual void s100_phantom_w(int state) { }
+ virtual void s100_sxtrq_w(int state) { }
+ virtual int s100_sixtn_r() { return 1; }
+
+ // reset
+ virtual void s100_poc_w(int state) { }
+ virtual void s100_reset_w(int state) { }
+ virtual void s100_slave_clr_w(int state) { }
+
+public:
+ s100_device *m_bus;
+ device_s100_card_interface *m_next;
+};
+
+
+// slot devices
+#include "dj2db.h"
+#include "djdma.h"
+#include "mm65k16s.h"
+#include "nsmdsa.h"
+#include "nsmdsad.h"
+#include "wunderbus.h"
+
+
+#endif
diff --git a/src/emu/bus/s100/wunderbus.c b/src/emu/bus/s100/wunderbus.c
new file mode 100644
index 00000000000..7e0e3a796fd
--- /dev/null
+++ b/src/emu/bus/s100/wunderbus.c
@@ -0,0 +1,582 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs Wunderbus I/O card emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "wunderbus.h"
+
+
+
+//**************************************************************************
+// MACROS/CONSTANTS
+//**************************************************************************
+
+#define I8259A_TAG "13b"
+#define INS8250_1_TAG "6d"
+#define INS8250_2_TAG "5d"
+#define INS8250_3_TAG "4d"
+#define RS232_A_TAG "rs232a"
+#define RS232_B_TAG "rs232b"
+#define RS232_C_TAG "rs232c"
+#define UPD1990C_TAG "12a"
+
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type S100_WUNDERBUS = &device_creator<s100_wunderbus_device>;
+
+
+//-------------------------------------------------
+// pic8259_interface pic_intf
+//-------------------------------------------------
+
+/*
+
+ bit description
+
+ IR0 S-100 VI0
+ IR1 S-100 VI1
+ IR2 S-100 VI2
+ IR3 Serial Device 1
+ IR4 Serial Device 2
+ IR5 Serial Device 3
+ IR6 Daisy PWR line
+ IR7 RT Clock TP line
+
+*/
+
+WRITE_LINE_MEMBER( s100_wunderbus_device::pic_int_w )
+{
+ m_bus->int_w(state);
+}
+
+
+//-------------------------------------------------
+// ins8250_interface ace1_intf
+//-------------------------------------------------
+
+static ins8250_interface ace1_intf =
+{
+ DEVCB_DEVICE_LINE_MEMBER(RS232_A_TAG, serial_port_device, tx),
+ DEVCB_DEVICE_LINE_MEMBER(RS232_A_TAG, rs232_port_device, dtr_w),
+ DEVCB_DEVICE_LINE_MEMBER(RS232_A_TAG, rs232_port_device, rts_w),
+ DEVCB_DEVICE_LINE_MEMBER(I8259A_TAG, pic8259_device, ir3_w),
+ DEVCB_NULL,
+ DEVCB_NULL
+};
+
+
+//-------------------------------------------------
+// ins8250_interface ace2_intf
+//-------------------------------------------------
+
+static ins8250_interface ace2_intf =
+{
+ DEVCB_DEVICE_LINE_MEMBER(RS232_B_TAG, serial_port_device, tx),
+ DEVCB_DEVICE_LINE_MEMBER(RS232_B_TAG, rs232_port_device, dtr_w),
+ DEVCB_DEVICE_LINE_MEMBER(RS232_B_TAG, rs232_port_device, rts_w),
+ DEVCB_DEVICE_LINE_MEMBER(I8259A_TAG, pic8259_device, ir4_w),
+ DEVCB_NULL,
+ DEVCB_NULL
+};
+
+
+//-------------------------------------------------
+// ins8250_interface ace3_intf
+//-------------------------------------------------
+
+static ins8250_interface ace3_intf =
+{
+ DEVCB_DEVICE_LINE_MEMBER(RS232_C_TAG, serial_port_device, tx),
+ DEVCB_DEVICE_LINE_MEMBER(RS232_C_TAG, rs232_port_device, dtr_w),
+ DEVCB_DEVICE_LINE_MEMBER(RS232_C_TAG, rs232_port_device, rts_w),
+ DEVCB_DEVICE_LINE_MEMBER(I8259A_TAG, pic8259_device, ir5_w),
+ DEVCB_NULL,
+ DEVCB_NULL
+};
+
+
+//-------------------------------------------------
+// rs232_port_interface rs232a_intf
+//-------------------------------------------------
+
+static DEVICE_INPUT_DEFAULTS_START( terminal )
+ DEVICE_INPUT_DEFAULTS( "TERM_FRAME", 0x0f, 0x0d ) // 110
+ DEVICE_INPUT_DEFAULTS( "TERM_FRAME", 0x30, 0x20 ) // 8N2
+DEVICE_INPUT_DEFAULTS_END
+
+static const rs232_port_interface rs232a_intf =
+{
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_1_TAG, ins8250_uart_device, rx_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_1_TAG, ins8250_uart_device, dcd_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_1_TAG, ins8250_uart_device, dsr_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_1_TAG, ins8250_uart_device, ri_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_1_TAG, ins8250_uart_device, cts_w)
+};
+
+
+//-------------------------------------------------
+// rs232_port_interface rs232b_intf
+//-------------------------------------------------
+
+static const rs232_port_interface rs232b_intf =
+{
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_2_TAG, ins8250_uart_device, rx_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_2_TAG, ins8250_uart_device, dcd_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_2_TAG, ins8250_uart_device, dsr_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_2_TAG, ins8250_uart_device, ri_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_2_TAG, ins8250_uart_device, cts_w)
+};
+
+
+//-------------------------------------------------
+// rs232_port_interface rs232c_intf
+//-------------------------------------------------
+
+static const rs232_port_interface rs232c_intf =
+{
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_3_TAG, ins8250_uart_device, rx_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_3_TAG, ins8250_uart_device, dcd_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_3_TAG, ins8250_uart_device, dsr_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_3_TAG, ins8250_uart_device, ri_w),
+ DEVCB_DEVICE_LINE_MEMBER(INS8250_3_TAG, ins8250_uart_device, cts_w)
+};
+
+
+//-------------------------------------------------
+// UPD1990A_INTERFACE( rtc_intf )
+//-------------------------------------------------
+
+WRITE_LINE_MEMBER( s100_wunderbus_device::rtc_tp_w )
+{
+ if (state)
+ {
+ m_rtc_tp = state;
+ m_pic->ir7_w(m_rtc_tp);
+ }
+}
+
+
+//-------------------------------------------------
+// MACHINE_CONFIG_FRAGMENT( s100_wunderbus )
+//-------------------------------------------------
+
+static MACHINE_CONFIG_FRAGMENT( s100_wunderbus )
+ MCFG_PIC8259_ADD(I8259A_TAG, DEVWRITELINE(DEVICE_SELF, s100_wunderbus_device, pic_int_w), VCC, NULL)
+ MCFG_INS8250_ADD(INS8250_1_TAG, ace1_intf, XTAL_18_432MHz/10)
+ MCFG_INS8250_ADD(INS8250_2_TAG, ace2_intf, XTAL_18_432MHz/10)
+ MCFG_INS8250_ADD(INS8250_3_TAG, ace3_intf, XTAL_18_432MHz/10)
+ MCFG_RS232_PORT_ADD(RS232_A_TAG, rs232a_intf, default_rs232_devices, "serial_terminal")
+ MCFG_DEVICE_CARD_DEVICE_INPUT_DEFAULTS("serial_terminal", terminal)
+ MCFG_RS232_PORT_ADD(RS232_B_TAG, rs232b_intf, default_rs232_devices, NULL)
+ MCFG_RS232_PORT_ADD(RS232_C_TAG, rs232c_intf, default_rs232_devices, NULL)
+ MCFG_UPD1990A_ADD(UPD1990C_TAG, XTAL_32_768kHz, NULL, DEVWRITELINE(DEVICE_SELF, s100_wunderbus_device, rtc_tp_w))
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor s100_wunderbus_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( s100_wunderbus );
+}
+
+
+//-------------------------------------------------
+// INPUT_PORTS( wunderbus )
+//-------------------------------------------------
+
+static INPUT_PORTS_START( wunderbus )
+ PORT_START("7C")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("7C:1")
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x3e, 0x12, "BASE Port Address" ) PORT_DIPLOCATION("7C:2,3,4,5,6")
+ PORT_DIPSETTING( 0x00, "00H" )
+ PORT_DIPSETTING( 0x02, "08H" )
+ PORT_DIPSETTING( 0x04, "10H" )
+ PORT_DIPSETTING( 0x06, "18H" )
+ PORT_DIPSETTING( 0x08, "20H" )
+ PORT_DIPSETTING( 0x0a, "28H" )
+ PORT_DIPSETTING( 0x0c, "30H" )
+ PORT_DIPSETTING( 0x0e, "38H" )
+ PORT_DIPSETTING( 0x10, "40H" )
+ PORT_DIPSETTING( 0x12, "48H" )
+ PORT_DIPSETTING( 0x14, "50H" )
+ PORT_DIPSETTING( 0x16, "58H" )
+ PORT_DIPSETTING( 0x18, "60H" )
+ PORT_DIPSETTING( 0x1a, "68H" )
+ PORT_DIPSETTING( 0x1c, "70H" )
+ PORT_DIPSETTING( 0x1e, "78H" )
+ PORT_DIPSETTING( 0x20, "80H" )
+ PORT_DIPSETTING( 0x22, "88H" )
+ PORT_DIPSETTING( 0x24, "90H" )
+ PORT_DIPSETTING( 0x26, "98H" )
+ PORT_DIPSETTING( 0x28, "A0H" )
+ PORT_DIPSETTING( 0x2a, "A8H" )
+ PORT_DIPSETTING( 0x2c, "B0H" )
+ PORT_DIPSETTING( 0x2e, "B8H" )
+ PORT_DIPSETTING( 0x30, "C0H" )
+ PORT_DIPSETTING( 0x32, "C8H" )
+ PORT_DIPSETTING( 0x34, "D0H" )
+ PORT_DIPSETTING( 0x36, "D8H" )
+ PORT_DIPSETTING( 0x38, "E0H" )
+ PORT_DIPSETTING( 0x3a, "E8H" )
+ PORT_DIPSETTING( 0x3c, "F0H" )
+ PORT_DIPSETTING( 0x3e, "F8H" )
+ PORT_DIPNAME( 0x40, 0x40, "FLAG2 Polarity" ) PORT_DIPLOCATION("7C:7")
+ PORT_DIPSETTING( 0x40, "Negative" )
+ PORT_DIPSETTING( 0x00, "Positive" )
+ PORT_DIPNAME( 0x80, 0x80, "FLAG1 Polarity" ) PORT_DIPLOCATION("7C:8")
+ PORT_DIPSETTING( 0x80, "Negative" )
+ PORT_DIPSETTING( 0x00, "Positive" )
+
+ PORT_START("10A")
+ PORT_DIPNAME( 0x07, 0x00, "Baud Rate" ) PORT_DIPLOCATION("10A:1,2,3")
+ PORT_DIPSETTING( 0x00, "Automatic" )
+ PORT_DIPSETTING( 0x01, "19200" )
+ PORT_DIPSETTING( 0x02, "9600" )
+ PORT_DIPSETTING( 0x03, "4800" )
+ PORT_DIPSETTING( 0x04, "2400" )
+ PORT_DIPSETTING( 0x05, "1200" )
+ PORT_DIPSETTING( 0x06, "300" )
+ PORT_DIPSETTING( 0x07, "110" )
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("10A:4")
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) ) PORT_DIPLOCATION("10A:5")
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("10A:6")
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("10A:7")
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("10A:8")
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+INPUT_PORTS_END
+
+
+//-------------------------------------------------
+// input_ports - device-specific input ports
+//-------------------------------------------------
+
+ioport_constructor s100_wunderbus_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( wunderbus );
+}
+
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// s100_wunderbus_device - constructor
+//-------------------------------------------------
+
+s100_wunderbus_device::s100_wunderbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, S100_WUNDERBUS, "Wunderbus I/O", tag, owner, clock, "s100_wunderbus", __FILE__),
+ device_s100_card_interface(mconfig, *this),
+ m_pic(*this, I8259A_TAG),
+ m_ace1(*this, INS8250_1_TAG),
+ m_ace2(*this, INS8250_2_TAG),
+ m_ace3(*this, INS8250_3_TAG),
+ m_rtc(*this, UPD1990C_TAG),
+ m_7c(*this, "7C"),
+ m_10a(*this, "10A")
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void s100_wunderbus_device::device_start()
+{
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void s100_wunderbus_device::device_reset()
+{
+}
+
+
+//-------------------------------------------------
+// s100_vi0_w - vectored interrupt 0
+//-------------------------------------------------
+
+void s100_wunderbus_device::s100_vi0_w(int state)
+{
+ m_pic->ir0_w(state);
+}
+
+
+//-------------------------------------------------
+// s100_vi1_w - vectored interrupt 1
+//-------------------------------------------------
+
+void s100_wunderbus_device::s100_vi1_w(int state)
+{
+ m_pic->ir1_w(state);
+}
+
+
+//-------------------------------------------------
+// s100_vi2_w - vectored interrupt 2
+//-------------------------------------------------
+
+void s100_wunderbus_device::s100_vi2_w(int state)
+{
+ m_pic->ir2_w(state);
+}
+
+
+//-------------------------------------------------
+// s100_sinp_r - I/O read
+//-------------------------------------------------
+
+UINT8 s100_wunderbus_device::s100_sinp_r(address_space &space, offs_t offset)
+{
+ UINT8 address = (m_7c->read() & 0x3e) << 2;
+ if ((offset & 0xf8) != address) return 0;
+
+ UINT8 data = 0;
+
+ if ((offset & 0x07) < 7)
+ {
+ switch (m_group)
+ {
+ case 0:
+ switch (offset & 0x07)
+ {
+ case 0: // DAISY 0 IN (STATUS)
+ /*
+
+ bit description
+
+ 0 End of Ribbon
+ 1 Paper Out
+ 2 Cover Open
+ 3 Paper Feed Ready
+ 4 Carriage Ready
+ 5 Print Wheel Ready
+ 6 Check
+ 7 Printer Ready
+
+ */
+ break;
+
+ case 1: // Switch/Parallel port flags
+ /*
+
+ bit description
+
+ 0 FLAG1
+ 1 FLAG2
+ 2 10A S6
+ 3 10A S5
+ 4 10A S4
+ 5 10A S3
+ 6 10A S2
+ 7 10A S1
+
+ */
+
+ data = BITSWAP8(m_10a->read(),0,1,2,3,4,5,6,7) & 0xfc;
+ break;
+
+ case 2: // R.T. Clock IN/RESET CLK. Int.
+ /*
+
+ bit description
+
+ 0 1990 Data Out
+ 1 1990 TP
+ 2
+ 3
+ 4
+ 5
+ 6
+ 7
+
+ */
+
+ data |= m_rtc->data_out_r();
+ data |= m_rtc->tp_r() << 1;
+
+ // reset clock interrupt
+ m_rtc_tp = 0;
+ m_pic->ir7_w(m_rtc_tp);
+ break;
+
+ case 3: // Parallel data IN
+ break;
+
+ case 4: // 8259 0 register
+ case 5: // 8259 1 register
+ data = m_pic->read(space, offset & 0x01);
+ break;
+
+ case 6: // not used
+ break;
+ }
+ break;
+
+ case 1:
+ data = m_ace1->ins8250_r(space, offset & 0x07);
+ break;
+
+ case 2:
+ data = m_ace2->ins8250_r(space, offset & 0x07);
+ break;
+
+ case 3:
+ data = m_ace3->ins8250_r(space, offset & 0x07);
+ break;
+ }
+ }
+
+ return data;
+}
+
+
+//-------------------------------------------------
+// s100_sout_w - I/O write
+//-------------------------------------------------
+
+void s100_wunderbus_device::s100_sout_w(address_space &space, offs_t offset, UINT8 data)
+{
+ UINT8 address = (m_7c->read() & 0x3e) << 2;
+ if ((offset & 0xf8) != address) return;
+
+ if ((offset & 0x07) == 7)
+ {
+ m_group = data & 0x03;
+ }
+ else
+ {
+ switch (m_group)
+ {
+ case 0:
+ switch (offset & 0x07)
+ {
+ case 0: // DAISY 0 OUT
+ /*
+
+ bit description
+
+ 0 Data Bit 9
+ 1 Data Bit 10
+ 2 Data Bit 11
+ 3 Data Bit 12
+ 4 Paper Feed Strobe
+ 5 Carriage Strobe
+ 6 Print Wheel Strobe
+ 7 Restore
+
+ */
+ break;
+
+ case 1: // DAISY 1 OUT
+ /*
+
+ bit description
+
+ 0 Data Bit 1
+ 1 Data Bit 2
+ 2 Data Bit 3
+ 3 Data Bit 4
+ 4 Data Bit 5
+ 5 Data Bit 6
+ 6 Data Bit 7
+ 7 Data Bit 8
+
+ */
+ break;
+
+ case 2: // R.T. Clock OUT
+ /*
+
+ bit description
+
+ 0 1990 Data In
+ 1 1990 Clk
+ 2 1990 C0
+ 3 1990 C1
+ 4 1990 C2
+ 5 1990 STB
+ 6 Ribbon Lift
+ 7 Select
+
+ */
+
+ m_rtc->data_in_w(BIT(data, 0));
+ m_rtc->clk_w(BIT(data, 1));
+ m_rtc->c0_w(BIT(data, 2));
+ m_rtc->c1_w(BIT(data, 3));
+ m_rtc->c2_w(BIT(data, 4));
+ m_rtc->stb_w(BIT(data, 5));
+ break;
+
+ case 3: // Par. data OUT
+ break;
+
+ case 4: // 8259 0 register
+ case 5: // 8259 1 register
+ m_pic->write(space, offset & 0x01, data);
+ break;
+
+ case 6: // Par. port cntrl.
+ /*
+
+ bit description
+
+ 0 POE
+ 1 _RST1
+ 2 _RST2
+ 3 _ATTN1
+ 4 _ATTN2
+ 5
+ 6
+ 7
+
+ */
+ break;
+ }
+ break;
+
+ case 1:
+ m_ace1->ins8250_w(space, offset & 0x07, data);
+ break;
+
+ case 2:
+ m_ace2->ins8250_w(space, offset & 0x07, data);
+ break;
+
+ case 3:
+ m_ace3->ins8250_w(space, offset & 0x07, data);
+ break;
+ }
+ }
+}
diff --git a/src/emu/bus/s100/wunderbus.h b/src/emu/bus/s100/wunderbus.h
new file mode 100644
index 00000000000..bb8adcc25bc
--- /dev/null
+++ b/src/emu/bus/s100/wunderbus.h
@@ -0,0 +1,77 @@
+// license:BSD-3-Clause
+// copyright-holders:Curt Coder
+/**********************************************************************
+
+ Morrow Designs Wunderbus I/O card emulation
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __S100_WUNDERBUS__
+#define __S100_WUNDERBUS__
+
+#include "emu.h"
+#include "s100.h"
+#include "machine/ins8250.h"
+#include "machine/pic8259.h"
+#include "machine/serial.h"
+#include "machine/upd1990a.h"
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> s100_wunderbus_device
+
+class s100_wunderbus_device : public device_t,
+ public device_s100_card_interface
+{
+public:
+ // construction/destruction
+ s100_wunderbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const;
+ virtual ioport_constructor device_input_ports() const;
+
+ // not really public
+ DECLARE_WRITE_LINE_MEMBER( pic_int_w );
+ DECLARE_WRITE_LINE_MEMBER( rtc_tp_w );
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+ // device_s100_card_interface overrides
+ virtual void s100_vi0_w(int state);
+ virtual void s100_vi1_w(int state);
+ virtual void s100_vi2_w(int state);
+ virtual UINT8 s100_sinp_r(address_space &space, offs_t offset);
+ virtual void s100_sout_w(address_space &space, offs_t offset, UINT8 data);
+
+private:
+ required_device<pic8259_device> m_pic;
+ required_device<ins8250_device> m_ace1;
+ required_device<ins8250_device> m_ace2;
+ required_device<ins8250_device> m_ace3;
+ required_device<upd1990a_device> m_rtc;
+ required_ioport m_7c;
+ required_ioport m_10a;
+
+ UINT8 m_group;
+ int m_rtc_tp;
+};
+
+
+// device type definition
+extern const device_type S100_WUNDERBUS;
+
+
+#endif