diff options
author | 2015-04-10 10:20:17 +0300 | |
---|---|---|
committer | 2015-04-10 10:20:26 +0300 | |
commit | a43d6473decb379b5b6f28ab36e71e4a61192385 (patch) | |
tree | 33e39da77fae2ae7a126fee6ff889d59afdbd4f8 /src/emu/bus/ieee488 | |
parent | 3d71f6ab194be6c5d42ddd9c39445e15183297c4 (diff) |
(MESS) pet: Refactored the Commodore 8050/8250/SFD-1001 to use the new floppy system. [Curt Coder]
Diffstat (limited to 'src/emu/bus/ieee488')
-rw-r--r-- | src/emu/bus/ieee488/c2040fdc.c | 11 | ||||
-rw-r--r-- | src/emu/bus/ieee488/c8050.c | 795 | ||||
-rw-r--r-- | src/emu/bus/ieee488/c8050.h | 97 | ||||
-rw-r--r-- | src/emu/bus/ieee488/c8050fdc.c | 102 | ||||
-rw-r--r-- | src/emu/bus/ieee488/c8050fdc.h | 24 |
5 files changed, 315 insertions, 714 deletions
diff --git a/src/emu/bus/ieee488/c2040fdc.c b/src/emu/bus/ieee488/c2040fdc.c index 11624de8387..e709f9026db 100644 --- a/src/emu/bus/ieee488/c2040fdc.c +++ b/src/emu/bus/ieee488/c2040fdc.c @@ -9,6 +9,15 @@ **********************************************************************/ +/* + + TODO: + + - write protect + - separate read/write methods + +*/ + #include "c2040fdc.h" @@ -310,7 +319,7 @@ void c2040_fdc_t::live_run(const attotime &limit) !(BIT(cur_live.cell_counter, 3) || BIT(cur_live.cell_counter, 2)), cur_live.shift_reg, cur_live.rw_sel, cur_live.mode_sel); // write bit - if (!cur_live.rw_sel) { + if (!cur_live.rw_sel) { // TODO WPS write_next_bit(BIT(cur_live.shift_reg_write, 9), limit); } diff --git a/src/emu/bus/ieee488/c8050.c b/src/emu/bus/ieee488/c8050.c index 973cb4708af..98a21743a5e 100644 --- a/src/emu/bus/ieee488/c8050.c +++ b/src/emu/bus/ieee488/c8050.c @@ -36,10 +36,10 @@ #define M6502_TAG "un1" #define M6532_0_TAG "uc1" #define M6532_1_TAG "ue1" - #define M6504_TAG "uh3" #define M6522_TAG "um3" #define M6530_TAG "uk3" +#define FDC_TAG "fdc" enum @@ -51,13 +51,6 @@ enum }; -#define SYNC \ - (!(((m_sr & G64_SYNC_MARK) == G64_SYNC_MARK) & m_rw)) - -#define ERROR \ - (!(m_ready | BIT(m_e, 3))) - - //************************************************************************** // DEVICE DEFINITIONS @@ -104,7 +97,7 @@ ROM_START( c8050 ) // schematic 8050001 ROMX_LOAD( "901887-01.ul1", 0x0000, 0x2000, CRC(0073b8b2) SHA1(b10603195f240118fe5fb6c6dfe5c5097463d890), ROM_BIOS(4) ) ROMX_LOAD( "901888-01.uh1", 0x2000, 0x2000, CRC(de9b6132) SHA1(2e6c2d7ca934e5c550ad14bd5e9e7749686b7af4), ROM_BIOS(4) ) - ROM_REGION( 0x400, M6504_TAG, 0 ) + ROM_REGION( 0x400, M6530_TAG, 0 ) ROM_LOAD_OPTIONAL( "901483-02.uk3", 0x000, 0x400, CRC(d7277f95) SHA1(7607f9357f3a08f2a9f20931058d60d9e3c17d39) ) // 6530-036 ROM_LOAD_OPTIONAL( "901483-03.uk3", 0x000, 0x400, CRC(9e83fa70) SHA1(e367ea8a5ddbd47f13570088427293138a10784b) ) // 6530-038 RIOT DOS 2.5 Micropolis ROM_LOAD_OPTIONAL( "901483-04.uk3", 0x000, 0x400, CRC(ae1c7866) SHA1(13bdf0bb387159167534c07a4554964734373f11) ) // 6530-039 RIOT DOS 2.5 Tandon @@ -112,9 +105,6 @@ ROM_START( c8050 ) // schematic 8050001 ROM_LOAD_OPTIONAL( "901885-01.uk3", 0x000, 0x400, NO_DUMP ) // 6530-044 ROM_LOAD_OPTIONAL( "901885-04.uk3", 0x000, 0x400, CRC(bab998c9) SHA1(0dc9a3b60f1b866c63eebd882403532fc59fe57f) ) // 6530-47 RIOT DOS 2.7 Micropolis ROM_LOAD( "901869-01.uk3", 0x000, 0x400, CRC(2915327a) SHA1(3a9a80f72ce76e5f5c72513f8ef7553212912ae3) ) // 6530-48 RIOT DOS 2.7 MPI - - ROM_REGION( 0x800, "gcr", 0) - ROM_LOAD( "901467.uk6", 0x000, 0x800, CRC(a23337eb) SHA1(97df576397608455616331f8e837cb3404363fa2) ) ROM_END @@ -149,9 +139,6 @@ ROM_START( c8250lp ) ROMX_LOAD( "251474-01b", 0x000, 0x400, CRC(9e9a9f90) SHA1(39498d7369a31ea7527b5044071acf35a84ea2ac), ROM_BIOS(1) ) // Matsushita ROMX_LOAD( "fdc-2.7b.bin", 0x000, 0x800, CRC(13a24482) SHA1(1cfa52d2ed245a95e6369b46a36c6c7aa3929931), ROM_BIOS(2) ) // CBM DOS 2.7B FDC ROM from the 8250LP inside 8296D ROMX_LOAD( "speeddos-fdc-f800.bin", 0x000, 0x800, CRC(253e760f) SHA1(3f7892a9bab84b633f45686bbbbe66bc2948c8e5), ROM_BIOS(3) ) - - ROM_REGION( 0x800, "gcr", 0) - ROM_LOAD( "251167-01.uc1", 0x000, 0x800, BAD_DUMP CRC(a23337eb) SHA1(97df576397608455616331f8e837cb3404363fa2) ) ROM_END @@ -174,8 +161,10 @@ ROM_START( sfd1001 ) // schematic 251406 ROM_LOAD( "901887-01.1j", 0x0000, 0x2000, CRC(0073b8b2) SHA1(b10603195f240118fe5fb6c6dfe5c5097463d890) ) ROM_LOAD( "901888-01.3j", 0x2000, 0x2000, CRC(de9b6132) SHA1(2e6c2d7ca934e5c550ad14bd5e9e7749686b7af4) ) - ROM_REGION( 0x800, M6504_TAG, 0 ) + ROM_REGION( 0x400, M6530_TAG, 0 ) ROM_LOAD( "901885-04.u1", 0x000, 0x400, CRC(bab998c9) SHA1(0dc9a3b60f1b866c63eebd882403532fc59fe57f) ) + + ROM_REGION( 0x800, M6504_TAG, 0 ) ROM_LOAD( "251257-02a.u2", 0x000, 0x800, CRC(b51150de) SHA1(3b954eb34f7ea088eed1d33ebc6d6e83a3e9be15) ) ROM_REGION( 0x800, "gcr", 0) @@ -216,14 +205,14 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( c8050_fdc_mem, AS_PROGRAM, 8, c8050_device ) ADDRESS_MAP_GLOBAL_MASK(0x1fff) - AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_RAM // 6530 - AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6522_TAG, via6522_device, read, write) - AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6530_TAG, mos6530_device, read, write) + AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_DEVICE(M6530_TAG, mos6530_t, ram_map) + AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVICE(M6522_TAG, via6522_device, map) + AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVICE(M6530_TAG, mos6530_t, io_map) AM_RANGE(0x0400, 0x07ff) AM_RAM AM_SHARE("share1") AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("share2") AM_RANGE(0x0c00, 0x0fff) AM_RAM AM_SHARE("share3") AM_RANGE(0x1000, 0x13ff) AM_RAM AM_SHARE("share4") - AM_RANGE(0x1c00, 0x1fff) AM_ROM AM_REGION(M6504_TAG, 0) + AM_RANGE(0x1c00, 0x1fff) AM_DEVICE(M6530_TAG, mos6530_t, rom_map) ADDRESS_MAP_END @@ -233,9 +222,9 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( c8250lp_fdc_mem, AS_PROGRAM, 8, c8050_device ) ADDRESS_MAP_GLOBAL_MASK(0x1fff) - AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_RAM // 6530 - AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6522_TAG, via6522_device, read, write) - AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6530_TAG, mos6530_device, read, write) + AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_DEVICE(M6530_TAG, mos6530_t, ram_map) + AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVICE(M6522_TAG, via6522_device, map) + AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVICE(M6530_TAG, mos6530_t, io_map) AM_RANGE(0x0400, 0x07ff) AM_RAM AM_SHARE("share1") AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("share2") AM_RANGE(0x0c00, 0x0fff) AM_RAM AM_SHARE("share3") @@ -250,9 +239,9 @@ ADDRESS_MAP_END static ADDRESS_MAP_START( sfd1001_fdc_mem, AS_PROGRAM, 8, c8050_device ) ADDRESS_MAP_GLOBAL_MASK(0x1fff) - AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_RAM // 6530 - AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6522_TAG, via6522_device, read, write) - AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVREADWRITE(M6530_TAG, mos6530_device, read, write) + AM_RANGE(0x0000, 0x003f) AM_MIRROR(0x0300) AM_DEVICE(M6530_TAG, mos6530_t, ram_map) + AM_RANGE(0x0040, 0x004f) AM_MIRROR(0x0330) AM_DEVICE(M6522_TAG, via6522_device, map) + AM_RANGE(0x0080, 0x008f) AM_MIRROR(0x0330) AM_DEVICE(M6530_TAG, mos6530_t, io_map) AM_RANGE(0x0400, 0x07ff) AM_RAM AM_SHARE("share1") AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("share2") AM_RANGE(0x0c00, 0x0fff) AM_RAM AM_SHARE("share3") @@ -433,71 +422,6 @@ WRITE8_MEMBER( c8050_device::riot1_pb_w ) output_set_led_value(LED_ERR, BIT(data, 5)); } - -READ8_MEMBER( c8050_device::via_pa_r ) -{ - /* - - bit description - - PA0 E0 - PA1 E1 - PA2 I2 - PA3 E2 - PA4 E4 - PA5 E5 - PA6 I7 - PA7 E6 - - */ - - return (BIT(m_e, 6) << 7) | (BIT(m_i, 7) << 6) | (m_e & 0x33) | (BIT(m_e, 2) << 3) | (m_i & 0x04); -} - -WRITE_LINE_MEMBER( c8050_device::mode_sel_w ) -{ - // mode select - m_mode = state; - - update_gcr_data(); - m_via->write_cb1(ERROR); -} - -WRITE_LINE_MEMBER( c8050_device::rw_sel_w ) -{ - // read/write select - m_rw = state; - - update_gcr_data(); - m_via->write_cb1(ERROR); -} - - -READ8_MEMBER( c8050_device::via_pb_r ) -{ - /* - - bit description - - PB0 S1A - PB1 S1B - PB2 S0A - PB3 S0B - PB4 MTR1 - PB5 MTR0 - PB6 PULL SYNC - PB7 SYNC - - */ - - UINT8 data = 0; - - // SYNC detected - data |= SYNC << 7; - - return data; -} - WRITE8_MEMBER( c8050_device::via_pb_w ) { /* @@ -511,195 +435,82 @@ WRITE8_MEMBER( c8050_device::via_pb_w ) PB4 MTR1 PB5 MTR0 PB6 PULL SYNC - PB7 SYNC + PB7 */ // spindle motor 1 - int mtr1 = BIT(data, 4); - spindle_motor(1, mtr1); + m_fdc->mtr1_w(BIT(data, 4)); // spindle motor 0 - int mtr0 = BIT(data, 5); - spindle_motor(0, mtr0); + m_fdc->mtr0_w(BIT(data, 5)); // stepper motor 1 - int s1 = data & 0x03; - mpi_step_motor(1, s1); + m_fdc->stp1_w(data & 0x03); // stepper motor 0 - int s0 = (data >> 2) & 0x03; - mpi_step_motor(0, s0); + m_fdc->stp0_w((data >> 2) & 0x03); - m_bit_timer->enable(!mtr1 || !mtr0); + // PLL sync + m_fdc->pull_sync_w(!BIT(data, 6)); } //------------------------------------------------- -// mos6530 uk3 +// SLOT_INTERFACE( c8050_floppies ) //------------------------------------------------- -READ8_MEMBER( c8050_device::pi_r ) -{ - /* +static SLOT_INTERFACE_START( c8050_floppies ) + SLOT_INTERFACE( "525ssqd", FLOPPY_525_SSQD ) +SLOT_INTERFACE_END - bit description - - PA0 PI0 - PA1 PI1 - PA2 PI2 - PA3 PI3 - PA4 PI4 - PA5 PI5 - PA6 PI6 - PA7 PI7 - */ - - return m_pi; -} - -WRITE8_MEMBER( c8050_device::pi_w ) -{ - /* - - bit description - - PA0 PI0 - PA1 PI1 - PA2 PI2 - PA3 PI3 - PA4 PI4 - PA5 PI5 - PA6 PI6 - PA7 PI7 - - */ - - m_pi = data; -} - -READ8_MEMBER( c8050_device::miot_pb_r ) -{ - /* - - bit description - - PB0 DRV SEL - PB1 DS0 - PB2 DS1 - PB3 WPS - PB4 DRIVE TYPE (0=2A, 1=2C) - PB5 - PB6 (0=DS, 1=SS) - PB7 M6504 IRQ - - */ - - UINT8 data = 0; - - // write protect sense - data |= m_unit[m_drive].m_image->floppy_wpt_r() << 3; - - // drive type - data |= 0x10; - - // single/dual sided - if (!m_double_sided) - { - data |= 0x40; - } - - return data; -} - -WRITE8_MEMBER( c8050_device::miot_pb_w ) -{ - /* - - bit description - - PB0 DRV SEL - PB1 DS0 - PB2 DS1 - PB3 WPS - PB4 ODD HD (0=78-154, 1=1-77) - PB5 - PB6 (0=DS, 1=SS) - PB7 M6504 IRQ - - */ - - // drive select - if (m_image1) - { - m_drive = BIT(data, 0); - } - - // density select - int ds = (data >> 1) & 0x03; - - if (m_ds != ds) - { - m_bit_timer->adjust(attotime::zero, 0, attotime::from_hz(C8050_BITRATE[ds])); - m_ds = ds; - } +//------------------------------------------------- +// FLOPPY_FORMATS( floppy_formats ) +//------------------------------------------------- - // side select - if (m_double_sided) - { - m_side = !BIT(data, 4); - } +FLOPPY_FORMATS_MEMBER( c8050_device::floppy_formats ) + FLOPPY_D80_FORMAT +FLOPPY_FORMATS_END - // interrupt - if (m_miot_irq != BIT(data, 7)) - { - m_fdccpu->set_input_line(M6502_IRQ_LINE, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE); - m_miot_irq = BIT(data, 7); - } -} //------------------------------------------------- -// LEGACY_FLOPPY_OPTIONS( c8050 ) +// SLOT_INTERFACE( c8250_floppies ) //------------------------------------------------- -static LEGACY_FLOPPY_OPTIONS_START( c8050 ) - LEGACY_FLOPPY_OPTION( c8050, "d80", "Commodore 8050 Disk Image", d80_dsk_identify, d64_dsk_construct, NULL, NULL ) -LEGACY_FLOPPY_OPTIONS_END +static SLOT_INTERFACE_START( c8250_floppies ) + SLOT_INTERFACE( "525qd", FLOPPY_525_QD ) +SLOT_INTERFACE_END //------------------------------------------------- -// LEGACY_FLOPPY_OPTIONS( c8250 ) +// FLOPPY_FORMATS( floppy_formats ) //------------------------------------------------- -static LEGACY_FLOPPY_OPTIONS_START( c8250 ) - LEGACY_FLOPPY_OPTION( c8250, "d80", "Commodore 8050 Disk Image", d80_dsk_identify, d64_dsk_construct, NULL, NULL ) - LEGACY_FLOPPY_OPTION( c8250, "d82", "Commodore 8250/SFD1001 Disk Image", d82_dsk_identify, d64_dsk_construct, NULL, NULL ) -LEGACY_FLOPPY_OPTIONS_END +FLOPPY_FORMATS_MEMBER( c8250_device::floppy_formats ) + FLOPPY_D80_FORMAT, + FLOPPY_D82_FORMAT +FLOPPY_FORMATS_END //------------------------------------------------- -// floppy_interface c8050_floppy_interface +// FLOPPY_FORMATS( floppy_formats ) //------------------------------------------------- -static const floppy_interface c8050_floppy_interface = -{ - FLOPPY_STANDARD_5_25_SSDD, - LEGACY_FLOPPY_OPTIONS_NAME(c8050), - "floppy_5_25" -}; +FLOPPY_FORMATS_MEMBER( c8250lp_device::floppy_formats ) + FLOPPY_D80_FORMAT, + FLOPPY_D82_FORMAT +FLOPPY_FORMATS_END //------------------------------------------------- -// floppy_interface c8250_floppy_interface +// FLOPPY_FORMATS( floppy_formats ) //------------------------------------------------- -static const floppy_interface c8250_floppy_interface = -{ - FLOPPY_STANDARD_5_25_DSQD, - LEGACY_FLOPPY_OPTIONS_NAME(c8250), - "floppy_5_25" -}; +FLOPPY_FORMATS_MEMBER( sfd1001_device::floppy_formats ) + FLOPPY_D80_FORMAT, + FLOPPY_D82_FORMAT +FLOPPY_FORMATS_END //------------------------------------------------- @@ -727,19 +538,27 @@ static MACHINE_CONFIG_FRAGMENT( c8050 ) MCFG_CPU_PROGRAM_MAP(c8050_fdc_mem) MCFG_DEVICE_ADD(M6522_TAG, VIA6522, XTAL_12MHz/12) - MCFG_VIA6522_READPA_HANDLER(READ8(c8050_device, via_pa_r)) - MCFG_VIA6522_READPB_HANDLER(READ8(c8050_device, via_pb_r)) + MCFG_VIA6522_READPA_HANDLER(DEVREAD8(FDC_TAG, c8050_fdc_t, read)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(c8050_device, via_pb_w)) - MCFG_VIA6522_CA2_HANDLER(WRITELINE(c8050_device, mode_sel_w)) - MCFG_VIA6522_CB2_HANDLER(WRITELINE(c8050_device, rw_sel_w)) - - MCFG_DEVICE_ADD(M6530_TAG, MOS6530, XTAL_12MHz/12) - MCFG_MOS6530_IN_PA_CB(READ8(c8050_device, pi_r)) - MCFG_MOS6530_OUT_PA_CB(WRITE8(c8050_device, pi_w)) - MCFG_MOS6530_IN_PB_CB(READ8(c8050_device, miot_pb_r)) - MCFG_MOS6530_OUT_PB_CB(WRITE8(c8050_device, miot_pb_w)) - - MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(c8050_floppy_interface) + MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, mode_sel_w)) + MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w)) + + MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12) + MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE)) + MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write)) + MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, drv_sel_w)) + MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w)) + MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds1_w)) + MCFG_MOS6530n_IN_PB6_CB(VCC) // SINGLE SIDED + + MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2) + MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7)) + MCFG_C8050_READY_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_ca1)) + MCFG_C8050_BRDY_CALLBACK(INPUTLINE(M6504_TAG, M6502_SET_OVERFLOW)) MCFG_DEVCB_XOR(1) + MCFG_C8050_ERROR_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_cb1)) + MCFG_C8050_WPS_CALLBACK(DEVWRITELINE(M6530_TAG, mos6530_t, pb3_w)) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":0", c8050_floppies, "525ssqd", c8050_device::floppy_formats) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":1", c8050_floppies, "525ssqd", c8050_device::floppy_formats) MACHINE_CONFIG_END @@ -779,19 +598,28 @@ static MACHINE_CONFIG_FRAGMENT( c8250 ) MCFG_CPU_PROGRAM_MAP(c8050_fdc_mem) MCFG_DEVICE_ADD(M6522_TAG, VIA6522, XTAL_12MHz/12) - MCFG_VIA6522_READPA_HANDLER(READ8(c8050_device, via_pa_r)) - MCFG_VIA6522_READPB_HANDLER(READ8(c8050_device, via_pb_r)) + MCFG_VIA6522_READPA_HANDLER(DEVREAD8(FDC_TAG, c8050_fdc_t, read)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(c8050_device, via_pb_w)) - MCFG_VIA6522_CA2_HANDLER(WRITELINE(c8050_device, mode_sel_w)) - MCFG_VIA6522_CB2_HANDLER(WRITELINE(c8050_device, rw_sel_w)) - - MCFG_DEVICE_ADD(M6530_TAG, MOS6530, XTAL_12MHz/12) - MCFG_MOS6530_IN_PA_CB(READ8(c8050_device, pi_r)) - MCFG_MOS6530_OUT_PA_CB(WRITE8(c8050_device, pi_w)) - MCFG_MOS6530_IN_PB_CB(READ8(c8050_device, miot_pb_r)) - MCFG_MOS6530_OUT_PB_CB(WRITE8(c8050_device, miot_pb_w)) - - MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(c8250_floppy_interface) + MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, mode_sel_w)) + MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w)) + + MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12) + MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE)) + MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write)) + MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, drv_sel_w)) + MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w)) + MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds1_w)) + MCFG_MOS6530n_OUT_PB4_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, odd_hd_w)) + MCFG_MOS6530n_IN_PB6_CB(GND) // DOUBLE SIDED + + MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2) + MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7)) + MCFG_C8050_READY_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_ca1)) + MCFG_C8050_BRDY_CALLBACK(INPUTLINE(M6504_TAG, M6502_SET_OVERFLOW)) MCFG_DEVCB_XOR(1) + MCFG_C8050_ERROR_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_cb1)) + MCFG_C8050_WPS_CALLBACK(DEVWRITELINE(M6530_TAG, mos6530_t, pb3_w)) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":0", c8250_floppies, "525qd", c8250_device::floppy_formats) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":1", c8250_floppies, "525qd", c8250_device::floppy_formats) MACHINE_CONFIG_END @@ -831,19 +659,28 @@ static MACHINE_CONFIG_FRAGMENT( c8250lp ) MCFG_CPU_PROGRAM_MAP(c8250lp_fdc_mem) MCFG_DEVICE_ADD(M6522_TAG, VIA6522, XTAL_12MHz/12) - MCFG_VIA6522_READPA_HANDLER(READ8(c8050_device, via_pa_r)) - MCFG_VIA6522_READPB_HANDLER(READ8(c8050_device, via_pb_r)) + MCFG_VIA6522_READPA_HANDLER(DEVREAD8(FDC_TAG, c8050_fdc_t, read)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(c8050_device, via_pb_w)) - MCFG_VIA6522_CA2_HANDLER(WRITELINE(c8050_device, mode_sel_w)) - MCFG_VIA6522_CB2_HANDLER(WRITELINE(c8050_device, rw_sel_w)) - - MCFG_DEVICE_ADD(M6530_TAG, MOS6530, XTAL_12MHz/12) - MCFG_MOS6530_IN_PA_CB(READ8(c8050_device, pi_r)) - MCFG_MOS6530_OUT_PA_CB(WRITE8(c8050_device, pi_w)) - MCFG_MOS6530_IN_PB_CB(READ8(c8050_device, miot_pb_r)) - MCFG_MOS6530_OUT_PB_CB(WRITE8(c8050_device, miot_pb_w)) - - MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(c8250_floppy_interface) + MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, mode_sel_w)) + MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w)) + + MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12) + MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE)) + MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write)) + MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, drv_sel_w)) + MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w)) + MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds1_w)) + MCFG_MOS6530n_OUT_PB4_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, odd_hd_w)) + MCFG_MOS6530n_IN_PB6_CB(GND) // DOUBLE SIDED + + MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2) + MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7)) + MCFG_C8050_READY_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_ca1)) + MCFG_C8050_BRDY_CALLBACK(INPUTLINE(M6504_TAG, M6502_SET_OVERFLOW)) MCFG_DEVCB_XOR(1) + MCFG_C8050_ERROR_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_cb1)) + MCFG_C8050_WPS_CALLBACK(DEVWRITELINE(M6530_TAG, mos6530_t, pb3_w)) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":0", c8250_floppies, "525qd", c8250lp_device::floppy_formats) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":1", c8250_floppies, "525qd", c8250lp_device::floppy_formats) MACHINE_CONFIG_END @@ -883,19 +720,28 @@ static MACHINE_CONFIG_FRAGMENT( sfd1001 ) MCFG_CPU_PROGRAM_MAP(sfd1001_fdc_mem) MCFG_DEVICE_ADD(M6522_TAG, VIA6522, XTAL_12MHz/12) - MCFG_VIA6522_READPA_HANDLER(READ8(c8050_device, via_pa_r)) - MCFG_VIA6522_READPB_HANDLER(READ8(c8050_device, via_pb_r)) + MCFG_VIA6522_READPA_HANDLER(DEVREAD8(FDC_TAG, c8050_fdc_t, read)) MCFG_VIA6522_WRITEPB_HANDLER(WRITE8(c8050_device, via_pb_w)) - MCFG_VIA6522_CA2_HANDLER(WRITELINE(c8050_device, mode_sel_w)) - MCFG_VIA6522_CB2_HANDLER(WRITELINE(c8050_device, rw_sel_w)) - - MCFG_DEVICE_ADD(M6530_TAG, MOS6530, XTAL_12MHz/12) - MCFG_MOS6530_IN_PA_CB(READ8(c8050_device, pi_r)) - MCFG_MOS6530_OUT_PA_CB(WRITE8(c8050_device, pi_w)) - MCFG_MOS6530_IN_PB_CB(READ8(c8050_device, miot_pb_r)) - MCFG_MOS6530_OUT_PB_CB(WRITE8(c8050_device, miot_pb_w)) - - MCFG_LEGACY_FLOPPY_DRIVE_ADD(FLOPPY_0, c8250_floppy_interface) + MCFG_VIA6522_CA2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, mode_sel_w)) + MCFG_VIA6522_CB2_HANDLER(DEVWRITELINE(FDC_TAG, c8050_fdc_t, rw_sel_w)) + + MCFG_DEVICE_ADD(M6530_TAG, MOS6530n, XTAL_12MHz/12) + MCFG_MOS6530n_IRQ_CB(INPUTLINE(M6504_TAG, M6502_IRQ_LINE)) + MCFG_MOS6530n_OUT_PA_CB(DEVWRITE8(FDC_TAG, c8050_fdc_t, write)) + MCFG_MOS6530n_OUT_PB0_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, drv_sel_w)) + MCFG_MOS6530n_OUT_PB1_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds0_w)) + MCFG_MOS6530n_OUT_PB2_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, ds1_w)) + MCFG_MOS6530n_OUT_PB4_CB(DEVWRITELINE(FDC_TAG, c8050_fdc_t, odd_hd_w)) + MCFG_MOS6530n_IN_PB6_CB(GND) // DOUBLE SIDED + + MCFG_DEVICE_ADD(FDC_TAG, C8050_FDC, XTAL_12MHz/2) + MCFG_C8050_SYNC_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_pb7)) + MCFG_C8050_READY_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_ca1)) + MCFG_C8050_BRDY_CALLBACK(INPUTLINE(M6504_TAG, M6502_SET_OVERFLOW)) MCFG_DEVCB_XOR(1) + MCFG_C8050_ERROR_CALLBACK(DEVWRITELINE(M6522_TAG, via6522_device, write_cb1)) + MCFG_C8050_WPS_CALLBACK(DEVWRITELINE(M6530_TAG, mos6530_t, pb3_w)) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":0", c8250_floppies, "525qd", sfd1001_device::floppy_formats) + MCFG_FLOPPY_DRIVE_ADD(FDC_TAG ":1", c8250_floppies, NULL, sfd1001_device::floppy_formats) MACHINE_CONFIG_END @@ -958,133 +804,6 @@ inline void c8050_device::update_ieee_signals() } -//------------------------------------------------- -// update_gcr_data - -//------------------------------------------------- - -inline void c8050_device::update_gcr_data() -{ - if (m_rw) - { - /* - - bit description - - I0 SR0 - I1 SR1 - I2 SR2 - I3 SR3 - I4 SR4 - I5 SR5 - I6 SR6 - I7 SR7 - I8 SR8 - I9 SR9 - I10 R/_W SEL - - */ - - m_i = (m_rw << 10) | (m_sr & 0x3ff); - } - else - { - /* - - bit description - - I0 PI0 - I1 PI1 - I2 PI2 - I3 PI3 - I4 MODE SEL - I5 PI4 - I6 PI5 - I7 PI6 - I8 PI7 - I9 0 - I10 R/_W SEL - - */ - - m_i = (m_rw << 10) | ((m_pi & 0xf0) << 1) | (m_mode << 4) | (m_pi & 0x0f); - } - - m_e = m_gcr->base()[m_i]; -} - - -//------------------------------------------------- -// read_current_track - -//------------------------------------------------- - -inline void c8050_device::read_current_track(int unit) -{ - m_unit[unit].m_track_len = G64_BUFFER_SIZE; - m_unit[unit].m_buffer_pos = 0; - m_unit[unit].m_bit_pos = 7; - m_bit_count = 0; - - // read track data - m_unit[unit].m_image->floppy_drive_read_track_data_info_buffer(m_side, m_unit[unit].m_track_buffer, &m_unit[unit].m_track_len); - - // extract track length - m_unit[unit].m_track_len = m_unit[unit].m_image->floppy_drive_get_current_track_size(m_side); -} - - -//------------------------------------------------- -// spindle_motor - -//------------------------------------------------- - -inline void c8050_device::spindle_motor(int unit, int mtr) -{ - if (m_unit[unit].m_mtr != mtr) - { - if (!mtr) - { - // read track data - read_current_track(unit); - } - - m_unit[unit].m_image->floppy_mon_w(mtr); - - m_unit[unit].m_mtr = mtr; - } -} - - -//------------------------------------------------- -// mpi_step_motor - -//------------------------------------------------- - -inline void c8050_device::mpi_step_motor(int unit, int stp) -{ - if (!m_unit[unit].m_mtr && (m_unit[unit].m_stp != stp)) - { - int tracks = 0; - - switch (m_unit[unit].m_stp) - { - case 0: if (stp == 1) tracks++; else if (stp == 2) tracks--; break; - case 1: if (stp == 3) tracks++; else if (stp == 0) tracks--; break; - case 2: if (stp == 0) tracks++; else if (stp == 3) tracks--; break; - case 3: if (stp == 2) tracks++; else if (stp == 1) tracks--; break; - } - - if (tracks != 0) - { - // step read/write head - m_unit[unit].m_image->floppy_drive_seek(tracks); - - // read new track data - read_current_track(unit); - } - - m_unit[unit].m_stp = stp; - } -} - - //************************************************************************** // LIVE DEVICE @@ -1094,83 +813,42 @@ inline void c8050_device::mpi_step_motor(int unit, int stp) // c8050_device - constructor //------------------------------------------------- -c8050_device::c8050_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, bool double_sided, const char *shortname, const char *source) - : device_t(mconfig, type, name, tag, owner, clock, shortname, source), - device_ieee488_interface(mconfig, *this), - m_maincpu(*this, M6502_TAG), - m_fdccpu(*this, M6504_TAG), - m_riot0(*this, M6532_0_TAG), - m_riot1(*this, M6532_1_TAG), - m_miot(*this, M6530_TAG), - m_via(*this, M6522_TAG), - m_image0(*this, FLOPPY_0), - m_image1(*this, FLOPPY_1), - m_gcr(*this, "gcr"), - m_address(*this, "ADDRESS"), - m_drive(0), - m_side(0), - m_double_sided(double_sided), - m_rfdo(1), - m_daco(1), - m_atna(1), - m_ifc(0), - m_ds(-1), - m_bit_count(0), - m_sr(0), - m_pi(0), - m_ready(0), - m_mode(0), - m_rw(0), - m_miot_irq(CLEAR_LINE) +c8050_device::c8050_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) : + device_t(mconfig, type, name, tag, owner, clock, shortname, source), + device_ieee488_interface(mconfig, *this), + m_maincpu(*this, M6502_TAG), + m_fdccpu(*this, M6504_TAG), + m_riot0(*this, M6532_0_TAG), + m_riot1(*this, M6532_1_TAG), + m_miot(*this, M6530_TAG), + m_via(*this, M6522_TAG), + m_floppy0(*this, FDC_TAG ":0"), + m_floppy1(*this, FDC_TAG ":1"), + m_fdc(*this, FDC_TAG), + m_address(*this, "ADDRESS"), + m_rfdo(1), + m_daco(1), + m_atna(1) { - for (int i = 0; i < 2; i++) - { - m_unit[i].m_stp = 0; - m_unit[i].m_mtr = 1; - m_unit[i].m_track_len = 0; - m_unit[i].m_buffer_pos = 0; - m_unit[i].m_bit_pos = 0; - memset(m_unit[i].m_track_buffer, 0, sizeof(m_unit[i].m_track_buffer)); - } } -c8050_device::c8050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : device_t(mconfig, C8050, "C8050", tag, owner, clock, "c8050", __FILE__), - device_ieee488_interface(mconfig, *this), - m_maincpu(*this, M6502_TAG), - m_fdccpu(*this, M6504_TAG), - m_riot0(*this, M6532_0_TAG), - m_riot1(*this, M6532_1_TAG), - m_miot(*this, M6530_TAG), - m_via(*this, M6522_TAG), - m_image0(*this, FLOPPY_0), - m_image1(*this, FLOPPY_1), - m_gcr(*this, "gcr"), - m_address(*this, "ADDRESS"), - m_drive(0), - m_side(0), - m_double_sided(false), - m_rfdo(1), - m_daco(1), - m_atna(1), - m_ifc(0), - m_ds(-1), - m_bit_count(0), - m_sr(0), - m_pi(0), - m_ready(0), - m_mode(0), - m_rw(0), - m_miot_irq(CLEAR_LINE) +c8050_device::c8050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + device_t(mconfig, C8050, "C8050", tag, owner, clock, "c8050", __FILE__), + device_ieee488_interface(mconfig, *this), + m_maincpu(*this, M6502_TAG), + m_fdccpu(*this, M6504_TAG), + m_riot0(*this, M6532_0_TAG), + m_riot1(*this, M6532_1_TAG), + m_miot(*this, M6530_TAG), + m_via(*this, M6522_TAG), + m_floppy0(*this, FDC_TAG ":0"), + m_floppy1(*this, FDC_TAG ":1"), + m_fdc(*this, FDC_TAG), + m_address(*this, "ADDRESS"), + m_rfdo(1), + m_daco(1), + m_atna(1) { - for (int i = 0; i < 2; i++) - { - m_unit[i].m_stp = 0; - m_unit[i].m_mtr = 1; - m_unit[i].m_track_len = 0; - m_unit[i].m_buffer_pos = 0; - m_unit[i].m_bit_pos = 0; - } } @@ -1178,24 +856,24 @@ c8050_device::c8050_device(const machine_config &mconfig, const char *tag, devic // c8250_device - constructor //------------------------------------------------- -c8250_device::c8250_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : c8050_device(mconfig, C8250, "C8250", tag, owner, clock, true, "c8250", __FILE__) { } +c8250_device::c8250_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + c8050_device(mconfig, C8250, "C8250", tag, owner, clock, "c8250", __FILE__) { } //------------------------------------------------- // c8250lp_device - constructor //------------------------------------------------- -c8250lp_device::c8250lp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : c8050_device(mconfig, C8250LP, "C8250LP", tag, owner, clock, true, "c8250lp", __FILE__) { } +c8250lp_device::c8250lp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + c8050_device(mconfig, C8250LP, "C8250LP", tag, owner, clock, "c8250lp", __FILE__) { } //------------------------------------------------- // sfd1001_device - constructor //------------------------------------------------- -sfd1001_device::sfd1001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : c8050_device(mconfig, SFD1001, "SFD1001", tag, owner, clock, true, "sfd1001", __FILE__) { } +sfd1001_device::sfd1001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) : + c8050_device(mconfig, SFD1001, "SFD1001", tag, owner, clock, "sfd1001", __FILE__) { } //------------------------------------------------- @@ -1204,50 +882,13 @@ sfd1001_device::sfd1001_device(const machine_config &mconfig, const char *tag, d void c8050_device::device_start() { - m_bit_timer = timer_alloc(); - // install image callbacks - m_unit[0].m_image = m_image0; - - m_image0->floppy_install_load_proc(c8050_device::on_disk0_change); - - if (m_image1) - { - m_unit[1].m_image = m_image1; - - m_image1->floppy_install_load_proc(c8050_device::on_disk1_change); - } + m_fdc->set_floppy(m_floppy0->get_device(), m_floppy1->get_device()); // register for state saving - save_item(NAME(m_drive)); - save_item(NAME(m_side)); save_item(NAME(m_rfdo)); save_item(NAME(m_daco)); save_item(NAME(m_atna)); - save_item(NAME(m_ds)); - save_item(NAME(m_bit_count)); - save_item(NAME(m_sr)); - save_item(NAME(m_pi)); - save_item(NAME(m_i)); - save_item(NAME(m_e)); - save_item(NAME(m_ready)); - save_item(NAME(m_mode)); - save_item(NAME(m_rw)); - save_item(NAME(m_miot_irq)); - save_item(NAME(m_unit[0].m_stp)); - save_item(NAME(m_unit[0].m_mtr)); - save_item(NAME(m_unit[0].m_track_len)); - save_item(NAME(m_unit[0].m_buffer_pos)); - save_item(NAME(m_unit[0].m_bit_pos)); - - if (m_image1) - { - save_item(NAME(m_unit[1].m_stp)); - save_item(NAME(m_unit[1].m_mtr)); - save_item(NAME(m_unit[1].m_track_len)); - save_item(NAME(m_unit[1].m_buffer_pos)); - save_item(NAME(m_unit[1].m_bit_pos)); - } } @@ -1271,74 +912,12 @@ void c8050_device::device_reset() m_via->reset(); // turn off spindle motors - m_unit[0].m_mtr = m_unit[1].m_mtr = 1; + m_fdc->mtr0_w(1); + m_fdc->mtr1_w(1); } //------------------------------------------------- -// device_timer - handler timer events -//------------------------------------------------- - -void c8050_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) -{ - int ready = 1; - - // shift in data from the read head - m_sr <<= 1; - m_sr |= BIT(m_unit[m_drive].m_track_buffer[m_unit[m_drive].m_buffer_pos], m_unit[m_drive].m_bit_pos); - - // update GCR data - update_gcr_data(); - - // update bit counters - m_unit[m_drive].m_bit_pos--; - m_bit_count++; - - if (m_unit[m_drive].m_bit_pos < 0) - { - m_unit[m_drive].m_bit_pos = 7; - m_unit[m_drive].m_buffer_pos++; - - if (m_unit[m_drive].m_buffer_pos >= m_unit[m_drive].m_track_len) - { - // loop to the start of the track - m_unit[m_drive].m_buffer_pos = 0; - } - } - - if (!SYNC) - { - // SYNC detected - m_bit_count = 0; - } - - if (m_bit_count == 10) - { - // byte ready - m_bit_count = 0; - ready = 0; - } - - if (m_ready != ready) - { - // set byte ready flag - m_ready = ready; - - m_via->write_ca1(ready); - m_via->write_cb1(ERROR); - - this->byte_ready(ready); - } -} - -inline void c8050_device::byte_ready(int state) -{ - m_fdccpu->set_input_line(M6502_SET_OVERFLOW, state ? CLEAR_LINE : ASSERT_LINE); -} - - - -//------------------------------------------------- // ieee488_atn - //------------------------------------------------- @@ -1364,27 +943,3 @@ void c8050_device::ieee488_ifc(int state) m_ifc = state; } - - -//------------------------------------------------- -// on_disk0_change - -//------------------------------------------------- - -void c8050_device::on_disk0_change(device_image_interface &image) -{ - c8050_device *c8050 = static_cast<c8050_device *>(image.device().owner()); - - c8050->read_current_track(0); -} - - -//------------------------------------------------- -// on_disk1_change - -//------------------------------------------------- - -void c8050_device::on_disk1_change(device_image_interface &image) -{ - c8050_device *c8050 = static_cast<c8050_device *>(image.device().owner()); - - c8050->read_current_track(1); -} diff --git a/src/emu/bus/ieee488/c8050.h b/src/emu/bus/ieee488/c8050.h index 7f603788bb0..7d2ffdf0275 100644 --- a/src/emu/bus/ieee488/c8050.h +++ b/src/emu/bus/ieee488/c8050.h @@ -16,32 +16,12 @@ #include "emu.h" #include "ieee488.h" +#include "c8050fdc.h" #include "cpu/m6502/m6502.h" #include "cpu/m6502/m6504.h" -#include "imagedev/flopdrv.h" -#include "formats/d64_dsk.h" -#include "formats/g64_dsk.h" #include "machine/6522via.h" #include "machine/6532riot.h" -#include "machine/mos6530.h" - - - -//************************************************************************** -// MACROS / CONSTANTS -//************************************************************************** - -#define G64_BUFFER_SIZE 32768 -#define G64_SYNC_MARK 0x3ff - - -const int C8050_BITRATE[] = -{ - XTAL_12MHz/2/16, /* tracks 1-39 */ - XTAL_12MHz/2/15, /* tracks 40-53 */ - XTAL_12MHz/2/14, /* tracks 54-65 */ - XTAL_12MHz/2/13 /* tracks 65-84 */ -}; +#include "machine/mos6530n.h" @@ -52,11 +32,11 @@ const int C8050_BITRATE[] = // ======================> c8050_device class c8050_device : public device_t, - public device_ieee488_interface + public device_ieee488_interface { public: // construction/destruction - c8050_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, bool double_sided, const char *shortname, const char *source); + c8050_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); c8050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); // optional information overrides @@ -64,96 +44,45 @@ public: virtual machine_config_constructor device_mconfig_additions() const; virtual ioport_constructor device_input_ports() const; - // not really public - static void on_disk0_change(device_image_interface &image); - static void on_disk1_change(device_image_interface &image); - DECLARE_READ8_MEMBER( dio_r ); DECLARE_WRITE8_MEMBER( dio_w ); DECLARE_READ8_MEMBER( riot1_pa_r ); DECLARE_WRITE8_MEMBER( riot1_pa_w ); DECLARE_READ8_MEMBER( riot1_pb_r ); DECLARE_WRITE8_MEMBER( riot1_pb_w ); - DECLARE_READ8_MEMBER( via_pa_r ); - DECLARE_READ8_MEMBER( via_pb_r ); DECLARE_WRITE8_MEMBER( via_pb_w ); - DECLARE_WRITE_LINE_MEMBER( mode_sel_w ); - DECLARE_WRITE_LINE_MEMBER( rw_sel_w ); DECLARE_READ8_MEMBER( pi_r ); DECLARE_WRITE8_MEMBER( pi_w ); - DECLARE_READ8_MEMBER( miot_pb_r ); - DECLARE_WRITE8_MEMBER( miot_pb_w ); + + DECLARE_FLOPPY_FORMATS( floppy_formats ); protected: // device-level overrides virtual void device_start(); virtual void device_reset(); - virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr); // device_ieee488_interface overrides virtual void ieee488_atn(int state); virtual void ieee488_ifc(int state); - inline void byte_ready(int state); inline void update_ieee_signals(); - inline void update_gcr_data(); - inline void read_current_track(int unit); - inline void spindle_motor(int unit, int mtr); - inline void micropolis_step_motor(int unit, int stp); - inline void mpi_step_motor(int unit, int stp); required_device<m6502_device> m_maincpu; required_device<m6504_device> m_fdccpu; required_device<riot6532_device> m_riot0; required_device<riot6532_device> m_riot1; - required_device<mos6530_device> m_miot; + required_device<mos6530_t> m_miot; required_device<via6522_device> m_via; - required_device<legacy_floppy_image_device> m_image0; - optional_device<legacy_floppy_image_device> m_image1; - required_memory_region m_gcr; + required_device<floppy_connector> m_floppy0; + optional_device<floppy_connector> m_floppy1; + required_device<c8050_fdc_t> m_fdc; required_ioport m_address; - struct { - // motors - int m_stp; // stepper motor phase - int m_mtr; // spindle motor on - - // track - UINT8 m_track_buffer[G64_BUFFER_SIZE]; // track data buffer - int m_track_len; // track length - int m_buffer_pos; // byte position within track buffer - int m_bit_pos; // bit position within track buffer byte - - // devices - legacy_floppy_image_device *m_image; - } m_unit[2]; - - int m_drive; // selected drive - int m_side; // selected side - bool m_double_sided; - // IEEE-488 bus int m_rfdo; // not ready for data output int m_daco; // not data accepted output int m_atna; // attention acknowledge int m_ifc; - - // track - int m_ds; // density select - int m_bit_count; // GCR bit counter - UINT16 m_sr; // GCR data shift register - UINT8 m_pi; // parallel data input - UINT16 m_i; // GCR encoder/decoded ROM address - UINT8 m_e; // GCR encoder/decoded ROM data - - // signals - int m_ready; // byte ready - int m_mode; // mode select - int m_rw; // read/write select - int m_miot_irq; // MIOT interrupt - - // timers - emu_timer *m_bit_timer; }; @@ -167,6 +96,8 @@ public: // optional information overrides virtual machine_config_constructor device_mconfig_additions() const; + + DECLARE_FLOPPY_FORMATS( floppy_formats ); }; @@ -181,6 +112,8 @@ public: // optional information overrides virtual const rom_entry *device_rom_region() const; virtual machine_config_constructor device_mconfig_additions() const; + + DECLARE_FLOPPY_FORMATS( floppy_formats ); }; @@ -195,6 +128,8 @@ public: // optional information overrides virtual const rom_entry *device_rom_region() const; virtual machine_config_constructor device_mconfig_additions() const; + + DECLARE_FLOPPY_FORMATS( floppy_formats ); }; diff --git a/src/emu/bus/ieee488/c8050fdc.c b/src/emu/bus/ieee488/c8050fdc.c index 6950e2db334..da627628e0b 100644 --- a/src/emu/bus/ieee488/c8050fdc.c +++ b/src/emu/bus/ieee488/c8050fdc.c @@ -9,6 +9,16 @@ **********************************************************************/ +/* + + TODO: + + - write mode + - write protect + - separate read/write methods + +*/ + #include "c8050fdc.h" @@ -17,7 +27,7 @@ // MACROS / CONSTANTS //************************************************************************** -#define LOG 1 +#define LOG 0 #define GCR_DECODE(_e, _i) \ ((BIT(_e, 6) << 7) | (BIT(_i, 7) << 6) | (_e & 0x33) | (BIT(_e, 2) << 3) | (_i & 0x04)) @@ -67,7 +77,9 @@ c8050_fdc_t::c8050_fdc_t(const machine_config &mconfig, const char *tag, device_ device_t(mconfig, C8050_FDC, "C8050 FDC", tag, owner, clock, "c8050fdc", __FILE__), m_write_sync(*this), m_write_ready(*this), + m_write_brdy(*this), m_write_error(*this), + m_write_wps(*this), m_gcr_rom(*this, "gcr"), m_floppy0(NULL), m_floppy1(NULL), @@ -78,7 +90,10 @@ c8050_fdc_t::c8050_fdc_t(const machine_config &mconfig, const char *tag, device_ m_ds(0), m_drv_sel(0), m_mode_sel(0), - m_rw_sel(0) + m_rw_sel(0), + m_wps(0), + m_wps0(0), + m_wps1(0) { cur_live.tm = attotime::never; cur_live.state = IDLE; @@ -87,7 +102,6 @@ c8050_fdc_t::c8050_fdc_t(const machine_config &mconfig, const char *tag, device_ } - //------------------------------------------------- // device_start - device-specific startup //------------------------------------------------- @@ -97,7 +111,9 @@ void c8050_fdc_t::device_start() // resolve callbacks m_write_sync.resolve_safe(); m_write_ready.resolve_safe(); + m_write_brdy.resolve_safe(); m_write_error.resolve_safe(); + m_write_wps.resolve_safe(); // allocate timer t_gen = timer_alloc(0); @@ -206,7 +222,47 @@ void c8050_fdc_t::ds_w(int ds) void c8050_fdc_t::set_floppy(floppy_image_device *floppy0, floppy_image_device *floppy1) { m_floppy0 = floppy0; - m_floppy1 = floppy1; + m_floppy0->setup_wpt_cb(floppy_image_device::wpt_cb(FUNC(c8050_fdc_t::wps0_w), this)); + + if (floppy1) { + m_floppy1 = floppy1; + m_floppy1->setup_wpt_cb(floppy_image_device::wpt_cb(FUNC(c8050_fdc_t::wps1_w), this)); + } +} + +void c8050_fdc_t::update_wps() +{ + int state = m_drv_sel ? m_wps1 : m_wps0; + + if (m_wps != state) + { + m_wps = state; + m_write_wps(m_wps); + } +} + +void c8050_fdc_t::wps0_w(floppy_image_device *floppy, int state) +{ + if (m_wps0 != state) + { + live_sync(); + m_wps0 = state; + update_wps(); + checkpoint(); + live_run(); + } +} + +void c8050_fdc_t::wps1_w(floppy_image_device *floppy, int state) +{ + if (m_wps1 != state) + { + live_sync(); + m_wps0 = state; + update_wps(); + checkpoint(); + live_run(); + } } void c8050_fdc_t::live_start() @@ -225,6 +281,7 @@ void c8050_fdc_t::live_start() cur_live.mode_sel = m_mode_sel; cur_live.rw_sel = m_rw_sel; cur_live.pi = m_pi; + cur_live.wps = m_wps; pll_reset(cur_live.tm, attotime::from_hz(clock() / (16 - m_ds))); checkpoint_live = cur_live; @@ -333,6 +390,7 @@ void c8050_fdc_t::live_abort() cur_live.next_state = -1; cur_live.ready = 1; + cur_live.brdy = 1; cur_live.sync = 1; cur_live.error = 1; } @@ -390,7 +448,8 @@ void c8050_fdc_t::live_run(const attotime &limit) if (LOG) logerror("%s cyl %u bit %u sync %u bc %u sr %03x i %03x e %02x\n",cur_live.tm.as_string(),get_floppy()->get_cyl(),bit,sync,cur_live.bit_counter,cur_live.shift_reg,cur_live.i,cur_live.e); // byte ready - int ready = !(cur_live.bit_counter == 9); + int ready = !(cur_live.bit_counter == 9); // 74190 _RC, should be triggered on the falling edge of the clock + int brdy = ready; // 74190 TC // GCR error int error = !(ready || BIT(cur_live.e, 3)); @@ -419,14 +478,20 @@ void c8050_fdc_t::live_run(const attotime &limit) syncpoint = true; } + if (brdy != cur_live.brdy) { + if (LOG) logerror("%s BRDY %u\n", cur_live.tm.as_string(), brdy); + cur_live.brdy = brdy; + syncpoint = true; + } + if (sync != cur_live.sync) { - if (LOG) logerror("%s SYNC %u\n", cur_live.tm.as_string(),sync); + if (LOG) logerror("%s SYNC %u\n", cur_live.tm.as_string(), sync); cur_live.sync = sync; syncpoint = true; } if (error != cur_live.error) { - if (LOG) logerror("%s ERROR %u\n", cur_live.tm.as_string(),error); + if (LOG) logerror("%s ERROR %u\n", cur_live.tm.as_string(), error); cur_live.error = error; syncpoint = true; } @@ -439,7 +504,12 @@ void c8050_fdc_t::live_run(const attotime &limit) } case RUNNING_SYNCPOINT: { + if (LOG) { + if (!cur_live.sync) logerror("%s SYNC\n",cur_live.tm.as_string()); + if (!cur_live.ready && cur_live.bit_counter == 9) logerror("%s DATA %02x\n",cur_live.tm.as_string(),GCR_DECODE(cur_live.e,cur_live.i)); + } m_write_ready(cur_live.ready); + m_write_brdy(cur_live.brdy); m_write_sync(cur_live.sync); m_write_error(cur_live.error); @@ -456,9 +526,9 @@ READ8_MEMBER( c8050_fdc_t::read ) UINT8 e = checkpoint_live.e; offs_t i = checkpoint_live.i; - UINT8 data = (BIT(e, 6) << 7) | (BIT(i, 7) << 6) | (e & 0x33) | (BIT(e, 2) << 3) | (i & 0x04); + UINT8 data = GCR_DECODE(e, i); - if (LOG) logerror("%s %s VIA reads data %02x (%03x)\n", machine().time().as_string(), machine().describe_context(), data, checkpoint_live.shift_reg); + if (LOG)logerror("%s %s VIA reads data %02x (%03x)\n", machine().time().as_string(), machine().describe_context(), data, checkpoint_live.shift_reg); return data; } @@ -475,12 +545,25 @@ WRITE8_MEMBER( c8050_fdc_t::write ) } } +WRITE_LINE_MEMBER( c8050_fdc_t::ds0_w ) +{ + m_ds0 = state; +} + +WRITE_LINE_MEMBER( c8050_fdc_t::ds1_w ) +{ + m_ds1 = state; + + ds_w(m_ds1 << 1 | m_ds0); +} + WRITE_LINE_MEMBER( c8050_fdc_t::drv_sel_w ) { if (m_drv_sel != state) { live_sync(); m_drv_sel = cur_live.drv_sel = state; + update_wps(); checkpoint(); if (LOG) logerror("%s %s DRV SEL %u\n", machine().time().as_string(), machine().describe_context(), state); live_run(); @@ -576,6 +659,5 @@ WRITE_LINE_MEMBER( c8050_fdc_t::odd_hd_w ) WRITE_LINE_MEMBER( c8050_fdc_t::pull_sync_w ) { - // TODO if (LOG) logerror("%s %s PULL SYNC %u\n", machine().time().as_string(), machine().describe_context(), state); } diff --git a/src/emu/bus/ieee488/c8050fdc.h b/src/emu/bus/ieee488/c8050fdc.h index 15b51a88088..7d72bdfafe8 100644 --- a/src/emu/bus/ieee488/c8050fdc.h +++ b/src/emu/bus/ieee488/c8050fdc.h @@ -32,9 +32,15 @@ #define MCFG_C8050_READY_CALLBACK(_write) \ devcb = &c8050_fdc_t::set_ready_wr_callback(*device, DEVCB_##_write); +#define MCFG_C8050_BRDY_CALLBACK(_write) \ + devcb = &c8050_fdc_t::set_brdy_wr_callback(*device, DEVCB_##_write); + #define MCFG_C8050_ERROR_CALLBACK(_write) \ devcb = &c8050_fdc_t::set_error_wr_callback(*device, DEVCB_##_write); +#define MCFG_C8050_WPS_CALLBACK(_write) \ + devcb = &c8050_fdc_t::set_wps_wr_callback(*device, DEVCB_##_write); + //************************************************************************** @@ -51,11 +57,15 @@ public: template<class _Object> static devcb_base &set_sync_wr_callback(device_t &device, _Object object) { return downcast<c8050_fdc_t &>(device).m_write_sync.set_callback(object); } template<class _Object> static devcb_base &set_ready_wr_callback(device_t &device, _Object object) { return downcast<c8050_fdc_t &>(device).m_write_ready.set_callback(object); } + template<class _Object> static devcb_base &set_brdy_wr_callback(device_t &device, _Object object) { return downcast<c8050_fdc_t &>(device).m_write_brdy.set_callback(object); } template<class _Object> static devcb_base &set_error_wr_callback(device_t &device, _Object object) { return downcast<c8050_fdc_t &>(device).m_write_error.set_callback(object); } + template<class _Object> static devcb_base &set_wps_wr_callback(device_t &device, _Object object) { return downcast<c8050_fdc_t &>(device).m_write_wps.set_callback(object); } DECLARE_READ8_MEMBER( read ); DECLARE_WRITE8_MEMBER( write ); + DECLARE_WRITE_LINE_MEMBER( ds0_w ); + DECLARE_WRITE_LINE_MEMBER( ds1_w ); DECLARE_WRITE_LINE_MEMBER( drv_sel_w ); DECLARE_WRITE_LINE_MEMBER( mode_sel_w ); DECLARE_WRITE_LINE_MEMBER( rw_sel_w ); @@ -64,13 +74,13 @@ public: DECLARE_WRITE_LINE_MEMBER( odd_hd_w ); DECLARE_WRITE_LINE_MEMBER( pull_sync_w ); - DECLARE_READ_LINE_MEMBER( wps_r ) { return checkpoint_live.drv_sel ? m_floppy1->wpt_r() : m_floppy0->wpt_r(); } - void stp0_w(int stp); void stp1_w(int stp); void ds_w(int ds); void set_floppy(floppy_image_device *floppy0, floppy_image_device *floppy1); + void wps0_w(floppy_image_device *floppy, int state); + void wps1_w(floppy_image_device *floppy, int state); protected: // device-level overrides @@ -82,6 +92,7 @@ protected: virtual const rom_entry *device_rom_region() const; void stp_w(floppy_image_device *floppy, int mtr, int &old_stp, int stp); + void update_wps(); enum { IDLE, @@ -94,6 +105,7 @@ protected: int state, next_state; int sync; int ready; + int brdy; int error; int ds; int drv_sel; @@ -111,11 +123,14 @@ protected: UINT8 pi; UINT16 shift_reg_write; + int wps; }; devcb_write_line m_write_sync; devcb_write_line m_write_ready; + devcb_write_line m_write_brdy; devcb_write_line m_write_error; + devcb_write_line m_write_wps; required_memory_region m_gcr_rom; @@ -127,11 +142,16 @@ protected: int m_stp0; int m_stp1; int m_ds; + int m_ds0; + int m_ds1; int m_drv_sel; int m_mode_sel; int m_rw_sel; int m_odd_hd; UINT8 m_pi; + int m_wps; + int m_wps0; + int m_wps1; live_info cur_live, checkpoint_live; fdc_pll_t cur_pll, checkpoint_pll; |