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author Miodrag Milanovic <mmicko@gmail.com>2016-05-25 08:19:21 +0200
committer Miodrag Milanovic <mmicko@gmail.com>2016-05-25 08:19:21 +0200
commit68785dccfee3208163c8169abc5c6d01becf36d4 (patch)
treed6967331fd0e938981777aa32b5f246e04fb701b /src/devices
parentc1230f8b9bf4373d396ecb970c966ec2ce6dfc15 (diff)
Cleanups and version bumpmame0174
Diffstat (limited to 'src/devices')
-rw-r--r--src/devices/bus/a2bus/pc_xporter.cpp87
-rw-r--r--src/devices/bus/gba/rom.cpp10
-rw-r--r--src/devices/bus/gba/rom.h6
-rw-r--r--src/devices/bus/megadrive/eeprom.cpp37
-rw-r--r--src/devices/bus/megadrive/eeprom.h16
-rw-r--r--src/devices/bus/megadrive/md_slot.cpp2
-rw-r--r--src/devices/bus/megadrive/rom.cpp11
-rw-r--r--src/devices/bus/megadrive/rom.h6
-rw-r--r--src/devices/bus/neogeo/boot_cthd.cpp1
-rw-r--r--src/devices/bus/neogeo/boot_kof10th.cpp6
-rw-r--r--src/devices/bus/neogeo/boot_kof2k2.cpp2
-rw-r--r--src/devices/bus/neogeo/boot_kof2k2.h6
-rw-r--r--src/devices/bus/neogeo/boot_kof2k3.cpp4
-rw-r--r--src/devices/bus/neogeo/boot_kof2k3.h10
-rw-r--r--src/devices/bus/neogeo/boot_misc.cpp3
-rw-r--r--src/devices/bus/neogeo/boot_misc.h6
-rw-r--r--src/devices/bus/neogeo/boot_svc.cpp2
-rw-r--r--src/devices/bus/neogeo/boot_svc.h6
-rw-r--r--src/devices/bus/neogeo/carts.cpp22
-rw-r--r--src/devices/bus/neogeo/cmc.cpp5
-rw-r--r--src/devices/bus/neogeo/fatfury2.cpp5
-rw-r--r--src/devices/bus/neogeo/kof2k2.cpp4
-rw-r--r--src/devices/bus/neogeo/kof98.cpp2
-rw-r--r--src/devices/bus/neogeo/mslugx.cpp3
-rw-r--r--src/devices/bus/neogeo/pcm2.cpp3
-rw-r--r--src/devices/bus/neogeo/pcm2.h4
-rw-r--r--src/devices/bus/neogeo/prot_cmc.cpp2
-rw-r--r--src/devices/bus/neogeo/prot_cthd.cpp30
-rw-r--r--src/devices/bus/neogeo/prot_cthd.h2
-rw-r--r--src/devices/bus/neogeo/prot_fatfury2.cpp1
-rw-r--r--src/devices/bus/neogeo/prot_kof2k3bl.cpp17
-rw-r--r--src/devices/bus/neogeo/prot_kof98.cpp1
-rw-r--r--src/devices/bus/neogeo/prot_misc.cpp113
-rw-r--r--src/devices/bus/neogeo/prot_misc.h10
-rw-r--r--src/devices/bus/neogeo/prot_mslugx.cpp1
-rw-r--r--src/devices/bus/neogeo/prot_pvc.cpp13
-rw-r--r--src/devices/bus/neogeo/prot_pvc.h2
-rw-r--r--src/devices/bus/neogeo/prot_sma.cpp28
-rw-r--r--src/devices/bus/neogeo/pvc.cpp2
-rw-r--r--src/devices/bus/neogeo/rom.cpp3
-rw-r--r--src/devices/bus/neogeo/rom.h6
-rw-r--r--src/devices/bus/neogeo/sbp.cpp8
-rw-r--r--src/devices/bus/neogeo/sbp.h4
-rw-r--r--src/devices/bus/neogeo/slot.cpp14
-rw-r--r--src/devices/bus/neogeo/slot.h30
-rw-r--r--src/devices/bus/neogeo/sma.cpp3
-rw-r--r--src/devices/bus/nes/mmc3_clones.cpp10
-rw-r--r--src/devices/bus/nes/mmc3_clones.h12
-rw-r--r--src/devices/cpu/drcbec.cpp4
-rw-r--r--src/devices/cpu/drcbex64.cpp36
-rw-r--r--src/devices/cpu/drcbex86.cpp32
-rw-r--r--src/devices/cpu/h8/h8.cpp6
-rw-r--r--src/devices/cpu/h8/h8_dma.cpp6
-rw-r--r--src/devices/cpu/h8/h8_dma.h2
-rw-r--r--src/devices/cpu/h8/h8_dtc.cpp7
-rw-r--r--src/devices/cpu/h8/h8_sci.cpp30
-rw-r--r--src/devices/cpu/h8/h8_timer16.cpp14
-rw-r--r--src/devices/cpu/h8/h8_timer8.cpp6
-rw-r--r--src/devices/cpu/h8/h8_watchdog.cpp8
-rw-r--r--src/devices/cpu/h8/h8_watchdog.h2
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.cpp4
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.h2
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.h2
-rw-r--r--src/devices/machine/gen_latch.h2
-rw-r--r--src/devices/machine/gt64xxx.cpp12
-rw-r--r--src/devices/machine/gt64xxx.h2
-rw-r--r--src/devices/machine/pci-ide.h2
-rw-r--r--src/devices/machine/stvcd.h1
-rw-r--r--src/devices/machine/vrc4373.h2
-rw-r--r--src/devices/machine/z80scc.cpp34
-rw-r--r--src/devices/machine/z80scc.h384
-rw-r--r--src/devices/video/hd44780.cpp2
-rw-r--r--src/devices/video/snes_ppu.cpp2
73 files changed, 580 insertions, 605 deletions
diff --git a/src/devices/bus/a2bus/pc_xporter.cpp b/src/devices/bus/a2bus/pc_xporter.cpp
index 0dae54b0df4..ec40e08a1aa 100644
--- a/src/devices/bus/a2bus/pc_xporter.cpp
+++ b/src/devices/bus/a2bus/pc_xporter.cpp
@@ -35,24 +35,24 @@
then read Cn00 to map C800-CFFF first.
PC RAM from 0xA0000-0xAFFFF is where the V30 BIOS is downloaded,
- plus used for general storage by the system. This is mirrored at
+ plus used for general storage by the system. This is mirrored at
Fxxxx on the V30 so that it can boot.
RAM from 0xB8000-0xBFFFF is the CGA framebuffer as usual.
- C800-CFFE: RAM / registers, locations as follows
- C828-C82A: bi-directional mailslots used to allow the PC to make ProDOS MLI calls,
- likely for the HDD emulation (which uses a file on a ProDOS volume
- as the PC).
- $C828 = hi 8 bits of ptr to ProDOS call info, $C829 = middle 8 bits, $C82A = lower 8 bits
- If bit 7 of $C828 is set, then the 6502 will take action.
- C832: current CGA mode index, used by 6502 @ $6869 to setup 6845, or 6845 reg index
- C833: 6845 data to write in the case where C832 is the reg index rather than a mode offset
- C860-C864: PC ports 60h-64h, used for keyboard comms
- CAC1: year for PC real-time clock
- CAC2: month for PC real-time clock
- CAC3: day for PC real-time clock
- CAC4: hour for PC real-time clock
- CAC5: minute for PC real-time clock
+ C800-CFFE: RAM / registers, locations as follows
+ C828-C82A: bi-directional mailslots used to allow the PC to make ProDOS MLI calls,
+ likely for the HDD emulation (which uses a file on a ProDOS volume
+ as the PC).
+ $C828 = hi 8 bits of ptr to ProDOS call info, $C829 = middle 8 bits, $C82A = lower 8 bits
+ If bit 7 of $C828 is set, then the 6502 will take action.
+ C832: current CGA mode index, used by 6502 @ $6869 to setup 6845, or 6845 reg index
+ C833: 6845 data to write in the case where C832 is the reg index rather than a mode offset
+ C860-C864: PC ports 60h-64h, used for keyboard comms
+ CAC1: year for PC real-time clock
+ CAC2: month for PC real-time clock
+ CAC3: day for PC real-time clock
+ CAC4: hour for PC real-time clock
+ CAC5: minute for PC real-time clock
CF00: PC memory pointer (bits 0-7)
CF01: PC memory pointer (bits 8-15)
CF02: PC memory pointer (bits 16-23)
@@ -65,16 +65,16 @@
CF30: control/flags: bit 4 = 1 to release reset on V30, 5 = 1 to release halt on V30
bit 7: read for card IRQ status, write 1 to clear/disable? card IRQ
CF31: control/flags: bit 4 = 1 to assert reset on V30, 5 = 1 to assert halt on V30
- if bit 3 is set on an IRQ, the 6502 will force color 80x25 CGA text mode.
- bit 7: write 1 to enable card IRQ
+ if bit 3 is set on an IRQ, the 6502 will force color 80x25 CGA text mode.
+ bit 7: write 1 to enable card IRQ
TODO:
- - Code at $70b0-$70c5 waits for the V30 to answer FPU presence.
+ - Code at $70b0-$70c5 waits for the V30 to answer FPU presence.
- What's going on at CF0E/CF0F? One value set for normal operation, another during
ProDOS calls. Probably safe to ignore.
- - The manual indicates there is no ROM; special drivers installed into ProDOS 8
- provide the RAMdisk and A2-accessing-PC-drives functionality.
-
+ - The manual indicates there is no ROM; special drivers installed into ProDOS 8
+ provide the RAMdisk and A2-accessing-PC-drives functionality.
+
*********************************************************************/
#include "pc_xporter.h"
@@ -104,7 +104,7 @@ static ADDRESS_MAP_START(pc_io, AS_IO, 16, a2bus_pcxporter_device )
ADDRESS_MAP_END
MACHINE_CONFIG_FRAGMENT( pcxporter )
- MCFG_CPU_ADD("v30", V30, XTAL_14_31818MHz/2) // 7.16 MHz as per manual
+ MCFG_CPU_ADD("v30", V30, XTAL_14_31818MHz/2) // 7.16 MHz as per manual
MCFG_CPU_PROGRAM_MAP(pc_map)
MCFG_CPU_IO_MAP(pc_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
@@ -153,7 +153,7 @@ MACHINE_CONFIG_FRAGMENT( pcxporter )
MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE(a2bus_pcxporter_device, keyboard_clock_w))
MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE(a2bus_pcxporter_device, keyboard_data_w))
MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_xt_keyboards, STR_KBD_KEYTRONIC_PC3270)
-
+
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("speaker", SPEAKER_SOUND, 0)
@@ -224,10 +224,10 @@ void a2bus_pcxporter_device::device_start()
save_item(NAME(m_ram));
save_item(NAME(m_regs));
save_item(NAME(m_offset));
-
+
m_v30->space(AS_PROGRAM).install_ram(0, 0xaffff, m_ram);
m_v30->space(AS_PROGRAM).install_rom(0xf0000, 0xfffff, &m_ram[0xa0000]);
-
+
m_pcmem_space = &m_v30->space(AS_PROGRAM);
m_pcio_space = &m_v30->space(AS_IO);
}
@@ -323,11 +323,11 @@ UINT8 a2bus_pcxporter_device::read_c800(address_space &space, UINT16 offset)
case 0x704: // read w/o increment
rv = m_ram[m_offset];
- return rv;
-
+ return rv;
+
default:
//printf("Read $C800 at %x\n", offset + 0xc800);
- break;
+ break;
}
return m_regs[offset];
@@ -381,13 +381,13 @@ void a2bus_pcxporter_device::write_c800(address_space &space, UINT16 offset, UIN
else if (m_offset >= 0xb8000 && m_offset <= 0xbbfff) m_pcmem_space->write_byte(m_offset, data);
else if (m_offset >= 0xbc000 && m_offset <= 0xbffff) m_pcmem_space->write_byte(m_offset-0x4000, data);
break;
-
- case 0x72c: // CGA 6845 register select
+
+ case 0x72c: // CGA 6845 register select
m_pcio_space->write_byte(0x3d6, data);
m_6845_reg = data;
break;
-
- case 0x72d: // CGA 6845 data read/write
+
+ case 0x72d: // CGA 6845 data read/write
// HACK: adjust the 40 column mode the 6502 sets to
// be more within specs.
switch (m_6845_reg)
@@ -416,37 +416,37 @@ void a2bus_pcxporter_device::write_c800(address_space &space, UINT16 offset, UIN
m_pcio_space->write_byte(0x3d7, data);
break;
-
- case 0x72e: // CGA mode select
+
+ case 0x72e: // CGA mode select
m_pcio_space->write_byte(0x3d8, data);
break;
case 0x72f: // CGA color select
m_pcio_space->write_byte(0x3d9, data);
break;
-
- case 0x730: // control 1
+
+ case 0x730: // control 1
if (data & 0x10) { m_v30->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); m_reset_during_halt = true; }
if (data & 0x20)
- {
+ {
if (m_reset_during_halt)
{
m_v30->reset();
m_reset_during_halt = false;
}
-
+
m_v30->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_v30->resume(SUSPEND_REASON_HALT | SUSPEND_REASON_DISABLE);
}
break;
-
- case 0x731: // control 2
+
+ case 0x731: // control 2
if (data & 0x10) m_v30->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
if (data & 0x20) m_v30->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
break;
-
+
default:
-// printf("%02x to C800 at %x\n", data, offset + 0xc800);
+// printf("%02x to C800 at %x\n", data, offset + 0xc800);
m_regs[offset] = data;
break;
}
@@ -646,6 +646,3 @@ WRITE8_MEMBER( a2bus_pcxporter_device::nmi_enable_w )
m_nmi_enabled = BIT(data,7);
m_isabus->set_nmi_state(m_nmi_enabled);
}
-
-
-
diff --git a/src/devices/bus/gba/rom.cpp b/src/devices/bus/gba/rom.cpp
index b4b2899024f..4aadc54b884 100644
--- a/src/devices/bus/gba/rom.cpp
+++ b/src/devices/bus/gba/rom.cpp
@@ -460,11 +460,11 @@ WRITE32_MEMBER(gba_rom_eeprom64_device::write_ram)
/*-------------------------------------------------
Carts with 3D Matrix Memory controller
-
+
Used by Video carts with 64MB ROM chips
Emulation based on the reverse engineering efforts
by endrift
-
+
The Memory controller basically behaves like a DMA
chip by writing first source and destination address,
then the number of 512K blocks to copy and finally
@@ -473,12 +473,12 @@ WRITE32_MEMBER(gba_rom_eeprom64_device::write_ram)
the transfer, other carts might use 0x11 but currently
they die before getting to the mapper communication
(CPU emulation issue? cart mapping issue? still unknown)
-
+
To investigate:
- why the other carts fail
- which addresses might be used by the mapper
(Disney Collection 2 uses 0x08800180-0x0880018f
- but it might well be possible to issue commands
+ but it might well be possible to issue commands
in an extended range...)
- which bus addresses can be used by the mapper
(currently we restrict the mapping in the range
@@ -492,7 +492,7 @@ WRITE32_MEMBER(gba_rom_3dmatrix_device::write_mapper)
switch (offset & 3)
{
case 0:
- if (data == 0x1) // transfer data
+ if (data == 0x1) // transfer data
memcpy((UINT8 *)m_romhlp + m_dst, (UINT8 *)m_rom + m_src, m_nblock * 0x200);
else
printf("Unknown mapper command 0x%X\n", data);
diff --git a/src/devices/bus/gba/rom.h b/src/devices/bus/gba/rom.h
index b43875af862..e13f6c623ac 100644
--- a/src/devices/bus/gba/rom.h
+++ b/src/devices/bus/gba/rom.h
@@ -168,14 +168,14 @@ class gba_rom_3dmatrix_device : public gba_rom_device
public:
// construction/destruction
gba_rom_3dmatrix_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
-
+
// reading and writing
virtual DECLARE_WRITE32_MEMBER(write_mapper) override;
-
+
private:
UINT32 m_src, m_dst, m_nblock;
};
diff --git a/src/devices/bus/megadrive/eeprom.cpp b/src/devices/bus/megadrive/eeprom.cpp
index e790d7cace8..016a17507eb 100644
--- a/src/devices/bus/megadrive/eeprom.cpp
+++ b/src/devices/bus/megadrive/eeprom.cpp
@@ -399,11 +399,11 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_init()
m_eeprom_word_address = 0;
m_eeprom_devsel = 0;
m_eeprom_byte = 0;
-
+
m_eeprom_sda = m_eeprom_prev_sda = 1;
m_eeprom_scl = m_eeprom_prev_scl = 1;
m_eeprom_cur_state = STATE_I2C_IDLE;
-
+
m_eeprom_mask = 0xff;
m_eeprom_pagewrite_mask = 0x03;
}
@@ -438,17 +438,17 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
case STATE_I2C_IDLE:
idle_devsel_check();
break;
-
+
case STATE_I2C_WAIT_STOP:
if (!m_eeprom_prev_sda && m_eeprom_sda && m_eeprom_scl)
m_eeprom_cur_state = STATE_I2C_IDLE;
break;
-
+
// device select: there can be up to 8 EEPROM in series, so that we start with writing 3 bits
// to identify which device has to be accessed, followed by a Read/Write bit to specify the action
case STATE_I2C_DEVSEL:
idle_devsel_check();
-
+
// LOW to HIGH transition of SCL = prepare to transmit, by moving to cnt = 1
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -480,11 +480,11 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
}
}
break;
-
+
// read operation = count 8 operations and at 9th check whether ACK has been issued
case STATE_I2C_READ_DATA:
idle_devsel_check();
-
+
// HIGH to LOW transition of SCL
if (m_eeprom_prev_scl && !m_eeprom_scl)
{
@@ -493,7 +493,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
else
m_eeprom_cnt = 1;
}
-
+
// LOW to HIGH transition of SCL
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -506,12 +506,12 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
}
break;
-
+
// For a write operation, the x24c02 requires a second address field. This address field is the
// word address, comprised of eight bits, providing access to any one of the 256 words of memory.
case STATE_I2C_GET_WORD_ADDR:
idle_devsel_check();
-
+
// HIGH to LOW transition of SCL
if (m_eeprom_prev_scl && !m_eeprom_scl)
{
@@ -526,7 +526,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
m_eeprom_word_address &= m_eeprom_mask;
}
}
-
+
// LOW to HIGH transition of SCL
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -534,11 +534,11 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
m_eeprom_word_address = ((m_eeprom_word_address << 1) | m_eeprom_sda) & 0xff;
}
break;
-
+
// write operation
case STATE_I2C_WRITE_DATA:
idle_devsel_check();
-
+
// HIGH to LOW transition of SCL
if (m_eeprom_prev_scl && !m_eeprom_scl)
{
@@ -547,7 +547,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
else
m_eeprom_cnt = 1;
}
-
+
// LOW to HIGH transition of SCL
if (!m_eeprom_prev_scl && m_eeprom_scl)
{
@@ -568,7 +568,7 @@ void md_eeprom_nbajam_device_alt::eeprom_i2c_update(void)
}
break;
}
-
+
m_eeprom_prev_scl = m_eeprom_scl;
m_eeprom_prev_sda = m_eeprom_sda;
//printf("Write line : status %d SDA %x SCL %x (count %d)\n", m_eeprom_cur_state, m_eeprom_sda, m_eeprom_scl, m_eeprom_cnt);
@@ -588,7 +588,7 @@ UINT8 md_eeprom_nbajam_device_alt::eeprom_i2c_out()
sram_address &= 0xffff;
res = (nvram[sram_address] >> (8 - m_eeprom_cnt)) & 1;
-
+
if (m_eeprom_cnt == 8)
{
//printf("Read EEPROM : status %d addr %x data %x (count 8)\n", m_eeprom_cur_state, sram_address, nvram[sram_address]);
@@ -604,11 +604,11 @@ UINT8 md_eeprom_nbajam_device_alt::eeprom_i2c_out()
if (m_eeprom_cnt == 9)
res = 0;
break;
-
+
default:
break;
}
-
+
//printf("Read line : status %d data %x (count %d)\n", m_eeprom_cur_state, res, m_eeprom_cnt);
return res;
}
@@ -635,4 +635,3 @@ WRITE16_MEMBER(md_eeprom_nbajam_device_alt::write)
eeprom_i2c_update();
}
}
-
diff --git a/src/devices/bus/megadrive/eeprom.h b/src/devices/bus/megadrive/eeprom.h
index 176b6f48fdd..f3582a49cba 100644
--- a/src/devices/bus/megadrive/eeprom.h
+++ b/src/devices/bus/megadrive/eeprom.h
@@ -162,15 +162,15 @@ class md_eeprom_nbajam_device_alt : public md_std_eeprom_device
public:
// construction/destruction
md_eeprom_nbajam_device_alt(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
-// virtual machine_config_constructor device_mconfig_additions() const override;
+// virtual machine_config_constructor device_mconfig_additions() const override;
virtual void device_start() override;
-
+
// reading and writing
virtual DECLARE_READ16_MEMBER(read) override;
virtual DECLARE_WRITE16_MEMBER(write) override;
-
+
std::vector<UINT8> m_sram;
void eeprom_i2c_init();
@@ -180,13 +180,13 @@ public:
private:
// EEPROM runtime vars
- UINT8 m_eeprom_sda; // current SDA
- UINT8 m_eeprom_prev_sda; // previous SDA
- UINT8 m_eeprom_scl; // current SCL
+ UINT8 m_eeprom_sda; // current SDA
+ UINT8 m_eeprom_prev_sda; // previous SDA
+ UINT8 m_eeprom_scl; // current SCL
UINT8 m_eeprom_prev_scl; // previous SCL
UINT8 m_eeprom_cnt; // operation count in 0-9
UINT8 m_eeprom_readwrite; // read/write bit
- UINT16 m_eeprom_slave_mask; // dev addr
+ UINT16 m_eeprom_slave_mask; // dev addr
UINT16 m_eeprom_word_address; // memory addr
UINT16 m_eeprom_devsel; // selected device
UINT16 m_eeprom_byte; // byte to be written
diff --git a/src/devices/bus/megadrive/md_slot.cpp b/src/devices/bus/megadrive/md_slot.cpp
index 84228207d5e..61e847eb6e9 100644
--- a/src/devices/bus/megadrive/md_slot.cpp
+++ b/src/devices/bus/megadrive/md_slot.cpp
@@ -837,7 +837,7 @@ int base_md_cart_slot_device::get_cart_type(UINT8 *ROM, UINT32 len)
if (!memcmp((char *)&ROM[0x0180], "SF-002", 6)) // Legend of Wukong
type = WUKONG;
break;
-
+
case 0x300000:
if (!memcmp(&ROM[0x220], sdk_sig, sizeof(sdk_sig)))
type = LIONK3;
diff --git a/src/devices/bus/megadrive/rom.cpp b/src/devices/bus/megadrive/rom.cpp
index 5d38557ea86..16b12561c8a 100644
--- a/src/devices/bus/megadrive/rom.cpp
+++ b/src/devices/bus/megadrive/rom.cpp
@@ -1443,7 +1443,7 @@ WRITE16_MEMBER(md_rom_wukong_device::write_a13)
/*-------------------------------------------------
STAR ODYSSEY
This game uses a slightly more complex mapper:
- not only RAM can be enabled / disabled, but also
+ not only RAM can be enabled / disabled, but also
ROM can be mapped in three different modes.
In what we call Mode0 the first 256K are mirrored
into area 0x000000-0x1fffff; in Mode1 cart gives
@@ -1457,7 +1457,7 @@ READ16_MEMBER(md_rom_starodys_device::read)
{
if (offset >= m_nvram_start/2 && offset <= m_nvram_end/2 && m_nvram_active && m_ram_enable)
return m_nvram[offset & 0x3fff];
-
+
if (offset < 0x200000/2)
{
if (m_mode == 0)
@@ -1497,7 +1497,7 @@ WRITE16_MEMBER(md_rom_starodys_device::write)
else
m_mode = 0;
//printf("ROM mode %d!\n", m_mode);
-
+
if (!BIT(data, 7))
{
//printf("LOCK BANKSWITCH!\n");
@@ -1512,7 +1512,7 @@ WRITE16_MEMBER(md_rom_starodys_device::write)
}
}
}
-
+
}
READ16_MEMBER(md_rom_starodys_device::read_a13)
@@ -1527,9 +1527,8 @@ WRITE16_MEMBER(md_rom_starodys_device::write_a13)
{
m_nvram_active = BIT(data, 0);
m_nvram_readonly = BIT(data, 1);
-
+
if (m_nvram_active)
m_nvram_handlers_installed = 1;
}
}
-
diff --git a/src/devices/bus/megadrive/rom.h b/src/devices/bus/megadrive/rom.h
index 4e9b656e08a..dcb1536f974 100644
--- a/src/devices/bus/megadrive/rom.h
+++ b/src/devices/bus/megadrive/rom.h
@@ -552,17 +552,17 @@ class md_rom_starodys_device : public md_std_rom_device
public:
// construction/destruction
md_rom_starodys_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
-
+
// reading and writing
virtual DECLARE_READ16_MEMBER(read) override;
virtual DECLARE_WRITE16_MEMBER(write) override;
virtual DECLARE_READ16_MEMBER(read_a13) override;
virtual DECLARE_WRITE16_MEMBER(write_a13) override;
-
+
private:
UINT8 m_mode, m_lock, m_ram_enable, m_base;
};
diff --git a/src/devices/bus/neogeo/boot_cthd.cpp b/src/devices/bus/neogeo/boot_cthd.cpp
index 8f6f4a6a213..1cb69ca1ecb 100644
--- a/src/devices/bus/neogeo/boot_cthd.cpp
+++ b/src/devices/bus/neogeo/boot_cthd.cpp
@@ -133,4 +133,3 @@ machine_config_constructor neogeo_matrimbl_cart::device_mconfig_additions() cons
{
return MACHINE_CONFIG_NAME( matrimbl_cart );
}
-
diff --git a/src/devices/bus/neogeo/boot_kof10th.cpp b/src/devices/bus/neogeo/boot_kof10th.cpp
index 1479e21701f..67d3aa04c1b 100644
--- a/src/devices/bus/neogeo/boot_kof10th.cpp
+++ b/src/devices/bus/neogeo/boot_kof10th.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighters 10th Anniversary Bootleg cart type
@@ -103,9 +103,9 @@ WRITE16_MEMBER(neogeo_kof10th_cart::protection_w)
if (offset < 0x40000/2)
{
if (!m_cart_ram[0xffe])
- COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A
+ COMBINE_DATA(&m_cart_ram2[(0x00000/2) + (offset & 0xffff)]); // Write to RAM bank A
else
- m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
+ m_fixed[offset] = BITSWAP8(data, 7,6,0,4,3,2,1,5); // Write S data on-the-fly
}
else if (offset >= 0xfe000/2)
{
diff --git a/src/devices/bus/neogeo/boot_kof2k2.cpp b/src/devices/bus/neogeo/boot_kof2k2.cpp
index 1f83351820d..f6d602491d6 100644
--- a/src/devices/bus/neogeo/boot_kof2k2.cpp
+++ b/src/devices/bus/neogeo/boot_kof2k2.cpp
@@ -106,5 +106,3 @@ void neogeo_kf2k2mp2_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_prot->sx_decrypt(fix_region, fix_region_size, 1);
m_cmc_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, KOF2002_GFX_KEY);
}
-
-
diff --git a/src/devices/bus/neogeo/boot_kof2k2.h b/src/devices/bus/neogeo/boot_kof2k2.h
index a312cc3a7f3..23a8ac53aaf 100644
--- a/src/devices/bus/neogeo/boot_kof2k2.h
+++ b/src/devices/bus/neogeo/boot_kof2k2.h
@@ -23,7 +23,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
private:
required_device<cmc_prot_device> m_cmc_prot;
required_device<pcm2_prot_device> m_pcm2_prot;
@@ -45,7 +45,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
private:
required_device<cmc_prot_device> m_cmc_prot;
required_device<pcm2_prot_device> m_pcm2_prot;
@@ -66,7 +66,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
private:
required_device<cmc_prot_device> m_cmc_prot;
required_device<pcm2_prot_device> m_pcm2_prot;
diff --git a/src/devices/bus/neogeo/boot_kof2k3.cpp b/src/devices/bus/neogeo/boot_kof2k3.cpp
index 07fe8bc4c38..5426ebf9f5b 100644
--- a/src/devices/bus/neogeo/boot_kof2k3.cpp
+++ b/src/devices/bus/neogeo/boot_kof2k3.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighters 2003 Bootleg cart type
@@ -52,7 +52,7 @@ void neogeo_kf2k3bl_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_cmc_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, KOF2003_GFX_KEY);
m_pcm2_prot->swap(ym_region, ym_region_size, 5);
m_prot->sx_decrypt(fix_region, fix_region_size, 1);
-
+
}
/*************************************************
diff --git a/src/devices/bus/neogeo/boot_kof2k3.h b/src/devices/bus/neogeo/boot_kof2k3.h
index 7e57266e373..848f5cd647e 100644
--- a/src/devices/bus/neogeo/boot_kof2k3.h
+++ b/src/devices/bus/neogeo/boot_kof2k3.h
@@ -18,9 +18,9 @@ public:
neogeo_kf2k3bl_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
virtual UINT32 get_bank_base(UINT16 sel) override { return m_kof2k3bl_prot->get_bank_base(); }
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_kof2k3bl_prot->protection_r(space, offset, mem_mask); }
virtual DECLARE_WRITE16_MEMBER(protection_w) override { m_kof2k3bl_prot->kof2003_w(space, offset, data, mem_mask); }
@@ -45,7 +45,7 @@ public:
neogeo_kf2k3pl_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
virtual UINT32 get_bank_base(UINT16 sel) override { return m_kof2k3bl_prot->get_bank_base(); }
@@ -71,9 +71,9 @@ public:
neogeo_kf2k3upl_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
virtual UINT32 get_bank_base(UINT16 sel) override { return m_kof2k3bl_prot->get_bank_base(); }
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_kof2k3bl_prot->protection_r(space, offset, mem_mask); }
virtual DECLARE_WRITE16_MEMBER(protection_w) override { m_kof2k3bl_prot->kof2003_w(space, offset, data, mem_mask); }
diff --git a/src/devices/bus/neogeo/boot_misc.cpp b/src/devices/bus/neogeo/boot_misc.cpp
index 61eeb399ed7..16fa78c12f6 100644
--- a/src/devices/bus/neogeo/boot_misc.cpp
+++ b/src/devices/bus/neogeo/boot_misc.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Misc. bootleg cart types (possibly to be split further at a later stage)
@@ -286,4 +286,3 @@ void neogeo_kog_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_prot->sx_decrypt(fix_region, fix_region_size, 1);
m_prot->cx_decrypt(spr_region, spr_region_size);
}
-
diff --git a/src/devices/bus/neogeo/boot_misc.h b/src/devices/bus/neogeo/boot_misc.h
index 646a314d03c..6a62fab27f5 100644
--- a/src/devices/bus/neogeo/boot_misc.h
+++ b/src/devices/bus/neogeo/boot_misc.h
@@ -149,7 +149,7 @@ public:
neogeo_mslug3b6_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
private:
@@ -168,7 +168,7 @@ public:
neogeo_ms5plus_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 1; }
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_prot->mslug5p_prot_r(space, offset, mem_mask); }
@@ -190,7 +190,7 @@ class neogeo_kog_cart : public neogeo_bootleg_cart
{
public:
neogeo_kog_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual ioport_constructor device_input_ports() const override;
virtual DECLARE_READ16_MEMBER(protection_r) override;
diff --git a/src/devices/bus/neogeo/boot_svc.cpp b/src/devices/bus/neogeo/boot_svc.cpp
index f70b5f4a62f..3bec1518958 100644
--- a/src/devices/bus/neogeo/boot_svc.cpp
+++ b/src/devices/bus/neogeo/boot_svc.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
SNK Vs Capcom Bootleg cart type
diff --git a/src/devices/bus/neogeo/boot_svc.h b/src/devices/bus/neogeo/boot_svc.h
index 5f2a0dd3fb6..e7a94b14da1 100644
--- a/src/devices/bus/neogeo/boot_svc.h
+++ b/src/devices/bus/neogeo/boot_svc.h
@@ -69,15 +69,15 @@ class neogeo_svcsplus_cart : public neogeo_bootleg_cart
{
public:
neogeo_svcsplus_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual machine_config_constructor device_mconfig_additions() const override;
-
+
virtual UINT32 get_bank_base(UINT16 sel) override { return m_pvc_prot->get_bank_base(); }
virtual DECLARE_READ16_MEMBER(protection_r) override { return m_pvc_prot->protection_r(space, offset, mem_mask); }
virtual DECLARE_WRITE16_MEMBER(protection_w) override { m_pvc_prot->protection_w(space, offset, data, mem_mask); }
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
private:
required_device<pvc_prot_device> m_pvc_prot;
};
diff --git a/src/devices/bus/neogeo/carts.cpp b/src/devices/bus/neogeo/carts.cpp
index 359a69099a4..ebc021c585f 100644
--- a/src/devices/bus/neogeo/carts.cpp
+++ b/src/devices/bus/neogeo/carts.cpp
@@ -24,12 +24,12 @@
SLOT_INTERFACE_START(neogeo_cart)
- SLOT_INTERFACE_INTERNAL("rom", NEOGEO_ROM) // Standard cart with banking
+ SLOT_INTERFACE_INTERNAL("rom", NEOGEO_ROM) // Standard cart with banking
- SLOT_INTERFACE_INTERNAL("rom_vliner", NEOGEO_VLINER_CART) // Standard cart + RAM
- SLOT_INTERFACE_INTERNAL("rom_fatfur2", NEOGEO_FATFURY2_CART) // Custom Fatal Fury 2 protection
- SLOT_INTERFACE_INTERNAL("rom_kof98", NEOGEO_KOF98_CART) // Custom King of Fighters 98 protection
- SLOT_INTERFACE_INTERNAL("rom_mslugx", NEOGEO_MSLUGX_CART) // Custom Metal Slug X protection
+ SLOT_INTERFACE_INTERNAL("rom_vliner", NEOGEO_VLINER_CART) // Standard cart + RAM
+ SLOT_INTERFACE_INTERNAL("rom_fatfur2", NEOGEO_FATFURY2_CART) // Custom Fatal Fury 2 protection
+ SLOT_INTERFACE_INTERNAL("rom_kof98", NEOGEO_KOF98_CART) // Custom King of Fighters 98 protection
+ SLOT_INTERFACE_INTERNAL("rom_mslugx", NEOGEO_MSLUGX_CART) // Custom Metal Slug X protection
// only CMC42 for gfx
SLOT_INTERFACE_INTERNAL("cmc42_zupapa", NEOGEO_CMC_ZUPAPA_CART)
@@ -45,7 +45,7 @@ SLOT_INTERFACE_START(neogeo_cart)
// only CMC50 for gfx + audiocpu
SLOT_INTERFACE_INTERNAL("cmc50_kof2001", NEOGEO_CMC_KOF2001_CART)
SLOT_INTERFACE_INTERNAL("cmc50_kof2000n", NEOGEO_CMC_KOF2000N_CART)
- SLOT_INTERFACE_INTERNAL("cmc50_jockeygp", NEOGEO_CMC_JOCKEYGP_CART) // CMC50 + RAM
+ SLOT_INTERFACE_INTERNAL("cmc50_jockeygp", NEOGEO_CMC_JOCKEYGP_CART) // CMC50 + RAM
// These use SMA for prg & CMC42 for gfx
SLOT_INTERFACE_INTERNAL("sma_kof99", NEOGEO_SMA_KOF99_CART)
@@ -78,13 +78,13 @@ SLOT_INTERFACE_START(neogeo_cart)
SLOT_INTERFACE_INTERNAL("boot_cthd2k3", NEOGEO_CTHD2K3_CART)
SLOT_INTERFACE_INTERNAL("boot_ct2k3sp", NEOGEO_CT2K3SP_CART)
SLOT_INTERFACE_INTERNAL("boot_ct2k3sa", NEOGEO_CT2K3SA_CART)
- SLOT_INTERFACE_INTERNAL("boot_matrimbl", NEOGEO_MATRIMBL_CART) // this also uses a CMC for SFIX & addditional prg scramble from kof2002
+ SLOT_INTERFACE_INTERNAL("boot_matrimbl", NEOGEO_MATRIMBL_CART) // this also uses a CMC for SFIX & addditional prg scramble from kof2002
// Bootleg logic for SVC clones
- SLOT_INTERFACE_INTERNAL("boot_svcboot", NEOGEO_SVCBOOT_CART) // this also uses a PVC protection/encryption
+ SLOT_INTERFACE_INTERNAL("boot_svcboot", NEOGEO_SVCBOOT_CART) // this also uses a PVC protection/encryption
SLOT_INTERFACE_INTERNAL("boot_svcplus", NEOGEO_SVCPLUS_CART)
SLOT_INTERFACE_INTERNAL("boot_svcplusa", NEOGEO_SVCPLUSA_CART)
- SLOT_INTERFACE_INTERNAL("boot_svcsplus", NEOGEO_SVCSPLUS_CART) // this also uses a PVC protection/encryption
+ SLOT_INTERFACE_INTERNAL("boot_svcsplus", NEOGEO_SVCSPLUS_CART) // this also uses a PVC protection/encryption
// Bootleg logic for KOF2002 clones
SLOT_INTERFACE_INTERNAL("boot_kf2k2b", NEOGEO_KOF2002B_CART)
@@ -104,8 +104,8 @@ SLOT_INTERFACE_START(neogeo_cart)
SLOT_INTERFACE_INTERNAL("boot_kf2k4se", NEOGEO_KF2K4SE_CART)
SLOT_INTERFACE_INTERNAL("boot_lans2004", NEOGEO_LANS2004_CART)
SLOT_INTERFACE_INTERNAL("boot_samsho5b", NEOGEO_SAMSHO5B_CART)
- SLOT_INTERFACE_INTERNAL("boot_mslug3b6", NEOGEO_MSLUG3B6_CART) // this also uses a CMC42 for gfx
- SLOT_INTERFACE_INTERNAL("boot_ms5plus", NEOGEO_MS5PLUS_CART) // this also uses a CMC50 for gfx + audiocpu & NEOPCM2 for YM scramble
+ SLOT_INTERFACE_INTERNAL("boot_mslug3b6", NEOGEO_MSLUG3B6_CART) // this also uses a CMC42 for gfx
+ SLOT_INTERFACE_INTERNAL("boot_ms5plus", NEOGEO_MS5PLUS_CART) // this also uses a CMC50 for gfx + audiocpu & NEOPCM2 for YM scramble
SLOT_INTERFACE_INTERNAL("boot_kog", NEOGEO_KOG_CART)
SLOT_INTERFACE_INTERNAL("boot_kf10th", NEOGEO_KOF10TH_CART)
diff --git a/src/devices/bus/neogeo/cmc.cpp b/src/devices/bus/neogeo/cmc.cpp
index c2e544f38e9..4fac2c9eb72 100644
--- a/src/devices/bus/neogeo/cmc.cpp
+++ b/src/devices/bus/neogeo/cmc.cpp
@@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
CMC42 & CMC50 encrypted cart type
-
+
***********************************************************************************************************/
@@ -264,4 +264,3 @@ void neogeo_cmc_jockeygp_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, JOCKEYGP_GFX_KEY);
m_prot->sfix_decrypt(spr_region, spr_region_size, fix_region, fix_region_size);
}
-
diff --git a/src/devices/bus/neogeo/fatfury2.cpp b/src/devices/bus/neogeo/fatfury2.cpp
index 79c324754cd..3236e2f7574 100644
--- a/src/devices/bus/neogeo/fatfury2.cpp
+++ b/src/devices/bus/neogeo/fatfury2.cpp
@@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Fatal Fury 2 cart type
-
+
***********************************************************************************************************/
@@ -50,4 +50,3 @@ machine_config_constructor neogeo_fatfury2_cart::device_mconfig_additions() cons
{
return MACHINE_CONFIG_NAME( fatfury2_cart );
}
-
diff --git a/src/devices/bus/neogeo/kof2k2.cpp b/src/devices/bus/neogeo/kof2k2.cpp
index a5ccf559f25..ac8235c471f 100644
--- a/src/devices/bus/neogeo/kof2k2.cpp
+++ b/src/devices/bus/neogeo/kof2k2.cpp
@@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighers 2002 cart type (CMC + PCM2 + Additional CPU encryption)
-
+
***********************************************************************************************************/
diff --git a/src/devices/bus/neogeo/kof98.cpp b/src/devices/bus/neogeo/kof98.cpp
index 07685700f4c..38bd2445d96 100644
--- a/src/devices/bus/neogeo/kof98.cpp
+++ b/src/devices/bus/neogeo/kof98.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
The King of Fighers '98 cart type
diff --git a/src/devices/bus/neogeo/mslugx.cpp b/src/devices/bus/neogeo/mslugx.cpp
index 4ef91c4b091..b3b83fae1f7 100644
--- a/src/devices/bus/neogeo/mslugx.cpp
+++ b/src/devices/bus/neogeo/mslugx.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Metal Slug X cart type
@@ -50,4 +50,3 @@ machine_config_constructor neogeo_mslugx_cart::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( mslugx_cart );
}
-
diff --git a/src/devices/bus/neogeo/pcm2.cpp b/src/devices/bus/neogeo/pcm2.cpp
index f80ae946006..a83cd966cb8 100644
--- a/src/devices/bus/neogeo/pcm2.cpp
+++ b/src/devices/bus/neogeo/pcm2.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
PCM2 encrypted cart type
@@ -132,4 +132,3 @@ void neogeo_pcm2_pnyaa_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_cmc_prot->sfix_decrypt(spr_region, spr_region_size, fix_region, fix_region_size);
m_pcm2_prot->decrypt(ym_region, ym_region_size, 4);
}
-
diff --git a/src/devices/bus/neogeo/pcm2.h b/src/devices/bus/neogeo/pcm2.h
index bdadbfb0f71..fff3408eae3 100644
--- a/src/devices/bus/neogeo/pcm2.h
+++ b/src/devices/bus/neogeo/pcm2.h
@@ -23,9 +23,9 @@ public:
virtual machine_config_constructor device_mconfig_additions() const override;
// reading and writing
-// virtual DECLARE_READ16_MEMBER(read_rom) override;
+// virtual DECLARE_READ16_MEMBER(read_rom) override;
-// virtual void activate_cart(ACTIVATE_CART_PARAMS) override { m_banked_cart->install_banks(machine, maincpu, cpuregion, cpuregion_size); }
+// virtual void activate_cart(ACTIVATE_CART_PARAMS) override { m_banked_cart->install_banks(machine, maincpu, cpuregion, cpuregion_size); }
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override {}
virtual int get_fixed_bank_type(void) override { return 0; }
diff --git a/src/devices/bus/neogeo/prot_cmc.cpp b/src/devices/bus/neogeo/prot_cmc.cpp
index 80249bf3f94..7a91344aaad 100644
--- a/src/devices/bus/neogeo/prot_cmc.cpp
+++ b/src/devices/bus/neogeo/prot_cmc.cpp
@@ -606,7 +606,7 @@ void cmc_prot_device::sfix_decrypt(UINT8* rom, UINT32 rom_size, UINT8* fixed, UI
int tx_size = fixed_size;
UINT8 *src = rom + rom_size - tx_size;
UINT8 *dst = fixed;
-
+
for (int i = 0; i < tx_size; i++)
dst[i] = src[(i & ~0x1f) + ((i & 7) << 2) + ((~i & 8) >> 2) + ((i & 0x10) >> 4)];
}
diff --git a/src/devices/bus/neogeo/prot_cthd.cpp b/src/devices/bus/neogeo/prot_cthd.cpp
index 630840420fa..b2901a60d3e 100644
--- a/src/devices/bus/neogeo/prot_cthd.cpp
+++ b/src/devices/bus/neogeo/prot_cthd.cpp
@@ -25,9 +25,9 @@ void cthd_prot_device::device_reset()
/**************************
-
+
decryption helpers
-
+
**************************/
// descrambling information from razoola
@@ -86,9 +86,9 @@ void cthd_prot_device::cthd2003_c(UINT8* sprrom, UINT32 sprrom_size, int pow)
}
/**************************
-
+
protection / encryption
-
+
**************************/
void cthd_prot_device::decrypt_cthd2003(UINT8* sprrom, UINT32 sprrom_size, UINT8* audiorom, UINT32 audiorom_size, UINT8* fixedrom, UINT32 fixedrom_size)
@@ -119,16 +119,16 @@ void cthd_prot_device::decrypt_cthd2003(UINT8* sprrom, UINT32 sprrom_size, UINT8
/*
WRITE16_MEMBER( ngbootleg_prot_device::cthd2003_bankswitch_w )
{
- int bankaddress;
- static const int cthd2003_banks[8] =
- {
- 1,0,1,0,1,0,3,2,
- };
- if (offset == 0)
- {
- bankaddress = 0x100000 + cthd2003_banks[data&7]*0x100000;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
- }
+ int bankaddress;
+ static const int cthd2003_banks[8] =
+ {
+ 1,0,1,0,1,0,3,2,
+ };
+ if (offset == 0)
+ {
+ bankaddress = 0x100000 + cthd2003_banks[data&7]*0x100000;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
+ }
}
*/
@@ -313,7 +313,7 @@ void cthd_prot_device::matrimbl_decrypt(UINT8* sprrom, UINT32 sprrom_size, UINT8
rom[j] = buf[i];
}
memcpy(rom - 0x10000, rom, 0x10000);
-
+
// decrypt gfx
cthd2003_c(sprrom,sprrom_size, 0 );
}
diff --git a/src/devices/bus/neogeo/prot_cthd.h b/src/devices/bus/neogeo/prot_cthd.h
index b1739c85207..8adc5fec705 100644
--- a/src/devices/bus/neogeo/prot_cthd.h
+++ b/src/devices/bus/neogeo/prot_cthd.h
@@ -32,7 +32,7 @@ public:
void patch_ct2k3sa(UINT8* cpurom, UINT32 cpurom_size);
void decrypt_ct2k3sa(UINT8* sprrom, UINT32 sprrom_size, UINT8* audiorom, UINT32 audiorom_size);
-
+
void matrimbl_decrypt(UINT8* sprrom, UINT32 sprrom_size, UINT8* audiorom, UINT32 audiorom_size);
protected:
diff --git a/src/devices/bus/neogeo/prot_fatfury2.cpp b/src/devices/bus/neogeo/prot_fatfury2.cpp
index 711638d7fb3..7a04e4cefe8 100644
--- a/src/devices/bus/neogeo/prot_fatfury2.cpp
+++ b/src/devices/bus/neogeo/prot_fatfury2.cpp
@@ -99,4 +99,3 @@ WRITE16_MEMBER( fatfury2_prot_device::protection_w )
break;
}
}
-
diff --git a/src/devices/bus/neogeo/prot_kof2k3bl.cpp b/src/devices/bus/neogeo/prot_kof2k3bl.cpp
index 5801f6dacfe..5ef35dee9c5 100644
--- a/src/devices/bus/neogeo/prot_kof2k3bl.cpp
+++ b/src/devices/bus/neogeo/prot_kof2k3bl.cpp
@@ -50,11 +50,11 @@ WRITE16_MEMBER(kof2k3bl_prot_device::kof2003_w)
m_bank_base = 0x100000 + ((cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff1)]);
//UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff1)];
//m_bankdev->neogeo_set_main_cpu_bank_address(address+0x100000);
-
+
cr[BYTE_XOR_LE(0x1ff0)] = 0xa0;
cr[BYTE_XOR_LE(0x1ff1)] &= 0xfe;
cr[BYTE_XOR_LE(0x1ff3)] &= 0x7f;
-
+
m_overlay = (prt & 0x00ff) | (m_overlay & 0xff00);
}
}
@@ -69,7 +69,7 @@ WRITE16_MEMBER(kof2k3bl_prot_device::kof2003p_w)
m_bank_base = 0x100000 + ((cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff0)]);
//UINT32 address = (cr[BYTE_XOR_LE(0x1ff3)] << 16) | (cr[BYTE_XOR_LE(0x1ff2)] << 8) | cr[BYTE_XOR_LE(0x1ff0)];
//m_bankdev->neogeo_set_main_cpu_bank_address(address+0x100000);
-
+
cr[BYTE_XOR_LE(0x1ff0)] &= 0xfe;
cr[BYTE_XOR_LE(0x1ff3)] &= 0x7f;
@@ -96,17 +96,17 @@ void kof2k3bl_prot_device::pl_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
std::vector<UINT16> tmp(0x100000/2);
UINT16*rom16 = (UINT16*)cpurom;
-
+
for (int i = 0; i < 0x700000/2; i += 0x100000/2)
{
memcpy(&tmp[0], &rom16[i], 0x100000);
for (int j = 0; j < 0x100000/2; j++)
rom16[i+j] = tmp[BITSWAP24(j,23,22,21,20,19,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18)];
}
-
+
/* patched by Altera protection chip on PCB */
rom16[0xf38ac/2] = 0x4e75;
-
+
m_overlay = rom16[0x58196 / 2];
}
@@ -118,7 +118,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
UINT8 *src = cpurom;
memmove(src + 0x100000, src, 0x600000);
memmove(src, src + 0x700000, 0x100000);
-
+
UINT8 *rom = cpurom + 0xfe000;
UINT8 *buf = cpurom + 0xd0610;
for (int i = 0; i < 0x2000 / 2; i++)
@@ -126,8 +126,7 @@ void kof2k3bl_prot_device::upl_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int ofst = (i & 0xff00) + BITSWAP8((i & 0x00ff), 7, 6, 0, 4, 3, 2, 1, 5);
memcpy(&rom[i * 2], &buf[ofst * 2], 2);
}
-
+
UINT16* rom16 = (UINT16*)cpurom;
m_overlay = rom16[0x58196 / 2];
}
-
diff --git a/src/devices/bus/neogeo/prot_kof98.cpp b/src/devices/bus/neogeo/prot_kof98.cpp
index 05cc11e3775..9c41f709f2b 100644
--- a/src/devices/bus/neogeo/prot_kof98.cpp
+++ b/src/devices/bus/neogeo/prot_kof98.cpp
@@ -125,4 +125,3 @@ WRITE16_MEMBER( kof98_prot_device::protection_w )
break;
}
}
-
diff --git a/src/devices/bus/neogeo/prot_misc.cpp b/src/devices/bus/neogeo/prot_misc.cpp
index f48591c72d9..c858e05f42b 100644
--- a/src/devices/bus/neogeo/prot_misc.cpp
+++ b/src/devices/bus/neogeo/prot_misc.cpp
@@ -2,9 +2,9 @@
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***************************************************************************
-
+
Neo-Geo hardware encryption and protection used on bootleg cartridges
-
+
Many of the NeoGeo bootlegs use their own form of encryption and
protection, presumably to make them harder for other bootleggers to
copy. This encryption often involves non-trivial scrambling of the
@@ -12,11 +12,11 @@
provides some kind of rom overlay, patching parts of the code.
The graphics roms are usually scrambled in a different way to the
official SNK cartridges too.
-
+
Here we collect functions to emulate some of the protection devices used.
-
+
TODO: split different devices according to the chip responsible for them!
-
+
***************************************************************************/
#include "emu.h"
@@ -197,10 +197,10 @@ void neoboot_prot_device::lans2004_decrypt_68k(UINT8* cpurom, UINT32 cpurom_size
static const int sec[] = { 0x3, 0x8, 0x7, 0xc, 0x1, 0xa, 0x6, 0xd };
dynamic_buffer dst(0x600000);
-
+
for (int i = 0; i < 8; i++)
memcpy (&dst[i * 0x20000], src + sec[i] * 0x20000, 0x20000);
-
+
memcpy (&dst[0x0bbb00], src + 0x045b00, 0x001710);
memcpy (&dst[0x02fff0], src + 0x1a92be, 0x000010);
memcpy (&dst[0x100000], src + 0x200000, 0x400000);
@@ -233,20 +233,20 @@ void neoboot_prot_device::samsho5b_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int px_size = cpurom_size;
UINT8 *rom = cpurom;
dynamic_buffer buf(px_size);
-
+
memcpy(&buf[0], rom, px_size);
-
+
for (int i = 0; i < px_size / 2; i++)
{
int ofst = BITSWAP8((i & 0x000ff), 7, 6, 5, 4, 3, 0, 1, 2);
ofst += (i & 0xfffff00);
ofst ^= 0x060005;
-
+
memcpy(&rom[i * 2], &buf[ofst * 2], 0x02);
}
-
+
memcpy(&buf[0], rom, px_size);
-
+
memcpy(&rom[0x000000], &buf[0x700000], 0x100000);
memcpy(&rom[0x100000], &buf[0x000000], 0x700000);
}
@@ -256,7 +256,7 @@ void neoboot_prot_device::samsho5b_vx_decrypt(UINT8* ymsndrom, UINT32 ymsndrom_s
{
int vx_size = ymsndrom_size;
UINT8 *rom = ymsndrom;
-
+
for (int i = 0; i < vx_size; i++)
rom[i] = BITSWAP8(rom[i], 0, 1, 5, 4, 3, 2, 6, 7);
}
@@ -276,22 +276,22 @@ READ16_MEMBER( neoboot_prot_device::mslug5p_prot_r )
/*
WRITE16_MEMBER( neoboot_prot_device::ms5plus_bankswitch_w )
{
- int bankaddress;
- logerror("offset: %06x PC %06x: set banking %04x\n",offset,space.device().safe_pc(),data);
- if ((offset == 0) && (data == 0xa0))
- {
- bankaddress = 0xa0;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
- logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
- }
- else if(offset == 2)
- {
- data = data >> 4;
- //data = data & 7;
- bankaddress = data * 0x100000;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
- logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
- }
+ int bankaddress;
+ logerror("offset: %06x PC %06x: set banking %04x\n",offset,space.device().safe_pc(),data);
+ if ((offset == 0) && (data == 0xa0))
+ {
+ bankaddress = 0xa0;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
+ logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
+ }
+ else if(offset == 2)
+ {
+ data = data >> 4;
+ //data = data & 7;
+ bankaddress = data * 0x100000;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress);
+ logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space.device().safe_pc(),bankaddress);
+ }
}
*/
@@ -314,26 +314,26 @@ void neoboot_prot_device::kog_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
dynamic_buffer dst(0x600000);
UINT16 *rom = (UINT16 *)cpurom;
static const int sec[] = { 0x3, 0x8, 0x7, 0xc, 0x1, 0xa, 0x6, 0xd };
-
+
for (int i = 0; i < 8; i++)
memcpy (&dst[i * 0x20000], src + sec[i] * 0x20000, 0x20000);
-
+
memcpy (&dst[0x0007a6], src + 0x0407a6, 0x000006);
memcpy (&dst[0x0007c6], src + 0x0407c6, 0x000006);
memcpy (&dst[0x0007e6], src + 0x0407e6, 0x000006);
memcpy (&dst[0x090000], src + 0x040000, 0x004000);
memcpy (&dst[0x100000], src + 0x200000, 0x400000);
memcpy (src, &dst[0], 0x600000);
-
+
for (int i = 0x90000/2; i < 0x94000/2; i++)
{
if (((rom[i] & 0xffbf) == 0x4eb9 || rom[i] == 0x43f9) && !rom[i + 1])
rom[i + 1] = 0x0009;
-
+
if (rom[i] == 0x4eb8)
rom[i] = 0x6100;
}
-
+
rom[0x007a8/2] = 0x0009;
rom[0x007c8/2] = 0x0009;
rom[0x007e8/2] = 0x0009;
@@ -363,7 +363,7 @@ void neoboot_prot_device::kog_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
rom[0x93a58/2] = 0xfd08;
rom[0x93a66/2] = 0xf9ca;
rom[0x93a72/2] = 0xf9be;
-
+
}
/* SNK vs. CAPCOM SVC CHAOS (bootleg) */
@@ -374,10 +374,10 @@ void neoboot_prot_device::svcboot_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
for (int i = 0; i < size / 0x100000; i++)
memcpy(&dst[i * 0x100000], &src[sec[i] * 0x100000], 0x100000);
-
+
for (int i = 0; i < size / 2; i++)
{
int ofst = BITSWAP8((i & 0x0000ff), 7, 6, 1, 0, 3, 2, 5, 4);
@@ -400,7 +400,7 @@ void neoboot_prot_device::svcboot_cx_decrypt(UINT8* sprrom, UINT32 sprrom_size)
int size = sprrom_size;
UINT8 *src = sprrom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 0x80; i++)
{
@@ -424,18 +424,18 @@ void neoboot_prot_device::svcplus_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
int ofst = BITSWAP24((i & 0xfffff), 0x17, 0x16, 0x15, 0x14, 0x13, 0x00, 0x01, 0x02,
- 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08,
- 0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12);
+ 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08,
+ 0x07, 0x06, 0x05, 0x04, 0x03, 0x10, 0x11, 0x12);
ofst ^= 0x0f0007;
ofst += (i & 0xff00000);
memcpy(&src[i * 0x02], &dst[ofst * 0x02], 0x02);
}
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < 6; i++)
memcpy(&src[i * 0x100000], &dst[sec[i] * 0x100000], 0x100000);
@@ -458,7 +458,7 @@ void neoboot_prot_device::svcplusa_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < 6; i++)
memcpy(&src[i * 0x100000], &dst[sec[i] * 0x100000], 0x100000);
@@ -473,13 +473,13 @@ void neoboot_prot_device::svcsplus_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
int size = cpurom_size;
UINT8 *src = cpurom;
dynamic_buffer dst(size);
-
+
memcpy(&dst[0], src, size);
for (int i = 0; i < size / 2; i++)
{
int ofst = BITSWAP16((i & 0x007fff), 0x0f, 0x00, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d,
- 0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e);
-
+ 0x04, 0x03, 0x01, 0x07, 0x06, 0x02, 0x05, 0x0e);
+
ofst += (i & 0x078000);
ofst += sec[(i & 0xf80000) >> 19] << 19;
memcpy(&src[i * 2], &dst[ofst * 2], 0x02);
@@ -513,13 +513,13 @@ void neoboot_prot_device::kof2002b_gfx_decrypt(UINT8 *src, int size)
{ 2, 1, 0, 6, 7, 8 },
{ 8, 0, 7, 6, 2, 1 },
};
-
+
dynamic_buffer dst(0x10000);
-
+
for (int i = 0; i < size; i += 0x10000)
{
memcpy(&dst[0], src + i, 0x10000);
-
+
for (int j = 0; j < 0x200; j++)
{
int n = (j & 0x38) >> 3;
@@ -536,9 +536,9 @@ void neoboot_prot_device::kf2k2mp_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
UINT8 *src = cpurom;
UINT8 dst[0x80];
-
+
memmove(src, src + 0x300000, 0x500000);
-
+
for (int i = 0; i < 0x800000; i+=0x80)
{
for (int j = 0; j < 0x80 / 2; j++)
@@ -557,7 +557,7 @@ void neoboot_prot_device::kf2k2mp2_px_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
UINT8 *src = cpurom;
dynamic_buffer dst(0x600000);
-
+
memcpy(&dst[0x000000], &src[0x1C0000], 0x040000);
memcpy(&dst[0x040000], &src[0x140000], 0x080000);
memcpy(&dst[0x0C0000], &src[0x100000], 0x040000);
@@ -573,22 +573,21 @@ void neoboot_prot_device::kof10th_decrypt(UINT8* cpurom, UINT32 cpurom_size)
{
dynamic_buffer dst(0x900000);
UINT8 *src = cpurom;
-
+
memcpy(&dst[0x000000], src + 0x700000, 0x100000); // Correct (Verified in Uni-bios)
memcpy(&dst[0x100000], src + 0x000000, 0x800000);
-
+
for (int i = 0; i < 0x900000; i++)
{
int j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,2,9,8,7,1,5,4,3,10,6,0);
src[j] = dst[i];
}
-
+
// Altera protection chip patches these over P ROM
((UINT16*)src)[0x0124/2] = 0x000d; // Enables XOR for RAM moves, forces SoftDIPs, and USA region
((UINT16*)src)[0x0126/2] = 0xf7a8;
-
+
((UINT16*)src)[0x8bf4/2] = 0x4ef9; // Run code to change "S" data
((UINT16*)src)[0x8bf6/2] = 0x000d;
((UINT16*)src)[0x8bf8/2] = 0xf980;
}
-
diff --git a/src/devices/bus/neogeo/prot_misc.h b/src/devices/bus/neogeo/prot_misc.h
index 4549f50bea5..ba4681aa640 100644
--- a/src/devices/bus/neogeo/prot_misc.h
+++ b/src/devices/bus/neogeo/prot_misc.h
@@ -28,21 +28,21 @@ public:
void kf2k5uni_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
void kf2k5uni_sx_decrypt(UINT8* fixedrom, UINT32 fixedrom_size);
void kf2k5uni_mx_decrypt(UINT8* audiorom, UINT32 audiorom_size);
-
+
void decrypt_kof2k4se_68k(UINT8* cpurom, UINT32 cpurom_size);
-
+
void lans2004_vx_decrypt(UINT8* ymsndrom, UINT32 ymsndrom_size);
void lans2004_decrypt_68k(UINT8* cpurom, UINT32 cpurom_size);
-
+
void samsho5b_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
void samsho5b_vx_decrypt(UINT8* ymsndrom, UINT32 ymsndrom_size);
-
+
DECLARE_READ16_MEMBER(mslug5p_prot_r);
//DECLARE_WRITE16_MEMBER(ms5plus_bankswitch_w);
UINT32 mslug5p_bank_base(UINT16 sel);
void kog_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
-
+
void svcboot_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
void svcboot_cx_decrypt(UINT8*sprrom, UINT32 sprrom_size);
void svcplus_px_decrypt(UINT8* cpurom, UINT32 cpurom_size);
diff --git a/src/devices/bus/neogeo/prot_mslugx.cpp b/src/devices/bus/neogeo/prot_mslugx.cpp
index 7bb14bad1a4..e54007c4a2e 100644
--- a/src/devices/bus/neogeo/prot_mslugx.cpp
+++ b/src/devices/bus/neogeo/prot_mslugx.cpp
@@ -84,4 +84,3 @@ READ16_MEMBER( mslugx_prot_device::protection_r )
return res;
}
-
diff --git a/src/devices/bus/neogeo/prot_pvc.cpp b/src/devices/bus/neogeo/prot_pvc.cpp
index 9becf6bb094..1de3383d5a3 100644
--- a/src/devices/bus/neogeo/prot_pvc.cpp
+++ b/src/devices/bus/neogeo/prot_pvc.cpp
@@ -59,10 +59,10 @@ void pvc_prot_device::pvc_write_pack_color()
/*void pvc_prot_device::pvc_write_bankswitch()
{
- UINT32 bankaddress = ((m_cart_ram[0xff8] >> 8)|(m_cart_ram[0xff9] << 8));
- m_cart_ram[0xff8] = (m_cart_ram[0xff8] & 0xfe00) | 0x00a0;
- m_cart_ram[0xff9] &= 0x7fff;
- m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress + 0x100000);
+ UINT32 bankaddress = ((m_cart_ram[0xff8] >> 8)|(m_cart_ram[0xff9] << 8));
+ m_cart_ram[0xff8] = (m_cart_ram[0xff8] & 0xfe00) | 0x00a0;
+ m_cart_ram[0xff9] &= 0x7fff;
+ m_bankdev->neogeo_set_main_cpu_bank_address(bankaddress + 0x100000);
}
*/
@@ -87,8 +87,8 @@ WRITE16_MEMBER( pvc_prot_device::protection_w )
else if (offset >= 0xff4 && offset <= 0xff5)
pvc_write_pack_color();
// FIXME: temporarily moved to the driver, through get_bank_base() above
-// else if(offset >= 0xff8)
-// pvc_write_bankswitch(space);
+// else if(offset >= 0xff8)
+// pvc_write_bankswitch(space);
}
@@ -289,4 +289,3 @@ void pvc_prot_device::kof2003h_decrypt_68k(UINT8* rom, UINT32 size)
memcpy(&rom[0x100000], &buf[0x800000], 0x100000);
memcpy(&rom[0x200000], &buf[0x100000], 0x700000);
}
-
diff --git a/src/devices/bus/neogeo/prot_pvc.h b/src/devices/bus/neogeo/prot_pvc.h
index 5676d1660b5..e14983c197a 100644
--- a/src/devices/bus/neogeo/prot_pvc.h
+++ b/src/devices/bus/neogeo/prot_pvc.h
@@ -20,7 +20,7 @@ public:
void pvc_write_unpack_color();
void pvc_write_pack_color();
-// void pvc_write_bankswitch(address_space &space);
+// void pvc_write_bankswitch(address_space &space);
UINT32 get_bank_base();
DECLARE_READ16_MEMBER(protection_r);
DECLARE_WRITE16_MEMBER(protection_w);
diff --git a/src/devices/bus/neogeo/prot_sma.cpp b/src/devices/bus/neogeo/prot_sma.cpp
index f4a25600e5f..f18481d51be 100644
--- a/src/devices/bus/neogeo/prot_sma.cpp
+++ b/src/devices/bus/neogeo/prot_sma.cpp
@@ -215,7 +215,7 @@ UINT32 sma_prot_device::kof99_bank_base(UINT16 sel)
0x588800, 0x581800, 0x599800, 0x594800,
0x598000, /* rest not used? */
};
-
+
/* unscramble bank number */
int data =
(BIT(sel, 14) << 0)+
@@ -224,7 +224,7 @@ UINT32 sma_prot_device::kof99_bank_base(UINT16 sel)
(BIT(sel, 10) << 3)+
(BIT(sel, 12) << 4)+
(BIT(sel, 5) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -249,7 +249,7 @@ UINT32 sma_prot_device::garou_bank_base(UINT16 sel)
0x5d0000, 0x5d8000, 0x5e0000, 0x5e8000, // 48
0x5f0000, 0x5f8000, 0x600000, // rest not used?
};
-
+
// unscramble bank number
int data =
(BIT(sel, 5) << 0)+
@@ -258,7 +258,7 @@ UINT32 sma_prot_device::garou_bank_base(UINT16 sel)
(BIT(sel, 6) << 3)+
(BIT(sel, 14) << 4)+
(BIT(sel, 12) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -285,7 +285,7 @@ UINT32 sma_prot_device::garouh_bank_base(UINT16 sel)
0x000000, 0x000000, 0x000000, 0x000000, // 56
0x000000, 0x000000, 0x000000, 0x000000, // 60
};
-
+
// unscramble bank number
int data =
(BIT(sel, 4) << 0)+
@@ -294,7 +294,7 @@ UINT32 sma_prot_device::garouh_bank_base(UINT16 sel)
(BIT(sel, 2) << 3)+
(BIT(sel, 11) << 4)+
(BIT(sel, 13) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -318,7 +318,7 @@ UINT32 sma_prot_device::mslug3_bank_base(UINT16 sel)
0x460000, 0x470000, 0x4a0000, 0x4b0000, // 44
0x4c0000, // rest not used?
};
-
+
// unscramble bank number
int data =
(BIT(sel, 14) << 0)+
@@ -327,7 +327,7 @@ UINT32 sma_prot_device::mslug3_bank_base(UINT16 sel)
(BIT(sel, 6) << 3)+
(BIT(sel, 3) << 4)+
(BIT(sel, 9) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -347,7 +347,7 @@ UINT32 sma_prot_device::kof2000_bank_base(UINT16 sel)
0x52d000, 0x62d000, 0x52e800, 0x62e800, // 28
0x618000, 0x619000, 0x61a000, 0x61a800, // 32
};
-
+
// unscramble bank number
int data =
(BIT(sel, 15) << 0)+
@@ -356,7 +356,7 @@ UINT32 sma_prot_device::kof2000_bank_base(UINT16 sel)
(BIT(sel, 3) << 3)+
(BIT(sel, 10) << 4)+
(BIT(sel, 5) << 5);
-
+
int bankaddress = 0x100000 + bankoffset[data];
return bankaddress;
}
@@ -445,7 +445,7 @@ void sma_prot_device::garouh_decrypt_68k(UINT8* base)
{
// thanks to Razoola and Mr K for the info
UINT16 *rom = (UINT16 *)(base + 0x100000);
-
+
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = BITSWAP16(rom[i],14,5,1,11,7,4,10,15,3,12,8,13,0,2,9,6);
@@ -471,7 +471,7 @@ void sma_prot_device::mslug3_decrypt_68k(UINT8* base)
{
// thanks to Razoola and Mr K for the info
UINT16 *rom = (UINT16 *)(base + 0x100000);
-
+
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = BITSWAP16(rom[i],4,11,14,3,1,13,0,7,2,8,12,15,10,9,5,6);
@@ -497,7 +497,7 @@ void sma_prot_device::kof2000_decrypt_68k(UINT8* base)
{
// thanks to Razoola and Mr K for the info
UINT16 *rom = (UINT16 *)(base + 0x100000);
-
+
// swap data lines on the whole ROMs
for (int i = 0; i < 0x800000/2; i++)
rom[i] = BITSWAP16(rom[i],12,8,11,3,15,14,7,0,10,13,6,5,9,2,1,4);
@@ -516,5 +516,3 @@ void sma_prot_device::kof2000_decrypt_68k(UINT8* base)
for (int i = 0; i < 0x0c0000/2; i++)
rom[i] = rom[0x73a000/2 + BITSWAP24(i,23,22,21,20,19,18,8,4,15,13,3,14,16,2,6,17,7,12,10,0,5,11,1,9)];
}
-
-
diff --git a/src/devices/bus/neogeo/pvc.cpp b/src/devices/bus/neogeo/pvc.cpp
index 6ad58cd4b9d..fbf2cc9b2d8 100644
--- a/src/devices/bus/neogeo/pvc.cpp
+++ b/src/devices/bus/neogeo/pvc.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
PVC encrypted cart type (+ CMC + PCM2)
diff --git a/src/devices/bus/neogeo/rom.cpp b/src/devices/bus/neogeo/rom.cpp
index 8cfd95419cd..9804ba89e2c 100644
--- a/src/devices/bus/neogeo/rom.cpp
+++ b/src/devices/bus/neogeo/rom.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Standard cart type, possibly with bankswitch in the area beyond 0x100000
(We also include here V-Liner, which uses a standard cart + RAM + some custom input)
@@ -85,4 +85,3 @@ void neogeo_vliner_cart::device_reset()
{
memset(m_cart_ram, 0, 0x2000);
}
-
diff --git a/src/devices/bus/neogeo/rom.h b/src/devices/bus/neogeo/rom.h
index f59dde03095..99609e2d198 100644
--- a/src/devices/bus/neogeo/rom.h
+++ b/src/devices/bus/neogeo/rom.h
@@ -39,15 +39,15 @@ class neogeo_vliner_cart : public neogeo_rom_device
{
public:
neogeo_vliner_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual DECLARE_READ16_MEMBER(ram_r) override { return m_cart_ram[offset]; }
virtual DECLARE_WRITE16_MEMBER(ram_w) override { COMBINE_DATA(&m_cart_ram[offset]); }
virtual int get_fixed_bank_type(void) override { return 0; }
-
+
virtual void device_start() override;
virtual void device_reset() override;
-
+
private:
UINT16 m_cart_ram[0x1000];
};
diff --git a/src/devices/bus/neogeo/sbp.cpp b/src/devices/bus/neogeo/sbp.cpp
index 78a5f35dc82..805aeff1214 100644
--- a/src/devices/bus/neogeo/sbp.cpp
+++ b/src/devices/bus/neogeo/sbp.cpp
@@ -1,13 +1,13 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
Super Bubble Pop cart type
-
+
Note: since protection here involves accesses to ROM, we include the scrambling in this
file rather than in a separate prot_* source
-
+
***********************************************************************************************************/
@@ -75,7 +75,7 @@ void neogeo_sbp_cart::patch(UINT8* cpurom, UINT32 cpurom_size)
{
/* the game code clears the text overlay used ingame immediately after writing it.. why? protection? sloppy code that the hw ignores? imperfect emulation? */
UINT16* rom = (UINT16*)cpurom;
-
+
rom[0x2a6f8/2] = 0x4e71;
rom[0x2a6fa/2] = 0x4e71;
rom[0x2a6fc/2] = 0x4e71;
diff --git a/src/devices/bus/neogeo/sbp.h b/src/devices/bus/neogeo/sbp.h
index 147d3ae7a93..a46fef86ecf 100644
--- a/src/devices/bus/neogeo/sbp.h
+++ b/src/devices/bus/neogeo/sbp.h
@@ -16,13 +16,13 @@ class neogeo_sbp_cart : public neogeo_rom_device
{
public:
neogeo_sbp_cart(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
virtual void device_start() override;
virtual void device_reset() override;
virtual DECLARE_WRITE16_MEMBER(protection_w) override;
virtual DECLARE_READ16_MEMBER(protection_r) override;
-
+
virtual void decrypt_all(DECRYPT_ALL_PARAMS) override;
virtual int get_fixed_bank_type(void) override { return 0; }
diff --git a/src/devices/bus/neogeo/slot.cpp b/src/devices/bus/neogeo/slot.cpp
index b7ceb2d12cf..af2f151ee8d 100644
--- a/src/devices/bus/neogeo/slot.cpp
+++ b/src/devices/bus/neogeo/slot.cpp
@@ -3,7 +3,7 @@
/***********************************************************************************************************
SNK Neo Geo cartslot emulation
-
+
***********************************************************************************************************/
#include "slot.h"
@@ -44,15 +44,15 @@ UINT32 device_neogeo_cart_interface::get_region_mask(UINT8* rgn, UINT32 rgn_size
// get mask based on the length rounded up to the nearest power of 2
UINT32 mask = 0xffffffff;
UINT32 len = rgn_size;
-
+
for (UINT32 bit = 0x80000000; bit != 0; bit >>= 1)
{
if ((len * 2 - 1) & bit)
break;
-
+
mask >>= 1;
}
-
+
return mask;
}
@@ -64,7 +64,7 @@ void device_neogeo_cart_interface::optimize_sprites(UINT8* region_sprites, UINT3
m_sprites_opt.resize(spritegfx_address_mask + 1);
UINT8 *dest = &m_sprites_opt[0];
-
+
for (unsigned i = 0; i < region_sprites_size; i += 0x80, src += 0x80)
{
for (unsigned y = 0; y < 0x10; y++)
@@ -76,7 +76,7 @@ void device_neogeo_cart_interface::optimize_sprites(UINT8* region_sprites, UINT3
(((src[0x42 | (y << 2)] >> x) & 0x01) << 1) |
(((src[0x40 | (y << 2)] >> x) & 0x01) << 0);
}
-
+
for (unsigned x = 0; x < 8; x++)
{
*(dest++) = (((src[0x03 | (y << 2)] >> x) & 0x01) << 3) |
@@ -219,7 +219,7 @@ static int neogeo_get_pcb_id(const char *slot)
if (!core_stricmp(elem.slot_option, slot))
return elem.pcb_id;
}
-
+
return 0;
}
diff --git a/src/devices/bus/neogeo/slot.h b/src/devices/bus/neogeo/slot.h
index 3bb01d8c359..482e096272b 100644
--- a/src/devices/bus/neogeo/slot.h
+++ b/src/devices/bus/neogeo/slot.h
@@ -87,7 +87,7 @@ public:
// construction/destruction
device_neogeo_cart_interface(const machine_config &mconfig, device_t &device);
virtual ~device_neogeo_cart_interface();
-
+
// reading from ROM
virtual DECLARE_READ16_MEMBER(rom_r) { return 0xffff; }
virtual DECLARE_WRITE16_MEMBER(banksel_w) { };
@@ -102,7 +102,7 @@ public:
virtual void decrypt_all(DECRYPT_ALL_PARAMS) { };
virtual int get_fixed_bank_type(void) { return 0; }
-
+
void rom_alloc(UINT32 size) { m_rom.resize(size/sizeof(UINT16)); }
UINT16* get_rom_base() { return &m_rom[0]; }
UINT32 get_rom_size() { return m_rom.size() * sizeof(UINT16); }
@@ -114,19 +114,19 @@ public:
UINT32 get_fixed_size() { return m_fixed.size(); }
UINT8* get_region_fixed_base() { if (m_region_fixed.found()) return m_region_fixed->base(); return nullptr; }
UINT32 get_region_fixed_size() { if (m_region_fixed.found()) return m_region_fixed->bytes(); return 0; }
-
+
void audio_alloc(UINT32 size) { m_audio.resize(size); }
UINT8* get_audio_base() { return &m_audio[0]; }
UINT32 get_audio_size() { return m_audio.size(); }
UINT8* get_region_audio_base() { if (m_region_audio.found()) return m_region_audio->base(); return nullptr; }
UINT32 get_region_audio_size() { if (m_region_audio.found()) return m_region_audio->bytes(); return 0; }
-
+
void audiocrypt_alloc(UINT32 size) { m_audiocrypt.resize(size); }
UINT8* get_audiocrypt_base() { if (m_audiocrypt.size() == 0) return nullptr; else return &m_audiocrypt[0]; }
UINT32 get_audiocrypt_size() { return m_audiocrypt.size(); }
UINT8* get_region_audiocrypt_base() { if (m_region_audiocrypt.found()) return m_region_audiocrypt->base(); return nullptr; }
UINT32 get_region_audiocrypt_size() { if (m_region_audiocrypt.found()) return m_region_audiocrypt->bytes(); return 0; }
-
+
// TODO: review sprite code later!!
void sprites_alloc(UINT32 size) { m_sprites.resize(size); }
UINT8* get_sprites_base() { return &m_sprites[0]; }
@@ -139,7 +139,7 @@ public:
UINT32 get_ym_size() { return m_ym.size(); }
UINT8* get_region_ym_base() { if (m_region_ym.found()) return m_region_ym->base(); return nullptr; }
UINT32 get_region_ym_size() { if (m_region_ym.found()) return m_region_ym->bytes(); return 0; }
-
+
void ymdelta_alloc(UINT32 size) { m_ymdelta.resize(size); }
UINT8* get_ymdelta_base() { return &m_ymdelta[0]; }
UINT32 get_ymdelta_size() { return m_ymdelta.size(); }
@@ -172,7 +172,7 @@ protected:
optional_memory_region m_region_spr;
optional_memory_region m_region_ym;
optional_memory_region m_region_ymd;
-
+
UINT32 get_region_mask(UINT8* rgn, UINT32 rgn_size);
};
@@ -228,7 +228,7 @@ public:
}
return nullptr;
}
- UINT32 get_rom_size() {
+ UINT32 get_rom_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_rom_size(); else return m_cart->get_rom_size();
}
@@ -240,7 +240,7 @@ public:
}
return nullptr;
}
- UINT32 get_fixed_size() {
+ UINT32 get_fixed_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_fixed_size(); else return m_cart->get_fixed_size();
}
@@ -252,7 +252,7 @@ public:
}
return nullptr;
}
- UINT32 get_sprites_size() {
+ UINT32 get_sprites_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_sprites_size(); else return m_cart->get_sprites_size();
}
@@ -264,7 +264,7 @@ public:
}
return nullptr;
}
- UINT32 get_audio_size() {
+ UINT32 get_audio_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_audio_size(); else return m_cart->get_audio_size();
}
@@ -276,7 +276,7 @@ public:
}
return nullptr;
}
- UINT32 get_audiocrypt_size() {
+ UINT32 get_audiocrypt_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_audiocrypt_size(); else return m_cart->get_audiocrypt_size();
}
@@ -288,7 +288,7 @@ public:
}
return nullptr;
}
- UINT32 get_ym_size() {
+ UINT32 get_ym_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_ym_size(); else return m_cart->get_ym_size();
}
@@ -300,7 +300,7 @@ public:
}
return nullptr;
}
- UINT32 get_ymdelta_size() {
+ UINT32 get_ymdelta_size() {
if (m_cart) {
if (!user_loadable()) return m_cart->get_region_ymdelta_size(); else return m_cart->get_ymdelta_size();
}
@@ -310,7 +310,7 @@ public:
UINT8* get_sprites_opt_base() {
if (m_cart) return m_cart->get_sprites_opt_base(); else return nullptr;
}
- UINT32 get_sprites_opt_size() {
+ UINT32 get_sprites_opt_size() {
if (m_cart) return m_cart->get_sprites_opt_size(); else return 0;
}
diff --git a/src/devices/bus/neogeo/sma.cpp b/src/devices/bus/neogeo/sma.cpp
index e3f230d9412..d63d3b2bfbf 100644
--- a/src/devices/bus/neogeo/sma.cpp
+++ b/src/devices/bus/neogeo/sma.cpp
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:S. Smith,David Haywood,Fabio Priuli
/***********************************************************************************************************
-
+
Neo Geo cart emulation
SMA encrypted cart type (+ CMC42 or CMC50)
@@ -149,4 +149,3 @@ void neogeo_sma_kof2000_cart::decrypt_all(DECRYPT_ALL_PARAMS)
m_cmc_prot->cmc50_gfx_decrypt(spr_region, spr_region_size, KOF2000_GFX_KEY);
m_cmc_prot->sfix_decrypt(spr_region, spr_region_size, fix_region, fix_region_size);
}
-
diff --git a/src/devices/bus/nes/mmc3_clones.cpp b/src/devices/bus/nes/mmc3_clones.cpp
index d8dfa349c6f..72fde58282f 100644
--- a/src/devices/bus/nes/mmc3_clones.cpp
+++ b/src/devices/bus/nes/mmc3_clones.cpp
@@ -2502,13 +2502,13 @@ WRITE8_MEMBER(nes_pjoy84_device::write_m)
}
/*-------------------------------------------------
-
+
COOLBOY
-
+
Games: several multigame carts
-
+
In MESS: Not Supported.
-
+
-------------------------------------------------*/
void nes_coolboy_device::prg_cb(int start, int bank)
@@ -2526,7 +2526,7 @@ void nes_coolboy_device::chr_cb(int start, int bank, int source)
WRITE8_MEMBER(nes_coolboy_device::write_m)
{
LOG_MMC(("coolboy write_m, offset: %04x, data: %02x\n", offset, data));
-
+
m_reg[offset & 0x03] = data;
//set_base_mask();
set_chr(m_chr_source, m_chr_base, m_chr_mask);
diff --git a/src/devices/bus/nes/mmc3_clones.h b/src/devices/bus/nes/mmc3_clones.h
index 4143e88bca7..e6878d9d461 100644
--- a/src/devices/bus/nes/mmc3_clones.h
+++ b/src/devices/bus/nes/mmc3_clones.h
@@ -661,17 +661,17 @@ class nes_coolboy_device : public nes_txrom_device
public:
// construction/destruction
nes_coolboy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
+
// device-level overrides
-// virtual void device_start() override;
+// virtual void device_start() override;
virtual DECLARE_WRITE8_MEMBER(write_m) override;
virtual void prg_cb(int start, int bank) override;
virtual void chr_cb(int start, int bank, int source) override;
-
-// virtual void pcb_reset() override;
-
+
+// virtual void pcb_reset() override;
+
private:
-// inline void set_base_mask();
+// inline void set_base_mask();
UINT8 m_reg[4];
};
diff --git a/src/devices/cpu/drcbec.cpp b/src/devices/cpu/drcbec.cpp
index c48bb990f82..193512feb88 100644
--- a/src/devices/cpu/drcbec.cpp
+++ b/src/devices/cpu/drcbec.cpp
@@ -1070,7 +1070,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_TZCNT, 4, 0): // TZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_TZCNT, 4, 0): // TZCNT dst,src
PARAM0 = tzcount32(PARAM1);
break;
@@ -1689,7 +1689,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_TZCNT, 8, 0): // DTZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_TZCNT, 8, 0): // DTZCNT dst,src
DPARAM0 = tzcount64(DPARAM1);
break;
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index 39863b42f15..b6a5e67732b 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -4303,7 +4303,7 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_add_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
+ emit_add_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && inst.flags() == 0)
@@ -4331,7 +4331,7 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_add_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
+ emit_add_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // add [dstp],src1p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && short_immediate(src2p.immediate()) && inst.flags() == 0)
@@ -5216,7 +5216,7 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_or_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
+ emit_or_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
// general case
else
@@ -5236,7 +5236,7 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_or_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
+ emit_or_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // or [dstp],src1p
// general case
else
@@ -5278,11 +5278,11 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_xor_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
+ emit_xor_m32_p32(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
// dstp == src1p register
else if (dstp.is_int_register() && dstp == src1p)
- emit_xor_r32_p32(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
+ emit_xor_r32_p32(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
// general case
else
@@ -5302,11 +5302,11 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
// dstp == src2p in memory
else if (dstp.is_memory() && dstp == src2p)
- emit_xor_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
+ emit_xor_m64_p64(dst, MABS(dstp.memory()), src1p, inst); // xor [dstp],src1p
// dstp == src1p register
else if (dstp.is_int_register() && dstp == src1p)
- emit_xor_r64_p64(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
+ emit_xor_r64_p64(dst, dstp.ireg(), src2p, inst); // xor dstp,src2p
// general case
else
@@ -5374,16 +5374,16 @@ void drcbe_x64::op_tzcnt(x86code *&dst, const instruction &inst)
// normalize parameters
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
- be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
// 32-bit form
if (inst.size() == 4)
{
int dstreg = dstp.select_register(REG_EAX);
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -5391,11 +5391,11 @@ void drcbe_x64::op_tzcnt(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
int dstreg = dstp.select_register(REG_RAX);
- emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_r64_imm(dst, REG_RCX, 64); // mov rcx,64
- emit_bsf_r64_r64(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_r64_imm(dst, REG_RCX, 64); // mov rcx,64
+ emit_bsf_r64_r64(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
diff --git a/src/devices/cpu/drcbex86.cpp b/src/devices/cpu/drcbex86.cpp
index 2613028d03b..e4d40ecfd0e 100644
--- a/src/devices/cpu/drcbex86.cpp
+++ b/src/devices/cpu/drcbex86.cpp
@@ -5492,31 +5492,31 @@ void drcbe_x86::op_tzcnt(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
int dstreg = dstp.select_register(REG_EAX);
-
+
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
emit_link skip;
- emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
- emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
- emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
- emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
- emit_bsf_r32_r32(dst, dstreg, REG_EDX); // bsf dstreg,edx
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_add_r32_imm(dst, dstreg, 32); // add dstreg,32
- track_resolve_link(dst, skip); // skip:
- emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
+ emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
+ emit_bsf_r32_r32(dst, dstreg, dstreg); // bsf dstreg,dstreg
+ emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
+ emit_mov_r32_imm(dst, REG_ECX, 32); // mov ecx,32
+ emit_bsf_r32_r32(dst, dstreg, REG_EDX); // bsf dstreg,edx
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_add_r32_imm(dst, dstreg, 32); // add dstreg,32
+ track_resolve_link(dst, skip); // skip:
+ emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
}
}
diff --git a/src/devices/cpu/h8/h8.cpp b/src/devices/cpu/h8/h8.cpp
index a92143e5680..bd53761bb6a 100644
--- a/src/devices/cpu/h8/h8.cpp
+++ b/src/devices/cpu/h8/h8.cpp
@@ -146,9 +146,9 @@ void h8_device::set_current_dma(h8_dma_state *state)
logerror("DMA done\n");
else
logerror("New current dma s=%x d=%x is=%d id=%d count=%x m=%d\n",
- state->source, state->dest, state->incs, state->incd,
- state->count, state->mode_16 ? 16 : 8);
-
+ state->source, state->dest, state->incs, state->incd,
+ state->count, state->mode_16 ? 16 : 8);
+
}
void h8_device::set_current_dtc(h8_dtc_state *state)
diff --git a/src/devices/cpu/h8/h8_dma.cpp b/src/devices/cpu/h8/h8_dma.cpp
index 637e1a98b5c..fb907ffcef1 100644
--- a/src/devices/cpu/h8/h8_dma.cpp
+++ b/src/devices/cpu/h8/h8_dma.cpp
@@ -277,7 +277,7 @@ bool h8_dma_channel_device::start_test(int vector)
if(dte == 0)
return false;
- throw emu_fatalerror("%s: DMA startup test in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA startup test in short address mode unimplemented.\n", tag());
}
}
@@ -297,7 +297,7 @@ void h8_dma_channel_device::start(int submodule)
cpu->set_current_dma(state + submodule);
}
} else {
- throw emu_fatalerror("%s: DMA start in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA start in short address mode unimplemented.\n", tag());
}
}
@@ -315,6 +315,6 @@ void h8_dma_channel_device::count_done(int submodule)
throw emu_fatalerror("%s: DMA end-of-transfer interrupt in full address/normal mode unimplemented.\n", tag());
}
} else {
- throw emu_fatalerror("%s: DMA count done in short address mode unimplemented.\n", tag());
+ throw emu_fatalerror("%s: DMA count done in short address mode unimplemented.\n", tag());
}
}
diff --git a/src/devices/cpu/h8/h8_dma.h b/src/devices/cpu/h8/h8_dma.h
index e241fb5653e..c561f15aea8 100644
--- a/src/devices/cpu/h8/h8_dma.h
+++ b/src/devices/cpu/h8/h8_dma.h
@@ -25,7 +25,7 @@ struct h8_dma_state {
#define MCFG_H8_DMA_ADD( _tag ) \
MCFG_DEVICE_ADD( _tag, H8_DMA, 0 )
-#define MCFG_H8_DMA_CHANNEL_ADD( _tag, intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf ) \
+#define MCFG_H8_DMA_CHANNEL_ADD( _tag, intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf ) \
MCFG_DEVICE_ADD( _tag, H8_DMA_CHANNEL, 0 ) \
downcast<h8_dma_channel_device *>(device)->set_info(intc, irq_base, v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, va, vb, vc, vd, ve, vf);
diff --git a/src/devices/cpu/h8/h8_dtc.cpp b/src/devices/cpu/h8/h8_dtc.cpp
index 0efb6200a54..12cd8155773 100644
--- a/src/devices/cpu/h8/h8_dtc.cpp
+++ b/src/devices/cpu/h8/h8_dtc.cpp
@@ -131,7 +131,7 @@ void h8_dtc_device::vector_done(int vector)
UINT32 mode = sra & 0x0c000000;
if(V>=1) logerror("regs at %08x sra=%08x dar=%08x cr=%08x %s mode\n", state->base, sra, dar, cr,
- mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
+ mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
state->incs = sra & 0x80000000 ?
sra & 0x40000000 ? sra & 0x01000000 ? -2 : -1 :
sra & 0x01000000 ? 2 : 1 :
@@ -140,7 +140,7 @@ void h8_dtc_device::vector_done(int vector)
sra & 0x10000000 ? sra & 0x01000000 ? -2 : -1 :
sra & 0x01000000 ? 2 : 1 :
0;
-
+
switch(mode) {
case 0x00000000: case 0x0c0000000:
state->count = 1;
@@ -215,7 +215,7 @@ bool h8_dtc_device::trigger_dtc(int vector)
{
int slot = vector_to_enable[vector];
if(slot == -1)
- return false;
+ return false;
if(dtcer[slot >> 3] & (0x01 << (7-(slot & 7)))) {
edge(vector);
return true;
@@ -266,4 +266,3 @@ void h8_dtc_device::count_done(int id)
cpu->request_state(h8_device::STATE_DTC_WRITEBACK);
waiting_writeback.push_back(id);
}
-
diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp
index e4806fa4138..e07cca2722b 100644
--- a/src/devices/cpu/h8/h8_sci.cpp
+++ b/src/devices/cpu/h8/h8_sci.cpp
@@ -44,13 +44,13 @@ WRITE8_MEMBER(h8_sci_device::smr_w)
{
smr = data;
if(V>=2) logerror("smr_w %02x %s %c%c%c%s /%d (%06x)\n", data,
- data & SMR_CA ? "sync" : "async",
- data & SMR_CHR ? '7' : '8',
- data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
- data & SMR_STOP ? '2' : '1',
- data & SMR_MP ? " mp" : "",
- 1 << 2*(data & SMR_CKS),
- cpu->pc());
+ data & SMR_CA ? "sync" : "async",
+ data & SMR_CHR ? '7' : '8',
+ data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
+ data & SMR_STOP ? '2' : '1',
+ data & SMR_MP ? " mp" : "",
+ 1 << 2*(data & SMR_CKS),
+ cpu->pc());
clock_update();
}
@@ -86,14 +86,14 @@ bool h8_sci_device::has_recv_error() const
WRITE8_MEMBER(h8_sci_device::scr_w)
{
if(V>=2) logerror("scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", data,
- data & SCR_TIE ? " txi" : "",
- data & SCR_RIE ? " rxi" : "",
- data & SCR_TE ? " tx" : "",
- data & SCR_RE ? " rx" : "",
- data & SCR_MPIE ? " mpi" : "",
- data & SCR_TEIE ? " tei" : "",
- data & SCR_CKE,
- cpu->pc());
+ data & SCR_TIE ? " txi" : "",
+ data & SCR_RIE ? " rxi" : "",
+ data & SCR_TE ? " tx" : "",
+ data & SCR_RE ? " rx" : "",
+ data & SCR_MPIE ? " mpi" : "",
+ data & SCR_TEIE ? " tei" : "",
+ data & SCR_CKE,
+ cpu->pc());
UINT8 delta = scr ^ data;
scr = data;
diff --git a/src/devices/cpu/h8/h8_timer16.cpp b/src/devices/cpu/h8/h8_timer16.cpp
index 4c7bec631a5..796a26c0fef 100644
--- a/src/devices/cpu/h8/h8_timer16.cpp
+++ b/src/devices/cpu/h8/h8_timer16.cpp
@@ -103,13 +103,13 @@ WRITE8_MEMBER(h8_timer16_channel_device::tier_w)
tier = data;
tier_update();
if(V>=1) logerror("irq %c%c%c%c%c%c trigger=%d\n",
- ier & IRQ_A ? 'a' : '.',
- ier & IRQ_B ? 'b' : '.',
- ier & IRQ_C ? 'c' : '.',
- ier & IRQ_D ? 'd' : '.',
- ier & IRQ_V ? 'v' : '.',
- ier & IRQ_U ? 'u' : '.',
- ier & IRQ_TRIG ? 1 : 0);
+ ier & IRQ_A ? 'a' : '.',
+ ier & IRQ_B ? 'b' : '.',
+ ier & IRQ_C ? 'c' : '.',
+ ier & IRQ_D ? 'd' : '.',
+ ier & IRQ_V ? 'v' : '.',
+ ier & IRQ_U ? 'u' : '.',
+ ier & IRQ_TRIG ? 1 : 0);
recalc_event();
}
diff --git a/src/devices/cpu/h8/h8_timer8.cpp b/src/devices/cpu/h8/h8_timer8.cpp
index 0b9d5da933c..671170e1cab 100644
--- a/src/devices/cpu/h8/h8_timer8.cpp
+++ b/src/devices/cpu/h8/h8_timer8.cpp
@@ -130,9 +130,9 @@ void h8_timer8_channel_device::update_tcr()
}
if(V>=1) p += sprintf(p, ", irq=%c%c%c\n",
- tcr & TCR_CMIEB ? 'b' : '-',
- tcr & TCR_CMIEA ? 'a' : '-',
- tcr & TCR_OVIE ? 'o' : '-');
+ tcr & TCR_CMIEB ? 'b' : '-',
+ tcr & TCR_CMIEA ? 'a' : '-',
+ tcr & TCR_OVIE ? 'o' : '-');
logerror(buf);
}
diff --git a/src/devices/cpu/h8/h8_watchdog.cpp b/src/devices/cpu/h8/h8_watchdog.cpp
index 91c097b8db1..19d9131819a 100644
--- a/src/devices/cpu/h8/h8_watchdog.cpp
+++ b/src/devices/cpu/h8/h8_watchdog.cpp
@@ -27,7 +27,7 @@ UINT64 h8_watchdog_device::internal_update(UINT64 current_time)
int shift = (type == S ? div_s : div_bh)[tcsr & TCSR_CKS];
UINT64 spos = tcnt_cycle_base >> shift;
return (spos + 0x100 - tcnt) << shift;
-
+
} else
return 0;
}
@@ -44,7 +44,7 @@ void h8_watchdog_device::tcnt_update(UINT64 cur_time)
int next_tcnt = tcnt + int(epos - spos);
tcnt = next_tcnt;
tcnt_cycle_base = cur_time;
- // logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, tcnt, next_tcnt, shift);
+ // logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, tcnt, next_tcnt, shift);
if(next_tcnt >= 0x100) {
logerror("watchdog triggered\n");
@@ -57,7 +57,7 @@ void h8_watchdog_device::tcnt_update(UINT64 cur_time)
if(!(tcsr & TCSR_OVF)) {
tcsr |= TCSR_OVF;
intc->internal_interrupt(irq);
- }
+ }
}
}
} else
@@ -91,7 +91,7 @@ WRITE16_MEMBER(h8_watchdog_device::wd_w)
if(tcsr & TCSR_TME) {
tcnt = data & 0xff;
tcnt_cycle_base = cpu->total_cycles();
- // logerror("%10lld tcnt = %02x\n", tcnt_cycle_base, tcnt);
+ // logerror("%10lld tcnt = %02x\n", tcnt_cycle_base, tcnt);
}
cpu->internal_update();
}
diff --git a/src/devices/cpu/h8/h8_watchdog.h b/src/devices/cpu/h8/h8_watchdog.h
index d5c0d5d21a1..efb77b29c05 100644
--- a/src/devices/cpu/h8/h8_watchdog.h
+++ b/src/devices/cpu/h8/h8_watchdog.h
@@ -43,7 +43,7 @@
#include "h8.h"
#include "h8_intc.h"
-#define MCFG_H8_WATCHDOG_ADD( _tag, intc, irq, type ) \
+#define MCFG_H8_WATCHDOG_ADD( _tag, intc, irq, type ) \
MCFG_DEVICE_ADD( _tag, H8_WATCHDOG, 0 ) \
downcast<h8_watchdog_device *>(device)->set_info(intc, irq, type);
diff --git a/src/devices/cpu/hphybrid/hphybrid.cpp b/src/devices/cpu/hphybrid/hphybrid.cpp
index 5c731378093..52b3c405c87 100644
--- a/src/devices/cpu/hphybrid/hphybrid.cpp
+++ b/src/devices/cpu/hphybrid/hphybrid.cpp
@@ -133,7 +133,7 @@ WRITE_LINE_MEMBER(hp_hybrid_cpu_device::flag_w)
UINT8 hp_hybrid_cpu_device::pa_r(void) const
{
- return CURRENT_PA;
+ return CURRENT_PA;
}
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth)
@@ -1092,7 +1092,7 @@ void hp_hybrid_cpu_device::handle_dma(void)
m_icount -= 9;
}
- // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work)
+ // Mystery solved: DMA is not automatically disabled at TC (test of 9845's graphic memory relies on this to work)
}
UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h
index aeb5de6586b..c34d6f0b252 100644
--- a/src/devices/cpu/hphybrid/hphybrid.h
+++ b/src/devices/cpu/hphybrid/hphybrid.h
@@ -87,7 +87,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(status_w);
DECLARE_WRITE_LINE_MEMBER(flag_w);
- UINT8 pa_r(void) const;
+ UINT8 pa_r(void) const;
template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h
index c1649f406be..aecbd041557 100644
--- a/src/devices/cpu/tms1000/tms1k_base.h
+++ b/src/devices/cpu/tms1000/tms1k_base.h
@@ -110,7 +110,7 @@ public:
template<class _Object> static devcb_base &set_write_r_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_write_r.set_callback(object); }
template<class _Object> static devcb_base &set_power_off_callback(device_t &device, _Object object) { return downcast<tms1k_base_device &>(device).m_power_off.set_callback(object); }
static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1k_base_device &>(device).m_output_pla_table = output_pla; }
-
+
UINT8 debug_peek_o_index() { return m_o_index; } // get output PLA index, for debugging (don't use in emulation)
// microinstructions
diff --git a/src/devices/machine/gen_latch.h b/src/devices/machine/gen_latch.h
index 8696353fff4..07938a7b5d9 100644
--- a/src/devices/machine/gen_latch.h
+++ b/src/devices/machine/gen_latch.h
@@ -40,7 +40,7 @@ public:
DECLARE_WRITE8_MEMBER( clear_w );
DECLARE_WRITE_LINE_MEMBER( preset_w );
DECLARE_WRITE_LINE_MEMBER( clear_w );
-
+
void preset_w(UINT16 value) { m_latched_value = value; }
protected:
diff --git a/src/devices/machine/gt64xxx.cpp b/src/devices/machine/gt64xxx.cpp
index a92326f3c4a..263024010c8 100644
--- a/src/devices/machine/gt64xxx.cpp
+++ b/src/devices/machine/gt64xxx.cpp
@@ -241,7 +241,7 @@ void gt64xxx_device::map_cpu_space()
dma_addr_map[index].low_addr = (m_reg[GREG_PCI_MEM1_LO] << 21);
dma_addr_map[index].high_addr = (dma_addr_map[index].low_addr & 0xf0000000) | (m_reg[GREG_PCI_MEM1_HI] << 21) | 0x1fffff;
}
-
+
switch (index) {
case proc_addr_bank::ADDR_PCI_IO:
dma_addr_map[index].space = &this->space(AS_IO);
@@ -262,7 +262,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
{
int ramIndex;
UINT32 winStart, winEnd, winSize;
-
+
// Not sure if GREG_RAS_1_0_LO should be added on PCI address map side.
// RAS0
ramIndex = 0;
@@ -273,7 +273,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
memory_space->install_write_handler(winStart, winEnd, 0, 0, write32_delegate(FUNC(gt64xxx_device::ras_0_w), this));
if (LOG_GALILEO)
logerror("%s: map_extra RAS0 start=%08X end=%08X size=%08X\n", tag(), winStart, winEnd, winSize);
-
+
// RAS1
ramIndex = 1;
winStart = (m_reg[GREG_RAS_1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20);
@@ -283,7 +283,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
memory_space->install_write_handler(winStart, winEnd, 0, 0, write32_delegate(FUNC(gt64xxx_device::ras_1_w), this));
if (LOG_GALILEO)
logerror("%s: map_extra RAS1 start=%08X end=%08X size=%08X\n", tag(), winStart, winEnd, winSize);
-
+
// RAS2
ramIndex = 2;
winStart = (m_reg[GREG_RAS_1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20);
@@ -293,7 +293,7 @@ void gt64xxx_device::map_extra(UINT64 memory_window_start, UINT64 memory_window_
memory_space->install_write_handler(winStart, winEnd, 0, 0, write32_delegate(FUNC(gt64xxx_device::ras_2_w), this));
if (LOG_GALILEO)
logerror("%s: map_extra RAS2 start=%08X end=%08X size=%08X\n", tag(), winStart, winEnd, winSize);
-
+
// RAS3
ramIndex = 3;
winStart = (m_reg[GREG_RAS_1_0_LO + 0x10 / 4 * (ramIndex / 2)] << 21) | (m_reg[GREG_RAS0_LO + 0x8 / 4 * ramIndex] << 20);
@@ -818,7 +818,7 @@ TIMER_CALLBACK_MEMBER (gt64xxx_device::perform_dma)
which = (m_last_dma + i) % 4;
if ((m_dma_active & (1 << which)) && (m_reg[GREG_DMA0_CONTROL + which] & 0x1000))
break;
-
+
}
// Save which dma is processed for arbitration next time
m_last_dma = which;
diff --git a/src/devices/machine/gt64xxx.h b/src/devices/machine/gt64xxx.h
index 69cde74d34b..6433dcbabde 100644
--- a/src/devices/machine/gt64xxx.h
+++ b/src/devices/machine/gt64xxx.h
@@ -47,7 +47,7 @@
#define TIMER_PERIOD attotime::from_hz(m_clock)
#define PCI_BUS_CLOCK 33000000
// Number of dma words to transfer at a time, real hardware configurable between 8-32
-#define DMA_BURST_SIZE 32
+#define DMA_BURST_SIZE 32
#define DMA_TIMER_PERIOD attotime::from_hz(PCI_BUS_CLOCK / 48)
/* Galileo registers - 0x000-0x3ff */
diff --git a/src/devices/machine/pci-ide.h b/src/devices/machine/pci-ide.h
index 349173ae590..7768a7a44cd 100644
--- a/src/devices/machine/pci-ide.h
+++ b/src/devices/machine/pci-ide.h
@@ -8,7 +8,7 @@ Generic PCI IDE controller implementation.
Based on datasheet for National Semiconductor PC87415
TODO:
- Add pci configuration write to PIF byte
+ Add pci configuration write to PIF byte
***************************************************************************/
#ifndef PCI_IDE_H
diff --git a/src/devices/machine/stvcd.h b/src/devices/machine/stvcd.h
index 7e75fe11255..165407d736e 100644
--- a/src/devices/machine/stvcd.h
+++ b/src/devices/machine/stvcd.h
@@ -1,3 +1,2 @@
// license:LGPL-2.1+
// copyright-holders:Angelo Salese, R. Belmont
-
diff --git a/src/devices/machine/vrc4373.h b/src/devices/machine/vrc4373.h
index bf2ed1fd153..ce7a3f11e92 100644
--- a/src/devices/machine/vrc4373.h
+++ b/src/devices/machine/vrc4373.h
@@ -50,7 +50,7 @@
#define PCI_BUS_CLOCK 33000000
// Number of dma words to transfer at a time, real hardware bursts 8
-#define DMA_BURST_SIZE 128
+#define DMA_BURST_SIZE 128
#define DMA_TIMER_PERIOD attotime::from_hz(PCI_BUS_CLOCK / 32)
#define DMA_BUSY 0x80000000
diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp
index f49b7e9363d..5c3c76abba6 100644
--- a/src/devices/machine/z80scc.cpp
+++ b/src/devices/machine/z80scc.cpp
@@ -27,10 +27,10 @@ DONE (x) (p=partly) NMOS CMOS ESCC EMSCC
p 5-8 bit per char Y Y Y Y
p 1,1.5,2 stop bits Y Y Y Y
x odd/even parity Y Y Y Y
- x x1,x16,x32,x64 Y Y Y Y
+ x x1,x16,x32,x64 Y Y Y Y
p break det/gen Y Y Y Y
x parity, framing & Y Y Y Y
- overrun error det
+ overrun error det
-- byte oriented synchrounous features -------------------------------
Int/ext char sync Y Y Y Y
1/2 synch chars Y Y Y Y
@@ -81,7 +81,7 @@ DONE (x) (p=partly) NMOS CMOS ESCC EMSCC
#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define LOGR(x)
+#define LOGR(x)
#if VERBOSE == 2
#define logerror printf
#endif
@@ -692,7 +692,7 @@ z80scc_channel::z80scc_channel(const machine_config &mconfig, const char *tag, d
m_dtr(0),
m_rts(0),
m_sync(0)
-#if START_BIT_HUNT
+#if START_BIT_HUNT
,m_rcv_mode(RCV_IDLE)
#endif
{
@@ -854,9 +854,9 @@ void z80scc_channel::device_timer(emu_timer &timer, device_timer_id id, int para
//int brconst = m_wr13 << 8 | m_wr12 | 1; // If the counter is 1 the effect is passthrough ehh?! To avoid div0...
if (m_wr14 & WR14_BRG_ENABLE)
{
- // int rate = m_owner->clock() / brconst;
- // attotime attorate = attotime::from_hz(rate);
- // timer.adjust(attorate, id, attorate);
+ // int rate = m_owner->clock() / brconst;
+ // attotime attorate = attotime::from_hz(rate);
+ // timer.adjust(attorate, id, attorate);
txc_w(m_brg_counter & 1);
rxc_w(m_brg_counter & 1);
m_brg_counter++; // Will just keep track of state in timer mode, not hardware counter value.
@@ -869,11 +869,11 @@ void z80scc_channel::device_timer(emu_timer &timer, device_timer_id id, int para
}
break;
default:
- logerror("Spurious timer %d event\n", id);
+ logerror("Spurious timer %d event\n", id);
}
#else
// TODO: Hmmm, either the above default clause is called OR the bellow call is not needed since we handled our local event anyway...?!
- // and the above default is not called unless we implement the BRG timer using diserial timer interfaces...
+ // and the above default is not called unless we implement the BRG timer using diserial timer interfaces...
device_serial_interface::device_timer(timer, id, param, ptr);
#endif
}
@@ -1131,7 +1131,7 @@ int z80scc_channel::get_tx_word_length()
* Break/Abort latch. */
UINT8 z80scc_channel::do_sccreg_rr0()
{
- LOGR(("%s %s <- %02x\n",tag(), FUNCNAME, m_rr0));
+ LOGR(("%s %s <- %02x\n",tag(), FUNCNAME, m_rr0));
return m_rr0;
}
@@ -1836,7 +1836,7 @@ void z80scc_channel::do_sccreg_wr14(UINT8 data)
if ( !(m_wr14 & WR14_BRG_ENABLE) && (data & WR14_BRG_ENABLE) ) // baud rate generator beeing enabled?
{
LOG(("\"%s\": %c : %s Mics Control Bits Baudrate generator enabled with \n", m_owner->tag(), 'A' + m_index, FUNCNAME));
- m_brg_const = 2 + (m_wr13 << 8 | m_wr12);
+ m_brg_const = 2 + (m_wr13 << 8 | m_wr12);
if (data & WR14_BRG_SOURCE) // Do we use the PCLK as baudrate source
{
int rate = m_owner->clock() / (m_brg_const == 0 ? 1 : m_brg_const);
@@ -1999,7 +1999,7 @@ UINT8 z80scc_channel::data_read()
// trigger interrup and lock the fifo if an error is present
if (m_rr1 & (RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR))
{
- logerror("Rx Error %02x\n", m_rr1 & (RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR));
+ logerror("Rx Error %02x\n", m_rr1 & (RR1_CRC_FRAMING_ERROR | RR1_RX_OVERRUN_ERROR | RR1_PARITY_ERROR));
switch (m_wr1 & WR1_RX_INT_MODE_MASK)
{
case WR1_RX_INT_FIRST:
@@ -2074,7 +2074,7 @@ void z80scc_channel::data_write(UINT8 data)
if ((m_wr5 & WR5_TX_ENABLE) && is_transmit_register_empty())
{
- LOG(("%s(%02x) \"%s\": %c : Transmit Data Byte '%02x' %c\n", FUNCNAME, data, m_owner->tag(), 'A' + m_index, m_tx_data, m_tx_data));
+ LOG(("%s(%02x) \"%s\": %c : Transmit Data Byte '%02x' %c\n", FUNCNAME, data, m_owner->tag(), 'A' + m_index, m_tx_data, m_tx_data));
transmit_register_setup(m_tx_data);
// empty transmit buffer
@@ -2103,7 +2103,7 @@ void z80scc_channel::receive_data(UINT8 data)
{
LOG(("\"%s\": %c : Receive Data Byte '%02x'\n", m_owner->tag(), 'A' + m_index, data));
- if (m_rx_fifo_wp + 1 == m_rx_fifo_rp || ( (m_rx_fifo_wp + 1 == m_rx_fifo_sz) && (m_rx_fifo_rp == 0) ))
+ if (m_rx_fifo_wp + 1 == m_rx_fifo_rp || ( (m_rx_fifo_wp + 1 == m_rx_fifo_sz) && (m_rx_fifo_rp == 0) ))
{
// receive overrun error detected
m_rx_error_fifo[m_rx_fifo_wp] |= RR1_RX_OVERRUN_ERROR; // = m_rx_error;
@@ -2308,7 +2308,7 @@ WRITE_LINE_MEMBER( z80scc_channel::rxc_w )
rx_clock_w(state);
else if(state)
{
- if (m_rx_clock == clocks/2 && m_rcv_mode == RCV_SAMPLING)
+ if (m_rx_clock == clocks/2 && m_rcv_mode == RCV_SAMPLING)
rx_clock_w(m_rx_clock < clocks/2);
m_rx_clock++;
@@ -2359,8 +2359,8 @@ void z80scc_channel::update_serial()
else
parity = PARITY_NONE;
- LOG((LLFORMAT " %s() \"%s \"Channel %c setting data frame %d+%d%c%d\n", machine().firstcpu->total_cycles(), FUNCNAME, m_owner->tag(), 'A' + m_index, 1,
- data_bit_count, parity == PARITY_NONE ? 'N' : parity == PARITY_EVEN ? 'E' : 'O', (stop_bits + 1) / 2));
+ LOG((LLFORMAT " %s() \"%s \"Channel %c setting data frame %d+%d%c%d\n", machine().firstcpu->total_cycles(), FUNCNAME, m_owner->tag(), 'A' + m_index, 1,
+ data_bit_count, parity == PARITY_NONE ? 'N' : parity == PARITY_EVEN ? 'E' : 'O', (stop_bits + 1) / 2));
set_data_frame(1, data_bit_count, parity, stop_bits);
#if START_BIT_HUNT
diff --git a/src/devices/machine/z80scc.h b/src/devices/machine/z80scc.h
index cc20c783bdf..e754a3dd544 100644
--- a/src/devices/machine/z80scc.h
+++ b/src/devices/machine/z80scc.h
@@ -229,7 +229,7 @@ public:
UINT8 m_rr6; // REG_RR6_LSB_OR_RR2
UINT8 m_rr7; // REG_RR7_MSB_OR_RR3
UINT8 m_rr8; // REG_RR8_RECEIVE_DATA
- UINT8 m_rr9; // REG_RR9_WR3_OR_RR13
+ UINT8 m_rr9; // REG_RR9_WR3_OR_RR13
UINT8 m_rr10; // REG_RR10_MISC_STATUS
UINT8 m_rr11; // REG_RR11_WR10_OR_RR15
UINT8 m_rr12; // REG_RR12_LO_TIME_CONST
@@ -274,239 +274,239 @@ protected:
// Read registers
enum
{
- REG_RR0_STATUS = 0,
- REG_RR1_SPEC_RCV_COND = 1,
- REG_RR2_INTERRUPT_VECT = 2,
- REG_RR3_INTERUPPT_PEND = 3,
- REG_RR4_WR4_OR_RR0 = 4,
- REG_RR5_WR5_OR_RR0 = 5,
- REG_RR6_LSB_OR_RR2 = 6,
- REG_RR7_MSB_OR_RR3 = 7,
- REG_RR8_RECEIVE_DATA = 8,
- REG_RR9_WR3_OR_RR13 = 9,
- REG_RR10_MISC_STATUS = 10,
- REG_RR11_WR10_OR_RR15 = 11,
- REG_RR12_LO_TIME_CONST = 12,
- REG_RR13_HI_TIME_CONST = 13,
- REG_RR14_WR7_OR_R10 = 14,
- REG_RR15_WR15_EXT_STAT = 15
+ REG_RR0_STATUS = 0,
+ REG_RR1_SPEC_RCV_COND = 1,
+ REG_RR2_INTERRUPT_VECT = 2,
+ REG_RR3_INTERUPPT_PEND = 3,
+ REG_RR4_WR4_OR_RR0 = 4,
+ REG_RR5_WR5_OR_RR0 = 5,
+ REG_RR6_LSB_OR_RR2 = 6,
+ REG_RR7_MSB_OR_RR3 = 7,
+ REG_RR8_RECEIVE_DATA = 8,
+ REG_RR9_WR3_OR_RR13 = 9,
+ REG_RR10_MISC_STATUS = 10,
+ REG_RR11_WR10_OR_RR15 = 11,
+ REG_RR12_LO_TIME_CONST = 12,
+ REG_RR13_HI_TIME_CONST = 13,
+ REG_RR14_WR7_OR_R10 = 14,
+ REG_RR15_WR15_EXT_STAT = 15
};
// Write registers
enum
{
- REG_WR0_COMMAND_REGPT = 0,
- REG_WR1_INT_DMA_ENABLE = 1,
- REG_WR2_INT_VECTOR = 2,
- REG_WR3_RX_CONTROL = 3,
- REG_WR4_RX_TX_MODES = 4,
- REG_WR5_TX_CONTROL = 5,
- REG_WR6_SYNC_OR_SDLC_A = 6,
- REG_WR7_SYNC_OR_SDLC_F = 7,
- REG_WR8_TRANSMIT_DATA = 8,
+ REG_WR0_COMMAND_REGPT = 0,
+ REG_WR1_INT_DMA_ENABLE = 1,
+ REG_WR2_INT_VECTOR = 2,
+ REG_WR3_RX_CONTROL = 3,
+ REG_WR4_RX_TX_MODES = 4,
+ REG_WR5_TX_CONTROL = 5,
+ REG_WR6_SYNC_OR_SDLC_A = 6,
+ REG_WR7_SYNC_OR_SDLC_F = 7,
+ REG_WR8_TRANSMIT_DATA = 8,
REG_WR9_MASTER_INT_CTRL = 9,
REG_WR10_MSC_RX_TX_CTRL = 10,
- REG_WR11_CLOCK_MODES = 11,
- REG_WR12_LO_BAUD_GEN = 12,
- REG_WR13_HI_BAUD_GEN = 13,
- REG_WR14_MISC_CTRL = 14,
+ REG_WR11_CLOCK_MODES = 11,
+ REG_WR12_LO_BAUD_GEN = 12,
+ REG_WR13_HI_BAUD_GEN = 13,
+ REG_WR14_MISC_CTRL = 14,
REG_WR15_EXT_ST_INT_CTRL= 15
};
enum
{
- RR0_RX_CHAR_AVAILABLE = 0x01, // SIO bit
- RR0_ZC = 0x02, // SCC bit
- RR0_TX_BUFFER_EMPTY = 0x04, // SIO
- RR0_DCD = 0x08, // SIO
- RR0_RI = 0x10, // DART bit? TODO: investigate function and remove
- RR0_SYNC_HUNT = 0x10, // SIO bit, not supported
- RR0_CTS = 0x20, // SIO bit
- RR0_TX_UNDERRUN = 0x40, // SIO bit, not supported
- RR0_BREAK_ABORT = 0x80 // SIO bit, not supported
+ RR0_RX_CHAR_AVAILABLE = 0x01, // SIO bit
+ RR0_ZC = 0x02, // SCC bit
+ RR0_TX_BUFFER_EMPTY = 0x04, // SIO
+ RR0_DCD = 0x08, // SIO
+ RR0_RI = 0x10, // DART bit? TODO: investigate function and remove
+ RR0_SYNC_HUNT = 0x10, // SIO bit, not supported
+ RR0_CTS = 0x20, // SIO bit
+ RR0_TX_UNDERRUN = 0x40, // SIO bit, not supported
+ RR0_BREAK_ABORT = 0x80 // SIO bit, not supported
};
enum
{
- RR1_ALL_SENT = 0x01, // SIO/SCC bit
- RR1_RESIDUE_CODE_MASK = 0x0e, // SIO/SCC bits, not supported
- RR1_PARITY_ERROR = 0x10, // SIO/SCC bits
- RR1_RX_OVERRUN_ERROR = 0x20, // SIO/SCC bits
- RR1_CRC_FRAMING_ERROR = 0x40, // SIO/SCC bits
- RR1_END_OF_FRAME = 0x80 // SIO/SCC bits, not supported
+ RR1_ALL_SENT = 0x01, // SIO/SCC bit
+ RR1_RESIDUE_CODE_MASK = 0x0e, // SIO/SCC bits, not supported
+ RR1_PARITY_ERROR = 0x10, // SIO/SCC bits
+ RR1_RX_OVERRUN_ERROR = 0x20, // SIO/SCC bits
+ RR1_CRC_FRAMING_ERROR = 0x40, // SIO/SCC bits
+ RR1_END_OF_FRAME = 0x80 // SIO/SCC bits, not supported
};
enum
- { // TODO: overload SIO functionality
- RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case)
- RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B
- RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B
- RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B
+ { // TODO: overload SIO functionality
+ RR2_INT_VECTOR_MASK = 0xff, // SCC channel A, SIO channel B (special case)
+ RR2_INT_VECTOR_V1 = 0x02, // SIO (special case) /SCC Channel B
+ RR2_INT_VECTOR_V2 = 0x04, // SIO (special case) /SCC Channel B
+ RR2_INT_VECTOR_V3 = 0x08 // SIO (special case) /SCC Channel B
};
enum
{
- RR3_CHANB_EXT_IP = 0x01, // SCC IP pending registers
- RR3_CHANB_TX_IP = 0x02, // only read in Channel A (for both channels)
- RR3_CHANB_RX_IP = 0x04, // channel B return all zero
- RR3_CHANA_EXT_IP = 0x08,
- RR3_CHANA_TX_IP = 0x10,
- RR3_CHANA_RX_IP = 0x20
+ RR3_CHANB_EXT_IP = 0x01, // SCC IP pending registers
+ RR3_CHANB_TX_IP = 0x02, // only read in Channel A (for both channels)
+ RR3_CHANB_RX_IP = 0x04, // channel B return all zero
+ RR3_CHANA_EXT_IP = 0x08,
+ RR3_CHANA_TX_IP = 0x10,
+ RR3_CHANA_RX_IP = 0x20
};
enum // Universal Bus WR0 commands for 85X30
{
- WR0_REGISTER_MASK = 0x07,
- WR0_COMMAND_MASK = 0x38, // COMMANDS
- WR0_NULL = 0x00, // 0 0 0
- WR0_POINT_HIGH = 0x08, // 0 0 1
- WR0_RESET_EXT_STATUS = 0x10, // 0 1 0
- WR0_SEND_ABORT = 0x18, // 0 1 1
- WR0_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0
- WR0_RESET_TX_INT = 0x28, // 1 0 1
- WR0_ERROR_RESET = 0x30, // 1 1 0
- WR0_RESET_HIGHEST_IUS = 0x38, // 1 1 1
- WR0_CRC_RESET_CODE_MASK = 0xc0, // RESET
- WR0_CRC_RESET_NULL = 0x00, // 0 0
- WR0_CRC_RESET_RX = 0x40, // 0 1
- WR0_CRC_RESET_TX = 0x80, // 1 0
+ WR0_REGISTER_MASK = 0x07,
+ WR0_COMMAND_MASK = 0x38, // COMMANDS
+ WR0_NULL = 0x00, // 0 0 0
+ WR0_POINT_HIGH = 0x08, // 0 0 1
+ WR0_RESET_EXT_STATUS = 0x10, // 0 1 0
+ WR0_SEND_ABORT = 0x18, // 0 1 1
+ WR0_ENABLE_INT_NEXT_RX = 0x20, // 1 0 0
+ WR0_RESET_TX_INT = 0x28, // 1 0 1
+ WR0_ERROR_RESET = 0x30, // 1 1 0
+ WR0_RESET_HIGHEST_IUS = 0x38, // 1 1 1
+ WR0_CRC_RESET_CODE_MASK = 0xc0, // RESET
+ WR0_CRC_RESET_NULL = 0x00, // 0 0
+ WR0_CRC_RESET_RX = 0x40, // 0 1
+ WR0_CRC_RESET_TX = 0x80, // 1 0
WR0_CRC_RESET_TX_UNDERRUN = 0xc0 // 1 1
};
enum // ZBUS WR0 commands or 80X30
{
- WR0_Z_COMMAND_MASK = 0x38, // COMMANDS
- WR0_Z_NULL_1 = 0x00, // 0 0 0
- WR0_Z_NULL_2 = 0x08, // 0 0 1
- WR0_Z_RESET_EXT_STATUS = 0x10, // 0 1 0
- WR0_Z_SEND_ABORT = 0x18, // 0 1 1
+ WR0_Z_COMMAND_MASK = 0x38, // COMMANDS
+ WR0_Z_NULL_1 = 0x00, // 0 0 0
+ WR0_Z_NULL_2 = 0x08, // 0 0 1
+ WR0_Z_RESET_EXT_STATUS = 0x10, // 0 1 0
+ WR0_Z_SEND_ABORT = 0x18, // 0 1 1
WR0_Z_ENABLE_INT_NEXT_RX= 0x20, // 1 0 0
- WR0_Z_RESET_TX_INT = 0x28, // 1 0 1
- WR0_Z_ERROR_RESET = 0x30, // 1 1 0
+ WR0_Z_RESET_TX_INT = 0x28, // 1 0 1
+ WR0_Z_ERROR_RESET = 0x30, // 1 1 0
WR0_Z_RESET_HIGHEST_IUS = 0x38, // 1 1 1
- WR0_Z_SHIFT_MASK = 0x03, // SHIFT mode SDLC chan B
- WR0_Z_SEL_SHFT_LEFT = 0x02, // 1 0
- WR0_Z_SEL_SHFT_RIGHT = 0x03 // 1 1
+ WR0_Z_SHIFT_MASK = 0x03, // SHIFT mode SDLC chan B
+ WR0_Z_SEL_SHFT_LEFT = 0x02, // 1 0
+ WR0_Z_SEL_SHFT_RIGHT = 0x03 // 1 1
};
enum
{
- WR1_EXT_INT_ENABLE = 0x01,
- WR1_TX_INT_ENABLE = 0x02,
- WR1_PARITY_IS_SPEC_COND = 0x04,
- WR1_RX_INT_MODE_MASK = 0x18,
- WR1_RX_INT_DISABLE = 0x00,
- WR1_RX_INT_FIRST = 0x08,
- WR1_RX_INT_ALL_PARITY = 0x10, // not supported
- WR1_RX_INT_ALL = 0x18,
- WR1_WRDY_ON_RX_TX = 0x20, // not supported
- WR1_WRDY_FUNCTION = 0x40, // not supported
- WR1_WRDY_ENABLE = 0x80 // not supported
+ WR1_EXT_INT_ENABLE = 0x01,
+ WR1_TX_INT_ENABLE = 0x02,
+ WR1_PARITY_IS_SPEC_COND = 0x04,
+ WR1_RX_INT_MODE_MASK = 0x18,
+ WR1_RX_INT_DISABLE = 0x00,
+ WR1_RX_INT_FIRST = 0x08,
+ WR1_RX_INT_ALL_PARITY = 0x10, // not supported
+ WR1_RX_INT_ALL = 0x18,
+ WR1_WRDY_ON_RX_TX = 0x20, // not supported
+ WR1_WRDY_FUNCTION = 0x40, // not supported
+ WR1_WRDY_ENABLE = 0x80 // not supported
};
enum
{
- WR3_RX_ENABLE = 0x01,
- WR3_SYNC_CHAR_LOAD_INHIBIT = 0x02, // not supported
- WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported
- WR3_RX_CRC_ENABLE = 0x08, // not supported
- WR3_ENTER_HUNT_PHASE = 0x10, // not supported
- WR3_AUTO_ENABLES = 0x20,
- WR3_RX_WORD_LENGTH_MASK = 0xc0,
- WR3_RX_WORD_LENGTH_5 = 0x00,
- WR3_RX_WORD_LENGTH_7 = 0x40,
- WR3_RX_WORD_LENGTH_6 = 0x80,
- WR3_RX_WORD_LENGTH_8 = 0xc0
+ WR3_RX_ENABLE = 0x01,
+ WR3_SYNC_CHAR_LOAD_INHIBIT = 0x02, // not supported
+ WR3_ADDRESS_SEARCH_MODE = 0x04, // not supported
+ WR3_RX_CRC_ENABLE = 0x08, // not supported
+ WR3_ENTER_HUNT_PHASE = 0x10, // not supported
+ WR3_AUTO_ENABLES = 0x20,
+ WR3_RX_WORD_LENGTH_MASK = 0xc0,
+ WR3_RX_WORD_LENGTH_5 = 0x00,
+ WR3_RX_WORD_LENGTH_7 = 0x40,
+ WR3_RX_WORD_LENGTH_6 = 0x80,
+ WR3_RX_WORD_LENGTH_8 = 0xc0
};
enum
{
- WR4_PARITY_ENABLE = 0x01,
- WR4_PARITY_EVEN = 0x02,
- WR4_STOP_BITS_MASK = 0x0c,
- WR4_STOP_BITS_1 = 0x04,
- WR4_STOP_BITS_1_5 = 0x08, // not supported
- WR4_STOP_BITS_2 = 0x0c,
- WR4_SYNC_MODE_MASK = 0x30, // not supported
- WR4_SYNC_MODE_8_BIT = 0x00, // not supported
- WR4_SYNC_MODE_16_BIT = 0x10, // not supported
- WR4_SYNC_MODE_SDLC = 0x20, // not supported
- WR4_SYNC_MODE_EXT = 0x30, // not supported
- WR4_CLOCK_RATE_MASK = 0xc0,
- WR4_CLOCK_RATE_X1 = 0x00,
- WR4_CLOCK_RATE_X16 = 0x40,
- WR4_CLOCK_RATE_X32 = 0x80,
- WR4_CLOCK_RATE_X64 = 0xc0
+ WR4_PARITY_ENABLE = 0x01,
+ WR4_PARITY_EVEN = 0x02,
+ WR4_STOP_BITS_MASK = 0x0c,
+ WR4_STOP_BITS_1 = 0x04,
+ WR4_STOP_BITS_1_5 = 0x08, // not supported
+ WR4_STOP_BITS_2 = 0x0c,
+ WR4_SYNC_MODE_MASK = 0x30, // not supported
+ WR4_SYNC_MODE_8_BIT = 0x00, // not supported
+ WR4_SYNC_MODE_16_BIT = 0x10, // not supported
+ WR4_SYNC_MODE_SDLC = 0x20, // not supported
+ WR4_SYNC_MODE_EXT = 0x30, // not supported
+ WR4_CLOCK_RATE_MASK = 0xc0,
+ WR4_CLOCK_RATE_X1 = 0x00,
+ WR4_CLOCK_RATE_X16 = 0x40,
+ WR4_CLOCK_RATE_X32 = 0x80,
+ WR4_CLOCK_RATE_X64 = 0xc0
};
enum
{
- WR5_TX_CRC_ENABLE = 0x01, // not supported
- WR5_RTS = 0x02,
- WR5_CRC16 = 0x04, // not supported
- WR5_TX_ENABLE = 0x08,
- WR5_SEND_BREAK = 0x10,
- WR5_TX_WORD_LENGTH_MASK = 0x60,
- WR5_TX_WORD_LENGTH_5 = 0x00,
- WR5_TX_WORD_LENGTH_6 = 0x40,
- WR5_TX_WORD_LENGTH_7 = 0x20,
- WR5_TX_WORD_LENGTH_8 = 0x60,
- WR5_DTR = 0x80
+ WR5_TX_CRC_ENABLE = 0x01, // not supported
+ WR5_RTS = 0x02,
+ WR5_CRC16 = 0x04, // not supported
+ WR5_TX_ENABLE = 0x08,
+ WR5_SEND_BREAK = 0x10,
+ WR5_TX_WORD_LENGTH_MASK = 0x60,
+ WR5_TX_WORD_LENGTH_5 = 0x00,
+ WR5_TX_WORD_LENGTH_6 = 0x40,
+ WR5_TX_WORD_LENGTH_7 = 0x20,
+ WR5_TX_WORD_LENGTH_8 = 0x60,
+ WR5_DTR = 0x80
};
/* SCC specifics */
enum
{
- WR9_CMD_MASK = 0xC0,
- WR9_CMD_NORESET = 0x00,
- WR9_CMD_CHNB_RESET = 0x40,
- WR9_CMD_CHNA_RESET = 0x80,
- WR9_CMD_HW_RESET = 0xC0,
- WR9_BIT_VIS = 0x01,
- WR9_BIT_NV = 0x02,
- WR9_BIT_DLC = 0x04,
- WR9_BIT_MIE = 0x08,
- WR9_BIT_SHSL = 0x10,
- WR9_BIT_IACK = 0x20
+ WR9_CMD_MASK = 0xC0,
+ WR9_CMD_NORESET = 0x00,
+ WR9_CMD_CHNB_RESET = 0x40,
+ WR9_CMD_CHNA_RESET = 0x80,
+ WR9_CMD_HW_RESET = 0xC0,
+ WR9_BIT_VIS = 0x01,
+ WR9_BIT_NV = 0x02,
+ WR9_BIT_DLC = 0x04,
+ WR9_BIT_MIE = 0x08,
+ WR9_BIT_SHSL = 0x10,
+ WR9_BIT_IACK = 0x20
};
enum
{
- WR11_RCVCLK_TYPE = 0x80,
- WR11_RCVCLK_SRC_MASK = 0x60, // RCV CLOCK
- WR11_RCVCLK_SRC_RTXC = 0x00, // 0 0
- WR11_RCVCLK_SRC_TRXC = 0x20, // 0 1
- WR11_RCVCLK_SRC_BR = 0x40, // 1 0
- WR11_RCVCLK_SRC_DPLL = 0x60, // 1 1
- WR11_TRACLK_SRC_MASK = 0x18, // TRA CLOCK
- WR11_TRACLK_SRC_RTXC = 0x00, // 0 0
- WR11_TRACLK_SRC_TRXC = 0x08, // 0 1
- WR11_TRACLK_SRC_BR = 0x10, // 1 0
- WR11_TRACLK_SRC_DPLL = 0x18, // 1 1
- WR11_TRXC_DIRECTION = 0x04,
- WR11_TRXSRC_SRC_MASK = 0x03, // TRXX CLOCK
- WR11_TRXSRC_SRC_XTAL = 0x00, // 0 0
- WR11_TRXSRC_SRC_TRA = 0x01, // 0 1
- WR11_TRXSRC_SRC_BR = 0x02, // 1 0
- WR11_TRXSRC_SRC_DPLL = 0x03 // 1 1
+ WR11_RCVCLK_TYPE = 0x80,
+ WR11_RCVCLK_SRC_MASK = 0x60, // RCV CLOCK
+ WR11_RCVCLK_SRC_RTXC = 0x00, // 0 0
+ WR11_RCVCLK_SRC_TRXC = 0x20, // 0 1
+ WR11_RCVCLK_SRC_BR = 0x40, // 1 0
+ WR11_RCVCLK_SRC_DPLL = 0x60, // 1 1
+ WR11_TRACLK_SRC_MASK = 0x18, // TRA CLOCK
+ WR11_TRACLK_SRC_RTXC = 0x00, // 0 0
+ WR11_TRACLK_SRC_TRXC = 0x08, // 0 1
+ WR11_TRACLK_SRC_BR = 0x10, // 1 0
+ WR11_TRACLK_SRC_DPLL = 0x18, // 1 1
+ WR11_TRXC_DIRECTION = 0x04,
+ WR11_TRXSRC_SRC_MASK = 0x03, // TRXX CLOCK
+ WR11_TRXSRC_SRC_XTAL = 0x00, // 0 0
+ WR11_TRXSRC_SRC_TRA = 0x01, // 0 1
+ WR11_TRXSRC_SRC_BR = 0x02, // 1 0
+ WR11_TRXSRC_SRC_DPLL = 0x03 // 1 1
};
enum
{
- WR14_DPLL_CMD_MASK = 0xe0, // Command
- WR14_CMD_NULL = 0x00, // 0 0 0
- WR14_CMD_ESM = 0x20, // 0 0 1
- WR14_CMD_RMC = 0x40, // 0 1 0
- WR14_CMD_DISABLE_DPLL = 0x60, // 0 1 1
- WR14_CMD_SS_BRG = 0x80, // 1 0 0
- WR14_CMD_SS_RTXC = 0xa0, // 1 0 1
- WR14_CMD_SET_FM = 0xc0, // 1 1 0
- WR14_CMD_SET_NRZI = 0xe0, // 1 1 1
- WR14_BRG_ENABLE = 0x01,
- WR14_BRG_SOURCE = 0x02,
- WR14_DTR_REQ_FUNC = 0x04,
- WR14_AUTO_ECHO = 0x08,
- WR14_LOCAL_LOOPBACK = 0x010
+ WR14_DPLL_CMD_MASK = 0xe0, // Command
+ WR14_CMD_NULL = 0x00, // 0 0 0
+ WR14_CMD_ESM = 0x20, // 0 0 1
+ WR14_CMD_RMC = 0x40, // 0 1 0
+ WR14_CMD_DISABLE_DPLL = 0x60, // 0 1 1
+ WR14_CMD_SS_BRG = 0x80, // 1 0 0
+ WR14_CMD_SS_RTXC = 0xa0, // 1 0 1
+ WR14_CMD_SET_FM = 0xc0, // 1 1 0
+ WR14_CMD_SET_NRZI = 0xe0, // 1 1 1
+ WR14_BRG_ENABLE = 0x01,
+ WR14_BRG_SOURCE = 0x02,
+ WR14_DTR_REQ_FUNC = 0x04,
+ WR14_AUTO_ECHO = 0x08,
+ WR14_LOCAL_LOOPBACK = 0x010
};
enum
@@ -536,40 +536,40 @@ protected:
int get_tx_word_length();
// receiver state
- UINT8 m_rx_data_fifo[8]; // receive data FIFO
- UINT8 m_rx_error_fifo[8]; // receive error FIFO
- UINT8 m_rx_error; // current receive error
- //int m_rx_fifo // receive FIFO pointer
- int m_rx_fifo_rp; // receive FIFO read pointer
- int m_rx_fifo_wp; // receive FIFO write pointer
- int m_rx_fifo_sz; // receive FIFO size
-
- int m_rx_clock; // receive clock pulse count
- int m_rx_first; // first character received
- int m_rx_break; // receive break condition
- UINT8 m_rx_rr0_latch; // read register 0 latched
+ UINT8 m_rx_data_fifo[8]; // receive data FIFO
+ UINT8 m_rx_error_fifo[8]; // receive error FIFO
+ UINT8 m_rx_error; // current receive error
+ //int m_rx_fifo // receive FIFO pointer
+ int m_rx_fifo_rp; // receive FIFO read pointer
+ int m_rx_fifo_wp; // receive FIFO write pointer
+ int m_rx_fifo_sz; // receive FIFO size
+
+ int m_rx_clock; // receive clock pulse count
+ int m_rx_first; // first character received
+ int m_rx_break; // receive break condition
+ UINT8 m_rx_rr0_latch; // read register 0 latched
int m_rxd;
- int m_ri; // ring indicator latch
- int m_cts; // clear to send latch
- int m_dcd; // data carrier detect latch
+ int m_ri; // ring indicator latch
+ int m_cts; // clear to send latch
+ int m_dcd; // data carrier detect latch
// transmitter state
- UINT8 m_tx_data; // transmit data register
- int m_tx_clock; // transmit clock pulse count
+ UINT8 m_tx_data; // transmit data register
+ int m_tx_clock; // transmit clock pulse count
- int m_dtr; // data terminal ready
- int m_rts; // request to send
+ int m_dtr; // data terminal ready
+ int m_rts; // request to send
// synchronous state
- UINT16 m_sync; // sync character
+ UINT16 m_sync; // sync character
int m_rcv_mode;
int m_index;
z80scc_device *m_uart;
// SCC specifics
- int m_ph; // Point high command to access regs 08-0f
+ int m_ph; // Point high command to access regs 08-0f
UINT8 m_zc;
};
diff --git a/src/devices/video/hd44780.cpp b/src/devices/video/hd44780.cpp
index a8ba3a77cc5..ea6a63ca415 100644
--- a/src/devices/video/hd44780.cpp
+++ b/src/devices/video/hd44780.cpp
@@ -90,7 +90,7 @@ void hd44780_device::device_start()
m_cgrom.set_target(memregion("cgrom")->base(), 0x1000);
m_pixel_update_cb.bind_relative_to(*owner());
-
+
m_busy_timer = timer_alloc(TIMER_BUSY);
m_blink_timer = timer_alloc(TIMER_BLINKING);
m_blink_timer->adjust(attotime::from_msec(409), 0, attotime::from_msec(409));
diff --git a/src/devices/video/snes_ppu.cpp b/src/devices/video/snes_ppu.cpp
index d396d86d6c5..fa7c85e3f7c 100644
--- a/src/devices/video/snes_ppu.cpp
+++ b/src/devices/video/snes_ppu.cpp
@@ -371,7 +371,7 @@ void snes_ppu_device::device_reset()
m_beam.latch_vert = 0;
m_beam.latch_horz = 0;
m_beam.current_vert = 0;
-
+
/* Set STAT78 to NTSC or PAL */
m_stat78 = (ATTOSECONDS_TO_HZ(m_screen->frame_period().attoseconds()) >= 59.0) ? SNES_NTSC : SNES_PAL;
m_beam.last_visible_line = m_stat78 & SNES_PAL ? 240 : 225;