diff options
| author | 2017-08-30 17:56:52 -0600 | |
|---|---|---|
| committer | 2017-08-30 18:44:49 -0600 | |
| commit | cfe71cfe3ab5b07b642b525a2a055ef70d649158 (patch) | |
| tree | 32edf8295b85ff1e099379096c1005847c47c9eb /src/devices/machine | |
| parent | 32070d327c9b140923bc8cac8fb2dd21de9dced7 (diff) | |
vegas: Add denver uarts, gearshift, and update input dips for various games. (nw)
vrc5074: Clean up timer code. (nw)
smc91c9x: Adjust tx interrupt status to mirror tx buffer empty. Fixes linking boot hang on cartfury. (nw)
midzeus: Map proper * key to keypad. (nw)
Diffstat (limited to 'src/devices/machine')
| -rw-r--r-- | src/devices/machine/smc91c9x.cpp | 11 | ||||
| -rw-r--r-- | src/devices/machine/vrc5074.cpp | 66 | ||||
| -rw-r--r-- | src/devices/machine/vrc5074.h | 6 |
3 files changed, 30 insertions, 53 deletions
diff --git a/src/devices/machine/smc91c9x.cpp b/src/devices/machine/smc91c9x.cpp index 201c8c6fc22..ee5214d2323 100644 --- a/src/devices/machine/smc91c9x.cpp +++ b/src/devices/machine/smc91c9x.cpp @@ -387,7 +387,8 @@ void smc91c9x_device::process_command(uint16_t data) logerror(" RESET TX FIFOS\n"); break; } - m_reg[EREG_MMU_COMMAND] &= ~0x0001; + // Set Busy (clear on next read) + m_reg[EREG_MMU_COMMAND] |= 0x0001; } @@ -412,6 +413,11 @@ READ16_MEMBER( smc91c9x_device::read ) switch (offset) { + case EREG_MMU_COMMAND: + // Clear busy + m_reg[EREG_MMU_COMMAND] &= ~0x0001; + break; + case EREG_PNR_ARR: if (ACCESSING_BITS_8_15) { @@ -556,6 +562,9 @@ WRITE16_MEMBER( smc91c9x_device::write ) case EREG_INTERRUPT: m_reg[EREG_INTERRUPT] &= ~(data & 0x56); + // Need to clear tx int here for vegas cartfury + if (m_reg[EREG_FIFO_PORTS] & 0x0080) + m_reg[EREG_INTERRUPT] &= ~EINT_TX; update_ethernet_irq(); break; } diff --git a/src/devices/machine/vrc5074.cpp b/src/devices/machine/vrc5074.cpp index ade82af624e..33620edb4f2 100644 --- a/src/devices/machine/vrc5074.cpp +++ b/src/devices/machine/vrc5074.cpp @@ -241,6 +241,7 @@ void vrc5074_device::device_start() save_item(NAME(m_nile_irq_state)); save_item(NAME(m_sdram_addr)); save_item(NAME(m_uart_irq)); + save_item(NAME(m_timer_period)); machine().save().register_postload(save_prepost_delegate(FUNC(vrc5074_device::postload), this)); } @@ -745,16 +746,7 @@ TIMER_CALLBACK_MEMBER(vrc5074_device::nile_timer_callback) /* adjust the timer to fire again */ { - uint32_t scale = regs[0]; - if (regs[1] & 2) { - uint32_t scaleSrc = (regs[1] >> 2) & 0x3; - uint32_t *scaleReg = &m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]; - scale *= scaleReg[0]; - //logerror("Unexpected value: timer %d is prescaled\n", which); - logerror("Timer Scaling value: timer %d is prescaled from %08X to %08X\n", which, regs[0], scale); - } - if (scale != 0) - m_timer[which]->adjust(TIMER_PERIOD * scale, which); + m_timer[which]->adjust(attotime::from_double(m_timer_period[which]), which); } /* trigger the interrupt */ @@ -837,15 +829,8 @@ READ32_MEMBER(vrc5074_device::cpu_reg_r) which = (offset - NREG_T0CNTR) / 4; if (m_cpu_regs[offset - 1] & 1) { - //if (m_cpu_regs[offset - 1] & 2) - // logerror("Unexpected value: timer %d is prescaled\n", which); - uint32_t scale = 1; - if (m_cpu_regs[offset - 1] & 2) { - uint32_t scaleSrc = (m_cpu_regs[offset - 1] >> 2) & 0x3; - scale = m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]; - logerror("Timer value: timer %d is prescaled by \n", which, scale); - } - result = m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * (double)SYSTEM_CLOCK / scale; + // Should check for cascaded timer + result = m_cpu_regs[offset] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK; } if (LOG_TIMERS) logerror("%08X:NILE READ: timer %d counter(%03X) = %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, result); @@ -961,37 +946,26 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w) case NREG_T2CTRL + 1: /* general purpose timer control (control bits) */ case NREG_T3CTRL + 1: /* watchdog timer control (control bits) */ which = (offset - NREG_T0CTRL) / 4; - if (LOG_NILE) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, data, mem_mask); + if (LOG_NILE | LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", m_cpu_space->device().safe_pc(), which, offset * 4, data, mem_mask); logit = 0; - + m_timer_period[which] = (uint64_t(m_cpu_regs[NREG_T0CTRL + which * 4]) + 1) * attotime::from_hz(SYSTEM_CLOCK).as_double(); + if (m_cpu_regs[offset] & 2) { + // Cascade timer + uint32_t scaleSrc = (m_cpu_regs[offset] >> 2) & 0x3; + m_timer_period[which] += (uint64_t(m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]) + 1) * attotime::from_hz(SYSTEM_CLOCK).as_double(); + logerror("Timer scale: timer %d is scaled by %08X\n", which, m_cpu_regs[NREG_T0CTRL + which * 4]); + } /* timer just enabled? */ if (!(olddata & 1) && (m_cpu_regs[offset] & 1)) { - uint32_t scale = m_cpu_regs[offset - 1]; - //if (m_cpu_regs[offset] & 2) - // logerror("Unexpected value: timer %d is prescaled\n", which); - if (m_cpu_regs[offset] & 2) { - uint32_t scaleSrc = (m_cpu_regs[offset] >> 2) & 0x3; - scale *= m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]; - logerror("Timer scale: timer %d is scaled by %08X\n", which, m_cpu_regs[NREG_T0CTRL + which * 4]); - } - if (scale != 0) - m_timer[which]->adjust(TIMER_PERIOD * scale, which); - if (LOG_TIMERS) logerror("Starting timer %d at a rate of %f Hz scale = %08X\n", which, ATTOSECONDS_TO_HZ((TIMER_PERIOD * (m_cpu_regs[offset + 1] + 1)).attoseconds()), scale); + m_timer[which]->adjust(attotime::from_double(m_timer_period[which]), which); + if (LOG_TIMERS) logerror("Starting timer %d at a rate of %f Hz\n", which, ATTOSECONDS_TO_HZ(attotime::from_double(m_timer_period[which]).as_attoseconds())); } /* timer disabled? */ else if ((olddata & 1) && !(m_cpu_regs[offset] & 1)) { - //if (m_cpu_regs[offset] & 2) - // logerror("Unexpected value: timer %d is prescaled\n", which); - uint32_t scale = 1; - if (m_cpu_regs[offset] & 2) { - uint32_t scaleSrc = (m_cpu_regs[offset] >> 2) & 0x3; - scale = m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]; - logerror("Timer scale: timer %d is scaled by %08X\n", which, scale); - } - m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK / scale; + m_cpu_regs[offset + 1] = m_timer[which]->remaining().as_double() * SYSTEM_CLOCK; m_timer[which]->adjust(attotime::never, which); } break; @@ -1006,15 +980,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w) if (m_cpu_regs[offset - 1] & 1) { - //if (m_cpu_regs[offset - 1] & 2) - // logerror("Unexpected value: timer %d is prescaled\n", which); - uint32_t scale = 1; - if (m_cpu_regs[offset - 1] & 2) { - uint32_t scaleSrc = (m_cpu_regs[offset - 1] >> 2) & 0x3; - scale = m_cpu_regs[NREG_T0CTRL + scaleSrc * 4]; - logerror("Timer scale: timer %d is scaled by %08X\n", which, scale); - } - m_timer[which]->adjust(TIMER_PERIOD * m_cpu_regs[offset] * scale, which); + m_timer[which]->adjust(attotime::from_hz(SYSTEM_CLOCK) * m_cpu_regs[offset], which); } break; } diff --git a/src/devices/machine/vrc5074.h b/src/devices/machine/vrc5074.h index a1ef79a630a..c49902d9491 100644 --- a/src/devices/machine/vrc5074.h +++ b/src/devices/machine/vrc5074.h @@ -24,8 +24,6 @@ class vrc5074_device : public pci_host_device { public: - static constexpr unsigned SYSTEM_CLOCK = 100000000; - vrc5074_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); required_device<ns16550_device> m_uart; @@ -79,6 +77,9 @@ protected: virtual void device_reset() override; private: + // This value is not verified to be correct + static constexpr unsigned SYSTEM_CLOCK = 100000000; + enum { AS_PCI_MEM = 1, @@ -99,6 +100,7 @@ private: emu_timer* m_dma_timer; TIMER_CALLBACK_MEMBER(dma_transfer); emu_timer *m_timer[4]; + double m_timer_period[4]; TIMER_CALLBACK_MEMBER(nile_timer_callback); required_memory_region m_romRegion; |
