diff options
author | 2018-07-05 15:53:04 +0700 | |
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committer | 2018-07-05 15:53:04 +0700 | |
commit | 391f5c9f905e48a0e92dd44e238ff6977fe21f73 (patch) | |
tree | 065644bf34c6b7ac9bd789c89bb95b927cd29edd /src/devices/machine/ncr5390.cpp | |
parent | 790009096b58d6554720fdaa657d8035e0774263 (diff) |
ncr5390: dma fixes again (nw)
After reversing myself on this several times before, I hope I've now finally got it right.
* function/bus complete should proceed when the fifo is empty, to allow devices to send less data than indicated in the transfer count
* raise drq when tcounter = 0 (meaning 65536 bytes)
Diffstat (limited to 'src/devices/machine/ncr5390.cpp')
-rw-r--r-- | src/devices/machine/ncr5390.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/devices/machine/ncr5390.cpp b/src/devices/machine/ncr5390.cpp index 914a87e4dec..264cbc3fa72 100644 --- a/src/devices/machine/ncr5390.cpp +++ b/src/devices/machine/ncr5390.cpp @@ -510,16 +510,16 @@ void ncr5390_device::step(bool timeout) break; case INIT_XFR_FUNCTION_COMPLETE: - // wait for dma transfer to complete - if (dma_command && !(status & S_TC0)) + // wait for dma transfer to complete or fifo to drain + if (dma_command && !(status & S_TC0) && fifo_pos) break; function_complete(); break; case INIT_XFR_BUS_COMPLETE: - // wait for dma transfer to complete - if (dma_command && !(status & S_TC0)) + // wait for dma transfer to complete or fifo to drain + if (dma_command && !(status & S_TC0) && fifo_pos) break; bus_complete(); @@ -987,7 +987,7 @@ WRITE8_MEMBER(ncr5390_device::clock_w) void ncr5390_device::dma_set(int dir) { dma_dir = dir; - if(dma_dir == DMA_OUT && fifo_pos != 16 && tcounter > fifo_pos) + if(dma_dir == DMA_OUT && fifo_pos != 16 && ((tcounter > fifo_pos) || !tcounter)) drq_set(); } |