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author Olivier Galibert <galibert@pobox.com>2022-06-16 12:47:52 +0200
committer Olivier Galibert <galibert@pobox.com>2025-04-29 23:06:41 +0200
commit45d4cd52a8194f2ef9e0383cfb2e2a35634af6ff (patch)
tree4e8d8fcb7382a5e9e0bce5ec59939bcfbe67155a /src/devices/machine/28fxxx.h
parent5c14bcdfcb4aefb71b5b62387c4ad05dbeb3814e (diff)
full xtal conversionxtal
Diffstat (limited to 'src/devices/machine/28fxxx.h')
-rw-r--r--src/devices/machine/28fxxx.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/devices/machine/28fxxx.h b/src/devices/machine/28fxxx.h
index 9ec25a6a7d9..55bb6c5172a 100644
--- a/src/devices/machine/28fxxx.h
+++ b/src/devices/machine/28fxxx.h
@@ -26,7 +26,7 @@ public:
void write(offs_t offset, u8 data);
protected:
- base_28fxxx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 size, u8 manufacturer_code, u8 device_code);
+ base_28fxxx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, const XTAL &clock, u32 size, u8 manufacturer_code, u8 device_code);
virtual void device_start() override;
@@ -69,19 +69,19 @@ private:
class intel_28f010_device : public base_28fxxx_device
{
public:
- intel_28f010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ intel_28f010_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock = XTAL());
};
class amd_28f010_device : public base_28fxxx_device
{
public:
- amd_28f010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ amd_28f010_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock = XTAL());
};
class amd_28f020_device : public base_28fxxx_device
{
public:
- amd_28f020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ amd_28f020_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock = XTAL());
};
DECLARE_DEVICE_TYPE(INTEL_28F010, intel_28f010_device)