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author | 2017-12-13 21:01:10 -0700 | |
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committer | 2017-12-13 21:01:10 -0700 | |
commit | 54155441e9ba9941e85d80c4834a66376a11e791 (patch) | |
tree | aa44bdaf0035cbe188d64c447f225f10f7d76d8d /src/devices/cpu/upd7725 | |
parent | f537428e5a40ba6dde8ca9bf0fe9ae6b1f189ac4 (diff) |
Revert "Merge branch 'master' of https://github.com/mamedev/mame"
This reverts commit f537428e5a40ba6dde8ca9bf0fe9ae6b1f189ac4, reversing
changes made to 0d70d798107d4e4e8fb9f230410aeb1e888d65c5.
Diffstat (limited to 'src/devices/cpu/upd7725')
-rw-r--r-- | src/devices/cpu/upd7725/upd7725.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp index c805c5bbc14..716fa45ccf9 100644 --- a/src/devices/cpu/upd7725/upd7725.cpp +++ b/src/devices/cpu/upd7725/upd7725.cpp @@ -398,7 +398,7 @@ void necdsp_device::exec_op(uint32_t opcode) { case 9: regs.idb = regs.dr; break; case 10: regs.idb = regs.sr; break; case 11: regs.idb = regs.si; break; //MSB = first bit in from serial, 'natural' SI register order - case 12: regs.idb = bitswap<16>(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB = first bit in from serial, 'reversed' SI register order + case 12: regs.idb = BITSWAP16(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB = first bit in from serial, 'reversed' SI register order case 13: regs.idb = regs.k; break; case 14: regs.idb = regs.l; break; case 15: regs.idb = dataRAM[regs.dp]; break; @@ -586,7 +586,7 @@ void necdsp_device::exec_ld(uint32_t opcode) { m_out_p0_cb(regs.sr.p0); m_out_p1_cb(regs.sr.p1); break; - case 8: regs.so = bitswap<16>(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left + case 8: regs.so = BITSWAP16(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left case 9: regs.so = id; break; //MSB first output, output tapped at bit 15 shifting left case 10: regs.k = id; break; case 11: regs.k = id; regs.l = m_data->read_word(regs.rp); break; |