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author Miodrag Milanovic <mmicko@gmail.com>2016-10-22 13:13:17 +0200
committer Miodrag Milanovic <mmicko@gmail.com>2016-10-22 13:13:17 +0200
commitddb290d5f615019c33c42b8d94e5a5254cabcf33 (patch)
treea70f688b0df3acd19da7b1151e5902e3c6af3fa5 /src/devices/cpu/tms9900
parent333bff8de64dfaeb98134000412796b4fdef970b (diff)
NOTICE (TYPE NAME CONSOLIDATION)
Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8 also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
Diffstat (limited to 'src/devices/cpu/tms9900')
-rw-r--r--src/devices/cpu/tms9900/9900dasm.cpp8
-rw-r--r--src/devices/cpu/tms9900/99xxcore.h328
-rw-r--r--src/devices/cpu/tms9900/ti990_10.cpp14
-rw-r--r--src/devices/cpu/tms9900/ti990_10.h22
-rw-r--r--src/devices/cpu/tms9900/tms9900.cpp110
-rw-r--r--src/devices/cpu/tms9900/tms9900.h66
-rw-r--r--src/devices/cpu/tms9900/tms9980a.cpp22
-rw-r--r--src/devices/cpu/tms9900/tms9980a.h18
-rw-r--r--src/devices/cpu/tms9900/tms9995.cpp124
-rw-r--r--src/devices/cpu/tms9900/tms9995.h82
10 files changed, 397 insertions, 397 deletions
diff --git a/src/devices/cpu/tms9900/9900dasm.cpp b/src/devices/cpu/tms9900/9900dasm.cpp
index adf5affc0d6..bd4b0215d32 100644
--- a/src/devices/cpu/tms9900/9900dasm.cpp
+++ b/src/devices/cpu/tms9900/9900dasm.cpp
@@ -300,13 +300,13 @@ static const enum opcodes ops_001c_002f_s0[20]=
static int PC;
-static inline UINT16 readop_arg(const UINT8 *opram, unsigned pc)
+static inline uint16_t readop_arg(const uint8_t *opram, unsigned pc)
{
- UINT16 result = opram[PC++ - pc] << 8;
+ uint16_t result = opram[PC++ - pc] << 8;
return result | opram[PC++ - pc];
}
-static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigned pc)
+static int print_arg (char *dest, int mode, int arg, const uint8_t *opram, unsigned pc)
{
int base;
@@ -333,7 +333,7 @@ static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigne
/*****************************************************************************
* Disassemble a single command and return the number of bytes it uses.
*****************************************************************************/
-unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram)
+unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const uint8_t *oprom, const uint8_t *opram)
{
int OP, OP2, opc;
int sarg, darg, smode, dmode;
diff --git a/src/devices/cpu/tms9900/99xxcore.h b/src/devices/cpu/tms9900/99xxcore.h
index 827e32dc5eb..6eaef876d95 100644
--- a/src/devices/cpu/tms9900/99xxcore.h
+++ b/src/devices/cpu/tms9900/99xxcore.h
@@ -283,16 +283,16 @@ Other references can be found on spies.com:
struct tms99xx_state;
-static inline void execute(tms99xx_state *cpustate, UINT16 opcode);
+static inline void execute(tms99xx_state *cpustate, uint16_t opcode);
#if EXTERNAL_INSTRUCTION_DECODING
static void external_instruction_notify(tms99xx_state *cpustate, int ext_op_ID);
#endif
-static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode);
-static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode);
-static void contextswitch(tms99xx_state *cpustate, UINT16 addr);
+static uint16_t decipheraddr(tms99xx_state *cpustate, uint16_t opcode);
+static uint16_t decipheraddrbyte(tms99xx_state *cpustate, uint16_t opcode);
+static void contextswitch(tms99xx_state *cpustate, uint16_t addr);
#if HAS_MAPPING || HAS_PRIVILEGE
-static void contextswitchX(tms99xx_state *cpustate, UINT16 addr);
+static void contextswitchX(tms99xx_state *cpustate, uint16_t addr);
#else
#define contextswitchX(cs, addr) contextswitch(cs, addr)
#endif
@@ -420,40 +420,40 @@ a ST_MASK */
struct map_file_t
{
- UINT16 L[3], B[3]; /* actual registers */
- UINT32 limit[3], bias[3]; /* equivalent in a more convenient form */
+ uint16_t L[3], B[3]; /* actual registers */
+ uint32_t limit[3], bias[3]; /* equivalent in a more convenient form */
};
struct tms99xx_state
{
/* "actual" tms9900 registers : */
- UINT16 WP; /* Workspace pointer */
- UINT16 PC; /* Program counter */
- UINT16 STATUS; /* STatus register */
+ uint16_t WP; /* Workspace pointer */
+ uint16_t PC; /* Program counter */
+ uint16_t STATUS; /* STatus register */
/* Now, data used for emulation */
- UINT8 lastparity;
+ uint8_t lastparity;
char lds_flag, ldd_flag;
- UINT16 IR; /* Instruction register, with the currently parsed opcode */
+ uint16_t IR; /* Instruction register, with the currently parsed opcode */
- UINT8 interrupt_pending; /* true if an interrupt must be honored... */
+ uint8_t interrupt_pending; /* true if an interrupt must be honored... */
#if ! ((TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID))
- UINT8 load_state; /* nonzero if the LOAD* line is active (low) */
+ uint8_t load_state; /* nonzero if the LOAD* line is active (low) */
#endif
#if (TMS99XX_MODEL == TI990_10_ID) || (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID)
/* On tms9900, we cache the state of INTREQ* and IC0-IC3 here */
/* On tms9980/9981, we translate the state of IC0-IC2 to the equivalent state for a tms9900,
and store the result here */
- UINT8 irq_level; /* when INTREQ* is active, interrupt level on IC0-IC3 ; else always 16 */
- UINT8 irq_state; /* nonzero if the INTREQ* line is active (low) */
+ uint8_t irq_level; /* when INTREQ* is active, interrupt level on IC0-IC3 ; else always 16 */
+ uint8_t irq_state; /* nonzero if the INTREQ* line is active (low) */
/* with TMS9940, bit 0 means INT1, bit 1 decrementer, bit 2 INT2 */
#elif (TMS99XX_MODEL == TMS9995_ID)
/* tms9995 is quite different : it latches the interrupt inputs */
- UINT8 irq_level; /* We store the level of the request with the highest level here */
- UINT8 int_state; /* interrupt lines state */
- UINT8 int_latch; /* interrupt latches state */
+ uint8_t irq_level; /* We store the level of the request with the highest level here */
+ uint8_t int_state; /* interrupt lines state */
+ uint8_t int_latch; /* interrupt latches state */
#endif
/* interrupt callback */
@@ -465,60 +465,60 @@ struct tms99xx_state
address_space *io;
int icount;
- UINT8 IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing
+ uint8_t IDLE; /* nonzero if processor is IDLE - i.e waiting for interrupt while writing
special data on CRU bus */
#if HAS_MAPPING
- UINT8 mapping_on; /* set by a CRU write */
+ uint8_t mapping_on; /* set by a CRU write */
map_file_t map_files[3]; /* internal mapper registers */
- UINT8 cur_map; /* equivalent to ST_MF status bit */
- UINT8 cur_src_map; /* set to 2 by LDS */
- UINT8 cur_dst_map; /* set to 2 by LDD */
+ uint8_t cur_map; /* equivalent to ST_MF status bit */
+ uint8_t cur_src_map; /* set to 2 by LDS */
+ uint8_t cur_dst_map; /* set to 2 by LDD */
#if (TMS99XX_MODEL == TI990_10_ID)
- UINT8 reset_maperr; /* reset mapper error flag line (reset flags in 945417-9701 p. 3-90) */
+ uint8_t reset_maperr; /* reset mapper error flag line (reset flags in 945417-9701 p. 3-90) */
- UINT32 mapper_address_latch; /* used to load the map file and for diagnostic purpose */
- UINT16 mapper_cru_read_register; /* read register select code for mapper cru interface */
- UINT8 diaglat; /* set when diagnostic address latch is done */
- UINT8 latch_control[3]; /* latch control */
+ uint32_t mapper_address_latch; /* used to load the map file and for diagnostic purpose */
+ uint16_t mapper_cru_read_register; /* read register select code for mapper cru interface */
+ uint8_t diaglat; /* set when diagnostic address latch is done */
+ uint8_t latch_control[3]; /* latch control */
#endif
#endif
#if (TMS99XX_MODEL == TI990_10_ID)
- UINT16 error_interrupt_register; /* one flag for each interrupt condition */
+ uint16_t error_interrupt_register; /* one flag for each interrupt condition */
ti99xx_error_interrupt_func error_interrupt_callback;
#endif
#if (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID)
- UINT8 RAM[256]; /* on-chip RAM (I know this is weird, but the internal bus is 16-bit-wide, whereas the external bus is 8-bit-wide) */
+ uint8_t RAM[256]; /* on-chip RAM (I know this is weird, but the internal bus is 16-bit-wide, whereas the external bus is 8-bit-wide) */
#endif
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID)
/* on-chip event counter/timer*/
- UINT8 decrementer_enabled;
- UINT16 decrementer_interval;
- UINT16 decrementer_count; /* used in event counter mode*/
+ uint8_t decrementer_enabled;
+ uint16_t decrementer_interval;
+ uint16_t decrementer_count; /* used in event counter mode*/
emu_timer *timer; /* used in timer mode */
#endif
#if (TMS99XX_MODEL == TMS9995_ID)
/* additionnal registers */
- UINT16 flag; /* flag register */
- UINT8 MID_flag; /* MID flag register */
+ uint16_t flag; /* flag register */
+ uint8_t MID_flag; /* MID flag register */
/* chip config, which can be set on reset */
- UINT8 memory_wait_states_byte;
- UINT8 memory_wait_states_word;
+ uint8_t memory_wait_states_byte;
+ uint8_t memory_wait_states_word;
/* mask option (off on normal tms9995) */
- UINT8 is_mp9537;
+ uint8_t is_mp9537;
#endif
/* Some instructions (i.e. XOP, BLWP, and MID) disable interrupt recognition until another
instruction is executed : so they set this flag */
- UINT8 disable_interrupt_recognition;
+ uint8_t disable_interrupt_recognition;
/* notify the driver of changes in IDLE state */
ti99xx_idle_func idle_callback;
@@ -943,7 +943,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else if (addr < 0xf0fc)
{
- return *(UINT16 *)(& cpustate->RAM[addr - 0xf000]);
+ return *(uint16_t *)(& cpustate->RAM[addr - 0xf000]);
}
else if (addr < 0xfffa)
{
@@ -964,7 +964,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else
{
- return *(UINT16 *)(& cpustate->RAM[addr - 0xff00]);
+ return *(uint16_t *)(& cpustate->RAM[addr - 0xff00]);
}
}
@@ -978,7 +978,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else if (addr < 0xf0fc)
{
- *(UINT16 *)(& cpustate->RAM[addr - 0xf000]) = data;
+ *(uint16_t *)(& cpustate->RAM[addr - 0xf000]) = data;
}
else if (addr < 0xfffa)
{
@@ -994,7 +994,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
}
else
{
- *(UINT16 *)(& cpustate->RAM[addr - 0xff00]) = data;
+ *(uint16_t *)(& cpustate->RAM[addr - 0xff00]) = data;
}
}
@@ -1082,15 +1082,15 @@ WRITE8_HANDLER(tms9995_internal2_w)
#define READREG(reg) readword(cpustate, (cpustate->WP+(reg)) & 0xffff)
#define WRITEREG(reg, data) writeword(cpustate, (cpustate->WP+(reg)) & 0xffff, (data))
-static inline UINT16 READREG_DEBUG(tms99xx_state *cpustate, int reg)
+static inline uint16_t READREG_DEBUG(tms99xx_state *cpustate, int reg)
{
int temp = cpustate->icount;
- UINT16 result = READREG(reg);
+ uint16_t result = READREG(reg);
cpustate->icount = temp;
return result;
}
-static inline void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
+static inline void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, uint16_t data)
{
int temp = cpustate->icount;
WRITEREG(reg, data);
@@ -1242,7 +1242,7 @@ static void set_flag1(tms99xx_state *cpustate, int val);
static void setstat(tms99xx_state *cpustate)
{
int i;
- UINT8 a;
+ uint8_t a;
cpustate->STATUS &= ~ ST_OP;
@@ -1297,7 +1297,7 @@ static void getstat(tms99xx_state *cpustate)
*/
-static const UINT16 right_shift_mask_table[17] =
+static const uint16_t right_shift_mask_table[17] =
{
0xFFFF,
0x7FFF,
@@ -1318,7 +1318,7 @@ static const UINT16 right_shift_mask_table[17] =
0x0000
};
-static const UINT16 inverted_right_shift_mask_table[17] =
+static const uint16_t inverted_right_shift_mask_table[17] =
{
0x0000,
0x8000,
@@ -1339,12 +1339,12 @@ static const UINT16 inverted_right_shift_mask_table[17] =
0xFFFF
};
-static inline UINT16 logical_right_shift(UINT16 val, int c)
+static inline uint16_t logical_right_shift(uint16_t val, int c)
{
return((val>>c) & right_shift_mask_table[c]);
}
-static inline INT16 arithmetic_right_shift(INT16 val, int c)
+static inline int16_t arithmetic_right_shift(int16_t val, int c)
{
if (val < 0)
return((val>>c) | inverted_right_shift_mask_table[c]);
@@ -1359,7 +1359,7 @@ static inline INT16 arithmetic_right_shift(INT16 val, int c)
/*
Set lae
*/
-static inline void setst_lae(tms99xx_state *cpustate, INT16 val)
+static inline void setst_lae(tms99xx_state *cpustate, int16_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
@@ -1375,7 +1375,7 @@ static inline void setst_lae(tms99xx_state *cpustate, INT16 val)
/*
Set laep (BYTE)
*/
-static inline void setst_byte_laep(tms99xx_state *cpustate, INT8 val)
+static inline void setst_byte_laep(tms99xx_state *cpustate, int8_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
@@ -1392,7 +1392,7 @@ static inline void setst_byte_laep(tms99xx_state *cpustate, INT8 val)
/*
For COC, CZC, and TB
*/
-static inline void setst_e(tms99xx_state *cpustate, UINT16 val, UINT16 to)
+static inline void setst_e(tms99xx_state *cpustate, uint16_t val, uint16_t to)
{
if (val == to)
cpustate->STATUS |= ST_EQ;
@@ -1403,7 +1403,7 @@ static inline void setst_e(tms99xx_state *cpustate, UINT16 val, UINT16 to)
/*
For CI, C, CB
*/
-static inline void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
+static inline void setst_c_lae(tms99xx_state *cpustate, uint16_t to, uint16_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
@@ -1411,9 +1411,9 @@ static inline void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
cpustate->STATUS |= ST_EQ;
else
{
- if ( ((INT16) val) > ((INT16) to) )
+ if ( ((int16_t) val) > ((int16_t) to) )
cpustate->STATUS |= ST_AGT;
- if ( ((UINT16) val) > ((UINT16) to) )
+ if ( ((uint16_t) val) > ((uint16_t) to) )
cpustate->STATUS |= ST_LGT;
}
}
@@ -1421,10 +1421,10 @@ static inline void setst_c_lae(tms99xx_state *cpustate, UINT16 to, UINT16 val)
/*
Set laeco for add
*/
-static inline INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
+static inline int16_t setst_add_laeco(tms99xx_state *cpustate, int a, int b)
{
- UINT32 res;
- INT16 res2;
+ uint32_t res;
+ int16_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
@@ -1441,7 +1441,7 @@ static inline INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT16) res;
+ res2 = (int16_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1457,10 +1457,10 @@ static inline INT16 setst_add_laeco(tms99xx_state *cpustate, int a, int b)
/*
Set laeco for subtract
*/
-static inline INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
+static inline int16_t setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
{
- UINT32 res;
- INT16 res2;
+ uint32_t res;
+ int16_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
@@ -1477,7 +1477,7 @@ static inline INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT16) res;
+ res2 = (int16_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1493,10 +1493,10 @@ static inline INT16 setst_sub_laeco(tms99xx_state *cpustate, int a, int b)
/*
Set laecop for add (BYTE)
*/
-static inline INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
+static inline int8_t setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
{
unsigned int res;
- INT8 res2;
+ int8_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
@@ -1513,7 +1513,7 @@ static inline INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT8) res;
+ res2 = (int8_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1531,10 +1531,10 @@ static inline INT8 setst_addbyte_laecop(tms99xx_state *cpustate, int a, int b)
/*
Set laecop for subtract (BYTE)
*/
-static inline INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
+static inline int8_t setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
{
unsigned int res;
- INT8 res2;
+ int8_t res2;
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV | ST_OP);
@@ -1551,7 +1551,7 @@ static inline INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
cpustate->STATUS |= ST_DC;
#endif
- res2 = (INT8) res;
+ res2 = (int8_t) res;
if (res2 > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
@@ -1570,7 +1570,7 @@ static inline INT8 setst_subbyte_laecop(tms99xx_state *cpustate, int a, int b)
/*
For NEG
*/
-static inline void setst_laeo(tms99xx_state *cpustate, INT16 val)
+static inline void setst_laeo(tms99xx_state *cpustate, int16_t val)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_OV);
@@ -1579,7 +1579,7 @@ static inline void setst_laeo(tms99xx_state *cpustate, INT16 val)
else if (val < 0)
{
cpustate->STATUS |= ST_LGT;
- if (((UINT16) val) == 0x8000)
+ if (((uint16_t) val) == 0x8000)
cpustate->STATUS |= ST_OV;
}
else
@@ -1591,7 +1591,7 @@ static inline void setst_laeo(tms99xx_state *cpustate, INT16 val)
/*
Meat of SRA
*/
-static inline UINT16 setst_sra_laec(tms99xx_state *cpustate, INT16 a, UINT16 c)
+static inline uint16_t setst_sra_laec(tms99xx_state *cpustate, int16_t a, uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
@@ -1617,7 +1617,7 @@ static inline UINT16 setst_sra_laec(tms99xx_state *cpustate, INT16 a, UINT16 c)
/*
Meat of SRL. Same algorithm as SRA, except that we fills in with 0s.
*/
-static inline UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
+static inline uint16_t setst_srl_laec(tms99xx_state *cpustate, uint16_t a,uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
@@ -1629,9 +1629,9 @@ static inline UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
a = logical_right_shift(a, 1);
}
- if (((INT16) a) > 0)
+ if (((int16_t) a) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) a) < 0)
+ else if (((int16_t) a) < 0)
cpustate->STATUS |= ST_LGT;
else
cpustate->STATUS |= ST_EQ;
@@ -1643,7 +1643,7 @@ static inline UINT16 setst_srl_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
//
// Meat of SRC
//
-static inline UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
+static inline uint16_t setst_src_laec(tms99xx_state *cpustate, uint16_t a,uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C);
@@ -1654,9 +1654,9 @@ static inline UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
cpustate->STATUS |= ST_C;
}
- if (((INT16) a) > 0)
+ if (((int16_t) a) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) a) < 0)
+ else if (((int16_t) a) < 0)
cpustate->STATUS |= ST_LGT;
else
cpustate->STATUS |= ST_EQ;
@@ -1668,15 +1668,15 @@ static inline UINT16 setst_src_laec(tms99xx_state *cpustate, UINT16 a,UINT16 c)
//
// Meat of SLA
//
-static inline UINT16 setst_sla_laeco(tms99xx_state *cpustate, UINT16 a, UINT16 c)
+static inline uint16_t setst_sla_laeco(tms99xx_state *cpustate, uint16_t a, uint16_t c)
{
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ | ST_C | ST_OV);
if (c != 0)
{
{
- register UINT16 mask;
- register UINT16 ousted_bits;
+ register uint16_t mask;
+ register uint16_t ousted_bits;
mask = 0xFFFF << (16-c-1);
ousted_bits = a & mask;
@@ -1693,9 +1693,9 @@ static inline UINT16 setst_sla_laeco(tms99xx_state *cpustate, UINT16 a, UINT16 c
a <<= 1;
}
- if (((INT16) a) > 0)
+ if (((int16_t) a) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) a) < 0)
+ else if (((int16_t) a) < 0)
cpustate->STATUS |= ST_LGT;
else
cpustate->STATUS |= ST_EQ;
@@ -1889,9 +1889,9 @@ static CPU_EXIT( tms99xx )
}
/* fetch : read one word at * PC, and increment PC. */
-static inline UINT16 fetch(tms99xx_state *cpustate)
+static inline uint16_t fetch(tms99xx_state *cpustate)
{
- UINT16 value = readword(cpustate, cpustate->PC);
+ uint16_t value = readword(cpustate, cpustate->PC);
cpustate->PC += 2;
return value;
}
@@ -2417,7 +2417,7 @@ static void field_interrupt(tms99xx_state *cpustate)
static CPU_DISASSEMBLE( tms99xx )
{
- extern unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram);
+ extern unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const uint8_t *oprom, const uint8_t *opram);
return Dasm9900(buffer, pc, TMS99XX_MODEL, oprom, opram);
}
@@ -2628,7 +2628,7 @@ static void write_single_CRU(tms99xx_state *cpustate, int port, int data)
/*
performs a normal write to CRU bus (used by SBZ, SBO, LDCR : address range 0 -> 0xFFF)
*/
-static cru_error_code writeCRU(tms99xx_state *cpustate, int CRUAddr, int Number, UINT16 Value)
+static cru_error_code writeCRU(tms99xx_state *cpustate, int CRUAddr, int Number, uint16_t Value)
{
int count;
@@ -2881,7 +2881,7 @@ static int readCRU(tms99xx_state *cpustate, int CRUAddr, int Number)
#if HAS_MAPPING
/* load a map file from memory */
-static void load_map_file(tms99xx_state *cpustate, UINT16 src_addr, int src_map_file, int dst_file)
+static void load_map_file(tms99xx_state *cpustate, uint16_t src_addr, int src_map_file, int dst_file)
{
int i;
@@ -2938,9 +2938,9 @@ static void load_map_file(tms99xx_state *cpustate, UINT16 src_addr, int src_map_
#endif
/* contextswitch : performs a BLWP, i.e. load PC, WP, and save old PC, old WP and ST... */
-static void contextswitch(tms99xx_state *cpustate, UINT16 addr)
+static void contextswitch(tms99xx_state *cpustate, uint16_t addr)
{
- UINT16 oldWP, oldpc;
+ uint16_t oldWP, oldpc;
/* save old state */
oldWP = cpustate->WP;
@@ -2963,9 +2963,9 @@ static void contextswitch(tms99xx_state *cpustate, UINT16 addr)
we enter privileged mode and select map file 0 before doing the context switch */
/* For CPU that have no privilege support, contextswitchX would behave
identically to contextswitch, so we can call contextswitch in all cases. */
-static void contextswitchX(tms99xx_state *cpustate, UINT16 addr)
+static void contextswitchX(tms99xx_state *cpustate, uint16_t addr)
{
- UINT16 oldWP, oldpc, oldST;
+ uint16_t oldWP, oldpc, oldST;
/* save old state */
oldWP = cpustate->WP;
@@ -3000,10 +3000,10 @@ static void contextswitchX(tms99xx_state *cpustate, UINT16 addr)
* NOTA : the LSBit is always ignored in word addresses,
* but we do not set it to 0 because of XOP...
*/
-static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
+static uint16_t decipheraddr(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 ts = opcode & 0x30;
- register UINT16 reg = opcode & 0xF;
+ register uint16_t ts = opcode & 0x30;
+ register uint16_t reg = opcode & 0xF;
reg += reg;
@@ -3017,7 +3017,7 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
}
else if (ts == 0x20)
{
- register UINT16 imm;
+ register uint16_t imm;
imm = fetch(cpustate);
@@ -3034,7 +3034,7 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
}
else /*if (ts == 0x30)*/
{ /* *Rx+ */
- register UINT16 response;
+ register uint16_t response;
reg += cpustate->WP; /* reg now contains effective address */
@@ -3047,10 +3047,10 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
}
/* decipheraddrbyte : compute and return the effective address in byte instructions. */
-static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
+static uint16_t decipheraddrbyte(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 ts = opcode & 0x30;
- register UINT16 reg = opcode & 0xF;
+ register uint16_t ts = opcode & 0x30;
+ register uint16_t reg = opcode & 0xF;
reg += reg;
@@ -3064,7 +3064,7 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
}
else if (ts == 0x20)
{
- register UINT16 imm;
+ register uint16_t imm;
imm = fetch(cpustate);
@@ -3081,7 +3081,7 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
}
else /*if (ts == 0x30)*/
{ /* *Rx+ */
- register UINT16 response;
+ register uint16_t response;
reg += cpustate->WP; /* reg now contains effective address */
@@ -3143,7 +3143,7 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
>0C00->0FFF (not for 990/12 and 99110)
============================================================================*/
-static void illegal(tms99xx_state *cpustate, UINT16 opcode)
+static void illegal(tms99xx_state *cpustate, uint16_t opcode)
{
HANDLE_ILLEGAL;
}
@@ -3162,7 +3162,7 @@ static void illegal(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0000(tms99xx_state *cpustate, UINT16 opcode)
+static void h0000(tms99xx_state *cpustate, uint16_t opcode)
{
if (opcode >= 0x30)
{ /* STPC STore Program Counter */
@@ -3234,9 +3234,9 @@ static void h0000(tms99xx_state *cpustate, UINT16 opcode)
tms9989 and later : LST, LWP
============================================================================*/
-static void h0040(tms99xx_state *cpustate, UINT16 opcode)
+static void h0040(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr;
+ register uint16_t addr;
addr = opcode & 0xF;
addr = ((addr + addr) + cpustate->WP) & ~1;
@@ -3310,9 +3310,9 @@ static void h0040(tms99xx_state *cpustate, UINT16 opcode)
tms9989 and later : DIVS, MPYS
tms99xxx : BIND
============================================================================*/
-static void h0100(tms99xx_state *cpustate, UINT16 opcode)
+static void h0100(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
+ register uint16_t src;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
#endif
@@ -3333,9 +3333,9 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
/* DIVS -- DIVide Signed */
/* R0 = (R0:R1)/S R1 = (R0:R1)%S */
{
- INT16 d = readwordX(cpustate, src, src_map);
- INT32 divq = (READREG(R0) << 16) | READREG(R1);
- INT32 q = divq/d;
+ int16_t d = readwordX(cpustate, src, src_map);
+ int32_t divq = (READREG(R0) << 16) | READREG(R1);
+ int32_t q = divq/d;
if ((q < -32768L) || (q > 32767L))
{
@@ -3358,8 +3358,8 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
/* MPYS -- MultiPlY Signed */
/* Results: R0:R1 = R0*S */
{
- INT32 prod = ((INT32) (INT16) readwordX(cpustate, src, src_map));
- prod = prod*((INT32) (INT16) READREG(R0));
+ int32_t prod = ((int32_t) (int16_t) readwordX(cpustate, src, src_map));
+ prod = prod*((int32_t) (int16_t) READREG(R0));
cpustate->STATUS &= ~ (ST_LGT | ST_AGT | ST_EQ);
if (prod > 0)
@@ -3402,10 +3402,10 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
LI, AI, ANDI, ORI, CI, STWP, STST, LIMI, LWPI, IDLE, RSET, RTWP, CKON, CKOF, LREX
systems with memory mapper: LMF
============================================================================*/
-static void h0200(tms99xx_state *cpustate, UINT16 opcode)
+static void h0200(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr;
- register UINT16 value; /* used for anything */
+ register uint16_t addr;
+ register uint16_t value; /* used for anything */
addr = opcode & 0xF;
addr = ((addr + addr) + cpustate->WP) & ~1;
@@ -3754,10 +3754,10 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
BLWP, B, X, CLR, NEG, INV, INC, INCT, DEC, DECT, BL, SWPB, SETO, ABS
systems with memory mapper: LDD, LDS
============================================================================*/
-static void h0400(tms99xx_state *cpustate, UINT16 opcode)
+static void h0400(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr = decipheraddr(cpustate, opcode) & ~1;
- register UINT16 value; /* used for anything */
+ register uint16_t addr = decipheraddr(cpustate, opcode) & ~1;
+ register uint16_t value; /* used for anything */
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
#endif
@@ -3801,7 +3801,7 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
case 4: /* NEG */
/* NEG --- NEGate */
/* *S = -*S */
- value = - (INT16) readwordX(cpustate, addr, src_map);
+ value = - (int16_t) readwordX(cpustate, addr, src_map);
if (value)
cpustate->STATUS &= ~ ST_C;
else
@@ -3899,9 +3899,9 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
CYCLES(5, 12, Mooof!);
- if (((INT16) value) > 0)
+ if (((int16_t) value) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) value) < 0)
+ else if (((int16_t) value) < 0)
{
cpustate->STATUS |= ST_LGT;
if (value == 0x8000)
@@ -3912,7 +3912,7 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
cpustate->STATUS |= ST_DC;
#endif
- writewordX(cpustate, addr, - ((INT16) value), src_map);
+ writewordX(cpustate, addr, - ((int16_t) value), src_map);
CYCLES(0, 2, Mooof!);
}
else
@@ -3927,14 +3927,14 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
value = readwordX(cpustate, addr, src_map);
CYCLES(Mooof!, Mooof!, 3);
- if (((INT16) value) > 0)
+ if (((int16_t) value) > 0)
cpustate->STATUS |= ST_LGT | ST_AGT;
- else if (((INT16) value) < 0)
+ else if (((int16_t) value) < 0)
{
cpustate->STATUS |= ST_LGT;
if (value == 0x8000)
cpustate->STATUS |= ST_OV;
- value = - ((INT16) value);
+ value = - ((int16_t) value);
}
else
cpustate->STATUS |= ST_EQ;
@@ -4005,11 +4005,11 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
SRA, SRL, SLA, SRC
============================================================================*/
-static void h0800(tms99xx_state *cpustate, UINT16 opcode)
+static void h0800(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 addr;
- register UINT16 cnt = (opcode & 0xF0) >> 4;
- register UINT16 value;
+ register uint16_t addr;
+ register uint16_t cnt = (opcode & 0xF0) >> 4;
+ register uint16_t value;
addr = (opcode & 0xF);
addr = ((addr+addr) + cpustate->WP) & ~1;
@@ -4071,7 +4071,7 @@ static void h0800(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0c00(tms99xx_state *cpustate, UINT16 opcode)
+static void h0c00(tms99xx_state *cpustate, uint16_t opcode)
{
if (opcode & 0x30)
{
@@ -4164,9 +4164,9 @@ static void h0c00(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0c40(tms99xx_state *cpustate, UINT16 opcode)
+static void h0c40(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
+ register uint16_t src;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4234,7 +4234,7 @@ static void h0c40(tms99xx_state *cpustate, UINT16 opcode)
---------------------------------
============================================================================*/
-static void h0e00(tms99xx_state *cpustate, UINT16 opcode)
+static void h0e00(tms99xx_state *cpustate, uint16_t opcode)
{
switch ((opcode & 0x30) >> 4)
{
@@ -4267,10 +4267,10 @@ static void h0e00(tms99xx_state *cpustate, UINT16 opcode)
JMP, JLT, JLE, JEQ, JHE, JGT, JNE, JNC, JOC, JNO, JL, JH, JOP
SBO, SBZ, TB
============================================================================*/
-static void h1000(tms99xx_state *cpustate, UINT16 opcode)
+static void h1000(tms99xx_state *cpustate, uint16_t opcode)
{
/* we convert 8 bit signed word offset to a 16 bit effective word offset. */
- register INT16 offset = ((INT8) opcode);
+ register int16_t offset = ((int8_t) opcode);
switch ((opcode & 0xF00) >> 8)
@@ -4408,7 +4408,7 @@ static void h1000(tms99xx_state *cpustate, UINT16 opcode)
{
/* Let's set ST_OP. */
int i;
- UINT8 a;
+ uint8_t a;
a = cpustate->lastparity;
i = 0;
@@ -4498,11 +4498,11 @@ tms9940 : DCA, DCS, LIIM
==========================================================================*/
/* xop, ldcr and stcr are handled elsewhere */
-static void h2000(tms99xx_state *cpustate, UINT16 opcode)
+static void h2000(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 dest = (opcode & 0x3C0) >> 6;
- register UINT16 src;
- register UINT16 value;
+ register uint16_t dest = (opcode & 0x3C0) >> 6;
+ register uint16_t src;
+ register uint16_t value;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4556,8 +4556,8 @@ static void h2000(tms99xx_state *cpustate, UINT16 opcode)
/* DIV --- DIVide (unsigned) */
/* D = D/S D+1 = D%S */
{
- UINT16 d = readwordX(cpustate, src, src_map);
- UINT16 hi = readword(cpustate, dest);
+ uint16_t d = readwordX(cpustate, src, src_map);
+ uint16_t hi = readword(cpustate, dest);
unsigned long divq = (((unsigned long) hi) << 16) | readword(cpustate, (dest+2)&0xffff);
if (d <= hi)
@@ -4580,7 +4580,7 @@ static void h2000(tms99xx_state *cpustate, UINT16 opcode)
}
}
-static void xop(tms99xx_state *cpustate, UINT16 opcode)
+static void xop(tms99xx_state *cpustate, uint16_t opcode)
{ /* XOP */
/* XOP --- eXtended OPeration */
/* WP = *(40h+D), PC = *(42h+D) */
@@ -4588,8 +4588,8 @@ static void xop(tms99xx_state *cpustate, UINT16 opcode)
/* New R11=S */
/* Xop bit set */
- register UINT16 immediate = (opcode & 0x3C0) >> 6;
- register UINT16 operand;
+ register uint16_t immediate = (opcode & 0x3C0) >> 6;
+ register uint16_t operand;
#if (TMS99XX_MODEL == TMS9940_ID) || (TMS99XX_MODEL == TMS9985_ID)
@@ -4685,10 +4685,10 @@ static void xop(tms99xx_state *cpustate, UINT16 opcode)
}
/* LDCR and STCR */
-static void ldcr_stcr(tms99xx_state *cpustate, UINT16 opcode)
+static void ldcr_stcr(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 cnt = (opcode & 0x3C0) >> 6;
- register UINT16 addr;
+ register uint16_t cnt = (opcode & 0x3C0) >> 6;
+ register uint16_t addr;
int value;
#if HAS_MAPPING
@@ -4829,11 +4829,11 @@ static void ldcr_stcr(tms99xx_state *cpustate, UINT16 opcode)
============================================================================*/
/* word instructions */
-static void h4000w(tms99xx_state *cpustate, UINT16 opcode)
+static void h4000w(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
- register UINT16 dest;
- register UINT16 value;
+ register uint16_t src;
+ register uint16_t dest;
+ register uint16_t value;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4898,11 +4898,11 @@ static void h4000w(tms99xx_state *cpustate, UINT16 opcode)
}
/* byte instruction */
-static void h4000b(tms99xx_state *cpustate, UINT16 opcode)
+static void h4000b(tms99xx_state *cpustate, uint16_t opcode)
{
- register UINT16 src;
- register UINT16 dest;
- register UINT16 value;
+ register uint16_t src;
+ register uint16_t dest;
+ register uint16_t value;
#if HAS_MAPPING
int src_map = (opcode & 0x0030) ? cpustate->cur_src_map : cpustate->cur_map;
@@ -4971,13 +4971,13 @@ static void h4000b(tms99xx_state *cpustate, UINT16 opcode)
}
-static inline void execute(tms99xx_state *cpustate, UINT16 opcode)
+static inline void execute(tms99xx_state *cpustate, uint16_t opcode)
{
#if (! HAS_9995_OPCODES)
/* tms9900-like instruction set*/
- static void (*const jumptable_short[128])(tms99xx_state *,UINT16) =
+ static void (*const jumptable_short[128])(tms99xx_state *,uint16_t) =
{
&illegal,&h0200,&h0400,&h0400,&h0800,&h0800,&illegal,&illegal,
&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,&h1000,
@@ -5004,7 +5004,7 @@ static inline void execute(tms99xx_state *cpustate, UINT16 opcode)
/* tms9989 and tms9995 include 4 extra instructions, and one additionnal instruction type */
/* tms99000 includes yet another additional instruction */
- static void (*const jumptable_long[256])(tms99xx_state *,UINT16) =
+ static void (*const jumptable_long[256])(tms99xx_state *,uint16_t) =
{
&h0040,&h0100,&h0200,&h0200,&h0400,&h0400,&h0400,&h0400,
&h0800,&h0800,&h0800,&h0800,&illegal,&illegal,&illegal,&illegal,
@@ -5131,7 +5131,7 @@ static CPU_SET_INFO( tms99xx )
* Generic get_info
**************************************************************************/
-void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
+void TMS99XX_GET_INFO(legacy_cpu_device *device, uint32_t state, cpuinfo *info)
{
tms99xx_state *cpustate = (device != nullptr && device->token() != nullptr) ? get_safe_token(device) : nullptr;
switch (state)
diff --git a/src/devices/cpu/tms9900/ti990_10.cpp b/src/devices/cpu/tms9900/ti990_10.cpp
index 01c2c57a87d..6465ecf8475 100644
--- a/src/devices/cpu/tms9900/ti990_10.cpp
+++ b/src/devices/cpu/tms9900/ti990_10.cpp
@@ -41,7 +41,7 @@
twice their number. Accordingly, the TMS9900 has a CRU bitmask 0x0fff.
****************************************************************************/
-ti990_10_device::ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ti990_10_device::ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TI990_10, "TI990/10 CPU", tag, owner, clock, "ti990_10_cpu", __FILE__),
m_program_config("program", ENDIANNESS_BIG, 16, 21),
m_io_config("cru", ENDIANNESS_BIG, 8, 12),
@@ -112,35 +112,35 @@ void ti990_10_device::execute_set_input(int irqline, int state)
// ==========================================================================
-UINT32 ti990_10_device::execute_min_cycles() const
+uint32_t ti990_10_device::execute_min_cycles() const
{
return 2;
}
// TODO: Compute this value, just a wild guess for the average
-UINT32 ti990_10_device::execute_max_cycles() const
+uint32_t ti990_10_device::execute_max_cycles() const
{
return 10;
}
-UINT32 ti990_10_device::execute_input_lines() const
+uint32_t ti990_10_device::execute_input_lines() const
{
return 2;
}
// device_disasm_interface overrides
-UINT32 ti990_10_device::disasm_min_opcode_bytes() const
+uint32_t ti990_10_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 ti990_10_device::disasm_max_opcode_bytes() const
+uint32_t ti990_10_device::disasm_max_opcode_bytes() const
{
return 6;
}
// TODO: check 9900dasm
-offs_t ti990_10_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t ti990_10_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9900 );
return CPU_DISASSEMBLE_NAME(tms9900)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/ti990_10.h b/src/devices/cpu/tms9900/ti990_10.h
index 4fa8da2b43f..763e64ea00f 100644
--- a/src/devices/cpu/tms9900/ti990_10.h
+++ b/src/devices/cpu/tms9900/ti990_10.h
@@ -15,7 +15,7 @@
class ti990_10_device : public cpu_device
{
public:
- ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ti990_10_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
~ti990_10_device();
protected:
@@ -25,16 +25,16 @@ protected:
void device_reset() override;
// device_execute_interface overrides
- UINT32 execute_min_cycles() const override;
- UINT32 execute_max_cycles() const override;
- UINT32 execute_input_lines() const override;
+ uint32_t execute_min_cycles() const override;
+ uint32_t execute_max_cycles() const override;
+ uint32_t execute_input_lines() const override;
void execute_set_input(int irqline, int state) override;
void execute_run() override;
// device_disasm_interface overrides
- UINT32 disasm_min_opcode_bytes() const override;
- UINT32 disasm_max_opcode_bytes() const override;
- offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ uint32_t disasm_min_opcode_bytes() const override;
+ uint32_t disasm_max_opcode_bytes() const override;
+ offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
const address_space_config* memory_space_config(address_spacenum spacenum) const override;
@@ -47,12 +47,12 @@ protected:
int m_icount;
// Hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ uint16_t WP; // Workspace pointer
+ uint16_t PC; // Program counter
+ uint16_t ST; // Status register
private:
- UINT16 m_state_any;
+ uint16_t m_state_any;
};
// device type definition
diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp
index 1962cc897f5..a189d2e0a94 100644
--- a/src/devices/cpu/tms9900/tms9900.cpp
+++ b/src/devices/cpu/tms9900/tms9900.cpp
@@ -170,7 +170,7 @@ enum
twice their number. Accordingly, the TMS9900 has a CRU bitmask 0x0fff.
****************************************************************************/
-tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+tms99xx_device::tms99xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source),
m_program_config("program", ENDIANNESS_BIG, databus_width, prg_addr_bits),
m_io_config("cru", ENDIANNESS_BIG, 8, cru_addr_bits),
@@ -198,7 +198,7 @@ tms99xx_device::~tms99xx_device()
Constructor for TMS9900
****************************************************************************/
-tms9900_device::tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms9900_device::tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms99xx_device(mconfig, TMS9900, "TMS9900", tag, 16, 16, 12, owner, clock, "tms9900", __FILE__)
{
}
@@ -340,21 +340,21 @@ void tms99xx_device::state_import(const device_state_entry &entry)
// bits of the STATUS register
break;
case TMS9900_PC:
- PC = (UINT16)(m_state_any & m_prgaddr_mask & 0xfffe);
+ PC = (uint16_t)(m_state_any & m_prgaddr_mask & 0xfffe);
break;
case TMS9900_WP:
- WP = (UINT16)(m_state_any & m_prgaddr_mask & 0xfffe);
+ WP = (uint16_t)(m_state_any & m_prgaddr_mask & 0xfffe);
break;
case TMS9900_STATUS:
- ST = (UINT16)m_state_any;
+ ST = (uint16_t)m_state_any;
break;
case TMS9900_IR:
- IR = (UINT16)m_state_any;
+ IR = (uint16_t)m_state_any;
break;
default:
// Workspace registers
if (index <= TMS9900_R15)
- write_workspace_register_debug(index-TMS9900_R0, (UINT16)m_state_any);
+ write_workspace_register_debug(index-TMS9900_R0, (uint16_t)m_state_any);
break;
}
}
@@ -398,7 +398,7 @@ void tms99xx_device::state_string_export(const device_state_entry &entry, std::s
static const char *statestr = "LAECOPX-----IIII";
char flags[17];
for (auto &flag : flags) flag = 0x00;
- UINT16 val = 0x8000;
+ uint16_t val = 0x8000;
if (entry.index()==STATE_GENFLAGS)
{
for (int i=0; i < 16; i++)
@@ -412,17 +412,17 @@ void tms99xx_device::state_string_export(const device_state_entry &entry, std::s
/**************************************************************************/
-UINT16 tms99xx_device::read_workspace_register_debug(int reg)
+uint16_t tms99xx_device::read_workspace_register_debug(int reg)
{
int temp = m_icount;
m_prgspace->set_debugger_access(true);
- UINT16 value = m_prgspace->read_word((WP+(reg<<1)) & m_prgaddr_mask & 0xfffe);
+ uint16_t value = m_prgspace->read_word((WP+(reg<<1)) & m_prgaddr_mask & 0xfffe);
m_prgspace->set_debugger_access(false);
m_icount = temp;
return value;
}
-void tms99xx_device::write_workspace_register_debug(int reg, UINT16 data)
+void tms99xx_device::write_workspace_register_debug(int reg, uint16_t data)
{
int temp = m_icount;
m_prgspace->set_debugger_access(true);
@@ -457,7 +457,7 @@ const address_space_config *tms99xx_device::memory_space_config(address_spacenum
/*
Define the indices for the micro-operation table. This is done for the sake
- of a simpler microprogram definition as an UINT8[].
+ of a simpler microprogram definition as an uint8_t[].
*/
enum
{
@@ -513,7 +513,7 @@ enum
#define MICROPROGRAM(_MP) \
- static const UINT8 _MP[] =
+ static const uint8_t _MP[] =
/*
This is a kind of subroutine with 6 variants. Might be done in countless
@@ -1087,7 +1087,7 @@ void tms99xx_device::build_command_lookup_table()
int cmdindex;
int bitcount;
const tms_instruction *inst;
- UINT16 opcode;
+ uint16_t opcode;
m_command_lookup_table = std::make_unique<lookup_entry[]>(16);
@@ -1225,10 +1225,10 @@ void tms99xx_device::execute_run()
}
else
{
- const UINT8* program = nullptr;
+ const uint8_t* program = nullptr;
// When we are in the data derivation sequence, the caller_index is set
if (m_program_index != NOPRG)
- program = (m_caller_index == NOPRG)? (UINT8*)s_command[m_program_index].prog : data_derivation;
+ program = (m_caller_index == NOPRG)? (uint8_t*)s_command[m_program_index].prog : data_derivation;
// Handle HOLD
// A HOLD request is signalled through the input line HOLD.
@@ -1260,7 +1260,7 @@ void tms99xx_device::execute_run()
set_wait_state(false);
m_check_ready = false;
// If we don't have a microprogram, acquire the next instruction
- UINT8 op = (m_program_index==NOPRG)? IAQ : program[MPC];
+ uint8_t op = (m_program_index==NOPRG)? IAQ : program[MPC];
if (TRACE_MICRO) logerror("MPC = %d, op = %d\n", MPC, op);
// Call the operation of the microprogram
@@ -1441,11 +1441,11 @@ inline void tms99xx_device::set_wait_state(bool state)
Acquire the next word as an instruction. The program counter advances by
one word.
*/
-void tms99xx_device::decode(UINT16 inst)
+void tms99xx_device::decode(uint16_t inst)
{
int ix = 0;
lookup_entry* table = m_command_lookup_table.get();
- UINT16 opcode = inst;
+ uint16_t opcode = inst;
bool complete = false;
m_state = 0;
@@ -1592,7 +1592,7 @@ void tms99xx_device::register_read()
void tms99xx_device::register_write()
{
// This will be called twice; m_pass is set by the embedded mem_write
- UINT16 addr_save = m_address;
+ uint16_t addr_save = m_address;
m_address = (WP + (m_regnumber<<1)) & m_prgaddr_mask & 0xfffe;
mem_write();
m_address = addr_save;
@@ -1711,7 +1711,7 @@ void tms99xx_device::command_completed()
*/
void tms99xx_device::data_derivation_subprogram()
{
- UINT16 ircopy = IR;
+ uint16_t ircopy = IR;
// Save the return program and position
m_caller_index = m_program_index;
@@ -1744,7 +1744,7 @@ inline void tms99xx_device::set_status_bit(int bit, bool state)
else ST &= ~bit;
}
-void tms99xx_device::set_status_parity(UINT8 value)
+void tms99xx_device::set_status_parity(uint8_t value)
{
int count = 0;
for (int i=0; i < 8; i++)
@@ -1755,11 +1755,11 @@ void tms99xx_device::set_status_parity(UINT8 value)
set_status_bit(ST_OP, (count & 1)!=0);
}
-inline void tms99xx_device::compare_and_set_lae(UINT16 value1, UINT16 value2)
+inline void tms99xx_device::compare_and_set_lae(uint16_t value1, uint16_t value2)
{
set_status_bit(ST_EQ, value1 == value2);
set_status_bit(ST_LH, value1 > value2);
- set_status_bit(ST_AGT, (INT16)value1 > (INT16)value2);
+ set_status_bit(ST_AGT, (int16_t)value1 > (int16_t)value2);
if (TRACE_STATUS) logerror("ST = %04x (val1=%04x, val2=%04x)\n", ST, value1, value2);
}
@@ -1843,10 +1843,10 @@ void tms99xx_device::alu_reg()
void tms99xx_device::alu_f1()
{
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
// Save the destination value
- UINT16 prev_dest_value = m_current_value;
+ uint16_t prev_dest_value = m_current_value;
m_destination_even = ((m_address & 1)==0); // this is the destination address; the source address has already been saved
bool byteop = byte_operation();
@@ -1934,7 +1934,7 @@ void tms99xx_device::alu_f1()
if (byteop)
{
- set_status_parity((UINT8)(dest_new>>8));
+ set_status_parity((uint8_t)(dest_new>>8));
// destnew is the new value to be written (high byte); needs to be
// merged with the existing word
@@ -1942,12 +1942,12 @@ void tms99xx_device::alu_f1()
m_current_value = (prev_dest_value & 0x00ff) | (dest_new & 0xff00);
else
m_current_value = (prev_dest_value & 0xff00) | ((dest_new >> 8) & 0x00ff);
- compare_and_set_lae((UINT16)(dest_new & 0xff00), 0);
+ compare_and_set_lae((uint16_t)(dest_new & 0xff00), 0);
}
else
{
- m_current_value = (UINT16)(dest_new & 0xffff);
- compare_and_set_lae((UINT16)(dest_new & 0xffff), 0);
+ m_current_value = (uint16_t)(dest_new & 0xffff);
+ compare_and_set_lae((uint16_t)(dest_new & 0xffff), 0);
}
pulse_clock(2);
@@ -1960,7 +1960,7 @@ void tms99xx_device::alu_comp()
{
if (!m_destination_even) m_current_value <<= 8;
if (!m_source_even) m_source_value <<= 8;
- set_status_parity((UINT8)(m_source_value>>8));
+ set_status_parity((uint8_t)(m_source_value>>8));
compare_and_set_lae(m_source_value & 0xff00, m_current_value & 0xff00);
}
else
@@ -2007,7 +2007,7 @@ void tms99xx_device::alu_f3()
void tms99xx_device::alu_multiply()
{
- UINT32 result;
+ uint32_t result;
switch (m_state)
{
@@ -2034,9 +2034,9 @@ void tms99xx_device::alu_multiply()
void tms99xx_device::alu_divide()
{
// Format is DIV Divisor,REG(dividend)
- UINT32 uval32;
+ uint32_t uval32;
bool overflow = true;
- UINT16 value1;
+ uint16_t value1;
switch (m_state)
{
@@ -2148,9 +2148,9 @@ void tms99xx_device::alu_xop()
void tms99xx_device::alu_clr_swpb()
{
- UINT32 dest_new = 0;
- UINT32 src_val = m_current_value & 0x0000ffff;
- UINT16 sign = 0;
+ uint32_t dest_new = 0;
+ uint32_t src_val = m_current_value & 0x0000ffff;
+ uint16_t sign = 0;
bool setstatus = true;
bool check_ov = true;
@@ -2302,7 +2302,7 @@ void tms99xx_device::alu_blwp()
void tms99xx_device::alu_ldcr()
{
- UINT16 value;
+ uint16_t value;
// Spec: "If the source operand address is odd, the address is truncated
// to an even address prior to data transfer."
@@ -2326,7 +2326,7 @@ void tms99xx_device::alu_ldcr()
if (m_count <= 8)
{
if (m_source_even) value>>=8;
- set_status_parity((UINT8)(value & 0xff));
+ set_status_parity((uint8_t)(value & 0xff));
compare_and_set_lae(value<<8, 0);
}
else
@@ -2343,7 +2343,7 @@ void tms99xx_device::alu_ldcr()
void tms99xx_device::alu_stcr()
{
- UINT16 value;
+ uint16_t value;
int n = 2;
// For STCR transfers with more than 8 bits, the first CRU bit is
// always put into the least significant bit of the destination word.
@@ -2368,7 +2368,7 @@ void tms99xx_device::alu_stcr()
if (m_count < 9)
{
if (TRACE_CRU) logerror("Store CRU at %04x (%d bits) in %04x, result = %02x\n", m_cru_address, m_count, m_source_address, value);
- set_status_parity((UINT8)(value & 0xff));
+ set_status_parity((uint8_t)(value & 0xff));
compare_and_set_lae(value<<8, 0);
if (m_source_even)
m_current_value = (m_source_value & 0x00ff) | (value<<8);
@@ -2394,7 +2394,7 @@ void tms99xx_device::alu_stcr()
void tms99xx_device::alu_sbz_sbo()
{
- INT8 displacement;
+ int8_t displacement;
if (m_state==0)
{
m_address = WP + 24;
@@ -2402,7 +2402,7 @@ void tms99xx_device::alu_sbz_sbo()
else
{
m_value = (m_command==SBO)? 1 : 0;
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_count = 1;
}
@@ -2412,14 +2412,14 @@ void tms99xx_device::alu_sbz_sbo()
void tms99xx_device::alu_tb()
{
- INT8 displacement;
+ int8_t displacement;
switch (m_state)
{
case 0:
m_address = WP + 24;
break;
case 1:
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_count = 1;
break;
@@ -2434,7 +2434,7 @@ void tms99xx_device::alu_tb()
void tms99xx_device::alu_jmp()
{
- INT8 displacement;
+ int8_t displacement;
bool cond = false;
if (m_state==0)
@@ -2502,8 +2502,8 @@ void tms99xx_device::alu_shift()
{
bool carry = false;
bool overflow = false;
- UINT16 sign = 0;
- UINT32 value;
+ uint16_t sign = 0;
+ uint32_t value;
int count;
switch (m_state)
@@ -2585,7 +2585,7 @@ void tms99xx_device::alu_shift()
void tms99xx_device::alu_ai_ori()
{
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
switch (m_command)
{
case AI:
@@ -2734,18 +2734,18 @@ void tms99xx_device::alu_int()
}
/**************************************************************************/
-UINT32 tms99xx_device::execute_min_cycles() const
+uint32_t tms99xx_device::execute_min_cycles() const
{
return 2;
}
// TODO: Compute this value, just a wild guess for the average
-UINT32 tms99xx_device::execute_max_cycles() const
+uint32_t tms99xx_device::execute_max_cycles() const
{
return 10;
}
-UINT32 tms99xx_device::execute_input_lines() const
+uint32_t tms99xx_device::execute_input_lines() const
{
return 2;
}
@@ -2755,17 +2755,17 @@ UINT32 tms99xx_device::execute_input_lines() const
// execute_burn = nop
// device_disasm_interface overrides
-UINT32 tms99xx_device::disasm_min_opcode_bytes() const
+uint32_t tms99xx_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 tms99xx_device::disasm_max_opcode_bytes() const
+uint32_t tms99xx_device::disasm_max_opcode_bytes() const
{
return 6;
}
-offs_t tms99xx_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms99xx_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9900 );
return CPU_DISASSEMBLE_NAME(tms9900)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h
index 1104a29e4d4..1d4c54b6e17 100644
--- a/src/devices/cpu/tms9900/tms9900.h
+++ b/src/devices/cpu/tms9900/tms9900.h
@@ -44,7 +44,7 @@ class tms99xx_device : public cpu_device
public:
tms99xx_device(const machine_config &mconfig, device_type type, const char *name,
const char *tag, int databus_width, int prg_addr_bits, int cru_addr_bits,
- device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ device_t *owner, uint32_t clock, const char *shortname, const char *source);
~tms99xx_device();
@@ -74,16 +74,16 @@ protected:
virtual void resolve_lines();
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_set_input(int irqline, int state) override;
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
const address_space_config* memory_space_config(address_spacenum spacenum) const override;
@@ -91,35 +91,35 @@ protected:
virtual void mem_read(void);
virtual void mem_write(void);
virtual void acquire_instruction(void);
- void decode(UINT16 inst);
+ void decode(uint16_t inst);
const address_space_config m_program_config;
const address_space_config m_io_config;
address_space* m_prgspace;
address_space* m_cru;
- virtual UINT16 read_workspace_register_debug(int reg);
- virtual void write_workspace_register_debug(int reg, UINT16 data);
+ virtual uint16_t read_workspace_register_debug(int reg);
+ virtual void write_workspace_register_debug(int reg, uint16_t data);
// Cycle counter
int m_icount;
// TMS9900 hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ uint16_t WP; // Workspace pointer
+ uint16_t PC; // Program counter
+ uint16_t ST; // Status register
// Internal register
- UINT16 IR; // Instruction register
+ uint16_t IR; // Instruction register
// Stored address
- UINT16 m_address;
+ uint16_t m_address;
// Stores the recently read word or the word to be written
- UINT16 m_current_value;
+ uint16_t m_current_value;
// Decoded command
- UINT16 m_command;
+ uint16_t m_command;
// Is it a byte operation? Only format 1 commands with the byte flag set
// and CRU commands with less than 9 bits to transfer are byte operations.
@@ -140,8 +140,8 @@ protected:
int m_mem_phase;
// Max address
- const UINT16 m_prgaddr_mask;
- const UINT16 m_cruaddr_mask;
+ const uint16_t m_prgaddr_mask;
+ const uint16_t m_cruaddr_mask;
bool m_load_state;
bool m_irq_state;
@@ -219,7 +219,7 @@ private:
bool m_hold_state;
// State / debug management
- UINT16 m_state_any;
+ uint16_t m_state_any;
static const char* s_statename[];
virtual void state_import(const device_state_entry &entry) override;
virtual void state_export(const device_state_entry &entry) override;
@@ -234,7 +234,7 @@ private:
void build_command_lookup_table();
// Sequence of micro-operations
- typedef const UINT8* microprogram;
+ typedef const uint8_t* microprogram;
// Method pointer
typedef void (tms99xx_device::*ophandler)(void);
@@ -242,7 +242,7 @@ private:
// Opcode list entry
struct tms_instruction
{
- UINT16 opcode;
+ uint16_t opcode;
int id;
int format;
microprogram prog; // Microprogram
@@ -347,39 +347,39 @@ private:
bool m_destination_even;
// Intermediate storage for the source operand
- UINT16 m_source_address;
- UINT16 m_source_value;
- UINT16 m_address_saved;
+ uint16_t m_source_address;
+ uint16_t m_source_value;
+ uint16_t m_address_saved;
// Another copy of the address
- UINT16 m_address_copy;
+ uint16_t m_address_copy;
// Stores the recently read register contents
- UINT16 m_register_contents;
+ uint16_t m_register_contents;
// Stores the register number for the next register access
int m_regnumber;
// CRU support: Stores the CRU address
- UINT16 m_cru_address;
+ uint16_t m_cru_address;
// CRU support: Stores the number of bits to be transferred
int m_count;
// Copy of the value
- UINT16 m_value_copy;
+ uint16_t m_value_copy;
// Another internal register, storing intermediate values
// Using 32 bits to support MPY
- UINT32 m_value;
+ uint32_t m_value;
// For two-argument commands. Indicates whether this is the second operand.
bool m_get_destination;
// Status register update
inline void set_status_bit(int bit, bool state);
- inline void compare_and_set_lae(UINT16 value1, UINT16 value2);
- void set_status_parity(UINT8 value);
+ inline void compare_and_set_lae(uint16_t value1, uint16_t value2);
+ void set_status_parity(uint8_t value);
};
/*****************************************************************************/
@@ -387,7 +387,7 @@ private:
class tms9900_device : public tms99xx_device
{
public:
- tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms9900_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/tms9900/tms9980a.cpp b/src/devices/cpu/tms9900/tms9980a.cpp
index 054a293a403..5cb028e543a 100644
--- a/src/devices/cpu/tms9900/tms9980a.cpp
+++ b/src/devices/cpu/tms9900/tms9980a.cpp
@@ -74,7 +74,7 @@
Constructor
****************************************************************************/
-tms9980a_device::tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms9980a_device::tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms99xx_device(mconfig, TMS9980A, "TMS9980A", tag, 8, 14, 11, owner, clock, "tms9980a", __FILE__)
{
}
@@ -92,16 +92,16 @@ void tms9980a_device::resolve_lines()
m_dbin_line.resolve();
}
-UINT16 tms9980a_device::read_workspace_register_debug(int reg)
+uint16_t tms9980a_device::read_workspace_register_debug(int reg)
{
int temp = m_icount;
int addr = (WP+(reg<<1)) & 0xfffe & m_prgaddr_mask;
- UINT16 value = (m_prgspace->read_byte(addr) << 8) | (m_prgspace->read_byte(addr+1) & 0xff);
+ uint16_t value = (m_prgspace->read_byte(addr) << 8) | (m_prgspace->read_byte(addr+1) & 0xff);
m_icount = temp;
return value;
}
-void tms9980a_device::write_workspace_register_debug(int reg, UINT16 data)
+void tms9980a_device::write_workspace_register_debug(int reg, uint16_t data)
{
int temp = m_icount;
int addr = (WP+(reg<<1)) & 0xfffe & m_prgaddr_mask;
@@ -175,7 +175,7 @@ void tms9980a_device::execute_set_input(int irqline, int state)
*/
void tms9980a_device::mem_read()
{
- UINT8 value;
+ uint8_t value;
switch (m_mem_phase)
{
case 1:
@@ -260,18 +260,18 @@ void tms9980a_device::acquire_instruction()
/**************************************************************************/
-UINT32 tms9980a_device::execute_min_cycles() const
+uint32_t tms9980a_device::execute_min_cycles() const
{
return 2;
}
// TODO: Compute this value, just a wild guess for the average
-UINT32 tms9980a_device::execute_max_cycles() const
+uint32_t tms9980a_device::execute_max_cycles() const
{
return 10;
}
-UINT32 tms9980a_device::execute_input_lines() const
+uint32_t tms9980a_device::execute_input_lines() const
{
return 8;
}
@@ -281,17 +281,17 @@ UINT32 tms9980a_device::execute_input_lines() const
// execute_burn = nop
// device_disasm_interface overrides
-UINT32 tms9980a_device::disasm_min_opcode_bytes() const
+uint32_t tms9980a_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 tms9980a_device::disasm_max_opcode_bytes() const
+uint32_t tms9980a_device::disasm_max_opcode_bytes() const
{
return 6;
}
-offs_t tms9980a_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms9980a_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9980 );
return CPU_DISASSEMBLE_NAME(tms9980)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/tms9980a.h b/src/devices/cpu/tms9900/tms9980a.h
index d32c79dc9ca..3f295b73749 100644
--- a/src/devices/cpu/tms9900/tms9980a.h
+++ b/src/devices/cpu/tms9900/tms9980a.h
@@ -26,7 +26,7 @@ enum
class tms9980a_device : public tms99xx_device
{
public:
- tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
void mem_read(void) override;
@@ -35,17 +35,17 @@ protected:
void resolve_lines() override;
- UINT16 read_workspace_register_debug(int reg) override;
- void write_workspace_register_debug(int reg, UINT16 data) override;
+ uint16_t read_workspace_register_debug(int reg) override;
+ void write_workspace_register_debug(int reg, uint16_t data) override;
- UINT32 execute_min_cycles() const override;
- UINT32 execute_max_cycles() const override;
- UINT32 execute_input_lines() const override;
+ uint32_t execute_min_cycles() const override;
+ uint32_t execute_max_cycles() const override;
+ uint32_t execute_input_lines() const override;
void execute_set_input(int irqline, int state) override;
- UINT32 disasm_min_opcode_bytes() const override;
- UINT32 disasm_max_opcode_bytes() const override;
- offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ uint32_t disasm_min_opcode_bytes() const override;
+ uint32_t disasm_max_opcode_bytes() const override;
+ offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
address_space_config m_program_config80;
address_space_config m_io_config80;
};
diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp
index d8ffcda2337..b161ec05ce3 100644
--- a/src/devices/cpu/tms9900/tms9995.cpp
+++ b/src/devices/cpu/tms9900/tms9995.cpp
@@ -177,7 +177,7 @@ enum
Constructor
****************************************************************************/
-tms9995_device::tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+tms9995_device::tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, TMS9995, "TMS9995", tag, owner, clock, "tms9995", __FILE__),
m_state_any(0),
PC(0),
@@ -199,7 +199,7 @@ tms9995_device::tms9995_device(const machine_config &mconfig, const char *tag, d
/*
Called from subclass.
*/
-tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+tms9995_device::tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source)
: cpu_device(mconfig, TMS9995, name, tag, owner, clock, shortname, source),
m_state_any(0),
PC(0),
@@ -385,21 +385,21 @@ void tms9995_device::state_import(const device_state_entry &entry)
// bits of the STATUS register
break;
case TMS9995_PC:
- PC = (UINT16)m_state_any & 0xfffe;
+ PC = (uint16_t)m_state_any & 0xfffe;
break;
case TMS9995_WP:
- WP = (UINT16)m_state_any & 0xfffe;
+ WP = (uint16_t)m_state_any & 0xfffe;
break;
case TMS9995_STATUS:
- ST = (UINT16)m_state_any;
+ ST = (uint16_t)m_state_any;
break;
case TMS9995_IR:
- IR = (UINT16)m_state_any;
+ IR = (uint16_t)m_state_any;
break;
default:
// Workspace registers
if (index <= TMS9995_R15)
- write_workspace_register_debug(index-TMS9995_R0, (UINT16)m_state_any);
+ write_workspace_register_debug(index-TMS9995_R0, (uint16_t)m_state_any);
break;
}
}
@@ -443,7 +443,7 @@ void tms9995_device::state_string_export(const device_state_entry &entry, std::s
static const char *statestr = "LAECOPX-----IIII";
char flags[17];
memset(flags, 0x00, ARRAY_LENGTH(flags));
- UINT16 val = 0x8000;
+ uint16_t val = 0x8000;
if (entry.index()==STATE_GENFLAGS)
{
for (int i=0; i < 16; i++)
@@ -459,10 +459,10 @@ void tms9995_device::state_string_export(const device_state_entry &entry, std::s
Provide access to the workspace registers via the debugger. We have to
take care whether this is in onchip RAM or outside.
*/
-UINT16 tms9995_device::read_workspace_register_debug(int reg)
+uint16_t tms9995_device::read_workspace_register_debug(int reg)
{
int temp = m_icount;
- UINT16 value;
+ uint16_t value;
int addrb = (WP + (reg << 1)) & 0xfffe;
@@ -481,7 +481,7 @@ UINT16 tms9995_device::read_workspace_register_debug(int reg)
return value;
}
-void tms9995_device::write_workspace_register_debug(int reg, UINT16 data)
+void tms9995_device::write_workspace_register_debug(int reg, uint16_t data)
{
int temp = m_icount;
int addrb = (WP + (reg << 1)) & 0xfffe;
@@ -527,7 +527,7 @@ const address_space_config *tms9995_device::memory_space_config(address_spacenum
/*
Define the indices for the micro-operation table. This is done for the sake
- of a simpler microprogram definition as an UINT8[].
+ of a simpler microprogram definition as an uint8_t[].
*/
enum
{
@@ -580,7 +580,7 @@ enum
};
#define MICROPROGRAM(_MP) \
- static const UINT8 _MP[] =
+ static const uint8_t _MP[] =
/*
Cycles:
@@ -1201,7 +1201,7 @@ void tms9995_device::build_command_lookup_table()
int cmdindex;
int bitcount;
const tms_instruction *inst;
- UINT16 opcode;
+ uint16_t opcode;
m_command_lookup_table = std::make_unique<lookup_entry[]>(16);
@@ -1305,7 +1305,7 @@ void tms9995_device::execute_run()
m_check_ready = false;
if (TRACE_MICRO) logerror("main loop, operation %s, MPC = %d\n", opname[m_command], MPC);
- UINT8* program = (UINT8*)s_command[m_index].prog;
+ uint8_t* program = (uint8_t*)s_command[m_index].prog;
(this->*s_microoperation[program[MPC]])();
// For multi-pass operations where the MPC should not advance
@@ -1469,11 +1469,11 @@ void tms9995_device::set_hold_state(bool state)
Decode the instruction. This is done in parallel to other operations
so we just do it together with the prefetch.
*/
-void tms9995_device::decode(UINT16 inst)
+void tms9995_device::decode(uint16_t inst)
{
int ix = 0;
lookup_entry* table = m_command_lookup_table.get();
- UINT16 opcode = inst;
+ uint16_t opcode = inst;
bool complete = false;
m_mid_active = false;
@@ -1860,8 +1860,8 @@ void tms9995_device::mem_read()
{
// This is an off-chip access
m_check_ready = true;
- UINT8 value;
- UINT16 address = m_address;
+ uint8_t value;
+ uint16_t address = m_address;
switch (m_mem_phase)
{
@@ -1994,7 +1994,7 @@ void tms9995_device::mem_write()
{
// This is an off-chip access
m_check_ready = true;
- UINT16 address = m_address;
+ uint16_t address = m_address;
switch (m_mem_phase)
{
case 1:
@@ -2174,8 +2174,8 @@ void tms9995_device::cru_output_operation()
void tms9995_device::cru_input_operation()
{
- UINT16 crubit;
- UINT8 crubyte;
+ uint16_t crubit;
+ uint8_t crubyte;
// Reading is different, since MESS uses 8 bit transfers
// We read 8 bits in one go, then iterate another min(n-1,7) times to allow
@@ -2295,7 +2295,7 @@ void tms9995_device::trigger_decrementer()
*/
void tms9995_device::operand_address_subprogram()
{
- UINT16 ircopy = IR;
+ uint16_t ircopy = IR;
if (m_get_destination) ircopy = ircopy >> 6;
// Save the return program and position
@@ -2380,7 +2380,7 @@ inline void tms9995_device::set_status_bit(int bit, bool state)
m_int_overflow = (m_check_overflow && bit == ST_OV && ((ST & ST_OE)!=0) && state == true);
}
-void tms9995_device::set_status_parity(UINT8 value)
+void tms9995_device::set_status_parity(uint8_t value)
{
int count = 0;
for (int i=0; i < 8; i++)
@@ -2391,11 +2391,11 @@ void tms9995_device::set_status_parity(UINT8 value)
set_status_bit(ST_OP, (count & 1)!=0);
}
-inline void tms9995_device::compare_and_set_lae(UINT16 value1, UINT16 value2)
+inline void tms9995_device::compare_and_set_lae(uint16_t value1, uint16_t value2)
{
set_status_bit(ST_EQ, value1 == value2);
set_status_bit(ST_LH, value1 > value2);
- set_status_bit(ST_AGT, (INT16)value1 > (INT16)value2);
+ set_status_bit(ST_AGT, (int16_t)value1 > (int16_t)value2);
}
/**************************************************************************
@@ -2423,7 +2423,7 @@ void tms9995_device::alu_add_s_sxc()
// The destination address is still in m_address
// Prefetch will not change m_current_value and m_address
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
switch (m_command)
{
@@ -2464,12 +2464,12 @@ void tms9995_device::alu_add_s_sxc()
break;
}
- m_current_value = (UINT16)(dest_new & 0xffff);
+ m_current_value = (uint16_t)(dest_new & 0xffff);
- compare_and_set_lae((UINT16)(dest_new & 0xffff),0);
+ compare_and_set_lae((uint16_t)(dest_new & 0xffff),0);
if (m_byteop)
{
- set_status_parity((UINT8)(dest_new>>8));
+ set_status_parity((uint8_t)(dest_new>>8));
}
if (TRACE_STATUS) logerror("ST = %04x (val=%04x)\n", ST, m_current_value);
// No clock pulse (will be done by prefetch)
@@ -2536,7 +2536,7 @@ void tms9995_device::alu_c()
// Prefetch will not change m_current_value and m_address
if (m_byteop)
{
- set_status_parity((UINT8)(m_source_value>>8));
+ set_status_parity((uint8_t)(m_source_value>>8));
}
compare_and_set_lae(m_source_value, m_current_value);
if (TRACE_STATUS) logerror("ST = %04x (val1=%04x, val2=%04x)\n", ST, m_source_value, m_current_value);
@@ -2574,10 +2574,10 @@ void tms9995_device::alu_clr_seto()
void tms9995_device::alu_divide()
{
int n=1;
- UINT32 uval32;
+ uint32_t uval32;
bool overflow = true;
- UINT16 value1;
+ uint16_t value1;
switch (m_inst_state)
{
@@ -2645,9 +2645,9 @@ void tms9995_device::alu_divide_signed()
{
int n=1;
bool overflow;
- UINT16 w1, w2, dwait;
- INT16 divisor;
- INT32 dividend;
+ uint16_t w1, w2, dwait;
+ int16_t divisor;
+ int32_t dividend;
switch (m_inst_state)
{
@@ -2710,8 +2710,8 @@ void tms9995_device::alu_divide_signed()
// We are here because there was no overflow
dividend = m_value_copy << 16 | m_current_value;
// Do the calculation
- m_current_value = (UINT16)(dividend / (INT16)m_source_value);
- m_value_copy = (UINT16)(dividend % (INT16)m_source_value);
+ m_current_value = (uint16_t)(dividend / (int16_t)m_source_value);
+ m_value_copy = (uint16_t)(dividend % (int16_t)m_source_value);
m_address = WP;
// As we have not implemented the real division algorithm we must
@@ -2824,7 +2824,7 @@ void tms9995_device::alu_f3()
*/
void tms9995_device::alu_imm_arithm()
{
- UINT32 dest_new = 0;
+ uint32_t dest_new = 0;
// We have the register value in m_source_value, the register address in m_address_saved
// and the immediate value in m_current_value
@@ -2846,7 +2846,7 @@ void tms9995_device::alu_imm_arithm()
break;
}
- m_current_value = (UINT16)(dest_new & 0xffff);
+ m_current_value = (uint16_t)(dest_new & 0xffff);
compare_and_set_lae(m_current_value, 0);
m_address = m_address_saved;
if (TRACE_STATUS) logerror("ST = %04x (val=%04x)\n", ST, m_current_value);
@@ -2858,7 +2858,7 @@ void tms9995_device::alu_imm_arithm()
void tms9995_device::alu_jump()
{
bool cond = false;
- INT8 displacement = (IR & 0xff);
+ int8_t displacement = (IR & 0xff);
switch (m_command)
{
@@ -2936,7 +2936,7 @@ void tms9995_device::alu_ldcr()
if (m_byteop)
{
m_current_value = (m_current_value>>8) & 0xff;
- set_status_parity((UINT8)m_current_value);
+ set_status_parity((uint8_t)m_current_value);
}
m_cru_value = m_current_value;
m_address = WP + 24;
@@ -3010,7 +3010,7 @@ void tms9995_device::alu_mov()
m_current_value = m_source_value;
if (m_byteop)
{
- set_status_parity((UINT8)(m_current_value>>8));
+ set_status_parity((uint8_t)(m_current_value>>8));
}
compare_and_set_lae(m_current_value, 0);
if (TRACE_STATUS) logerror("ST = %04x (val=%04x)\n", ST, m_current_value);
@@ -3023,8 +3023,8 @@ void tms9995_device::alu_mov()
void tms9995_device::alu_multiply()
{
int n = 0;
- UINT32 result;
- INT32 results;
+ uint32_t result;
+ int32_t results;
if (m_command==MPY)
{
@@ -3067,7 +3067,7 @@ void tms9995_device::alu_multiply()
break;
case 1:
// m_current_value <- register content
- results = ((INT16)m_source_value) * ((INT16)m_current_value);
+ results = ((int16_t)m_source_value) * ((int16_t)m_current_value);
m_current_value = (results >> 16) & 0xffff;
m_value_copy = results & 0xffff;
// m_address is still the register
@@ -3114,7 +3114,7 @@ void tms9995_device::alu_rtwp()
void tms9995_device::alu_sbo_sbz()
{
- INT8 displacement;
+ int8_t displacement;
if (m_inst_state==0)
{
@@ -3123,7 +3123,7 @@ void tms9995_device::alu_sbo_sbz()
else
{
m_cru_value = (m_command==SBO)? 1 : 0;
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_count = 1;
}
@@ -3138,8 +3138,8 @@ void tms9995_device::alu_shift()
{
bool carry = false;
bool overflow = false;
- UINT16 sign = 0;
- UINT32 value;
+ uint16_t sign = 0;
+ uint32_t value;
int count;
switch (m_inst_state)
@@ -3215,9 +3215,9 @@ void tms9995_device::alu_shift()
*/
void tms9995_device::alu_single_arithm()
{
- UINT32 dest_new = 0;
- UINT32 src_val = m_current_value & 0x0000ffff;
- UINT16 sign = 0;
+ uint32_t dest_new = 0;
+ uint32_t src_val = m_current_value & 0x0000ffff;
+ uint16_t sign = 0;
bool check_ov = true;
switch (m_command)
@@ -3334,7 +3334,7 @@ void tms9995_device::alu_stcr()
n = 13;
if (m_byteop)
{
- set_status_parity((UINT8)m_current_value);
+ set_status_parity((uint8_t)m_current_value);
m_current_value <<= 8;
}
else n += 8;
@@ -3361,7 +3361,7 @@ void tms9995_device::alu_stst_stwp()
*/
void tms9995_device::alu_tb()
{
- INT8 displacement;
+ int8_t displacement;
switch (m_inst_state)
{
@@ -3370,7 +3370,7 @@ void tms9995_device::alu_tb()
pulse_clock(1);
break;
case 1:
- displacement = (INT8)(IR & 0xff);
+ displacement = (int8_t)(IR & 0xff);
m_cru_address = m_current_value + (displacement<<1);
m_cru_first_read = true;
m_count = 1;
@@ -3523,32 +3523,32 @@ void tms9995_device::alu_int()
}
/**************************************************************************/
-UINT32 tms9995_device::execute_min_cycles() const
+uint32_t tms9995_device::execute_min_cycles() const
{
return 2;
}
-UINT32 tms9995_device::execute_max_cycles() const
+uint32_t tms9995_device::execute_max_cycles() const
{
return 44;
}
-UINT32 tms9995_device::execute_input_lines() const
+uint32_t tms9995_device::execute_input_lines() const
{
return 2;
}
-UINT32 tms9995_device::disasm_min_opcode_bytes() const
+uint32_t tms9995_device::disasm_min_opcode_bytes() const
{
return 2;
}
-UINT32 tms9995_device::disasm_max_opcode_bytes() const
+uint32_t tms9995_device::disasm_max_opcode_bytes() const
{
return 6;
}
-offs_t tms9995_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+offs_t tms9995_device::disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options)
{
extern CPU_DISASSEMBLE( tms9995 );
return CPU_DISASSEMBLE_NAME(tms9995)(this, buffer, pc, oprom, opram, options);
diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h
index 1231de40196..f1867d5b0b1 100644
--- a/src/devices/cpu/tms9900/tms9995.h
+++ b/src/devices/cpu/tms9900/tms9995.h
@@ -48,8 +48,8 @@ enum
class tms9995_device : public cpu_device
{
public:
- tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
// READY input line. When asserted (high), the memory is ready for data exchange.
// We chose to use a direct method instead of a delegate to keep performance
@@ -73,7 +73,7 @@ public:
template<class _Object> static devcb_base &static_set_dbin_callback(device_t &device, _Object object) { return downcast<tms9995_device &>(device).m_dbin_line.set_callback(object); }
// For debugger access
- UINT8 debug_read_onchip_memory(offs_t addr) { return m_onchip_memory[addr & 0xff]; };
+ uint8_t debug_read_onchip_memory(offs_t addr) { return m_onchip_memory[addr & 0xff]; };
bool is_onchip(offs_t addrb) { return (((addrb & 0xff00)==0xf000 && (addrb < 0xf0fc)) || ((addrb & 0xfffc)==0xfffc)) && !m_mp9537; }
void set_overflow_interrupt( int enable ) { m_check_overflow = (enable!=0); }
@@ -85,46 +85,46 @@ protected:
virtual void device_reset() override;
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const override;
- virtual UINT32 execute_max_cycles() const override;
- virtual UINT32 execute_input_lines() const override;
+ virtual uint32_t execute_min_cycles() const override;
+ virtual uint32_t execute_max_cycles() const override;
+ virtual uint32_t execute_input_lines() const override;
virtual void execute_set_input(int irqline, int state) override;
virtual void execute_run() override;
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const override;
- virtual UINT32 disasm_max_opcode_bytes() const override;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
+ virtual uint32_t disasm_min_opcode_bytes() const override;
+ virtual uint32_t disasm_max_opcode_bytes() const override;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const uint8_t *oprom, const uint8_t *opram, uint32_t options) override;
const address_space_config* memory_space_config(address_spacenum spacenum) const override;
- UINT64 execute_clocks_to_cycles(UINT64 clocks) const override { return clocks / 4.0; }
- UINT64 execute_cycles_to_clocks(UINT64 cycles) const override { return cycles * 4.0; }
+ uint64_t execute_clocks_to_cycles(uint64_t clocks) const override { return clocks / 4.0; }
+ uint64_t execute_cycles_to_clocks(uint64_t cycles) const override { return cycles * 4.0; }
// Variant of the TMS9995 without internal RAM and decrementer
bool m_mp9537;
private:
// State / debug management
- UINT16 m_state_any;
+ uint16_t m_state_any;
static const char* s_statename[];
void state_import(const device_state_entry &entry) override;
void state_export(const device_state_entry &entry) override;
void state_string_export(const device_state_entry &entry, std::string &str) const override;
- UINT16 read_workspace_register_debug(int reg);
- void write_workspace_register_debug(int reg, UINT16 data);
+ uint16_t read_workspace_register_debug(int reg);
+ void write_workspace_register_debug(int reg, uint16_t data);
// TMS9995 hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ uint16_t WP; // Workspace pointer
+ uint16_t PC; // Program counter
+ uint16_t ST; // Status register
// The TMS9995 has a prefetch feature which causes a wrong display of the PC.
// We use this additional member for the debugger only.
- UINT16 PC_debug;
+ uint16_t PC_debug;
// 256 bytes of onchip memory
- UINT8 m_onchip_memory[256];
+ uint8_t m_onchip_memory[256];
const address_space_config m_program_config;
const address_space_config m_io_config;
@@ -213,7 +213,7 @@ private:
// Decode the given 16-bit value which has been retrieved by a prefetch or
// during an X operation.
- void decode(UINT16 inst);
+ void decode(uint16_t inst);
// Store the interrupt mask part of the ST. This is used when processing
// an interrupt, passing the new mask from the service_interrupt part to
@@ -221,26 +221,26 @@ private:
int m_intmask;
// Stored address
- UINT16 m_address;
+ uint16_t m_address;
// Stores the recently read word or the word to be written
- UINT16 m_current_value;
+ uint16_t m_current_value;
// Stores the value of the source operand in multi-operand instructions
- UINT16 m_source_value;
+ uint16_t m_source_value;
// During indexed addressing, this value is added to get the final address value.
- UINT16 m_address_add;
+ uint16_t m_address_add;
// During indirect/auto-increment addressing, this copy of the address must
// be preserved while writing the new value to the register.
- UINT16 m_address_saved;
+ uint16_t m_address_saved;
// Another copy of the address
- UINT16 m_address_copy;
+ uint16_t m_address_copy;
// Copy of the value
- UINT16 m_value_copy;
+ uint16_t m_value_copy;
// Stores the recent register number. Only used to pass the register
// number during the operand address derivation.
@@ -253,18 +253,18 @@ private:
void trigger_decrementer();
// Start value
- UINT16 m_starting_count_storage_register;
+ uint16_t m_starting_count_storage_register;
// Current decrementer value.
- UINT16 m_decrementer_value;
+ uint16_t m_decrementer_value;
// ============== CRU support ======================
- UINT16 m_cru_address;
- UINT16 m_cru_value;
+ uint16_t m_cru_address;
+ uint16_t m_cru_value;
bool m_cru_first_read;
int m_cru_bits_left;
- UINT32 m_cru_read;
+ uint32_t m_cru_read;
// CPU-internal CRU flags
bool m_flag[16];
@@ -275,13 +275,13 @@ private:
// the decoded commands. When the next instruction shall be started,
// the contents from the pre* members are copied to the main members.
- UINT16 IR;
- UINT16 m_command;
+ uint16_t IR;
+ uint16_t m_command;
int m_index;
bool m_byteop;
- UINT16 m_pre_IR;
- UINT16 m_pre_command;
+ uint16_t m_pre_IR;
+ uint16_t m_pre_command;
int m_pre_index;
bool m_pre_byteop;
@@ -294,7 +294,7 @@ private:
void build_command_lookup_table();
// Sequence of micro-operations
- typedef const UINT8* microprogram;
+ typedef const uint8_t* microprogram;
// Method pointer
typedef void (tms9995_device::*ophandler)(void);
@@ -302,7 +302,7 @@ private:
// Opcode list entry
struct tms_instruction
{
- UINT16 opcode;
+ uint16_t opcode;
int id;
int format;
microprogram prog; // Microprogram
@@ -344,8 +344,8 @@ private:
// Status register update
inline void set_status_bit(int bit, bool state);
- inline void compare_and_set_lae(UINT16 value1, UINT16 value2);
- void set_status_parity(UINT8 value);
+ inline void compare_and_set_lae(uint16_t value1, uint16_t value2);
+ void set_status_parity(uint8_t value);
// Micro-operation declarations
void int_prefetch_and_decode();
@@ -438,7 +438,7 @@ private:
class tms9995_mp9537_device : public tms9995_device
{
public:
- tms9995_mp9537_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ tms9995_mp9537_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms9995_device(mconfig, TMS9995_MP9537, "TMS9995-MP9537", tag, owner, clock, "tms9995_mp9537", __FILE__)
{
m_mp9537 = true;