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author | 2022-08-02 14:34:02 +0200 | |
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committer | 2022-08-02 14:34:29 +0200 | |
commit | 00d5699d73f21840da631b4715bc4c4aa5a20fa4 (patch) | |
tree | 0f05c980e8f895b64862541e7fdeb4b789d53443 /src/devices/cpu/tms1000/tms1100.cpp | |
parent | 9d0076ab91bfc3fd2514b9f0d612b4049b5bbaf7 (diff) |
New machines marked as NOT_WORKING
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The Dracula (Tsukuda) [hap, Sean Riddle, Parotaku]
Diffstat (limited to 'src/devices/cpu/tms1000/tms1100.cpp')
-rw-r--r-- | src/devices/cpu/tms1000/tms1100.cpp | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/devices/cpu/tms1000/tms1100.cpp b/src/devices/cpu/tms1000/tms1100.cpp index 47a4b3c2177..710f0d52e88 100644 --- a/src/devices/cpu/tms1000/tms1100.cpp +++ b/src/devices/cpu/tms1000/tms1100.cpp @@ -78,14 +78,17 @@ void tms1100_cpu_device::device_reset() // opcode deviations void tms1100_cpu_device::op_setr() { - // SETR: supports 5-bit index with X register MSB - m_r = m_r | (1 << (BIT(m_x, m_x_bits - 1) << 4 | m_y)); + // SETR: supports 5-bit index with X MSB (used when it has more than 16 R pins) + // TMS1100 manual simply says that X must be less than 4 + u8 index = BIT(m_x, m_x_bits - 1) << 4 | m_y; + m_r = m_r | (1 << index); m_write_r(m_r & m_r_mask); } void tms1100_cpu_device::op_rstr() { - // RSTR: supports 5-bit index with X register MSB - m_r = m_r & ~(1 << (BIT(m_x, m_x_bits - 1) << 4 | m_y)); + // RSTR: see SETR + u8 index = BIT(m_x, m_x_bits - 1) << 4 | m_y; + m_r = m_r & ~(1 << index); m_write_r(m_r & m_r_mask); } |