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author Angelo Salese <angelosa@users.noreply.github.com>2022-01-17 23:30:04 +0100
committer GitHub <noreply@github.com>2022-01-17 23:30:04 +0100
commit5342d0e7f5d6d804cfed3be1290a8327b68a2e96 (patch)
tree629663d7648f02a9a717570dd7dd100a4c4f8e8e /src/devices/cpu/sh
parent7439e33919d7e19167b98f4989a62ed749f515d0 (diff)
Fix several issues in DC-based HW (#9150)
- Streamlined logging across chips to use logmacro.h, removed popmessages and printfs in production code; - Add missing include guards in header files; - split Atomiswave into own file from naomi.cpp (dc_atomiswave.cpp); - powervr2.cpp: YUV pitch follows U size, fixes #8999 - powervr2.cpp: move Elan related stuff back into naomi2_state; - naomi.cpp: support for player 2 keyboard inputs; - naomi.cpp: add proper inputs to alpilot/alpilotj and sstrkfgt; - naomi.cpp: hookup lightgun for deathcox; - naomi.cpp: make G2-DMA timings slightly more accurate (fixes sfz3ugd silent BGMs regression caused by implicit insta-DMAs) - dc_g2if.cpp: wrote a device for G2 DMA interface, fixes #9000 ; - dc_g2if.cpp: add E1/E2/DD channels thru template, add area protection, add illegal address and overflow exceptions (fixes loopchk g2 bus tests 0302 and 0303) - aica.cpp: $2814 CA reads doesn't need shifting, fixes ADX repeating sample/hang bugs in many entries [Angelo Salese, MetalliC]; - powervr2.cpp: make ISP/TSP irq to be slower, fixes regression bug with Capcom fighters having frame hiccups [David Haywood, Angelo Salese] - dc_atomiswave.cpp: converted aw_modem_r/_w to 32-bit, added 3p/4p inputs to ggisuka, expose EXID to an input/output ioports for future extensions; - dc_atomiswave.cpp: extend xtrmhnt2 ALL.Net hack for -drc, move around state machine to derive ALL.Net external device mapping instead of driver_init fn, demote to MUP for obvious reasons; - dc_atomiswave: add Area 1 mirrors, fix maxspeed title screen animation; - [MT#8143](https://mametesters.org/view.php?id=8143) is fixed New NOT_WORKING software list additions --------------------------------------- dc.xml: DC Checker for Repair v2.05R (World), Loop Checker v1.00 (World), GD Drive Repair Program v0.1 (World) [Hidden Palace]
Diffstat (limited to 'src/devices/cpu/sh')
-rw-r--r--src/devices/cpu/sh/sh4.cpp6
-rw-r--r--src/devices/cpu/sh/sh4.h5
-rw-r--r--src/devices/cpu/sh/sh4comn.cpp52
3 files changed, 29 insertions, 34 deletions
diff --git a/src/devices/cpu/sh/sh4.cpp b/src/devices/cpu/sh/sh4.cpp
index acfd0dbfc8a..dbe1473a71d 100644
--- a/src/devices/cpu/sh/sh4.cpp
+++ b/src/devices/cpu/sh/sh4.cpp
@@ -788,8 +788,8 @@ inline void sh34_base_device::PREFM(const uint16_t opcode)
if (m_sh4_mmu_enabled)
{
addr = addr & 0xFFFFFFE0;
- dest = sh4_getsqremap(addr); // good enough for naomi-gd rom, probably not much else
-
+ // good enough for NAOMI GD-ROM, not much else
+ dest = sh4_getsqremap(addr);
}
else
{
@@ -1615,7 +1615,7 @@ void sh34_base_device::device_reset()
m_irln = 15;
m_sh2_state->sleep_mode = 0;
- m_sh4_mmu_enabled = 0;
+ m_sh4_mmu_enabled = false;
m_cache_dirty = true;
}
diff --git a/src/devices/cpu/sh/sh4.h b/src/devices/cpu/sh/sh4.h
index 87fe2e84f70..b2c97c9dc16 100644
--- a/src/devices/cpu/sh/sh4.h
+++ b/src/devices/cpu/sh/sh4.h
@@ -288,7 +288,7 @@ protected:
int m_md[9];
int m_clock;
- // hack 1 = Naomi hack, hack 2 = Work in Progress implementation
+ // hack 1 = Naomi hack, hack 2 = WIP implementation
int m_mmuhack;
uint32_t m_exception_priority[128];
@@ -377,8 +377,7 @@ protected:
//void (*m_ftcsr_read_callback)(uint32_t data);
- /* This MMU simulation is good for the simple remap used on Naomi GD-ROM SQ access *ONLY* */
- uint8_t m_sh4_mmu_enabled;
+ bool m_sh4_mmu_enabled;
// sh3 internal
uint32_t m_sh3internal_upper[0x3000/4];
diff --git a/src/devices/cpu/sh/sh4comn.cpp b/src/devices/cpu/sh/sh4comn.cpp
index 9c1d3bd3380..cd6e5db94ab 100644
--- a/src/devices/cpu/sh/sh4comn.cpp
+++ b/src/devices/cpu/sh/sh4comn.cpp
@@ -731,44 +731,46 @@ void sh4_base_device::sh4_internal_w(offs_t offset, uint32_t data, uint32_t mem_
logerror("TEA set to %08x\n", data);
break;
-
+ /*
+ LLLL LL-- BBBB BB-- CCCC CCQV ---- -T-A
+
+ L = LRUI = Least recently used ITLB
+ B = URB = UTLB replace boundary
+ C = URC = UTLB replace counter
+ Q = SQMD = Store Queue Mode Bit
+ V = SV = Single Virtual Mode Bit
+ T = TI = TLB invalidate
+ A = AT = Address translation bit (enable)
+ */
case MMUCR: // MMU Control
- logerror("%s: MMUCR %08x\n", machine().describe_context(), data);
m_m[MMUCR] &= 0xffffffff;
- /*
- LLLL LL-- BBBB BB-- CCCC CCQV ---- -T-A
-
- L = LRUI = Least recently used ITLB
- B = URB = UTLB replace boundary
- C = URC = UTLB replace counter
- Q = SQMD = Store Queue Mode Bit
- V = SV = Single Virtual Mode Bit
- T = TI = TLB invaldiate
- A = AT = Address translation bit (enable)
- */
-
+ // MMUCR_AT
+ m_sh4_mmu_enabled = bool(BIT(data, 0));
+ logerror("%s: MMUCR %08x (enable: %d)\n", machine().describe_context(), data, m_sh4_mmu_enabled);
-
- if (data & MMUCR_AT)
+ if (m_sh4_mmu_enabled)
{
- m_sh4_mmu_enabled = 1;
-
-
+ // Newer versions of the Dreamcast Katana SDK use MMU to remap the SQ write-back space (cfr. ikaruga and several later NAOMI GD-ROM releases)
+ // Anything beyond that is bound to fail,
+ // i.e. DC WinCE games, DC Linux distros, v2 Sega checkers, aristmk6.cpp
+#if 0
if (m_mmuhack == 1)
{
printf("SH4 MMU Enabled\n");
printf("If you're seeing this, but running something other than a Naomi GD-ROM game then chances are it won't work\n");
printf("The MMU emulation is a hack specific to that system\n");
}
-
+#endif
if (m_mmuhack == 2)
{
- for (int i = 0;i < 64;i++)
+ for (int i = 0; i < 64; i++)
{
if (m_utlb[i].V)
{
- printf("(entry %02x | ASID: %02x VPN: %08x V: %02x PPN: %08x SZ: %02x SH: %02x C: %02x PPR: %02x D: %02x WT %02x: SA: %02x TC: %02x)\n",
+ // FIXME: potentially verbose, move to logmacro.h pattern
+ // cfr. MMU Check_4 in v2.xx DC CHECKER
+ logerror("(entry %02x | ASID: %02x VPN: %08x V: %02x PPN: %08x SZ: %02x SH: %02x C: %02x PPR: %02x D: %02x WT %02x: SA: %02x TC: %02x)\n",
i,
m_utlb[i].ASID,
m_utlb[i].VPN << 10,
@@ -785,12 +787,6 @@ void sh4_base_device::sh4_internal_w(offs_t offset, uint32_t data, uint32_t mem_
}
}
}
-
-
- }
- else
- {
- m_sh4_mmu_enabled = 0;
}
break;