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author AJR <ajrhacker@users.noreply.github.com>2020-01-09 09:11:47 -0500
committer AJR <ajrhacker@users.noreply.github.com>2020-01-09 09:12:29 -0500
commit962a05c2a1ab52c26c63eea9dd60042d8d41d7cb (patch)
treed5dab1631f674b432dd488269f22f21072676610 /src/devices/cpu/rx01
parentc55bc974bead4e128a9ed44f0d6f6f1ee75cb5c1 (diff)
rx01_cpu: Add the other flags, with a somewhat awkward display (nw)
Diffstat (limited to 'src/devices/cpu/rx01')
-rw-r--r--src/devices/cpu/rx01/rx01.cpp131
-rw-r--r--src/devices/cpu/rx01/rx01.h20
-rw-r--r--src/devices/cpu/rx01/rx01dasm.cpp2
3 files changed, 141 insertions, 12 deletions
diff --git a/src/devices/cpu/rx01/rx01.cpp b/src/devices/cpu/rx01/rx01.cpp
index 2b3e6f01096..2447e241162 100644
--- a/src/devices/cpu/rx01/rx01.cpp
+++ b/src/devices/cpu/rx01/rx01.cpp
@@ -51,7 +51,9 @@ rx01_cpu_device::rx01_cpu_device(const machine_config &mconfig, const char *tag,
, m_spar(0)
, m_bar(0)
, m_crc(0)
- , m_flag(false)
+ , m_flags(0)
+ , m_unit(false)
+ , m_load_head(false)
, m_icount(0)
{
m_inst_config.m_is_octal = true;
@@ -87,6 +89,7 @@ void rx01_cpu_device::device_start()
state_add(RX01_PC, "PC", m_pc).mask(07777).formatstr("%04O");
state_add(STATE_GENPC, "GENPC", m_pc).mask(07777).formatstr("%04O").noshow();
state_add(STATE_GENPCBASE, "CURPC", m_pc).mask(07777).formatstr("%04O").noshow();
+ state_add(STATE_GENFLAGS, "FLAGS", m_flags).formatstr("%12s").noshow();
state_add(RX01_CNTR, "CNTR", m_cntr).formatstr("%03O");
state_add(RX01_SR, "SR", m_sr).formatstr("%03O");
state_add(RX01_SPAR, "SPAR", m_spar).mask(15).formatstr("%3s");
@@ -95,6 +98,8 @@ void rx01_cpu_device::device_start()
state_add(RX01_R0 + r, string_format("R%d", r).c_str(), sp[r]).formatstr("%03O");
state_add(RX01_BAR, "BAR", m_bar).mask(07777).formatstr("%04O");
state_add(RX01_CRC, "CRC", m_crc).formatstr("%06O");
+ state_add(RX01_UNIT, "UNIT", m_unit);
+ state_add(RX01_LDHD, "LDHD", m_load_head);
// Save state registration
save_item(NAME(m_pc));
@@ -108,7 +113,9 @@ void rx01_cpu_device::device_start()
save_item(NAME(m_spar));
save_item(NAME(m_bar));
save_item(NAME(m_crc));
- save_item(NAME(m_flag));
+ save_item(NAME(m_flags));
+ save_item(NAME(m_unit));
+ save_item(NAME(m_load_head));
}
void rx01_cpu_device::device_reset()
@@ -122,7 +129,9 @@ void rx01_cpu_device::device_reset()
m_cntr = 0;
m_sr = 0;
m_spar = 0;
- m_flag = false;
+ m_flags = 0;
+ m_unit = false;
+ m_load_head = false;
}
u8 rx01_cpu_device::mux_out()
@@ -143,23 +152,37 @@ bool rx01_cpu_device::test_condition()
{
switch (m_mb & 074)
{
+ case 000:
+ // Interface transfer request or command pending (TODO)
+ return false;
+
+ case 004:
+ // Output buffer bit 3
+ return (m_flags & FF_IOB3) != 0;
+
case 020:
+ // MSB of shift register
return BIT(m_sr, 7);
case 024:
+ // Counter overflow
return m_cntr == 0377;
case 030:
+ // 16th stage of CRC generator
return BIT(m_crc, 0);
case 054:
+ // Separated data equals MSB of shift register
return BIT(m_sr, 7) == sep_data();
case 060:
+ // Sector buffer address overflow
return m_bar == 07777;
case 074:
- return m_flag;
+ // Flag state equals one
+ return (m_flags & FF_FLAG) != 0;
default:
LOG("%04o: Unhandled branch condition %d\n", m_ppc, (m_mb & 074) >> 2);
@@ -176,6 +199,14 @@ void rx01_cpu_device::shift_crc(bool data)
m_crc = (m_crc >> 1) | 0100000;
}
+void rx01_cpu_device::set_flag(bool j, bool k)
+{
+ if (j && !(m_flags & FF_FLAG))
+ m_flags |= FF_FLAG;
+ else if (k && (m_flags & FF_FLAG))
+ m_flags &= ~FF_FLAG;
+}
+
void rx01_cpu_device::execute_run()
{
while (m_icount > 0)
@@ -224,6 +255,63 @@ void rx01_cpu_device::execute_run()
}
else switch (m_mb & 074)
{
+ case 000:
+ if (BIT(m_mb, 1))
+ m_flags |= FF_IOB0;
+ else
+ m_flags &= ~FF_IOB0;
+ break;
+
+ case 004:
+ if (BIT(m_mb, 1))
+ m_flags |= FF_IOB1;
+ else
+ m_flags &= ~FF_IOB1;
+ break;
+
+ case 010:
+ if (BIT(m_mb, 1))
+ m_flags |= FF_IOB2;
+ else
+ m_flags &= ~FF_IOB2;
+ break;
+
+ case 014:
+ if (BIT(m_mb, 1))
+ m_flags |= FF_IOB3;
+ else
+ m_flags &= ~FF_IOB3;
+ break;
+
+ case 020:
+ if (BIT(m_mb, 1))
+ m_flags |= FF_IOB4;
+ else
+ m_flags &= ~FF_IOB4;
+ break;
+
+ case 024:
+ if (BIT(m_mb, 1))
+ m_flags |= FF_IOB5;
+ else
+ m_flags &= ~FF_IOB5;
+ break;
+
+ case 030:
+ if (BIT(m_mb, 1))
+ m_flags |= FF_IOB6;
+ else
+ m_flags &= ~FF_IOB6;
+ break;
+
+ case 034:
+ m_unit = BIT(m_mb, 1);
+ break;
+
+ case 040:
+ m_load_head = BIT(m_mb, 1);
+ break;
+
case 044:
if (BIT(m_mb, 1))
m_bar = (m_bar + 1) & 07777;
@@ -231,6 +319,13 @@ void rx01_cpu_device::execute_run()
m_bar = BIT(m_mb, 0) ? 0 : 06000;
break;
+ case 050:
+ if (BIT(m_mb, 0))
+ m_flags |= FF_WRTBUF;
+ else
+ m_flags &= ~FF_WRTBUF;
+ break;
+
case 054:
if ((m_mb & 3) == 3)
m_crc = 0177777;
@@ -241,7 +336,7 @@ void rx01_cpu_device::execute_run()
break;
case 060:
- m_flag = (!BIT(m_mb, 0) && m_flag) || (BIT(m_mb, 1) && !m_flag);
+ set_flag(BIT(m_mb, 1), BIT(m_mb, 0));
break;
case 064:
@@ -264,10 +359,6 @@ void rx01_cpu_device::execute_run()
else
m_sr = (m_sr << 1) | BIT(m_mb, 1);
break;
-
- default:
- LOG("%04o: Unimplemented instruction %03o\n", m_ppc, m_mb);
- break;
}
}
@@ -279,6 +370,28 @@ void rx01_cpu_device::state_string_export(const device_state_entry &entry, std::
{
switch (entry.index())
{
+ case STATE_GENFLAGS:
+ if (m_flags & FF_IOB0)
+ str = string_format("D%c%c%c%c%c%c %4s",
+ (m_flags & FF_WRTBUF) ? 'B' : ':',
+ (m_flags & FF_IOB1) ? 'W' : '.',
+ (m_flags & FF_IOB2) ? 'S' : '.',
+ (m_flags & FF_IOB3) ? 'H' : '.',
+ (m_flags & FF_IOB4) ? 'E' : '.',
+ (m_flags & FF_IOB5) ? 'T' : '.',
+ (m_flags & FF_FLAG) ? ((m_flags & FF_IOB1) ? "DATA" : "FLAG") : "");
+ else
+ str = string_format("I%c%c%c%c%c%c %s %c",
+ (m_flags & FF_WRTBUF) ? 'B' : ':',
+ (m_flags & FF_IOB1) ? 'E' : '.',
+ (m_flags & FF_IOB2) ? 'R' : '.',
+ (m_flags & FF_IOB3) ? 'O' : '.',
+ (m_flags & FF_IOB4) ? 'D' : '.',
+ (m_flags & FF_IOB5) ? 'S' : '.',
+ (m_flags & FF_IOB6) ? "SB" : "SR",
+ (m_flags & FF_FLAG) ? 'F' : ' ');
+ break;
+
case RX01_SPAR:
str = string_format("R%-2d", m_spar);
break;
diff --git a/src/devices/cpu/rx01/rx01.h b/src/devices/cpu/rx01/rx01.h
index 83389077517..2c6e2714964 100644
--- a/src/devices/cpu/rx01/rx01.h
+++ b/src/devices/cpu/rx01/rx01.h
@@ -15,7 +15,20 @@ public:
RX01_R0, RX01_R1, RX01_R2, RX01_R3, RX01_R4, RX01_R5, RX01_R6, RX01_R7,
RX01_R8, RX01_R9, RX01_R10, RX01_R11, RX01_R12, RX01_R13, RX01_R14, RX01_R15,
RX01_BAR,
- RX01_CRC
+ RX01_CRC,
+ RX01_UNIT, RX01_LDHD
+ };
+
+ enum : u16 {
+ FF_IOB0 = 1 << 0,
+ FF_IOB1 = 1 << 1,
+ FF_IOB2 = 1 << 2,
+ FF_IOB3 = 1 << 3,
+ FF_IOB4 = 1 << 4,
+ FF_IOB5 = 1 << 5,
+ FF_IOB6 = 1 << 6,
+ FF_WRTBUF = 1 << 7,
+ FF_FLAG = 1 << 8
};
// device type constructor
@@ -48,6 +61,7 @@ private:
bool sep_data();
bool test_condition();
void shift_crc(bool data);
+ void set_flag(bool j, bool k);
// address spaces
address_space_config m_inst_config;
@@ -67,7 +81,9 @@ private:
u8 m_spar;
u16 m_bar;
u16 m_crc;
- bool m_flag;
+ u16 m_flags;
+ bool m_unit;
+ bool m_load_head;
s32 m_icount;
};
diff --git a/src/devices/cpu/rx01/rx01dasm.cpp b/src/devices/cpu/rx01/rx01dasm.cpp
index c7210aaf86d..978d9398014 100644
--- a/src/devices/cpu/rx01/rx01dasm.cpp
+++ b/src/devices/cpu/rx01/rx01dasm.cpp
@@ -21,7 +21,7 @@ const char *const rx01_disassembler::s_0_or_1[2] = {
const char *const rx01_disassembler::s_conditions[16] = {
"RUN",
- "IOB3DT",
+ "IOB3OT",
"DATAIN",
"INDX",
"SR7",