diff options
author | 2018-07-17 04:46:25 +1000 | |
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committer | 2018-07-17 04:46:25 +1000 | |
commit | a28b2b5a197a681d1d5d9bc14d4a292841c5cd8f (patch) | |
tree | e9da04e7723b00f09702452300960547f47a0ba7 /src/devices/cpu/nec | |
parent | 18eb2b394fde13812544d4d4a7743a03e2292636 (diff) |
remove lots of MCFG_ (nw)
Diffstat (limited to 'src/devices/cpu/nec')
-rw-r--r-- | src/devices/cpu/nec/v53.cpp | 64 | ||||
-rw-r--r-- | src/devices/cpu/nec/v53.h | 19 |
2 files changed, 32 insertions, 51 deletions
diff --git a/src/devices/cpu/nec/v53.cpp b/src/devices/cpu/nec/v53.cpp index d71e9d89d62..410867e804e 100644 --- a/src/devices/cpu/nec/v53.cpp +++ b/src/devices/cpu/nec/v53.cpp @@ -488,36 +488,36 @@ WRITE_LINE_MEMBER(v53_base_device::internal_irq_w) MACHINE_CONFIG_START(v53_base_device::device_add_mconfig) - MCFG_DEVICE_ADD("pit", PIT8254, 0) // functionality identical to uPD71054 - MCFG_PIT8253_CLK0(16000000) // manual implicitly claims that these runs at same speed as the CPU - MCFG_PIT8253_CLK1(16000000) - MCFG_PIT8253_CLK2(16000000) - MCFG_PIT8253_OUT0_HANDLER(WRITELINE( *this, v53_base_device, tcu_out0_trampoline_cb )) - MCFG_PIT8253_OUT1_HANDLER(WRITELINE( *this, v53_base_device, tcu_out1_trampoline_cb )) - MCFG_PIT8253_OUT2_HANDLER(WRITELINE( *this, v53_base_device, tcu_out2_trampoline_cb )) - - MCFG_DEVICE_ADD("upd71071dma", V53_DMAU, 4000000) - MCFG_AM9517A_OUT_HREQ_CB(WRITELINE(*this, v53_base_device, hreq_trampoline_cb)) - MCFG_AM9517A_OUT_EOP_CB(WRITELINE(*this, v53_base_device, eop_trampoline_cb)) - MCFG_AM9517A_IN_MEMR_CB(READ8(*this, v53_base_device, dma_memr_trampoline_r)) - MCFG_AM9517A_OUT_MEMW_CB(WRITE8(*this, v53_base_device, dma_memw_trampoline_w)) - MCFG_AM9517A_IN_IOR_0_CB(READ8(*this, v53_base_device, dma_io_0_trampoline_r)) - MCFG_AM9517A_IN_IOR_1_CB(READ8(*this, v53_base_device, dma_io_1_trampoline_r)) - MCFG_AM9517A_IN_IOR_2_CB(READ8(*this, v53_base_device, dma_io_2_trampoline_r)) - MCFG_AM9517A_IN_IOR_3_CB(READ8(*this, v53_base_device, dma_io_3_trampoline_r)) - MCFG_AM9517A_OUT_IOW_0_CB(WRITE8(*this, v53_base_device, dma_io_0_trampoline_w)) - MCFG_AM9517A_OUT_IOW_1_CB(WRITE8(*this, v53_base_device, dma_io_1_trampoline_w)) - MCFG_AM9517A_OUT_IOW_2_CB(WRITE8(*this, v53_base_device, dma_io_2_trampoline_w)) - MCFG_AM9517A_OUT_IOW_3_CB(WRITE8(*this, v53_base_device, dma_io_3_trampoline_w)) - MCFG_AM9517A_OUT_DACK_0_CB(WRITELINE(*this, v53_base_device, dma_dack0_trampoline_w)) - MCFG_AM9517A_OUT_DACK_1_CB(WRITELINE(*this, v53_base_device, dma_dack1_trampoline_w)) - MCFG_AM9517A_OUT_DACK_2_CB(WRITELINE(*this, v53_base_device, dma_dack2_trampoline_w)) - MCFG_AM9517A_OUT_DACK_3_CB(WRITELINE(*this, v53_base_device, dma_dack3_trampoline_w)) - - pic8259_device &upd71059pic(PIC8259(config, "upd71059pic", 0)); - upd71059pic.out_int_callback().set(FUNC(v53_base_device::internal_irq_w)); - upd71059pic.in_sp_callback().set_constant(1); - upd71059pic.read_slave_ack_callback().set(FUNC(v53_base_device::get_pic_ack)); + PIT8254(config, m_v53tcu, 0); // functionality identical to uPD71054 + m_v53tcu->set_clk<0>(16000000); // manual implicitly claims that these runs at same speed as the CPU + m_v53tcu->set_clk<1>(16000000); + m_v53tcu->set_clk<2>(16000000); + m_v53tcu->out_handler<0>().set([this] (int state) { m_out0_handler(state); }); + m_v53tcu->out_handler<1>().set([this] (int state) { m_out1_handler(state); }); + m_v53tcu->out_handler<2>().set([this] (int state) { m_out2_handler(state); }); + + V53_DMAU(config, m_v53dmau, 4000000); + m_v53dmau->out_hreq_callback().set([this] (int state) { m_out_hreq_cb(state); }); + m_v53dmau->out_eop_callback().set([this] (int state) { m_out_eop_cb(state); }); + m_v53dmau->in_memr_callback().set([this] (address_space &space, offs_t offset) { return m_in_memr_cb(space, offset); }); + m_v53dmau->out_memw_callback().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_memw_cb(space, offset, data); }); + m_v53dmau->in_ior_callback<0>().set([this] (address_space &space, offs_t offset) { return m_in_ior_0_cb(space, offset); }); + m_v53dmau->in_ior_callback<1>().set([this] (address_space &space, offs_t offset) { return m_in_ior_1_cb(space, offset); }); + m_v53dmau->in_ior_callback<2>().set([this] (address_space &space, offs_t offset) { return m_in_ior_2_cb(space, offset); }); + m_v53dmau->in_ior_callback<3>().set([this] (address_space &space, offs_t offset) { return m_in_ior_3_cb(space, offset); }); + m_v53dmau->out_iow_callback<0>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_0_cb(space, offset, data); }); + m_v53dmau->out_iow_callback<1>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_1_cb(space, offset, data); }); + m_v53dmau->out_iow_callback<2>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_2_cb(space, offset, data); }); + m_v53dmau->out_iow_callback<3>().set([this] (address_space &space, offs_t offset, uint8_t data) { m_out_iow_3_cb(space, offset, data); }); + m_v53dmau->out_dack_callback<0>().set([this] (int state) { m_out_dack_0_cb(state); }); + m_v53dmau->out_dack_callback<1>().set([this] (int state) { m_out_dack_1_cb(state); }); + m_v53dmau->out_dack_callback<2>().set([this] (int state) { m_out_dack_2_cb(state); }); + m_v53dmau->out_dack_callback<3>().set([this] (int state) { m_out_dack_3_cb(state); }); + + PIC8259(config, m_v53icu, 0); + m_v53icu->out_int_callback().set(FUNC(v53_base_device::internal_irq_w)); + m_v53icu->in_sp_callback().set_constant(1); + m_v53icu->read_slave_ack_callback().set(FUNC(v53_base_device::get_pic_ack)); MCFG_DEVICE_ADD("v53scu", V53_SCU, 0) MCFG_I8251_TXD_HANDLER(WRITELINE(*this, v53_base_device, scu_txd_trampoline_cb)) @@ -531,8 +531,8 @@ MACHINE_CONFIG_START(v53_base_device::device_add_mconfig) MACHINE_CONFIG_END -v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type) - : nec_common_device(mconfig, type, tag, owner, clock, true, prefetch_size, prefetch_cycles, chip_type), +v53_base_device::v53_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type) : + nec_common_device(mconfig, type, tag, owner, clock, true, prefetch_size, prefetch_cycles, chip_type), m_io_space_config( "io", ENDIANNESS_LITTLE, 16, 16, 0, address_map_constructor(FUNC(v53_base_device::v53_internal_port_map), this) ), m_v53tcu(*this, "pit"), m_v53dmau(*this, "upd71071dma"), diff --git a/src/devices/cpu/nec/v53.h b/src/devices/cpu/nec/v53.h index 536b8f8f458..c5f695a5dd0 100644 --- a/src/devices/cpu/nec/v53.h +++ b/src/devices/cpu/nec/v53.h @@ -164,9 +164,6 @@ public: template <class Object> devcb_base &set_out0_handler(Object &&cb) { return m_out0_handler.set_callback(std::forward<Object>(cb)); } template <class Object> devcb_base &set_out1_handler(Object &&cb) { return m_out1_handler.set_callback(std::forward<Object>(cb)); } template <class Object> devcb_base &set_out2_handler(Object &&cb) { return m_out2_handler.set_callback(std::forward<Object>(cb)); } - DECLARE_WRITE_LINE_MEMBER(tcu_out0_trampoline_cb){ m_out0_handler(state); } - DECLARE_WRITE_LINE_MEMBER(tcu_out1_trampoline_cb){ m_out1_handler(state); } - DECLARE_WRITE_LINE_MEMBER(tcu_out2_trampoline_cb){ m_out2_handler(state); } // DMAU template<class Object> devcb_base &set_out_hreq_callback(Object &&cb) { return m_out_hreq_cb.set_callback(std::forward<Object>(cb)); } @@ -260,22 +257,6 @@ protected: devcb_write_line m_out_dack_2_cb; devcb_write_line m_out_dack_3_cb; - DECLARE_WRITE_LINE_MEMBER(hreq_trampoline_cb) { m_out_hreq_cb(state); } - DECLARE_WRITE_LINE_MEMBER(eop_trampoline_cb) { m_out_eop_cb(state); } - DECLARE_READ8_MEMBER(dma_memr_trampoline_r) { return m_in_memr_cb(space, offset); } - DECLARE_WRITE8_MEMBER(dma_memw_trampoline_w) { m_out_memw_cb(space, offset, data); } - DECLARE_READ8_MEMBER(dma_io_0_trampoline_r) { return m_in_ior_0_cb(space, offset); } - DECLARE_READ8_MEMBER(dma_io_1_trampoline_r) { return m_in_ior_1_cb(space, offset); } - DECLARE_READ8_MEMBER(dma_io_2_trampoline_r) { return m_in_ior_2_cb(space, offset); } - DECLARE_READ8_MEMBER(dma_io_3_trampoline_r) { return m_in_ior_3_cb(space, offset); } - DECLARE_WRITE8_MEMBER(dma_io_0_trampoline_w) { m_out_iow_0_cb(space, offset, data); } - DECLARE_WRITE8_MEMBER(dma_io_1_trampoline_w) { m_out_iow_1_cb(space, offset, data); } - DECLARE_WRITE8_MEMBER(dma_io_2_trampoline_w) { m_out_iow_2_cb(space, offset, data); } - DECLARE_WRITE8_MEMBER(dma_io_3_trampoline_w) { m_out_iow_3_cb(space, offset, data); } - DECLARE_WRITE_LINE_MEMBER(dma_dack0_trampoline_w) { m_out_dack_0_cb(state); } - DECLARE_WRITE_LINE_MEMBER(dma_dack1_trampoline_w) { m_out_dack_1_cb(state); } - DECLARE_WRITE_LINE_MEMBER(dma_dack2_trampoline_w) { m_out_dack_2_cb(state); } - DECLARE_WRITE_LINE_MEMBER(dma_dack3_trampoline_w) { m_out_dack_3_cb(state); } DECLARE_READ8_MEMBER(get_pic_ack); DECLARE_WRITE_LINE_MEMBER(internal_irq_w); }; |