diff options
author | 2018-11-06 13:53:11 +0700 | |
---|---|---|
committer | 2018-11-06 17:21:00 +0700 | |
commit | d2fe91f89c1daf5e0c8be41eea134f6cd560e3c3 (patch) | |
tree | eca28d32f712c1558d893b03f17d32f0d5f6ec56 /src/devices/cpu/mips/r3kdasm.cpp | |
parent | 8625e6d93b42f3ec89fbe07944e01b4036b7ab99 (diff) |
r3000: modernize, add tlb support
* replaced memory accessors
* implemented tlb and address translation
* corrected exception vector logic
* improved cache isolation behaviour
* comments/formatting
Diffstat (limited to 'src/devices/cpu/mips/r3kdasm.cpp')
-rw-r--r-- | src/devices/cpu/mips/r3kdasm.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/devices/cpu/mips/r3kdasm.cpp b/src/devices/cpu/mips/r3kdasm.cpp index 7e004a95068..f31705d18f7 100644 --- a/src/devices/cpu/mips/r3kdasm.cpp +++ b/src/devices/cpu/mips/r3kdasm.cpp @@ -11,7 +11,7 @@ #include "emu.h" #include "r3kdasm.h" -const char *const r3000_disassembler::reg[32] = +const char *const mips1_disassembler::reg[32] = { "0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", @@ -20,7 +20,7 @@ const char *const r3000_disassembler::reg[32] = }; -const char *const r3000_disassembler::cpreg[4][32] = +const char *const mips1_disassembler::cpreg[4][32] = { { "Index","Random","EntryLo","cpr3", "Context", "cpr5", "cpr6", "cpr7", @@ -49,7 +49,7 @@ const char *const r3000_disassembler::cpreg[4][32] = }; -const char *const r3000_disassembler::ccreg[4][32] = +const char *const mips1_disassembler::ccreg[4][32] = { { "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7", @@ -82,7 +82,7 @@ const char *const r3000_disassembler::ccreg[4][32] = CODE CODE ***************************************************************************/ -std::string r3000_disassembler::signed_16bit(int16_t val) +std::string mips1_disassembler::signed_16bit(int16_t val) { if (val < 0) return util::string_format("-$%x", -val); @@ -90,7 +90,7 @@ std::string r3000_disassembler::signed_16bit(int16_t val) return util::string_format("$%x", val); } -uint32_t r3000_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::ostream &stream) +uint32_t mips1_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::ostream &stream) { int rt = (op >> 16) & 31; int rd = (op >> 11) & 31; @@ -150,7 +150,7 @@ uint32_t r3000_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::os return flags; } -uint32_t r3000_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &stream) +uint32_t mips1_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &stream) { static const char *const format_table[] = { @@ -233,7 +233,7 @@ uint32_t r3000_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s return flags; } -offs_t r3000_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) +offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { uint32_t op = opcodes.r32(pc); int rs = (op >> 21) & 31; @@ -376,7 +376,7 @@ offs_t r3000_disassembler::disassemble(std::ostream &stream, offs_t pc, const da return 4 | flags | SUPPORTED; } -uint32_t r3000_disassembler::opcode_alignment() const +uint32_t mips1_disassembler::opcode_alignment() const { return 4; } |