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author Miodrag Milanovic <mmicko@gmail.com>2015-09-13 08:41:44 +0200
committer Miodrag Milanovic <mmicko@gmail.com>2015-09-13 08:41:44 +0200
commitf88cefad27a1737c76e09d99c9fb43e173506081 (patch)
tree2d8167d03579c46e226471747eb4407bd00ed6fa /src/devices/cpu/minx
parente92ac9e0fa8e99869894bea00589bbb526be30aa (diff)
Move all devices into separate part of src tree (nw)
Diffstat (limited to 'src/devices/cpu/minx')
-rw-r--r--src/devices/cpu/minx/minx.c234
-rw-r--r--src/devices/cpu/minx/minx.h121
-rw-r--r--src/devices/cpu/minx/minxd.c465
-rw-r--r--src/devices/cpu/minx/minxfunc.h364
-rw-r--r--src/devices/cpu/minx/minxopce.h563
-rw-r--r--src/devices/cpu/minx/minxopcf.h563
-rw-r--r--src/devices/cpu/minx/minxops.h563
7 files changed, 2873 insertions, 0 deletions
diff --git a/src/devices/cpu/minx/minx.c b/src/devices/cpu/minx/minx.c
new file mode 100644
index 00000000000..e822fbd9ecc
--- /dev/null
+++ b/src/devices/cpu/minx/minx.c
@@ -0,0 +1,234 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/*
+ Implementation for the Nintendo Minx CPU.
+
+ Registers (mindX13.txt):
+ 8bit: A B H L FLAGS N U V
+ 16bit: BA
+ 24bit: HL, X1, X2, NN, SP
+
+
+ "sunlab":
+ 16bit:
+ V:PC if high bit set, extended to 23 bits, upper 8 bits V
+ SP
+ BA
+ I:HL
+ (XI:)X
+ (YI:)Y
+
+ 8bit:
+ A, B, H, L
+ U - delayed jump bank. When a jump occurs, V is set to this value
+ V
+ F - flags IDLBSOCZ
+ I - Interrupt branch
+ D - Interrupt disable
+ L - low mask mode enable
+ B - bcd decimal mode enable
+ S - sign flag
+ O - overflow flag
+ C - carry flag
+ Z - zero flag
+ E - exception register
+ I
+ N
+ XI - index/extension
+ YI - index/extension
+
+TODO:
+- Add support for O and C flags in NEG8 instruction
+- Verify MUL (CE D8) and DIV (CE D9)
+- Doublecheck behaviour of CMPN instructions ( CF 60 .. CF 63 )
+
+*/
+
+#include "emu.h"
+#include "debugger.h"
+#include "minx.h"
+
+#define FLAG_I 0x80
+#define FLAG_D 0x40
+#define FLAG_L 0x20
+#define FLAG_B 0x10
+#define FLAG_S 0x08
+#define FLAG_O 0x04
+#define FLAG_C 0x02
+#define FLAG_Z 0x01
+
+#define EXEC_X0 0x80
+#define EXEC_X1 0x40
+#define EXEC_X2 0x20
+#define EXEC_DZ 0x10
+#define EXEC_EN 0x08
+#define EXEC_04 0x04
+#define EXEC_02 0x02
+#define EXEC_01 0x01
+
+
+#define RD(offset) m_program->read_byte( offset )
+#define WR(offset,data) m_program->write_byte( offset, data )
+#define GET_MINX_PC ( ( m_PC & 0x8000 ) ? ( m_V << 15 ) | (m_PC & 0x7FFF ) : m_PC )
+
+
+const device_type MINX = &device_creator<minx_cpu_device>;
+
+
+minx_cpu_device::minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : cpu_device(mconfig, MINX, "Nintendo Minx", tag, owner, clock, "minx", __FILE__)
+ , m_program_config("program", ENDIANNESS_BIG, 8, 24, 0)
+{
+}
+
+
+UINT16 minx_cpu_device::rd16( UINT32 offset )
+{
+ return RD( offset ) | ( RD( offset + 1 ) << 8 );
+}
+
+
+void minx_cpu_device::wr16( UINT32 offset, UINT16 data )
+{
+ WR( offset, ( data & 0x00FF ) );
+ WR( offset + 1, ( data >> 8 ) );
+}
+
+
+void minx_cpu_device::device_start()
+{
+ m_program = &space(AS_PROGRAM);
+
+ state_add( MINX_PC, "PC", m_PC ).formatstr("%04X");
+ state_add( MINX_SP, "SP", m_SP ).formatstr("%04X");
+ state_add( MINX_BA, "BA", m_BA ).formatstr("%04X");
+ state_add( MINX_HL, "HL", m_HL ).formatstr("%04X");
+ state_add( MINX_X, "X", m_X ).formatstr("%04X");
+ state_add( MINX_Y, "Y", m_Y ).formatstr("%04X");
+ state_add( MINX_U, "U", m_U ).formatstr("%02X");
+ state_add( MINX_V, "V", m_V ).formatstr("%02X");
+ state_add( MINX_F, "F", m_F ).formatstr("%02X");
+ state_add( MINX_E, "E", m_E ).formatstr("%02X");
+ state_add( MINX_N, "N", m_N ).formatstr("%02X");
+ state_add( MINX_I, "I", m_I ).formatstr("%02X");
+ state_add( MINX_XI, "XI", m_XI ).formatstr("%02X");
+ state_add( MINX_YI, "YI", m_YI ).formatstr("%02X");
+
+ state_add(STATE_GENPC, "curpc", m_curpc).formatstr("%06X").noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).formatstr("%14s").noshow();
+
+ m_icountptr = &m_icount;
+}
+
+
+void minx_cpu_device::state_string_export(const device_state_entry &entry, std::string &str)
+{
+ switch (entry.index())
+ {
+ case STATE_GENFLAGS:
+ strprintf(str, "%c%c%c%c%c%c%c%c-%c%c%c%c%c",
+ m_F & FLAG_I ? 'I' : '.',
+ m_F & FLAG_D ? 'D' : '.',
+ m_F & FLAG_L ? 'L' : '.',
+ m_F & FLAG_B ? 'B' : '.',
+ m_F & FLAG_S ? 'S' : '.',
+ m_F & FLAG_O ? 'O' : '.',
+ m_F & FLAG_C ? 'C' : '.',
+ m_F & FLAG_Z ? 'Z' : '.',
+ m_E & EXEC_X0 ? '0' : '.',
+ m_E & EXEC_X1 ? '1' : '.',
+ m_E & EXEC_X2 ? '2' : '.',
+ m_E & EXEC_DZ ? 'z' : '.',
+ m_E & EXEC_EN ? 'E' : '.' );
+ break;
+ }
+}
+
+
+void minx_cpu_device::device_reset()
+{
+ m_SP = m_BA = m_HL = m_X = m_Y = 0;
+ m_U = m_V = m_F = m_E = m_I = m_XI = m_YI = 0;
+ m_halted = m_interrupt_pending = 0;
+
+ m_PC = rd16( 0 );
+}
+
+
+UINT8 minx_cpu_device::rdop()
+{
+ UINT8 op = RD( GET_MINX_PC );
+ m_PC++;
+ return op;
+}
+
+
+UINT16 minx_cpu_device::rdop16()
+{
+ UINT16 op = rdop();
+ op = op | ( rdop() << 8 );
+ return op;
+}
+
+
+#include "minxfunc.h"
+#include "minxopce.h"
+#include "minxopcf.h"
+#include "minxops.h"
+
+
+void minx_cpu_device::execute_run()
+{
+ do
+ {
+ m_curpc = GET_MINX_PC;
+ debugger_instruction_hook(this, m_curpc);
+
+ if ( m_interrupt_pending )
+ {
+ m_halted = 0;
+ if ( ! ( m_F & 0xc0 ) && m_U == m_V )
+ {
+ //logerror("minx_execute(): taking IRQ\n");
+ PUSH8( m_V );
+ PUSH16( m_PC );
+ PUSH8( m_F );
+
+ /* Set Interrupt Branch flag */
+ m_F |= 0x80;
+ m_V = 0;
+ m_PC = rd16( standard_irq_callback( 0 ) << 1 );
+ m_icount -= 28; /* This cycle count is a guess */
+ }
+ }
+
+ if ( m_halted )
+ {
+ m_icount -= insnminx_cycles_CE[0xAE];
+ }
+ else
+ {
+ execute_one();
+ }
+ } while ( m_icount > 0 );
+}
+
+
+void minx_cpu_device::execute_set_input(int inputnum, int state)
+{
+ if ( state == ASSERT_LINE )
+ {
+ m_interrupt_pending = 1;
+ }
+ else
+ {
+ m_interrupt_pending = 0;
+ }
+}
+
+
+offs_t minx_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
+{
+ extern CPU_DISASSEMBLE( minx );
+ return CPU_DISASSEMBLE_NAME(minx)(this, buffer, pc, oprom, opram, options);
+}
diff --git a/src/devices/cpu/minx/minx.h b/src/devices/cpu/minx/minx.h
new file mode 100644
index 00000000000..836b76026cc
--- /dev/null
+++ b/src/devices/cpu/minx/minx.h
@@ -0,0 +1,121 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+#pragma once
+
+#ifndef __MINX_H__
+#define __MINX_H__
+
+
+enum
+{
+ MINX_PC=1, MINX_SP, MINX_BA, MINX_HL, MINX_X, MINX_Y,
+ MINX_U, MINX_V, MINX_F, MINX_E, MINX_N, MINX_I,
+ MINX_XI, MINX_YI
+};
+
+
+class minx_cpu_device : public cpu_device
+{
+public:
+ // construction/destruction
+ minx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+ // device_execute_interface overrides
+ virtual UINT32 execute_min_cycles() const { return 1; }
+ virtual UINT32 execute_max_cycles() const { return 4; }
+ virtual UINT32 execute_input_lines() const { return 1; }
+ virtual void execute_run();
+ virtual void execute_set_input(int inputnum, int state);
+
+ // device_memory_interface overrides
+ virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; }
+
+ // device_state_interface overrides
+ void state_string_export(const device_state_entry &entry, std::string &str);
+
+ // device_disasm_interface overrides
+ virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
+ virtual UINT32 disasm_max_opcode_bytes() const { return 5; }
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
+
+private:
+ address_space_config m_program_config;
+
+ UINT16 m_PC;
+ UINT16 m_SP;
+ UINT16 m_BA;
+ UINT16 m_HL;
+ UINT16 m_X;
+ UINT16 m_Y;
+ UINT8 m_U;
+ UINT8 m_V;
+ UINT8 m_F;
+ UINT8 m_E;
+ UINT8 m_N;
+ UINT8 m_I;
+ UINT8 m_XI;
+ UINT8 m_YI;
+ UINT8 m_halted;
+ UINT8 m_interrupt_pending;
+ address_space *m_program;
+ int m_icount;
+ // For debugger
+ UINT32 m_curpc;
+ UINT16 m_flags;
+
+ UINT16 rd16( UINT32 offset );
+ void wr16( UINT32 offset, UINT16 data );
+ UINT8 rdop();
+ UINT16 rdop16();
+ UINT8 ADD8( UINT8 arg1, UINT8 arg2 );
+ UINT16 ADD16( UINT16 arg1, UINT16 arg2 );
+ UINT8 ADDC8( UINT8 arg1, UINT8 arg2 );
+ UINT16 ADDC16( UINT16 arg1, UINT16 arg2 );
+ UINT8 INC8( UINT8 arg );
+ UINT16 INC16( UINT16 arg );
+ UINT8 SUB8( UINT8 arg1, UINT8 arg2 );
+ UINT16 SUB16( UINT16 arg1, UINT16 arg2 );
+ UINT8 SUBC8( UINT8 arg1, UINT8 arg2 );
+ UINT16 SUBC16( UINT16 arg1, UINT16 arg2 );
+ UINT8 DEC8( UINT8 arg );
+ UINT16 DEC16( UINT16 arg );
+ UINT8 AND8( UINT8 arg1, UINT8 arg2 );
+ UINT8 OR8( UINT8 arg1, UINT8 arg2 );
+ UINT8 XOR8( UINT8 arg1, UINT8 arg2 );
+ UINT8 NOT8( UINT8 arg );
+ UINT8 NEG8( UINT8 arg );
+ UINT8 SAL8( UINT8 arg );
+ UINT8 SAR8( UINT8 arg );
+ UINT8 SHL8( UINT8 arg );
+ UINT8 SHR8( UINT8 arg );
+ UINT8 ROLC8( UINT8 arg );
+ UINT8 RORC8( UINT8 arg );
+ UINT8 ROL8( UINT8 arg );
+ UINT8 ROR8( UINT8 arg );
+ void PUSH8( UINT8 arg );
+ void PUSH16( UINT16 arg );
+ UINT8 POP8();
+ UINT16 POP16();
+ void JMP( UINT16 arg );
+ void CALL( UINT16 arg );
+
+ void execute_one();
+ void execute_one_ce();
+ void execute_one_cf();
+
+ static const int insnminx_cycles[256];
+ static const int insnminx_cycles_CE[256];
+ static const int insnminx_cycles_CF[256];
+
+};
+
+
+extern const device_type MINX;
+
+
+#endif /* __MINX_H__ */
diff --git a/src/devices/cpu/minx/minxd.c b/src/devices/cpu/minx/minxd.c
new file mode 100644
index 00000000000..58789942409
--- /dev/null
+++ b/src/devices/cpu/minx/minxd.c
@@ -0,0 +1,465 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/************************************************************
+
+ Nintendo Minx CPU disassembly
+
+
+************************************************************/
+
+#include "emu.h"
+#include "debugger.h"
+#include "minx.h"
+
+enum e_mnemonic {
+ zADD=0, zADDC, zAND, zBCDD, zBCDE, zBCDX, zCALL, zCALLC, zCALLG, zCALLGE, zCALLL,
+ zCALLLE, zCALLN, zCALLNC, zCALLNO, zCALLNZ, zCALLO, zCALLP, zCALLNX0,
+ zCALLNX1, zCALLNX2, zCALLNX3, zCALLX0, zCALLX1, zCALLX2, zCALLX3, zCALLZ,
+ zCMP, zCMPN, zDEC, zDIV, zEXT, zHALT, zINC, zINT,
+ zJC, zJDBNZ, zJG, zJGE, zJINT, zJL, zJLE, zJMP,
+ zJN, zJNX0, zJNX1, zJNX2, zJNX3, zJNC, zJNO, zJNZ,
+ zJO, zJP, zJX0, zJX1, zJX2, zJX3, zJZ, zMOV,
+ zMUL, zNEG, zNOP, zNOT, zOR, zPOP, zPOPA, zPOPAX,
+ zPOPX, zPUSH, zPUSHA, zPUSHAX, zPUSHX, zRET, zRETI, zRETSKIP,
+ zROL, zROLC, zROR, zRORC, zSAL, zSAR, zSHL, zSHR, zSUB,
+ zSUBC, zTEST, zXCHG, zXOR, zDB
+};
+
+enum e_operand {
+ R_A=1, /* A */
+ R_B, /* B */
+ R_L, /* L */
+ R_H, /* H */
+ R_N, /* N */
+ R_F, /* F */
+ R_SP, /* SP */
+ R_BA, /* BA */
+ R_HL, /* HL */
+ R_X, /* X */
+ R_Y, /* Y */
+ R_U, /* U */
+ R_V, /* V */
+ R_I, /* I */
+ R_XI, /* XI */
+ R_YI, /* YI */
+ R_PC, /* PC */
+ I_8, /* 8 bit immediate */
+ I_16, /* 16 bit immediate */
+ D_8, /* PC + 8 bit displacement (signed) */
+ D_16, /* PC + 16 bit displacement */
+ S_8, /* SP + 8 bit displacement (signed) */
+ M_IHL, /* [I+HL] */
+ M_N8, /* [I+N+ofs8] */
+ M_I16, /* [I+ofs16] */
+ M_X, /* [X] */
+ M_Y, /* [Y] */
+ M_X8, /* [X + 8 bit displacement (signed)] */
+ M_Y8, /* [Y + 8 bit displacement (signed)] */
+ M_XL, /* [X + L (signed)] */
+ M_YL, /* [Y + L (signed)] */
+ M_16, /* [16bit] */
+ M_HL, /* [HL] */
+ OP, OP1
+};
+
+static const char *const s_mnemonic[] = {
+ "add", "addc", "and", "bcdd", "bcde", "bcdx", "call", "callc", "callg", "callge", "calll",
+ "callle", "calln", "callnc", "callno", "callnz", "callo", "callp", "callnx0",
+ "callnx1", "callnx2", "callnx3", "callx0", "callx1", "callx2", "callx3", "callz",
+ "cmp", "cmpn", "dec", "div", "ext", "halt", "inc", "int",
+ "jc", "jdbnz", "jg", "jge", "jint", "jl", "jle", "jmp",
+ "jn", "jnx0", "jnx1", "jnx2", "jnx3", "jnc", "jno", "jnz",
+ "jo", "jp", "jx0", "jx1", "jx2", "jx3", "jz", "mov",
+ "mul", "neg", "nop", "not", "or", "pop", "popa", "popax",
+ "popx", "push", "pusha", "pushax", "pushx", "ret", "reti", "retskip",
+ "rol", "rolc", "ror", "rorc", "sal", "sar", "shl", "shr", "sub",
+ "subc", "test", "xchg", "xor", "db"
+};
+
+#define _OVER DASMFLAG_STEP_OVER
+#define _OUT DASMFLAG_STEP_OUT
+
+static const UINT32 s_flags[] = {
+ 0, 0, 0, 0, 0, 0, _OVER, _OVER, _OVER, _OVER, _OVER,
+ _OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER,
+ _OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER, _OVER,
+ 0, 0, 0, 0, 0, _OVER, 0, _OVER,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, _OUT, _OUT, _OUT,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0,
+};
+
+struct minxdasm {
+ UINT8 mnemonic;
+ UINT8 argument1;
+ UINT8 argument2;
+};
+
+static const minxdasm mnemonic[256] = {
+ /* 00 - 0F */
+ {zADD,R_A,R_A}, {zADD,R_A,R_B}, {zADD,R_A,I_8}, {zADD,R_A,M_IHL},
+ {zADD,R_A,M_N8}, {zADD,R_A,M_I16}, {zADD,R_A,M_X}, {zADD,R_A,M_Y},
+ {zADDC,R_A,R_A}, {zADDC,R_A,R_B}, {zADDC,R_A,I_8}, {zADDC,R_A,M_IHL},
+ {zADDC,R_A,M_N8}, {zADDC,R_A,M_I16}, {zADDC,R_A,M_X}, {zADDC,R_A,M_Y},
+ /* 10 - 1F */
+ {zSUB,R_A,R_A}, {zSUB,R_A,R_B}, {zSUB,R_A,I_8}, {zSUB,R_A,M_IHL},
+ {zSUB,R_A,M_N8}, {zSUB,R_A,M_I16}, {zSUB,R_A,M_X}, {zSUB,R_A,M_Y},
+ {zSUBC,R_A,R_A}, {zSUBC,R_A,R_B}, {zSUBC,R_A,I_8}, {zSUBC,R_A,M_IHL},
+ {zSUBC,R_A,M_N8}, {zSUBC,R_A,M_I16}, {zSUBC,R_A,M_X}, {zSUBC,R_A,M_Y},
+ /* 20 - 2F */
+ {zAND,R_A,R_A}, {zAND,R_A,R_B}, {zAND,R_A,I_8}, {zAND,R_A,M_IHL},
+ {zAND,R_A,M_N8}, {zAND,R_A,M_I16}, {zAND,R_A,M_X}, {zAND,R_A,M_Y},
+ {zOR,R_A,R_A}, {zOR,R_A,R_B}, {zOR,R_A,I_8}, {zOR,R_A,M_IHL},
+ {zOR,R_A,M_N8}, {zOR,R_A,M_I16}, {zOR,R_A,M_X}, {zOR,R_A,M_Y},
+ /* 30 - 3F */
+ {zCMP,R_A,R_A}, {zCMP,R_A,R_B}, {zCMP,R_A,I_8}, {zCMP,R_A,M_IHL},
+ {zCMP,R_A,M_N8}, {zCMP,R_A,M_I16}, {zCMP,R_A,M_X}, {zCMP,R_A,M_Y},
+ {zXOR,R_A,R_A}, {zXOR,R_A,R_B}, {zXOR,R_A,I_8}, {zXOR,R_A,M_IHL},
+ {zXOR,R_A,M_N8}, {zXOR,R_A,M_I16}, {zXOR,R_A,M_X}, {zXOR,R_A,M_Y},
+ /* 40 - 4F */
+ {zMOV,R_A,R_A}, {zMOV,R_A,R_B}, {zMOV,R_A,R_L}, {zMOV,R_A,R_H},
+ {zMOV,R_A,M_N8}, {zMOV,R_A,M_IHL}, {zMOV,R_A,M_X}, {zMOV,R_A,M_Y},
+ {zMOV,R_B,R_A}, {zMOV,R_B,R_B}, {zMOV,R_B,R_L}, {zMOV,R_B,R_H},
+ {zMOV,R_B,M_N8}, {zMOV,R_B,M_IHL}, {zMOV,R_B,M_X}, {zMOV,R_B,M_Y},
+ /* 50 - 5F */
+ {zMOV,R_L,R_A}, {zMOV,R_L,R_B}, {zMOV,R_L,R_L}, {zMOV,R_L,R_H},
+ {zMOV,R_L,M_N8}, {zMOV,R_L,M_IHL}, {zMOV,R_L,M_X}, {zMOV,R_L,M_Y},
+ {zMOV,R_H,R_A}, {zMOV,R_H,R_B}, {zMOV,R_H,R_L}, {zMOV,R_H,R_H},
+ {zMOV,R_H,M_N8}, {zMOV,R_H,M_IHL}, {zMOV,R_H,M_X}, {zMOV,R_H,M_Y},
+ /* 60 - 6F */
+ {zMOV,M_X,R_A}, {zMOV,M_X,R_B}, {zMOV,M_X,R_L}, {zMOV,M_X,R_H},
+ {zMOV,M_X,M_N8}, {zMOV,M_X,M_IHL}, {zMOV,M_X,M_X}, {zMOV,M_X,M_Y},
+ {zMOV,M_IHL,R_A}, {zMOV,M_IHL,R_B}, {zMOV,M_IHL,R_L}, {zMOV,M_IHL,R_H},
+ {zMOV,M_IHL,M_N8}, {zMOV,M_IHL,M_IHL}, {zMOV,M_IHL,M_X}, {zMOV,M_IHL,M_Y},
+ /* 70 - 7F */
+ {zMOV,M_Y,R_A}, {zMOV,M_Y,R_B}, {zMOV,M_Y,R_L}, {zMOV,M_Y,R_H},
+ {zMOV,M_Y,M_N8}, {zMOV,M_Y,M_IHL}, {zMOV,M_Y,M_X}, {zMOV,M_Y,M_Y},
+ {zMOV,M_N8,R_A}, {zMOV,M_N8,R_B}, {zMOV,M_N8,R_L}, {zMOV,M_N8,R_H},
+ {zDB,OP,0}, {zMOV,M_N8,M_IHL}, {zMOV,M_N8,M_X}, {zMOV,M_N8,M_Y},
+ /* 80 - 8F */
+ {zINC,R_A,0}, {zINC,R_B,0}, {zINC,R_L,0}, {zINC,R_H,0},
+ {zINC,R_N,0}, {zINC,M_N8,0}, {zINC,M_IHL,0}, {zINC,R_SP,0},
+ {zDEC,R_A,0}, {zDEC,R_B,0}, {zDEC,R_L,0}, {zDEC,R_H,0},
+ {zDEC,R_N,0}, {zDEC,M_N8,0}, {zDEC,M_IHL,0}, {zDEC,R_SP,0},
+ /* 90 - 9F */
+ {zINC,R_BA,0}, {zINC,R_HL,0}, {zINC,R_X,0}, {zINC,R_Y,0},
+ {zTEST,R_A,R_B}, {zTEST,M_IHL,I_8}, {zTEST,R_A,I_8}, {zTEST,R_B,I_8},
+ {zDEC,R_BA,0}, {zDEC,R_HL,0}, {zDEC,R_X,0}, {zDEC,R_Y,0},
+ {zAND,R_F,I_8}, {zOR,R_F,I_8}, {zXOR,R_F,I_8}, {zMOV,R_F,I_8},
+ /* A0 - AF */
+ {zPUSH,R_BA,0}, {zPUSH,R_HL,0}, {zPUSH,R_X,0}, {zPUSH,R_Y,0},
+ {zPUSH,R_N,0}, {zPUSH,R_I,0}, {zPUSHX,0,0}, {zPUSH,R_F,0},
+ {zPOP,R_BA,0}, {zPOP,R_HL,0}, {zPOP,R_X,0}, {zPOP,R_Y,0},
+ {zPOP,R_N,0}, {zPOP,R_I,0}, {zPOP,0,0}, {zPOP,R_F,0},
+ /* B0 - BF */
+ {zMOV,R_A,I_8}, {zMOV,R_B,I_8}, {zMOV,R_L,I_8}, {zMOV,R_H,I_8},
+ {zMOV,R_N,I_8}, {zMOV,M_IHL,I_8}, {zMOV,M_X,I_8}, {zMOV,M_Y,I_8},
+ {zMOV,R_BA,M_I16}, {zMOV,R_HL,M_I16}, {zMOV,R_X,M_I16}, {zMOV,R_Y,M_I16},
+ {zMOV,M_I16,R_BA}, {zMOV,M_I16,R_HL}, {zMOV,M_I16,R_X}, {zMOV,M_I16,R_Y},
+ /* C0 - CF */
+ {zADD,R_BA,I_16}, {zADD,R_HL,I_16}, {zADD,R_X,I_16}, {zADD,R_Y,I_16},
+ {zMOV,R_BA,I_16}, {zMOV,R_HL,I_16}, {zMOV,R_X,I_16}, {zMOV,R_Y,I_16},
+ {zXCHG,R_BA,R_HL}, {zXCHG,R_BA,R_X}, {zXCHG,R_BA,R_Y}, {zXCHG,R_BA,R_SP},
+ {zXCHG,R_A,R_B}, {zXCHG,R_A,M_IHL}, {zDB,0,0}, {zDB,0,0},
+ /* D0 - DF */
+ {zSUB,R_BA,I_16}, {zSUB,R_HL,I_16}, {zSUB,R_X,I_16}, {zSUB,R_Y,I_16},
+ {zCMP,R_BA,I_16}, {zCMP,R_HL,I_16}, {zCMP,R_X,I_16}, {zCMP,R_Y,I_16},
+ {zAND,M_N8,I_8}, {zOR,M_N8,I_8}, {zXOR,M_N8,I_8}, {zCMP,M_N8,I_8},
+ {zTEST,M_N8,I_8}, {zMOV,M_N8,I_8}, {zBCDE,0,0}, {zBCDD,0,0},
+ /* E0 - EF */
+ {zCALLC,D_8,0}, {zCALLNC,D_8,0}, {zCALLZ,D_8,0}, {zCALLNZ,D_8,0},
+ {zJC,D_8,0}, {zJNC,D_8,0}, {zJZ,D_8,0}, {zJNZ,D_8,0},
+ {zCALLC,D_16,0}, {zCALLNC,D_16,0}, {zCALLZ,D_16,0}, {zCALLNZ,D_16,0},
+ {zJC,D_16,0}, {zJNC,D_16,0}, {zJZ,D_16,0}, {zJNZ,D_16,0},
+ /* F0 - FF */
+ {zCALL,D_8,0}, {zJMP,D_8,0}, {zCALL,D_16}, {zJMP,D_16},
+ {zJMP,R_HL,0}, {zJDBNZ,D_8,0}, {zBCDX,R_A,0}, {zBCDX,M_IHL,0},
+ {zRET,0,0}, {zRETI,0,0}, {zRETSKIP,0,0}, {zCALL,M_I16},
+ {zINT,I_8,0}, {zJINT,I_8,0}, {zDB,OP,0}, {zNOP,0,0}
+};
+
+static const minxdasm mnemonic_ce[256] = {
+ /* 00 - 0F */
+ {zADD,R_A,M_X8}, {zADD,R_A,M_Y8}, {zADD,R_A,M_XL}, {zADD,R_A,M_YL},
+ {zADD,M_IHL,R_A}, {zADD,M_IHL,I_8}, {zADD,M_IHL,M_X}, {zADD,M_IHL,M_Y},
+ {zADDC,R_A,M_X8}, {zADDC,R_A,M_Y8}, {zADDC,R_A,M_XL}, {zADDC,R_A,M_YL},
+ {zADDC,M_IHL,R_A}, {zADDC,M_IHL,I_8}, {zADDC,M_IHL,M_X}, {zADDC,M_IHL,M_Y},
+ /* 10 - 1F */
+ {zSUB,R_A,M_X8}, {zSUB,R_A,M_Y8}, {zSUB,R_A,M_XL}, {zSUB,R_A,M_YL},
+ {zSUB,M_IHL,R_A}, {zSUB,M_IHL,I_8}, {zSUB,M_IHL,M_X}, {zSUB,M_IHL,M_Y},
+ {zSUBC,R_A,M_X8}, {zSUBC,R_A,M_Y8}, {zSUBC,R_A,M_XL}, {zSUBC,R_A,M_YL},
+ {zSUBC,M_IHL,R_A}, {zSUBC,M_IHL,I_8}, {zSUBC,M_IHL,M_X}, {zSUBC,M_IHL,M_Y},
+ /* 20 - 2F */
+ {zAND,R_A,M_X8}, {zAND,R_A,M_Y8}, {zAND,R_A,M_XL}, {zAND,R_A,M_YL},
+ {zAND,M_IHL,R_A}, {zAND,M_IHL,I_8}, {zAND,M_IHL,M_X}, {zAND,M_IHL,M_Y},
+ {zOR,R_A,M_X8}, {zOR,R_A,M_Y8}, {zOR,R_A,M_XL}, {zOR,R_A,M_YL},
+ {zOR,M_IHL,R_A}, {zOR,M_IHL,I_8}, {zOR,M_IHL,M_X}, {zOR,M_IHL,M_Y},
+ /* 30 - 3F */
+ {zCMP,R_A,M_X8}, {zCMP,R_A,M_Y8}, {zCMP,R_A,M_XL}, {zCMP,R_A,M_YL},
+ {zCMP,M_IHL,R_A}, {zCMP,M_IHL,I_8}, {zCMP,M_IHL,M_X}, {zCMP,M_IHL,M_Y},
+ {zXOR,R_A,M_X8}, {zXOR,R_A,M_Y8}, {zXOR,R_A,M_XL}, {zXOR,R_A,M_YL},
+ {zXOR,M_IHL,R_A}, {zXOR,M_IHL,I_8}, {zXOR,M_IHL,M_X}, {zXOR,M_IHL,M_Y},
+ /* 40 - 4F */
+ {zMOV,R_A,M_X8}, {zMOV,R_A,M_Y8}, {zMOV,R_A,M_XL}, {zMOV,R_A,M_YL},
+ {zMOV,M_X8,R_A}, {zMOV,M_Y8,R_A}, {zMOV,M_X,R_A}, {zMOV,M_Y,R_A},
+ {zMOV,R_B,M_X8}, {zMOV,R_B,M_Y8}, {zMOV,R_B,M_XL}, {zMOV,R_B,M_YL},
+ {zMOV,M_X8,R_B}, {zMOV,M_Y8,R_B}, {zMOV,M_X,R_B}, {zMOV,M_Y,R_B},
+ /* 50 - 5F */
+ {zMOV,R_L,M_X8}, {zMOV,R_L,M_Y8}, {zMOV,R_L,M_XL}, {zMOV,R_L,M_YL},
+ {zMOV,M_X8,R_L}, {zMOV,M_Y8,R_L}, {zMOV,M_X,R_L}, {zMOV,M_Y,R_L},
+ {zMOV,R_H,M_X8}, {zMOV,R_H,M_Y8}, {zMOV,R_H,M_XL}, {zMOV,R_H,M_YL},
+ {zMOV,M_X8,R_H}, {zMOV,M_Y8,R_H}, {zMOV,M_X,R_H}, {zMOV,M_Y,R_H},
+ /* 60 - 6F */
+ {zMOV,M_IHL,M_X8}, {zMOV,M_IHL,M_Y8}, {zMOV,M_IHL,M_XL}, {zMOV,M_IHL,M_YL},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zMOV,M_X,M_X8}, {zMOV,M_X,M_Y8}, {zMOV,M_X,M_XL}, {zMOV,M_X,M_YL},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 70 - 7F */
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zMOV,M_Y,M_X8}, {zMOV,M_Y,M_Y8}, {zMOV,M_Y,M_XL}, {zMOV,M_Y,M_YL},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 80 - 8F */
+ {zSAL,R_A,0}, {zSAL,R_B,0}, {zSAL,M_N8,0}, {zSAL,M_IHL,0},
+ {zSHL,R_A,0}, {zSHL,R_B,0}, {zSHL,M_N8,0}, {zSHL,M_IHL,0},
+ {zSAR,R_A,0}, {zSAR,R_B,0}, {zSAR,M_N8,0}, {zSAR,M_IHL,0},
+ {zSHR,R_A,0}, {zSHR,R_B,0}, {zSHR,M_N8,0}, {zSHR,M_IHL,0},
+ /* 90 - 9F */
+ {zROLC,R_A,0}, {zROLC,R_B,0}, {zROLC,M_N8,0}, {zROLC,M_IHL,0},
+ {zROL,R_A,0}, {zROL,R_B,0}, {zROL,M_N8,0}, {zROL,M_IHL,0},
+ {zRORC,R_A,0}, {zRORC,R_B,0}, {zRORC,M_N8,0}, {zRORC,M_IHL,0},
+ {zROR,R_A,0}, {zROR,R_B,0}, {zROR,M_N8,0}, {zROR,M_IHL,0},
+ /* A0 - AF */
+ {zNOT,R_A,0}, {zNOT,R_B,0}, {zNOT,M_N8,0}, {zNOT,M_IHL,0},
+ {zNEG,R_A,0}, {zNEG,R_B,0}, {zNEG,M_N8,0}, {zNEG,M_IHL,0},
+ {zEXT,R_BA,R_A}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zHALT,0,0}, {zNOP,0,0},
+ /* B0 - BF */
+ {zAND,R_B,I_8}, {zAND,R_L,I_8}, {zAND,R_H,I_8}, {zDB,OP1,OP},
+ {zOR,R_B,I_8}, {zOR,R_L,I_8}, {zOR,R_H,I_8}, {zDB,OP1,OP},
+ {zXOR,R_B,I_8}, {zXOR,R_L,I_8}, {zXOR,R_H,I_8}, {zDB,OP1,OP},
+ {zCMP,R_B,I_8}, {zCMP,R_L,I_8}, {zCMP,R_H,I_8}, {zCMP,R_N,I_8},
+ /* C0 - CF */
+ {zMOV,R_A,R_N}, {zMOV,R_A,R_F}, {zMOV,R_N,R_A}, {zMOV,R_F,R_A},
+ {zMOV,R_U,I_8}, {zMOV,R_I,I_8}, {zMOV,R_XI,I_8}, {zMOV,R_YI,I_8},
+ {zMOV,R_A,R_V}, {zMOV,R_A,R_I}, {zMOV,R_A,R_XI}, {zMOV,R_A,R_YI},
+ {zMOV,R_U,R_A}, {zMOV,R_I,R_A}, {zMOV,R_XI,R_A}, {zMOV,R_YI,R_A},
+ /* D0 - DF */
+ {zMOV,R_A,M_16}, {zMOV,R_B,M_16}, {zMOV,R_H,M_16}, {zMOV,R_L,M_16},
+ {zMOV,M_16,R_A}, {zMOV,M_16,R_B}, {zMOV,M_16,R_H}, {zMOV,M_16,R_L},
+ {zMUL,R_HL,R_A}, {zDIV,R_HL,R_A}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* E0 - EF */
+ {zJL,D_8,0}, {zJLE,D_8,0}, {zJG,D_8,0}, {zJGE,D_8,0},
+ {zJO,D_8,0}, {zJNO,D_8,0}, {zJP,D_8,0}, {zJN,D_8,0},
+ {zJNX0,D_8,0}, {zJNX1,D_8,0}, {zJNX2,D_8,0}, {zJNX3,D_8,0},
+ {zJX0,D_8,0}, {zJX1,D_8,0}, {zJX2,D_8,0}, {zJX3,D_8,0},
+ /* F0 - FF */
+ {zCALLL,D_8,0}, {zCALLLE,D_8,0}, {zCALLG,D_8,0}, {zCALLGE,D_8,0},
+ {zCALLO,D_8,0}, {zCALLNO,D_8,0}, {zCALLP,D_8,0}, {zCALLN,D_8,0},
+ {zCALLNX0,D_8,0}, {zCALLNX1,D_8,0}, {zCALLNX2,D_8,0}, {zCALLNX3,D_8,0},
+ {zCALLX0,D_8,0}, {zCALLX1,D_8,0}, {zCALLX2,D_8,0}, {zCALLX3,D_8,0}
+};
+
+static const minxdasm mnemonic_cf[256] = {
+ /* 00 - 0F */
+ {zADD,R_BA,R_BA}, {zADD,R_BA,R_HL}, {zADD,R_BA,R_X}, {zADD,R_BA,R_Y},
+ {zADDC,R_BA,R_BA}, {zADDC,R_BA,R_HL}, {zADDC,R_BA,R_X}, {zADDC,R_BA,R_Y},
+ {zSUB,R_BA,R_BA}, {zSUB,R_BA,R_HL}, {zSUB,R_BA,R_X}, {zSUB,R_BA,R_Y},
+ {zSUBC,R_BA,R_BA}, {zSUBC,R_BA,R_HL}, {zSUBC,R_BA,R_X}, {zSUBC,R_BA,R_Y},
+ /* 10 - 1F */
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zCMP,R_BA,R_BA}, {zCMP,R_BA,R_HL}, {zCMP,R_BA,R_X}, {zCMP,R_BA,R_Y},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 20 - 2F */
+ {zADD,R_HL,R_BA}, {zADD,R_HL,R_HL}, {zADD,R_HL,R_X}, {zADD,R_HL,R_Y},
+ {zADDC,R_HL,R_BA}, {zADDC,R_HL,R_HL}, {zADDC,R_HL,R_X}, {zADDC,R_HL,R_Y},
+ {zSUB,R_HL,R_BA}, {zSUB,R_HL,R_HL}, {zSUB,R_HL,R_X}, {zSUB,R_HL,R_Y},
+ {zSUBC,R_HL,R_BA}, {zSUBC,R_HL,R_HL}, {zSUBC,R_HL,R_X}, {zSUBC,R_HL,R_Y},
+ /* 30 - 3F */
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zCMP,R_HL,R_BA}, {zCMP,R_HL,R_HL}, {zCMP,R_HL,R_X}, {zCMP,R_HL,R_Y},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 40 - 4F */
+ {zADD,R_X,R_BA}, {zADD,R_X,R_HL}, {zADD,R_Y,R_BA}, {zADD,R_Y,R_HL},
+ {zADD,R_SP,R_BA}, {zADD,R_SP,R_HL}, {zDB,OP1,}, {zDB,OP1,OP},
+ {zSUB,R_X,R_BA}, {zSUB,R_X,R_HL}, {zSUB,R_Y,R_BA}, {zSUB,R_Y,R_HL},
+ {zSUB,R_SP,R_BA}, {zSUB,R_SP,R_HL}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 50 - 5F */
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zCMP,R_SP,R_BA}, {zCMP,R_SP,R_HL}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 60 - 6F */
+ {zCMPN,R_BA,I_16}, {zCMPN,R_HL,I_16}, {zCMPN,R_X,I_16}, {zCMPN,R_Y,I_16},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zADD,R_SP,I_16}, {zDB,OP1,OP}, {zSUB,R_SP,I_16}, {zDB,OP1,OP},
+ {zCMP,R_SP,I_16}, {zDB,OP1,OP}, {zMOV,R_SP,I_16}, {zDB,OP1,OP},
+ /* 70 - 7F */
+ {zMOV,R_BA,S_8}, {zMOV,R_HL,S_8}, {zMOV,R_X,S_8}, {zMOV,R_Y,S_8},
+ {zMOV,S_8,R_BA}, {zMOV,S_8,R_HL}, {zMOV,S_8,R_X}, {zMOV,S_8,R_Y},
+ {zMOV,R_SP,M_I16}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zMOV,M_I16,R_SP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 80 - 8F */
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* 90 - 9F */
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* A0 - AF */
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* B0 - BF */
+ {zPUSH,R_A,0}, {zPUSH,R_B,0}, {zPUSH,R_L,0}, {zPUSH,R_H,0},
+ {zPOP,R_A,0}, {zPOP,R_B,0}, {zPOP,R_L,0}, {zPOP,R_H,0},
+ {zPUSHA,0,0}, {zPUSHAX,0,0}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zPOPA,0,0}, {zPOPAX,0,0}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* C0 - CF */
+ {zMOV,R_BA,M_HL}, {zMOV,R_HL,M_HL}, {zMOV,R_X,M_HL}, {zMOV,R_Y,M_HL},
+ {zMOV,M_HL,R_BA}, {zMOV,M_HL,R_HL}, {zMOV,M_HL,R_X}, {zMOV,M_HL,R_Y},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ /* D0 - DF */
+ {zMOV,R_BA,M_X}, {zMOV,R_HL,M_X}, {zMOV,R_X,M_X}, {zMOV,R_Y,M_X},
+ {zMOV,M_X,R_BA}, {zMOV,M_X,R_HL}, {zMOV,M_X,R_X}, {zMOV,M_X,R_Y},
+ {zMOV,R_BA,M_Y}, {zMOV,R_HL,M_Y}, {zMOV,R_X,M_Y}, {zMOV,R_Y,M_Y},
+ {zMOV,M_Y,R_BA}, {zMOV,M_Y,R_HL}, {zMOV,M_Y,R_X}, {zMOV,M_Y,R_Y},
+ /* E0 - EF */
+ {zMOV,R_BA,R_BA}, {zMOV,R_BA,R_HL}, {zMOV,R_BA,R_X}, {zMOV,R_BA,R_Y},
+ {zMOV,R_HL,R_BA}, {zMOV,R_HL,R_HL}, {zMOV,R_HL,R_X}, {zMOV,R_HL,R_Y},
+ {zMOV,R_X,R_BA}, {zMOV,R_X,R_HL}, {zMOV,R_X,R_X}, {zMOV,R_X,R_Y},
+ {zMOV,R_Y,R_BA}, {zMOV,R_Y,R_HL}, {zMOV,R_Y,R_X}, {zMOV,R_Y,R_Y},
+ /* F0 - FF */
+ {zMOV,R_SP,R_BA}, {zMOV,R_SP,R_HL}, {zMOV,R_SP,R_X}, {zMOV,R_SP,R_Y},
+ {zMOV,R_HL,R_SP}, {zMOV,R_HL,R_PC}, {zDB,OP1,OP}, {zDB,OP1,OP},
+ {zMOV,R_BA,R_SP}, {zMOV,R_BA,R_PC}, {zMOV,R_X,R_SP}, {zDB,OP1,OP},
+ {zDB,OP1,OP}, {zDB,OP1,OP}, {zMOV,R_Y,R_SP}, {zDB,OP1,OP}
+};
+
+#define HANDLE_ARGUMENT \
+case R_A: dst += sprintf( dst, "%cA", fill ); break; \
+case R_B: dst += sprintf( dst, "%cB", fill ); break; \
+case R_L: dst += sprintf( dst, "%cL", fill ); break; \
+case R_H: dst += sprintf( dst, "%cH", fill ); break; \
+case R_N: dst += sprintf( dst, "%cN", fill ); break; \
+case R_F: dst += sprintf( dst, "%cF", fill ); break; \
+case R_SP: dst += sprintf( dst, "%cSP", fill ); break; \
+case R_BA: dst += sprintf( dst, "%cBA", fill ); break; \
+case R_HL: dst += sprintf( dst, "%cHL", fill ); break; \
+case R_X: dst += sprintf( dst, "%cX", fill ); break; \
+case R_Y: dst += sprintf( dst, "%cY", fill ); break; \
+case R_U: dst += sprintf( dst, "%cU", fill ); break; \
+case R_V: dst += sprintf( dst, "%cV", fill ); break; \
+case R_I: dst += sprintf( dst, "%cI", fill ); break; \
+case R_XI: dst += sprintf( dst, "%cXI", fill ); break; \
+case R_YI: dst += sprintf( dst, "%cYI", fill ); break; \
+case R_PC: dst += sprintf( dst, "%cPC", fill ); break; \
+case I_8: /* 8 bit immediate */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c$%02X", fill, ea ); \
+ break; \
+case I_16: /* 16 bit immediate */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ dst += sprintf( dst, "%c$%04X", fill, ea ); \
+ break; \
+case D_8: /* PC + 8 bit displacement (signed) */ \
+ ofs8 = oprom[pos++]; \
+ dst += sprintf( dst, "%c$%04X", fill, pc + pos - 1 + ofs8 ); \
+ break; \
+case D_16: /* PC + 16 bit displacement */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ ea = ea - 1; \
+ dst += sprintf( dst, "%c$%04X", fill, pc + pos + ea ); \
+ break; \
+case S_8: /* SP + 8 bit displacement (signed) */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%cSP+$%02X", fill, ea ); \
+ break; \
+case M_IHL: dst += sprintf( dst, "%c[I+HL]", fill ); break; \
+case M_N8: /* [I+N+ofs8] */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c[I+N+$%02X]", fill, ea ); \
+ break; \
+case M_I16: /* [I+ofs16] */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ dst += sprintf( dst, "%c[I+$%04X]", fill, ea ); \
+ break; \
+case M_X: dst += sprintf( dst, "%c[X]", fill ); break; \
+case M_Y: dst += sprintf( dst, "%c[Y]", fill ); break; \
+case M_X8: /* [X + 8 bit displacement (signed)] */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c[X+$%02X]", fill, ea ); \
+ break; \
+case M_Y8: /* [Y + 8 bit displacement (signed)] */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c[Y+$%02X]", fill, ea ); \
+ break; \
+case M_XL: dst += sprintf( dst, "%c[X+L]", fill ); break; \
+case M_YL: dst += sprintf( dst, "%c[Y+L]", fill ); break; \
+case M_16: /* [16bit] */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ dst += sprintf( dst, "%c[$%04X]", fill, ea ); \
+ break; \
+case M_HL: dst += sprintf( dst, "%c[HL]", fill ); break; \
+case OP: dst += sprintf( dst, "%c$%02X", fill, op ); break; \
+case OP1: dst += sprintf( dst, "%c$%02X", fill, op1 ); break;
+
+CPU_DISASSEMBLE( minx )
+{
+ const minxdasm *instr;
+ UINT8 op, op1;
+ INT8 ofs8 = 0;
+ UINT16 ea = 0;
+ int pos = 0;
+ char *dst = buffer;
+
+ op1 = op = oprom[pos++];
+
+ switch (op) {
+ case 0xCE:
+ op = oprom[pos++];
+ instr = &mnemonic_ce[op];
+ break;
+ case 0xCF:
+ op = oprom[pos++];
+ instr = &mnemonic_cf[op];
+ break;
+ default:
+ instr = &mnemonic[op];
+ break;
+ }
+
+ dst += sprintf( dst, "%-6s", s_mnemonic[ instr->mnemonic ] );
+
+ if ( instr->argument1 ) {
+ char fill = ' ';
+ //int arg = 0;
+ switch( instr->argument1 ) {
+ HANDLE_ARGUMENT;
+ }
+ }
+ if ( instr->argument2 ) {
+ char fill = ',';
+ //int arg = 1;
+ switch( instr->argument2 ) {
+ HANDLE_ARGUMENT;
+ }
+ }
+ return pos | s_flags[instr->mnemonic] | DASMFLAG_SUPPORTED;
+}
diff --git a/src/devices/cpu/minx/minxfunc.h b/src/devices/cpu/minx/minxfunc.h
new file mode 100644
index 00000000000..45478bc6667
--- /dev/null
+++ b/src/devices/cpu/minx/minxfunc.h
@@ -0,0 +1,364 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+UINT8 minx_cpu_device::ADD8( UINT8 arg1, UINT8 arg2 )
+{
+ UINT32 res = arg1 + arg2;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ^ 0x80 ) & ( arg2 ^ res ) & 0x80 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF00 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT16 minx_cpu_device::ADD16( UINT16 arg1, UINT16 arg2 )
+{
+ UINT32 res = arg1 + arg2;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x8000 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ^ 0x8000 ) & ( arg2 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFFFF;
+}
+
+
+UINT8 minx_cpu_device::ADDC8( UINT8 arg1, UINT8 arg2 )
+{
+ UINT32 res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ^ 0x80 ) & ( arg2 ^ res ) & 0x80 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF00 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT16 minx_cpu_device::ADDC16( UINT16 arg1, UINT16 arg2 )
+{
+ UINT32 res = arg1 + arg2 + ( ( m_F & FLAG_C ) ? 1 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x8000 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ^ 0x8000 ) & ( arg2 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFFFF;
+}
+
+
+UINT8 minx_cpu_device::INC8( UINT8 arg )
+{
+ UINT8 old_F = m_F;
+ UINT8 res = ADD8( arg, 1 );
+ m_F = ( old_F & ~ ( FLAG_Z ) )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT16 minx_cpu_device::INC16( UINT16 arg )
+{
+ UINT8 old_F = m_F;
+ UINT16 res = ADD16( arg, 1 );
+ m_F = ( old_F & ~ ( FLAG_Z ) )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::SUB8( UINT8 arg1, UINT8 arg2 )
+{
+ UINT32 res = arg1 - arg2;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x80 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF00 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT16 minx_cpu_device::SUB16( UINT16 arg1, UINT16 arg2 )
+{
+ UINT32 res = arg1 - arg2;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x8000 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFFFF;
+}
+
+
+UINT8 minx_cpu_device::SUBC8( UINT8 arg1, UINT8 arg2 )
+{
+ UINT32 res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x80 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF00 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT16 minx_cpu_device::SUBC16( UINT16 arg1, UINT16 arg2 )
+{
+ UINT32 res = arg1 - arg2 - ( ( m_F & FLAG_C ) ? 1 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x8000 ) ? FLAG_S : 0 )
+ | ( ( ( arg2 ^ arg1 ) & ( arg1 ^ res ) & 0x8000 ) ? FLAG_O : 0 )
+ | ( ( res & 0xFF0000 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFFFF;
+}
+
+
+UINT8 minx_cpu_device::DEC8( UINT8 arg )
+{
+ UINT8 old_F = m_F;
+ UINT8 res = SUB8( arg, 1 );
+ m_F = ( old_F & ~ ( FLAG_Z ) )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT16 minx_cpu_device::DEC16( UINT16 arg )
+{
+ UINT8 old_F = m_F;
+ UINT16 res = SUB16( arg, 1 );
+ m_F = ( old_F & ~ ( FLAG_Z ) )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::AND8( UINT8 arg1, UINT8 arg2 )
+{
+ UINT8 res = arg1 & arg2;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::OR8( UINT8 arg1, UINT8 arg2 )
+{
+ UINT8 res = arg1 | arg2;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::XOR8( UINT8 arg1, UINT8 arg2 )
+{
+ UINT8 res = arg1 ^ arg2;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::NOT8( UINT8 arg )
+{
+ UINT8 res = ~arg;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::NEG8( UINT8 arg )
+{
+ UINT8 res = -arg;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::SAL8( UINT8 arg )
+{
+ UINT16 res = arg << 1;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg != 0 && res == 0 ) ? FLAG_O : 0 )
+ | ( ( arg & 0x80 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::SAR8( UINT8 arg )
+{
+ UINT16 res = ( arg >> 1 ) | ( arg & 0x80 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg != 0x80 && res == 0x80 ) ? FLAG_O : 0 )
+ | ( ( arg & 0x01 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT8 minx_cpu_device::SHL8( UINT8 arg )
+{
+ UINT16 res = arg << 1;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg & 0x80 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res;
+}
+
+
+UINT8 minx_cpu_device::SHR8( UINT8 arg )
+{
+ UINT16 res = arg >> 1;
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg & 0x01 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT8 minx_cpu_device::ROLC8( UINT8 arg )
+{
+ UINT16 res = ( arg << 1 ) | ( ( m_F & FLAG_C ) ? 1 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg & 0x80 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT8 minx_cpu_device::RORC8( UINT8 arg )
+{
+ UINT16 res = ( arg >> 1 ) | ( ( m_F & FLAG_C ) ? 0x80 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg & 0x01 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT8 minx_cpu_device::ROL8( UINT8 arg )
+{
+ UINT16 res = ( arg << 1 ) | ( ( arg & 0x80 ) ? 1 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg & 0x80 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+UINT8 minx_cpu_device::ROR8( UINT8 arg )
+{
+ UINT16 res = ( arg >> 1 ) | ( ( arg & 0x01 ) ? 0x80 : 0 );
+ m_F = ( m_F & ~ ( FLAG_S | FLAG_C | FLAG_Z ) )
+ | ( ( res & 0x80 ) ? FLAG_S : 0 )
+ | ( ( arg & 0x01 ) ? FLAG_C : 0 )
+ | ( ( res ) ? 0 : FLAG_Z )
+ ;
+ return res & 0xFF;
+}
+
+
+void minx_cpu_device::PUSH8( UINT8 arg )
+{
+ m_SP = m_SP - 1;
+ WR( m_SP, arg );
+}
+
+
+void minx_cpu_device::PUSH16( UINT16 arg )
+{
+ PUSH8( arg >> 8 );
+ PUSH8( arg & 0x00FF );
+}
+
+
+UINT8 minx_cpu_device::POP8()
+{
+ UINT8 res = RD( m_SP );
+ m_SP = m_SP + 1;
+ return res;
+}
+
+
+UINT16 minx_cpu_device::POP16()
+{
+ return POP8() | ( POP8() << 8 );
+}
+
+
+void minx_cpu_device::JMP( UINT16 arg )
+{
+ m_V = m_U;
+ m_PC = arg;
+}
+
+
+void minx_cpu_device::CALL( UINT16 arg )
+{
+ PUSH8( m_V );
+ PUSH16( m_PC );
+ JMP( arg );
+}
+
+
+#define AD1_IHL UINT32 addr1 = ( m_I << 16 ) | m_HL
+#define AD1_IN8 UINT32 addr1 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
+#define AD1_I16 UINT32 addr1 = ( m_I << 16 ) | rdop16()
+#define AD1_XIX UINT32 addr1 = ( m_XI << 16 ) | m_X
+#define AD1_YIY UINT32 addr1 = ( m_YI << 16 ) | m_Y
+#define AD1_X8 UINT32 addr1 = ( m_XI << 16 ) | ( m_X + rdop() )
+#define AD1_Y8 UINT32 addr1 = ( m_YI << 16 ) | ( m_Y + rdop() )
+#define AD1_XL UINT32 addr1 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
+#define AD1_YL UINT32 addr1 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
+#define AD2_IHL UINT32 addr2 = ( m_I << 16 ) | m_HL
+#define AD2_IN8 UINT32 addr2 = ( m_I << 16 ) | ( m_N << 8 ) | rdop()
+#define AD2_I16 UINT32 addr2 = ( m_I << 16 ) | rdop(); addr2 |= ( rdop() << 8 )
+#define AD2_XIX UINT32 addr2 = ( m_XI << 16 ) | m_X
+#define AD2_YIY UINT32 addr2 = ( m_YI << 16 ) | m_Y
+#define AD2_X8 UINT32 addr2 = ( m_XI << 16 ) | ( m_X + rdop() )
+#define AD2_Y8 UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + rdop() )
+#define AD2_XL UINT32 addr2 = ( m_XI << 16 ) | ( m_X + ( m_HL & 0x00FF ) )
+#define AD2_YL UINT32 addr2 = ( m_YI << 16 ) | ( m_Y + ( m_HL & 0x00FF ) )
diff --git a/src/devices/cpu/minx/minxopce.h b/src/devices/cpu/minx/minxopce.h
new file mode 100644
index 00000000000..ec0198273e3
--- /dev/null
+++ b/src/devices/cpu/minx/minxopce.h
@@ -0,0 +1,563 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+
+void minx_cpu_device::execute_one_ce()
+{
+ const UINT8 opcode = rdop();
+
+ switch (opcode)
+ {
+ case 0x00: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x01: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x02: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x03: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x04: { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
+ break;
+ case 0x05: { AD1_IHL; WR( addr1, ADD8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0x06: { AD1_IHL; AD2_XIX; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x07: { AD1_IHL; AD2_YIY; WR( addr1, ADD8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x08: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x09: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x0A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x0B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x0C: { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
+ break;
+ case 0x0D: { AD1_IHL; WR( addr1, ADDC8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0x0E: { AD1_IHL; AD2_XIX; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x0F: { AD1_IHL; AD2_YIY; WR( addr1, ADDC8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+
+ case 0x10: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x11: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x12: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x13: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x14: { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
+ break;
+ case 0x15: { AD1_IHL; WR( addr1, SUB8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0x16: { AD1_IHL; AD2_XIX; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x17: { AD1_IHL; AD2_YIY; WR( addr1, SUB8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x18: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x19: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x1A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x1B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x1C: { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
+ break;
+ case 0x1D: { AD1_IHL; WR( addr1, SUBC8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0x1E: { AD1_IHL; AD2_XIX; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x1F: { AD1_IHL; AD2_YIY; WR( addr1, SUBC8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+
+ case 0x20: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x21: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x22: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x23: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x24: { AD1_IHL; WR( addr1, AND8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
+ break;
+ case 0x25: { AD1_IHL; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0x26: { AD1_IHL; AD2_XIX; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x27: { AD1_IHL; AD2_YIY; WR( addr1, AND8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x28: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x29: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x2A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x2B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x2C: { AD1_IHL; WR( addr1, OR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
+ break;
+ case 0x2D: { AD1_IHL; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0x2E: { AD1_IHL; AD2_XIX; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x2F: { AD1_IHL; AD2_YIY; WR( addr1, OR8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+
+ case 0x30: { AD2_X8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x31: { AD2_Y8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x32: { AD2_XL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x33: { AD2_YL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x34: { AD1_IHL; SUB8( RD( addr1 ), ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x35: { AD1_IHL; SUB8( RD( addr1 ), rdop() ); }
+ break;
+ case 0x36: { AD1_IHL; AD2_XIX; SUB8( RD( addr1 ), RD( addr2 ) ); }
+ break;
+ case 0x37: { AD1_IHL; AD2_YIY; SUB8( RD( addr1 ), RD( addr2 ) ); }
+ break;
+ case 0x38: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x39: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x3A: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x3B: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x3C: { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), ( m_BA & 0x00FF ) ) ); }
+ break;
+ case 0x3D: { AD1_IHL; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0x3E: { AD1_IHL; AD2_XIX; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+ case 0x3F: { AD1_IHL; AD2_YIY; WR( addr1, XOR8( RD( addr1 ), RD( addr2 ) ) ); }
+ break;
+
+ case 0x40: { AD2_X8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x41: { AD2_Y8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x42: { AD2_XL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x43: { AD2_YL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x44: { AD1_X8; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x45: { AD1_Y8; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x46: { AD1_XL; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x47: { AD1_YL; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x48: { AD2_X8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x49: { AD2_Y8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x4A: { AD2_XL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x4B: { AD2_YL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x4C: { AD1_X8; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0x4D: { AD1_Y8; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0x4E: { AD1_XL; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0x4F: { AD1_YL; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+
+ case 0x50: { AD2_X8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x51: { AD2_Y8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x52: { AD2_XL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x53: { AD2_YL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x54: { AD1_X8; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x55: { AD1_Y8; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x56: { AD1_XL; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x57: { AD1_YL; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x58: { AD2_X8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x59: { AD2_Y8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x5A: { AD2_XL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x5B: { AD2_YL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x5C: { AD1_X8; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0x5D: { AD1_Y8; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0x5E: { AD1_XL; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0x5F: { AD1_YL; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+
+ case 0x60: { AD1_IHL; AD2_X8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x61: { AD1_IHL; AD2_Y8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x62: { AD1_IHL; AD2_XL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x63: { AD1_IHL; AD2_YL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x64: { /* illegal operation? */ }
+ break;
+ case 0x65: { /* illegal operation? */ }
+ break;
+ case 0x66: { /* illegal operation? */ }
+ break;
+ case 0x67: { /* illegal operation? */ }
+ break;
+ case 0x68: { AD1_XIX; AD2_X8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x69: { AD1_XIX; AD2_Y8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x6A: { AD1_XIX; AD2_XL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x6B: { AD1_XIX; AD2_YL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x6C: { /* illegal operation? */ }
+ break;
+ case 0x6D: { /* illegal operation? */ }
+ break;
+ case 0x6E: { /* illegal operation? */ }
+ break;
+ case 0x6F: { /* illegal operation? */ }
+ break;
+
+ case 0x70: { /* illegal operation? */ }
+ break;
+ case 0x71: { /* illegal operation? */ }
+ break;
+ case 0x72: { /* illegal operation? */ }
+ break;
+ case 0x73: { /* illegal operation? */ }
+ break;
+ case 0x74: { /* illegal operation? */ }
+ break;
+ case 0x75: { /* illegal operation? */ }
+ break;
+ case 0x76: { /* illegal operation? */ }
+ break;
+ case 0x77: { /* illegal operation? */ }
+ break;
+ case 0x78: { AD1_YIY; AD2_X8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x79: { AD1_YIY; AD2_Y8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x7A: { AD1_YIY; AD2_XL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x7B: { AD1_YIY; AD2_YL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x7C: { /* illegal operation? */ }
+ break;
+ case 0x7D: { /* illegal operation? */ }
+ break;
+ case 0x7E: { /* illegal operation? */ }
+ break;
+ case 0x7F: { /* illegal operation? */ }
+ break;
+
+ case 0x80: { m_BA = ( m_BA & 0xFF00 ) | SAL8( m_BA & 0x00FF ); }
+ break;
+ case 0x81: { m_BA = ( m_BA & 0x00FF ) | ( SAL8( m_BA >> 8 )<< 8 ); }
+ break;
+ case 0x82: { AD1_IN8; WR( addr1, SAL8( RD( addr1 ) ) ); }
+ break;
+ case 0x83: { AD1_IHL; WR( addr1, SAL8( RD( addr1 ) ) ); }
+ break;
+ case 0x84: { m_BA = ( m_BA & 0xFF00 ) | SHL8( m_BA & 0x00FF ); }
+ break;
+ case 0x85: { m_BA = ( m_BA & 0x00FF ) | ( SHL8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x86: { AD1_IN8; WR( addr1, SHL8( RD( addr1 ) ) ); }
+ break;
+ case 0x87: { AD1_IHL; WR( addr1, SHL8( RD( addr1 ) ) ); }
+ break;
+ case 0x88: { m_BA = ( m_BA & 0xFF00 ) | SAR8( m_BA & 0x00FF ); }
+ break;
+ case 0x89: { m_BA = ( m_BA & 0x00FF ) | ( SAR8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x8A: { AD1_IN8; WR( addr1, SAR8( RD( addr1 ) ) ); }
+ break;
+ case 0x8B: { AD1_IHL; WR( addr1, SAR8( RD( addr1 ) ) ); }
+ break;
+ case 0x8C: { m_BA = ( m_BA & 0xFF00 ) | SHR8( m_BA & 0x00FF ); }
+ break;
+ case 0x8D: { m_BA = ( m_BA & 0x00FF ) | ( SHR8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x8E: { AD1_IN8; WR( addr1, SHR8( RD( addr1 ) ) ); }
+ break;
+ case 0x8F: { AD1_IHL; WR( addr1, SHR8( RD( addr1 ) ) ); }
+ break;
+
+ case 0x90: { m_BA = ( m_BA & 0xFF00 ) | ROLC8( m_BA & 0x00FF ); }
+ break;
+ case 0x91: { m_BA = ( m_BA & 0x00FF ) | ( ROLC8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x92: { AD1_IN8; WR( addr1, ROLC8( RD( addr1 ) ) ); }
+ break;
+ case 0x93: { AD1_IHL; WR( addr1, ROLC8( RD( addr1 ) ) ); }
+ break;
+ case 0x94: { m_BA = ( m_BA & 0xFF00 ) | ROL8( m_BA & 0x00FF ); }
+ break;
+ case 0x95: { m_BA = ( m_BA & 0x00FF ) | ( ROL8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x96: { AD1_IN8; WR( addr1, ROL8( RD( addr1 ) ) ); }
+ break;
+ case 0x97: { AD1_IHL; WR( addr1, ROL8( RD( addr1 ) ) ); }
+ break;
+ case 0x98: { m_BA = ( m_BA & 0xFF00 ) | RORC8( m_BA & 0x00FF ); }
+ break;
+ case 0x99: { m_BA = ( m_BA & 0x00FF ) | ( RORC8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x9A: { AD1_IN8; WR( addr1, RORC8( RD( addr1 ) ) ); }
+ break;
+ case 0x9B: { AD1_IHL; WR( addr1, RORC8( RD( addr1 ) ) ); }
+ break;
+ case 0x9C: { m_BA = ( m_BA & 0xFF00 ) | ROR8( m_BA & 0x00FF ); }
+ break;
+ case 0x9D: { m_BA = ( m_BA & 0x00FF ) | ( ROR8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x9E: { AD1_IN8; WR( addr1, ROR8( RD( addr1 ) ) ); }
+ break;
+ case 0x9F: { AD1_IHL; WR( addr1, ROR8( RD( addr1 ) ) ); }
+ break;
+
+ case 0xA0: { m_BA = ( m_BA & 0xFF00 ) | NOT8( m_BA & 0x00FF ); }
+ break;
+ case 0xA1: { m_BA = ( m_BA & 0x00FF ) | ( NOT8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0xA2: { AD1_IN8; WR( addr1, NOT8( RD( addr1 ) ) ); }
+ break;
+ case 0xA3: { AD1_IHL; WR( addr1, NOT8( RD( addr1 ) ) ); }
+ break;
+ case 0xA4: { m_BA = ( m_BA & 0xFF00 ) | NEG8( m_BA & 0x00FF ); }
+ break;
+ case 0xA5: { m_BA = ( m_BA & 0x00FF ) | ( NEG8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0xA6: { AD1_IN8; WR( addr1, NEG8( RD( addr1 ) ) ); }
+ break;
+ case 0xA7: { AD1_IHL; WR( addr1, NEG8( RD( addr1 ) ) ); }
+ break;
+ case 0xA8: { m_BA = ( ( m_BA & 0x0080 ) ? ( 0xFF00 | m_BA ) : ( m_BA & 0x00FF ) ); }
+ break;
+ case 0xA9: { /* illegal operation? */ }
+ break;
+ case 0xAA: { /* illegal operation? */ }
+ break;
+ case 0xAB: { /* illegal operation? */ }
+ break;
+ case 0xAC: { /* illegal operation? */ }
+ break;
+ case 0xAD: { /* illegal operation? */ }
+ break;
+ case 0xAE: { /* HALT */ m_halted = 1; }
+ break;
+ case 0xAF: { }
+ break;
+
+ case 0xB0: { m_BA = ( m_BA & 0x00FF ) | ( AND8( ( m_BA >> 8 ), rdop() ) << 8 ); }
+ break;
+ case 0xB1: { m_HL = ( m_HL & 0xFF00 ) | AND8( ( m_HL & 0x00FF ), rdop() ); }
+ break;
+ case 0xB2: { m_HL = ( m_HL & 0x00FF ) | ( AND8( ( m_HL >> 8 ), rdop() ) << 8 ); }
+ break;
+ case 0xB3: { /* illegal operation? */ }
+ break;
+ case 0xB4: { m_BA = ( m_BA & 0x00FF ) | ( OR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
+ break;
+ case 0xB5: { m_HL = ( m_HL & 0xFF00 ) | OR8( ( m_HL & 0x00FF ), rdop() ); }
+ break;
+ case 0xB6: { m_HL = ( m_HL & 0x00FF ) | ( OR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
+ break;
+ case 0xB7: { /* illegal operation? */ }
+ break;
+ case 0xB8: { m_BA = ( m_BA & 0x00FF ) | ( XOR8( ( m_BA >> 8 ), rdop() ) << 8 ); }
+ break;
+ case 0xB9: { m_HL = ( m_HL & 0xFF00 ) | XOR8( ( m_HL & 0x00FF ), rdop() ); }
+ break;
+ case 0xBA: { m_HL = ( m_HL & 0x00FF ) | ( XOR8( ( m_HL >> 8 ), rdop() ) << 8 ); }
+ break;
+ case 0xBB: { /* illegal operation? */ }
+ break;
+ case 0xBC: { SUB8( ( m_BA >> 8 ), rdop() ); }
+ break;
+ case 0xBD: { SUB8( ( m_HL & 0x00FF), rdop() ); }
+ break;
+ case 0xBE: { SUB8( ( m_HL >> 8 ), rdop() ); }
+ break;
+ case 0xBF: { SUB8( m_N, rdop() ); }
+ break;
+
+ case 0xC0: { m_BA = ( m_BA & 0xFF00 ) | m_N; }
+ break;
+ case 0xC1: { m_BA = ( m_BA & 0xFF00 ) | m_F; }
+ break;
+ case 0xC2: { m_N = ( m_BA & 0x00FF ); }
+ break;
+ case 0xC3: { m_F = ( m_BA & 0x00FF ); }
+ break;
+ case 0xC4: { m_U = rdop(); }
+ break;
+ case 0xC5: { m_I = rdop(); }
+ break;
+ case 0xC6: { m_XI = rdop(); }
+ break;
+ case 0xC7: { m_YI = rdop(); }
+ break;
+ case 0xC8: { m_BA = ( m_BA & 0xFF00 ) | m_V; }
+ break;
+ case 0xC9: { m_BA = ( m_BA & 0xFF00 ) | m_I; }
+ break;
+ case 0xCA: { m_BA = ( m_BA & 0xFF00 ) | m_XI; }
+ break;
+ case 0xCB: { m_BA = ( m_BA & 0xFF00 ) | m_YI; }
+ break;
+ case 0xCC: { m_U = ( m_BA & 0x00FF ); }
+ break;
+ case 0xCD: { m_I = ( m_BA & 0x00FF ); }
+ break;
+ case 0xCE: { m_XI = ( m_BA & 0x00FF ); }
+ break;
+ case 0xCF: { m_YI = ( m_BA & 0x00FF ); }
+ break;
+
+ case 0xD0: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0xD1: { AD2_I16; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0xD2: { AD2_I16; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0xD3: { AD2_I16; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0xD4: { AD1_I16; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0xD5: { AD1_I16; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0xD6: { AD1_I16; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0xD7: { AD1_I16; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0xD8: { m_HL = ( m_HL & 0x00FF ) * ( m_BA & 0x00FF ); }
+ break;
+ case 0xD9: { int d = m_HL / ( m_BA & 0x00FF ); m_HL = ( ( m_HL - ( ( m_BA & 0x00FF ) * d ) ) << 8 ) | d; }
+ break;
+ case 0xDA: { /* illegal operation? */ }
+ break;
+ case 0xDB: { /* illegal operation? */ }
+ break;
+ case 0xDC: { /* illegal operation? */ }
+ break;
+ case 0xDD: { /* illegal operation? */ }
+ break;
+ case 0xDE: { /* illegal operation? */ }
+ break;
+ case 0xDF: { /* illegal operation? */ }
+ break;
+
+ case 0xE0: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE1: { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE2: { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE3: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE4: { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE6: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE7: { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE8: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE9: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xEA: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xEB: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xEC: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xED: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xEE: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xEF: { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+
+ case 0xF0: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF1: { INT8 d8 = rdop(); if ( ( m_F & FLAG_Z ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_S ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF2: { INT8 d8 = rdop(); if ( !( m_F & FLAG_Z ) && ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF3: { INT8 d8 = rdop(); if ( ( ( m_F & ( FLAG_S | FLAG_O ) ) == 0 ) || ( ( m_F & ( FLAG_S | FLAG_O ) ) == ( FLAG_S | FLAG_O ) ) ) { CALL( m_PC + d8 - 1 ); } }
+ break;
+ case 0xF4: { INT8 d8 = rdop(); if ( ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_O ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF6: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF7: { INT8 d8 = rdop(); if ( ( m_F & FLAG_S ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF8: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xF9: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xFA: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xFB: { INT8 d8 = rdop(); if ( ! ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xFC: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X0 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xFD: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X1 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xFE: { INT8 d8 = rdop(); if ( ( m_E & EXEC_X2 ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xFF: { INT8 d8 = rdop(); if ( ( m_E & EXEC_DZ ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ }
+
+ m_icount -= insnminx_cycles_CE[opcode];
+}
+
+
+const int minx_cpu_device::insnminx_cycles_CE[256] = {
+ 16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
+ 16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
+ 16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
+ 16, 16, 16, 16, 16, 20, 20, 20, 16, 16, 16, 16, 16, 20, 20, 20,
+
+ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
+ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
+ 20, 20, 20, 20, 1, 1, 1, 1, 20, 20, 20, 20, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 20, 20, 20, 20, 1, 1, 1, 1,
+
+ 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16,
+ 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16,
+ 12, 12, 20, 16, 12, 12, 20, 16, 12, 1, 1, 1, 1, 1, 8, 8,
+ 12, 12, 12, 1, 12, 12, 12, 1, 20, 20, 20, 20, 12, 12, 12, 1,
+
+ 8, 8, 8, 12, 16, 12, 12, 12, 8, 8, 8, 8, 12, 8, 8, 8,
+ 20, 20, 20, 20, 20, 20, 20, 20, 48, 52, 1, 1, 1, 1, 1, 1,
+ 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
+};
diff --git a/src/devices/cpu/minx/minxopcf.h b/src/devices/cpu/minx/minxopcf.h
new file mode 100644
index 00000000000..f81d991304a
--- /dev/null
+++ b/src/devices/cpu/minx/minxopcf.h
@@ -0,0 +1,563 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+
+void minx_cpu_device::execute_one_cf()
+{
+ const UINT8 opcode = rdop();
+
+ switch (opcode)
+ {
+ case 0x00: { m_BA = ADD16( m_BA, m_BA ); }
+ break;
+ case 0x01: { m_BA = ADD16( m_BA, m_HL ); }
+ break;
+ case 0x02: { m_BA = ADD16( m_BA, m_X ); }
+ break;
+ case 0x03: { m_BA = ADD16( m_BA, m_Y ); }
+ break;
+ case 0x04: { m_BA = ADDC16( m_BA, m_BA ); }
+ break;
+ case 0x05: { m_BA = ADDC16( m_BA, m_HL ); }
+ break;
+ case 0x06: { m_BA = ADDC16( m_BA, m_X ); }
+ break;
+ case 0x07: { m_BA = ADDC16( m_BA, m_Y ); }
+ break;
+ case 0x08: { m_BA = SUB16( m_BA, m_BA ); }
+ break;
+ case 0x09: { m_BA = SUB16( m_BA, m_HL ); }
+ break;
+ case 0x0A: { m_BA = SUB16( m_BA, m_X ); }
+ break;
+ case 0x0B: { m_BA = SUB16( m_BA, m_Y ); }
+ break;
+ case 0x0C: { m_BA = SUBC16( m_BA, m_BA ); }
+ break;
+ case 0x0D: { m_BA = SUBC16( m_BA, m_HL ); }
+ break;
+ case 0x0E: { m_BA = SUBC16( m_BA, m_X ); }
+ break;
+ case 0x0F: { m_BA = SUBC16( m_BA, m_Y ); }
+ break;
+
+ case 0x10: { /* illegal instruction? */ }
+ break;
+ case 0x11: { /* illegal instruction? */ }
+ break;
+ case 0x12: { /* illegal instruction? */ }
+ break;
+ case 0x13: { /* illegal instruction? */ }
+ break;
+ case 0x14: { /* illegal instruction? */ }
+ break;
+ case 0x15: { /* illegal instruction? */ }
+ break;
+ case 0x16: { /* illegal instruction? */ }
+ break;
+ case 0x17: { /* illegal instruction? */ }
+ break;
+ case 0x18: { SUB16( m_BA, m_BA ); }
+ break;
+ case 0x19: { SUB16( m_BA, m_HL ); }
+ break;
+ case 0x1A: { SUB16( m_BA, m_X ); }
+ break;
+ case 0x1B: { SUB16( m_BA, m_Y ); }
+ break;
+ case 0x1C: { /* illegal instruction? */ }
+ break;
+ case 0x1D: { /* illegal instruction? */ }
+ break;
+ case 0x1E: { /* illegal instruction? */ }
+ break;
+ case 0x1F: { /* illegal instruction? */ }
+ break;
+
+ case 0x20: { m_HL = ADD16( m_HL, m_BA ); }
+ break;
+ case 0x21: { m_HL = ADD16( m_HL, m_HL ); }
+ break;
+ case 0x22: { m_HL = ADD16( m_HL, m_X ); }
+ break;
+ case 0x23: { m_HL = ADD16( m_HL, m_Y ); }
+ break;
+ case 0x24: { m_HL = ADDC16( m_HL, m_BA ); }
+ break;
+ case 0x25: { m_HL = ADDC16( m_HL, m_HL ); }
+ break;
+ case 0x26: { m_HL = ADDC16( m_HL, m_X ); }
+ break;
+ case 0x27: { m_HL = ADDC16( m_HL, m_Y ); }
+ break;
+ case 0x28: { m_HL = SUB16( m_HL, m_BA ); }
+ break;
+ case 0x29: { m_HL = SUB16( m_HL, m_HL ); }
+ break;
+ case 0x2A: { m_HL = SUB16( m_HL, m_X ); }
+ break;
+ case 0x2B: { m_HL = SUB16( m_HL, m_Y ); }
+ break;
+ case 0x2C: { m_HL = SUBC16( m_HL, m_BA ); }
+ break;
+ case 0x2D: { m_HL = SUBC16( m_HL, m_HL ); }
+ break;
+ case 0x2E: { m_HL = SUBC16( m_HL, m_X ); }
+ break;
+ case 0x2F: { m_HL = SUBC16( m_HL, m_Y ); }
+ break;
+
+ case 0x30: { /* illegal instruction? */ }
+ break;
+ case 0x31: { /* illegal instruction? */ }
+ break;
+ case 0x32: { /* illegal instruction? */ }
+ break;
+ case 0x33: { /* illegal instruction? */ }
+ break;
+ case 0x34: { /* illegal instruction? */ }
+ break;
+ case 0x35: { /* illegal instruction? */ }
+ break;
+ case 0x36: { /* illegal instruction? */ }
+ break;
+ case 0x37: { /* illegal instruction? */ }
+ break;
+ case 0x38: { SUB16( m_HL, m_BA ); }
+ break;
+ case 0x39: { SUB16( m_HL, m_HL ); }
+ break;
+ case 0x3A: { SUB16( m_HL, m_X ); }
+ break;
+ case 0x3B: { SUB16( m_HL, m_Y ); }
+ break;
+ case 0x3C: { /* illegal instruction? */ }
+ break;
+ case 0x3D: { /* illegal instruction? */ }
+ break;
+ case 0x3E: { /* illegal instruction? */ }
+ break;
+ case 0x3F: { /* illegal instruction? */ }
+ break;
+
+ case 0x40: { m_X = ADD16( m_X, m_BA ); }
+ break;
+ case 0x41: { m_X = ADD16( m_X, m_HL ); }
+ break;
+ case 0x42: { m_Y = ADD16( m_Y, m_BA ); }
+ break;
+ case 0x43: { m_Y = ADD16( m_Y, m_HL ); }
+ break;
+ case 0x44: { m_SP = ADD16( m_SP, m_BA ); }
+ break;
+ case 0x45: { m_SP = ADD16( m_SP, m_HL ); }
+ break;
+ case 0x46: { /* illegal instruction? */ }
+ break;
+ case 0x47: { /* illegal instruction? */ }
+ break;
+ case 0x48: { m_X = SUB16( m_X, m_BA ); }
+ break;
+ case 0x49: { m_X = SUB16( m_X, m_HL ); }
+ break;
+ case 0x4A: { m_Y = SUB16( m_Y, m_BA ); }
+ break;
+ case 0x4B: { m_Y = SUB16( m_Y, m_HL ); }
+ break;
+ case 0x4C: { m_SP = SUB16( m_SP, m_BA ); }
+ break;
+ case 0x4D: { m_SP = SUB16( m_SP, m_HL ); }
+ break;
+ case 0x4E: { /* illegal instruction? */ }
+ break;
+ case 0x4F: { /* illegal instruction? */ }
+ break;
+
+ case 0x50: { /* illegal instruction? */ }
+ break;
+ case 0x51: { /* illegal instruction? */ }
+ break;
+ case 0x52: { /* illegal instruction? */ }
+ break;
+ case 0x53: { /* illegal instruction? */ }
+ break;
+ case 0x54: { /* illegal instruction? */ }
+ break;
+ case 0x55: { /* illegal instruction? */ }
+ break;
+ case 0x56: { /* illegal instruction? */ }
+ break;
+ case 0x57: { /* illegal instruction? */ }
+ break;
+ case 0x58: { /* illegal instruction? */ }
+ break;
+ case 0x59: { /* illegal instruction? */ }
+ break;
+ case 0x5A: { /* illegal instruction? */ }
+ break;
+ case 0x5B: { /* illegal instruction? */ }
+ break;
+ case 0x5C: { SUB16( m_SP, m_BA ); }
+ break;
+ case 0x5D: { SUB16( m_SP, m_HL ); }
+ break;
+ case 0x5E: { /* illegal instruction? */ }
+ break;
+ case 0x5F: { /* illegal instruction? */ }
+ break;
+
+ case 0x60: { ADDC16( m_BA, rdop16() ); /* ??? */ }
+ break;
+ case 0x61: { ADDC16( m_HL, rdop16() ); /* ??? */ }
+ break;
+ case 0x62: { ADDC16( m_X, rdop16() ); /* ??? */ }
+ break;
+ case 0x63: { ADDC16( m_Y, rdop16() ); /* ??? */ }
+ break;
+ case 0x64: { /* illegal instruction? */ }
+ break;
+ case 0x65: { /* illegal instruction? */ }
+ break;
+ case 0x66: { /* illegal instruction? */ }
+ break;
+ case 0x67: { /* illegal instruction? */ }
+ break;
+ case 0x68: { m_SP = ADD16( m_SP, rdop16() ); }
+ break;
+ case 0x69: { /* illegal instruction? */ }
+ break;
+ case 0x6A: { m_SP = SUB16( m_SP, rdop16() ); }
+ break;
+ case 0x6B: { /* illegal instruction? */ }
+ break;
+ case 0x6C: { SUB16( m_SP, rdop16() ); }
+ break;
+ case 0x6D: { /* illegal instruction? */ }
+ break;
+ case 0x6E: { m_SP = rdop16(); }
+ break;
+ case 0x6F: { /* illegal instruction? */ }
+ break;
+
+ case 0x70: { UINT8 ofs8 = rdop(); m_BA = rd16( m_SP + ofs8 ); }
+ break;
+ case 0x71: { UINT8 ofs8 = rdop(); m_HL = rd16( m_SP + ofs8 ); }
+ break;
+ case 0x72: { UINT8 ofs8 = rdop(); m_X = rd16( m_SP + ofs8 ); }
+ break;
+ case 0x73: { UINT8 ofs8 = rdop(); m_Y = rd16( m_SP + ofs8 ); }
+ break;
+ case 0x74: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_BA ); }
+ break;
+ case 0x75: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_HL ); }
+ break;
+ case 0x76: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_X ); }
+ break;
+ case 0x77: { UINT8 ofs8 = rdop(); wr16( m_SP + ofs8, m_Y ); }
+ break;
+ case 0x78: { AD2_I16; m_SP = rd16( addr2 ); }
+ break;
+ case 0x79: { /* illegal instruction? */ }
+ break;
+ case 0x7A: { /* illegal instruction? */ }
+ break;
+ case 0x7B: { /* illegal instruction? */ }
+ break;
+ case 0x7C: { AD1_I16; wr16( addr1, m_SP ); }
+ break;
+ case 0x7D: { /* illegal instruction? */ }
+ break;
+ case 0x7E: { /* illegal instruction? */ }
+ break;
+ case 0x7F: { /* illegal instruction? */ }
+ break;
+
+ case 0x80: { /* illegal instruction? */ }
+ break;
+ case 0x81: { /* illegal instruction? */ }
+ break;
+ case 0x82: { /* illegal instruction? */ }
+ break;
+ case 0x83: { /* illegal instruction? */ }
+ break;
+ case 0x84: { /* illegal instruction? */ }
+ break;
+ case 0x85: { /* illegal instruction? */ }
+ break;
+ case 0x86: { /* illegal instruction? */ }
+ break;
+ case 0x87: { /* illegal instruction? */ }
+ break;
+ case 0x88: { /* illegal instruction? */ }
+ break;
+ case 0x89: { /* illegal instruction? */ }
+ break;
+ case 0x8A: { /* illegal instruction? */ }
+ break;
+ case 0x8B: { /* illegal instruction? */ }
+ break;
+ case 0x8C: { /* illegal instruction? */ }
+ break;
+ case 0x8D: { /* illegal instruction? */ }
+ break;
+ case 0x8E: { /* illegal instruction? */ }
+ break;
+ case 0x8F: { /* illegal instruction? */ }
+ break;
+
+ case 0x90: { /* illegal instruction? */ }
+ break;
+ case 0x91: { /* illegal instruction? */ }
+ break;
+ case 0x92: { /* illegal instruction? */ }
+ break;
+ case 0x93: { /* illegal instruction? */ }
+ break;
+ case 0x94: { /* illegal instruction? */ }
+ break;
+ case 0x95: { /* illegal instruction? */ }
+ break;
+ case 0x96: { /* illegal instruction? */ }
+ break;
+ case 0x97: { /* illegal instruction? */ }
+ break;
+ case 0x98: { /* illegal instruction? */ }
+ break;
+ case 0x99: { /* illegal instruction? */ }
+ break;
+ case 0x9A: { /* illegal instruction? */ }
+ break;
+ case 0x9B: { /* illegal instruction? */ }
+ break;
+ case 0x9C: { /* illegal instruction? */ }
+ break;
+ case 0x9D: { /* illegal instruction? */ }
+ break;
+ case 0x9E: { /* illegal instruction? */ }
+ break;
+ case 0x9F: { /* illegal instruction? */ }
+ break;
+
+ case 0xA0: { /* illegal instruction? */ }
+ break;
+ case 0xA1: { /* illegal instruction? */ }
+ break;
+ case 0xA2: { /* illegal instruction? */ }
+ break;
+ case 0xA3: { /* illegal instruction? */ }
+ break;
+ case 0xA4: { /* illegal instruction? */ }
+ break;
+ case 0xA5: { /* illegal instruction? */ }
+ break;
+ case 0xA6: { /* illegal instruction? */ }
+ break;
+ case 0xA7: { /* illegal instruction? */ }
+ break;
+ case 0xA8: { /* illegal instruction? */ }
+ break;
+ case 0xA9: { /* illegal instruction? */ }
+ break;
+ case 0xAA: { /* illegal instruction? */ }
+ break;
+ case 0xAB: { /* illegal instruction? */ }
+ break;
+ case 0xAC: { /* illegal instruction? */ }
+ break;
+ case 0xAD: { /* illegal instruction? */ }
+ break;
+ case 0xAE: { /* illegal instruction? */ }
+ break;
+ case 0xAF: { /* illegal instruction? */ }
+ break;
+
+ case 0xB0: { PUSH8( m_BA & 0x00FF ); }
+ break;
+ case 0xB1: { PUSH8( m_BA >> 8 ); }
+ break;
+ case 0xB2: { PUSH8( m_HL & 0x00FF ); }
+ break;
+ case 0xB3: { PUSH8( m_HL >> 8 ); }
+ break;
+ case 0xB4: { m_BA = ( m_BA & 0xFF00 ) | POP8(); }
+ break;
+ case 0xB5: { m_BA = ( m_BA & 0x00FF ) | ( POP8() << 8 ); }
+ break;
+ case 0xB6: { m_HL = ( m_HL & 0xFF00 ) | POP8(); }
+ break;
+ case 0xB7: { m_HL = ( m_HL & 0x00FF ) | ( POP8() << 8 ); }
+ break;
+ case 0xB8: { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); }
+ break;
+ case 0xB9: { PUSH16( m_BA ); PUSH16( m_HL ); PUSH16( m_X ); PUSH16( m_Y ); PUSH8( m_N ); PUSH8( m_I ); PUSH8( m_XI ); PUSH8( m_YI ); }
+ break;
+ case 0xBA: { /* illegal instruction? */ }
+ break;
+ case 0xBB: { /* illegal instruction? */ }
+ break;
+ case 0xBC: { m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
+ break;
+ case 0xBD: { m_YI = POP8(); m_XI = POP8(); m_I = POP8(); m_N = POP8(); m_Y = POP16(); m_X = POP16(); m_HL = POP16(); m_BA = POP16(); }
+ break;
+ case 0xBE: { /* illegal instruction? */ }
+ break;
+ case 0xBF: { /* illegal instruction? */ }
+ break;
+
+ case 0xC0: { AD2_IHL; m_BA = rd16( addr2 ); }
+ break;
+ case 0xC1: { AD2_IHL; m_HL = rd16( addr2 ); }
+ break;
+ case 0xC2: { AD2_IHL; m_X = rd16( addr2 ); }
+ break;
+ case 0xC3: { AD2_IHL; m_Y = rd16( addr2 ); }
+ break;
+ case 0xC4: { AD1_IHL; wr16( addr1, m_BA ); }
+ break;
+ case 0xC5: { AD1_IHL; wr16( addr1, m_HL ); }
+ break;
+ case 0xC6: { AD1_IHL; wr16( addr1, m_X ); }
+ break;
+ case 0xC7: { AD1_IHL; wr16( addr1, m_Y ); }
+ break;
+ case 0xC8: { /* illegal instruction? */ }
+ break;
+ case 0xC9: { /* illegal instruction? */ }
+ break;
+ case 0xCA: { /* illegal instruction? */ }
+ break;
+ case 0xCB: { /* illegal instruction? */ }
+ break;
+ case 0xCC: { /* illegal instruction? */ }
+ break;
+ case 0xCD: { /* illegal instruction? */ }
+ break;
+ case 0xCE: { /* illegal instruction? */ }
+ break;
+ case 0xCF: { /* illegal instruction? */ }
+ break;
+
+ case 0xD0: { AD2_XIX; m_BA = rd16( addr2 ); }
+ break;
+ case 0xD1: { AD2_XIX; m_HL = rd16( addr2 ); }
+ break;
+ case 0xD2: { AD2_XIX; m_X = rd16( addr2 ); }
+ break;
+ case 0xD3: { AD2_XIX; m_Y = rd16( addr2 ); }
+ break;
+ case 0xD4: { AD1_XIX; wr16( addr1, m_BA ); }
+ break;
+ case 0xD5: { AD1_XIX; wr16( addr1, m_HL ); }
+ break;
+ case 0xD6: { AD1_XIX; wr16( addr1, m_X ); }
+ break;
+ case 0xD7: { AD1_XIX; wr16( addr1, m_Y ); }
+ break;
+ case 0xD8: { AD2_YIY; m_BA = rd16( addr2 ); }
+ break;
+ case 0xD9: { AD2_YIY; m_HL = rd16( addr2 ); }
+ break;
+ case 0xDA: { AD2_YIY; m_X = rd16( addr2 ); }
+ break;
+ case 0xDB: { AD2_YIY; m_Y = rd16( addr2 ); }
+ break;
+ case 0xDC: { AD1_YIY; wr16( addr1, m_BA ); }
+ break;
+ case 0xDD: { AD1_YIY; wr16( addr1, m_HL ); }
+ break;
+ case 0xDE: { AD1_YIY; wr16( addr1, m_X ); }
+ break;
+ case 0xDF: { AD1_YIY; wr16( addr1, m_Y ); }
+ break;
+
+ case 0xE0: { } //{ m_BA = m_BA; }
+ break;
+ case 0xE1: { m_BA = m_HL; }
+ break;
+ case 0xE2: { m_BA = m_X; }
+ break;
+ case 0xE3: { m_BA = m_Y; }
+ break;
+ case 0xE4: { m_HL = m_BA; }
+ break;
+ case 0xE5: { } //{ m_HL = m_HL; }
+ break;
+ case 0xE6: { m_HL = m_X; }
+ break;
+ case 0xE7: { m_HL = m_Y; }
+ break;
+ case 0xE8: { m_X = m_BA; }
+ break;
+ case 0xE9: { m_X = m_HL; }
+ break;
+ case 0xEA: { } //{ m_X = m_X; }
+ break;
+ case 0xEB: { m_X = m_Y; }
+ break;
+ case 0xEC: { m_Y = m_BA; }
+ break;
+ case 0xED: { m_Y = m_HL; }
+ break;
+ case 0xEE: { m_Y = m_X; }
+ break;
+ case 0xEF: { } //{ m_Y = m_Y; }
+ break;
+
+ case 0xF0: { m_SP = m_BA; }
+ break;
+ case 0xF1: { m_SP = m_HL; }
+ break;
+ case 0xF2: { m_SP = m_X; }
+ break;
+ case 0xF3: { m_SP = m_Y; }
+ break;
+ case 0xF4: { m_HL = m_SP; }
+ break;
+ case 0xF5: { m_HL = m_PC; }
+ break;
+ case 0xF6: { /* illegal instruction? */ }
+ break;
+ case 0xF7: { /* illegal instruction? */ }
+ break;
+ case 0xF8: { m_BA = m_SP; }
+ break;
+ case 0xF9: { m_BA = m_PC; }
+ break;
+ case 0xFA: { m_X = m_SP; }
+ break;
+ case 0xFB: { /* illegal instruction? */ }
+ break;
+ case 0xFC: { /* illegal instruction? */ }
+ break;
+ case 0xFD: { /* illegal instruction? */ }
+ break;
+ case 0xFE: { m_Y = m_SP; }
+ break;
+ case 0xFF: { /* illegal instruction? */ }
+ break;
+ }
+
+ m_icount -= insnminx_cycles_CF[opcode];
+}
+
+
+const int minx_cpu_device::insnminx_cycles_CF[256] = {
+ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
+ 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 16, 16, 1, 1, 1, 1,
+ 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
+ 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 16, 16, 1, 1, 1, 1,
+
+ 16, 16, 16, 16, 16, 16, 1, 1, 16, 16, 16, 16, 16, 16, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 1, 1,
+ 16, 16, 16, 16, 1, 1, 1, 1, 16, 1, 16, 1, 16, 1, 16, 1,
+ 24, 24, 24, 24, 24, 24, 24, 24, 24, 1, 1, 1, 24, 1, 1, 1,
+
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 12, 12, 12, 12, 12, 12, 12, 12, 48, 60, 1, 1, 32, 40, 1, 1,
+
+ 20, 20, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1,
+ 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 1, 1, 8, 8, 8, 1, 1, 1, 8, 1
+};
diff --git a/src/devices/cpu/minx/minxops.h b/src/devices/cpu/minx/minxops.h
new file mode 100644
index 00000000000..b19e733deb2
--- /dev/null
+++ b/src/devices/cpu/minx/minxops.h
@@ -0,0 +1,563 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+
+void minx_cpu_device::execute_one()
+{
+ const UINT8 opcode = rdop();
+
+ switch (opcode)
+ {
+ case 0x00: { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x01: { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x02: { m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x03: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x04: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x05: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x06: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x07: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADD8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x08: { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x09: { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x0A: { m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x0B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x0C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x0D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x0E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x0F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | ADDC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+
+ case 0x10: { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x11: { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x12: { m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x13: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x14: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x15: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x16: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x17: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x18: { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x19: { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x1A: { m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x1B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x1C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x1D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x1E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x1F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | SUBC8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+
+ case 0x20: { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x21: { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x22: { m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x23: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x24: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x25: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x26: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x27: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | AND8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x28: { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x29: { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x2A: { m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x2B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x2C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x2D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x2E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x2F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | OR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+
+ case 0x30: { SUB8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x31: { SUB8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x32: { SUB8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x33: { AD2_IHL; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x34: { AD2_IN8; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x35: { AD2_I16; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x36: { AD2_XIX; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x37: { AD2_YIY; SUB8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x38: { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA & 0xFF ) ); }
+ break;
+ case 0x39: { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ); }
+ break;
+ case 0x3A: { m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), rdop() ); }
+ break;
+ case 0x3B: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x3C: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x3D: { AD2_I16; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x3E: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+ case 0x3F: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | XOR8( ( m_BA & 0x00FF ), RD( addr2 ) ); }
+ break;
+
+ case 0x40: { m_BA = ( m_BA & 0xFF00 ) | ( m_BA & 0x00FF); }
+ break;
+ case 0x41: { m_BA = ( m_BA & 0xFF00 ) | ( m_BA >> 8 ); }
+ break;
+ case 0x42: { m_BA = ( m_BA & 0xFF00 ) | ( m_HL & 0x00FF); }
+ break;
+ case 0x43: { m_BA = ( m_BA & 0xFF00 ) | ( m_HL >> 8 ); }
+ break;
+ case 0x44: { AD2_IN8; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x45: { AD2_IHL; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x46: { AD2_XIX; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x47: { AD2_YIY; m_BA = ( m_BA & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x48: { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
+ break;
+ case 0x49: { m_BA = ( m_BA & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x4A: { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
+ break;
+ case 0x4B: { m_BA = ( m_BA & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
+ break;
+ case 0x4C: { AD2_IN8; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x4D: { AD2_IHL; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x4E: { AD2_XIX; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x4F: { AD2_YIY; m_BA = ( m_BA & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+
+ case 0x50: { m_HL = ( m_HL & 0xFF00 ) | ( m_BA & 0x00FF); }
+ break;
+ case 0x51: { m_HL = ( m_HL & 0xFF00 ) | ( m_BA >> 8 ); }
+ break;
+ case 0x52: { m_HL = ( m_HL & 0xFF00 ) | ( m_HL & 0x00FF); }
+ break;
+ case 0x53: { m_HL = ( m_HL & 0xFF00 ) | ( m_HL >> 8 ); }
+ break;
+ case 0x54: { AD2_IN8; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x55: { AD2_IHL; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x56: { AD2_XIX; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x57: { AD2_YIY; m_HL = ( m_HL & 0xFF00 ) | RD( addr2 ); }
+ break;
+ case 0x58: { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA & 0x00FF) << 8 ); }
+ break;
+ case 0x59: { m_HL = ( m_HL & 0x00FF ) | ( ( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x5A: { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL & 0x00FF) << 8 ); }
+ break;
+ case 0x5B: { m_HL = ( m_HL & 0x00FF ) | ( ( m_HL >> 8 ) << 8 ); }
+ break;
+ case 0x5C: { AD2_IN8; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x5D: { AD2_IHL; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x5E: { AD2_XIX; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+ case 0x5F: { AD2_YIY; m_HL = ( m_HL & 0x00FF ) | ( RD( addr2 ) << 8 ); }
+ break;
+
+ case 0x60: { AD1_XIX; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x61: { AD1_XIX; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0x62: { AD1_XIX; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x63: { AD1_XIX; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0x64: { AD1_XIX; AD2_IN8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x65: { AD1_XIX; AD2_IHL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x66: { AD1_XIX; AD2_XIX; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x67: { AD1_XIX; AD2_YIY; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x68: { AD1_IHL; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x69: { AD1_IHL; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0x6A: { AD1_IHL; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x6B: { AD1_IHL; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0x6C: { AD1_IHL; AD2_IN8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x6D: { AD1_IHL; AD2_IHL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x6E: { AD1_IHL; AD2_XIX; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x6F: { AD1_IHL; AD2_YIY; WR( addr1, RD( addr2 ) ); }
+ break;
+
+ case 0x70: { AD1_YIY; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x71: { AD1_YIY; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0x72: { AD1_YIY; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x73: { AD1_YIY; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0x74: { AD1_YIY; AD2_IN8; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x75: { AD1_YIY; AD2_IHL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x76: { AD1_YIY; AD2_XIX; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x77: { AD1_YIY; AD2_YIY; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x78: { AD1_IN8; WR( addr1, ( m_BA & 0x00FF ) ); }
+ break;
+ case 0x79: { AD1_IN8; WR( addr1, ( m_BA >> 8 ) ); }
+ break;
+ case 0x7A: { AD1_IN8; WR( addr1, ( m_HL & 0x00FF ) ); }
+ break;
+ case 0x7B: { AD1_IN8; WR( addr1, ( m_HL >> 8 ) ); }
+ break;
+ case 0x7C: { /* illegal operation? */ }
+ break;
+ case 0x7D: { AD1_IN8; AD2_IHL; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x7E: { AD1_IN8; AD2_XIX; WR( addr1, RD( addr2 ) ); }
+ break;
+ case 0x7F: { AD1_IN8; AD2_YIY; WR( addr1, RD( addr2 ) ); }
+ break;
+
+ case 0x80: { m_BA = ( m_BA & 0xFF00 ) | INC8( m_BA & 0x00FF ); }
+ break;
+ case 0x81: { m_BA = ( m_BA & 0x00FF ) | ( INC8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x82: { m_HL = ( m_HL & 0xFF00 ) | INC8( m_HL & 0x00FF ); }
+ break;
+ case 0x83: { m_HL = ( m_HL & 0x00FF ) | ( INC8( m_HL >> 8 ) << 8 ); }
+ break;
+ case 0x84: { m_N = INC8( m_N ); }
+ break;
+ case 0x85: { AD1_IN8; WR( addr1, INC8( RD( addr1 ) ) ); }
+ break;
+ case 0x86: { AD1_IHL; WR( addr1, INC8( RD( addr1 ) ) ); }
+ break;
+ case 0x87: { m_SP = INC16( m_SP ); }
+ break;
+ case 0x88: { m_BA = ( m_BA & 0xFF00 ) | DEC8( m_BA & 0x00FF ); }
+ break;
+ case 0x89: { m_BA = ( m_BA & 0x00FF ) | ( DEC8( m_BA >> 8 ) << 8 ); }
+ break;
+ case 0x8A: { m_HL = ( m_HL & 0xFF00 ) | DEC8( m_HL & 0x00FF ); }
+ break;
+ case 0x8B: { m_HL = ( m_HL & 0x00FF ) | ( DEC8( m_HL >> 8 ) << 8 ); }
+ break;
+ case 0x8C: { m_N = DEC8( m_N ); }
+ break;
+ case 0x8D: { AD1_IN8; WR( addr1, DEC8( RD( addr1 ) ) ); }
+ break;
+ case 0x8E: { AD1_IHL; WR( addr1, DEC8( RD( addr1 ) ) ); }
+ break;
+ case 0x8F: { m_SP = DEC8( m_SP ); }
+ break;
+
+ case 0x90: { m_BA = INC16( m_BA ); }
+ break;
+ case 0x91: { m_HL = INC16( m_HL ); }
+ break;
+ case 0x92: { m_X = INC16( m_X ); }
+ break;
+ case 0x93: { m_Y = INC16( m_Y ); }
+ break;
+ case 0x94: { m_F = ( AND8( ( m_BA & 0x00FF ), ( m_BA >> 8 ) ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z;}
+ break;
+ case 0x95: { AD1_IHL; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
+ break;
+ case 0x96: { m_F = ( AND8( ( m_BA & 0x00FF ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
+ break;
+ case 0x97: { m_F = ( AND8( ( m_BA >> 8 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
+ break;
+ case 0x98: { m_BA = DEC16( m_BA ); }
+ break;
+ case 0x99: { m_HL = DEC16( m_HL ); }
+ break;
+ case 0x9A: { m_X = DEC16( m_X ); }
+ break;
+ case 0x9B: { m_Y = DEC16( m_Y ); }
+ break;
+ case 0x9C: { m_F = m_F & rdop(); }
+ break;
+ case 0x9D: { m_F = m_F | rdop(); }
+ break;
+ case 0x9E: { m_F = m_F ^ rdop(); }
+ break;
+ case 0x9F: { m_F = rdop(); }
+ break;
+
+ case 0xA0: { PUSH16( m_BA ); }
+ break;
+ case 0xA1: { PUSH16( m_HL ); }
+ break;
+ case 0xA2: { PUSH16( m_X ); }
+ break;
+ case 0xA3: { PUSH16( m_Y ); }
+ break;
+ case 0xA4: { PUSH8( m_N ); }
+ break;
+ case 0xA5: { PUSH8( m_I ); }
+ break;
+ case 0xA6: { PUSH8( m_XI ); PUSH8( m_YI ); }
+ break;
+ case 0xA7: { PUSH8( m_F ); }
+ break;
+ case 0xA8: { m_BA = POP16(); }
+ break;
+ case 0xA9: { m_HL = POP16();}
+ break;
+ case 0xAA: { m_X = POP16(); }
+ break;
+ case 0xAB: { m_Y = POP16(); }
+ break;
+ case 0xAC: { m_N = POP8(); }
+ break;
+ case 0xAD: { m_I = POP8(); }
+ break;
+ case 0xAE: { m_YI = POP8(); m_XI = POP8(); }
+ break;
+ case 0xAF: { m_F = POP8(); }
+ break;
+
+ case 0xB0: { UINT8 op = rdop(); m_BA = ( m_BA & 0xFF00 ) | op; }
+ break;
+ case 0xB1: { UINT8 op = rdop(); m_BA = ( m_BA & 0x00FF ) | ( op << 8 ); }
+ break;
+ case 0xB2: { UINT8 op = rdop(); m_HL = ( m_HL & 0xFF00 ) | op; }
+ break;
+ case 0xB3: { UINT8 op = rdop(); m_HL = ( m_HL & 0x00FF ) | ( op << 8 ); }
+ break;
+ case 0xB4: { UINT8 op = rdop(); m_N = op; }
+ break;
+ case 0xB5: { AD1_IHL; UINT8 op = rdop(); WR( addr1, op); }
+ break;
+ case 0xB6: { AD1_XIX; UINT8 op = rdop(); WR( addr1, op ); }
+ break;
+ case 0xB7: { AD1_YIY; UINT8 op = rdop(); WR( addr1, op ); }
+ break;
+ case 0xB8: { AD2_I16; m_BA = rd16( addr2 ); }
+ break;
+ case 0xB9: { AD2_I16; m_HL = rd16( addr2 ); }
+ break;
+ case 0xBA: { AD2_I16; m_X = rd16( addr2 ); }
+ break;
+ case 0xBB: { AD2_I16; m_Y = rd16( addr2 ); }
+ break;
+ case 0xBC: { AD1_I16; wr16( addr1, m_BA ); }
+ break;
+ case 0xBD: { AD1_I16; wr16( addr1, m_HL ); }
+ break;
+ case 0xBE: { AD1_I16; wr16( addr1, m_X ); }
+ break;
+ case 0xBF: { AD1_I16; wr16( addr1, m_Y ); }
+ break;
+
+ case 0xC0: { m_BA = ADD16( m_BA, rdop16() ); }
+ break;
+ case 0xC1: { m_HL = ADD16( m_HL, rdop16() ); }
+ break;
+ case 0xC2: { m_X = ADD16( m_X, rdop16() ); }
+ break;
+ case 0xC3: { m_Y = ADD16( m_Y, rdop16() ); }
+ break;
+ case 0xC4: { m_BA = rdop16(); }
+ break;
+ case 0xC5: { m_HL = rdop16(); }
+ break;
+ case 0xC6: { m_X = rdop16(); }
+ break;
+ case 0xC7: { m_Y = rdop16(); }
+ break;
+ case 0xC8: { UINT16 t = m_BA; m_BA = m_HL; m_HL = t; }
+ break;
+ case 0xC9: { UINT16 t = m_BA; m_BA = m_X; m_X = t; }
+ break;
+ case 0xCA: { UINT16 t = m_BA; m_BA = m_Y; m_Y = t; }
+ break;
+ case 0xCB: { UINT16 t = m_BA; m_BA = m_SP; m_SP = t; }
+ break;
+ case 0xCC: { m_BA = ( m_BA >> 8 ) | ( ( m_BA & 0x00FF ) << 8 ); }
+ break;
+ case 0xCD: { UINT8 t; AD2_IHL; t = RD( addr2 ); WR( addr2, ( m_BA & 0x00FF ) ); m_BA = ( m_BA & 0xFF00 ) | t; }
+ break;
+ case 0xCE: { execute_one_ce(); }
+ break;
+ case 0xCF: { execute_one_cf(); }
+ break;
+
+ case 0xD0: { m_BA = SUB16( m_BA, rdop16() ); }
+ break;
+ case 0xD1: { m_HL = SUB16( m_HL, rdop16() ); }
+ break;
+ case 0xD2: { m_X = SUB16( m_X, rdop16() ); }
+ break;
+ case 0xD3: { m_Y = SUB16( m_Y, rdop16() ); }
+ break;
+ case 0xD4: { SUB16( m_BA, rdop16() ); }
+ break;
+ case 0xD5: { SUB16( m_HL, rdop16() ); }
+ break;
+ case 0xD6: { SUB16( m_X, rdop16() ); }
+ break;
+ case 0xD7: { SUB16( m_Y, rdop16() ); }
+ break;
+ case 0xD8: { AD1_IN8; WR( addr1, AND8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0xD9: { AD1_IN8; WR( addr1, OR8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0xDA: { AD1_IN8; WR( addr1, XOR8( RD( addr1 ), rdop() ) ); }
+ break;
+ case 0xDB: { AD1_IN8; SUB8( RD( addr1 ), rdop() ); }
+ break;
+ case 0xDC: { AD1_IN8; m_F = ( AND8( RD( addr1 ), rdop() ) ) ? m_F & ~FLAG_Z : m_F | FLAG_Z; }
+ break;
+ case 0xDD: { AD1_IN8; WR( addr1, rdop() ); }
+ break;
+ case 0xDE: { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x000F ) | ( ( m_BA & 0x0F00 ) >> 4 ) ); }
+ break;
+ case 0xDF: { m_BA = ( ( m_BA & 0x0080 ) ? 0xFF00 : 0x0000 ) | ( m_BA & 0x000F ); }
+ break;
+
+ case 0xE0: { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xE1: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d8- 1 ); m_icount -= 12; } }
+ break;
+ case 0xE2: { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xE3: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d8 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xE4: { INT8 d8 = rdop(); if ( m_F & FLAG_C ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE5: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE6: { INT8 d8 = rdop(); if ( m_F & FLAG_Z ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE7: { INT8 d8 = rdop(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xE8: { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xE9: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xEA: { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xEB: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { CALL( m_PC + d16 - 1 ); m_icount -= 12; } }
+ break;
+ case 0xEC: { UINT16 d16 = rdop16(); if ( m_F & FLAG_C ) { JMP( m_PC + d16 - 1 ); } }
+ break;
+ case 0xED: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_C ) ) { JMP( m_PC + d16 - 1 ); } }
+ break;
+ case 0xEE: { UINT16 d16 = rdop16(); if ( m_F & FLAG_Z ) { JMP( m_PC + d16 - 1 ); } }
+ break;
+ case 0xEF: { UINT16 d16 = rdop16(); if ( ! ( m_F & FLAG_Z ) ) { JMP( m_PC + d16 - 1 ); } }
+ break;
+
+ case 0xF0: { INT8 d8 = rdop(); CALL( m_PC + d8 - 1 ); }
+ break;
+ case 0xF1: { INT8 d8 = rdop(); JMP( m_PC + d8 - 1 ); }
+ break;
+ case 0xF2: { UINT16 d16 = rdop16(); CALL( m_PC + d16 - 1 ); }
+ break;
+ case 0xF3: { UINT16 d16 = rdop16(); JMP( m_PC + d16 - 1 ); }
+ break;
+ case 0xF4: { JMP( m_HL ); }
+ break;
+ case 0xF5: { INT8 d8 = rdop(); m_BA = m_BA - 0x0100; if ( m_BA & 0xFF00 ) { JMP( m_PC + d8 - 1 ); } }
+ break;
+ case 0xF6: { m_BA = ( m_BA & 0xFF00 ) | ( ( m_BA & 0x00F0 ) >> 4 ) | ( ( m_BA & 0x000F ) << 4 ); }
+ break;
+ case 0xF7: { UINT8 d; AD1_IHL; d = RD( addr1 ); WR( addr1, ( ( d & 0xF0 ) >> 4 ) | ( ( d & 0x0F ) << 4 ) ); }
+ break;
+ case 0xF8: { m_PC = POP16(); m_V = POP8(); m_U = m_V; }
+ break;
+ case 0xF9: { m_F = POP8(); m_PC = POP16(); m_V = POP8(); m_U = m_V; }
+ break;
+ case 0xFA: { m_PC = POP16() + 2; m_V = POP8(); m_U = m_V; }
+ break;
+ case 0xFB: { AD1_I16; CALL( rd16( addr1 ) ); }
+ break;
+ case 0xFC: { UINT8 i = rdop() & 0xFE; CALL( rd16( i ) ); PUSH8( m_F ); }
+ break;
+ case 0xFD: { UINT8 i = rdop() & 0xFE; JMP( rd16( i ) ); /* PUSH8( m_F );?? */ }
+ break;
+ case 0xFE: { /* illegal operation? */ }
+ break;
+ case 0xFF: { }
+ break;
+ }
+
+ m_icount -= insnminx_cycles[opcode];
+}
+
+
+const int minx_cpu_device::insnminx_cycles[256] = {
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+
+ 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
+ 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
+ 8, 8, 8, 8, 16, 12, 12, 12, 8, 8, 8, 8, 16, 12, 12, 12,
+ 8, 8, 8, 8, 16, 12, 12, 12, 12, 12, 12, 12, 1, 16, 16, 16,
+
+ 8, 8, 8, 8, 8, 16, 12, 8, 8, 8, 8, 8, 8, 16, 12, 8,
+ 8, 8, 8, 8, 8, 12, 8, 8, 8, 8, 8, 8, 12, 12, 12, 12,
+ 16, 16, 16, 16, 12, 12, 16, 12, 12, 12, 12, 12, 8, 8, 12, 8,
+ 8, 8, 8, 8, 8, 12, 12, 12, 20, 20, 20, 20, 1, 1, 1, 1,
+
+ 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 8, 12, 0, 0,
+ 12, 12, 12, 12, 12, 12, 12, 12, 20, 20, 20, 16, 16, 16, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 12, 12, 12, 12, 12, 12, 12, 12,
+ 20, 8, 24, 12, 8, 1, 8, 12, 8, 8, 8, 20, 20, 1, 1, 8
+};