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author Olivier Galibert <galibert@pobox.com>2018-05-11 01:12:28 +0900
committer Olivier Galibert <galibert@pobox.com>2018-05-11 18:23:04 +0900
commit4c24f25845f129f77829fc6d8e701a0e3762be80 (patch)
tree9bd0b9d5cf348f95ffa86911b71956fdd7f8b410 /src/devices/cpu/mcs40
parentde781d1d84e064956df88bfec929b573d4800789 (diff)
emumem: Rename direct_read_handler to memory_access_cache. Parametrize the template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
Diffstat (limited to 'src/devices/cpu/mcs40')
-rw-r--r--src/devices/cpu/mcs40/mcs40.cpp8
-rw-r--r--src/devices/cpu/mcs40/mcs40.h2
2 files changed, 5 insertions, 5 deletions
diff --git a/src/devices/cpu/mcs40/mcs40.cpp b/src/devices/cpu/mcs40/mcs40.cpp
index c04715bcdb1..19f4cbbdf4a 100644
--- a/src/devices/cpu/mcs40/mcs40.cpp
+++ b/src/devices/cpu/mcs40/mcs40.cpp
@@ -102,7 +102,7 @@ mcs40_cpu_device_base::mcs40_cpu_device_base(
{ "ramport", ENDIANNESS_LITTLE, 8, u8(5), 0 },
{ "program", ENDIANNESS_LITTLE, 8, u8(rom_width - 3), 0 }, }
, m_spaces{ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr }
- , m_direct(nullptr)
+ , m_cache(nullptr)
, m_bus_cycle_cb()
, m_sync_cb(*this)
, m_cm_rom_cb{ { *this }, { *this } }
@@ -142,7 +142,7 @@ void mcs40_cpu_device_base::device_start()
m_spaces[AS_RAM_STATUS] = &space(AS_RAM_STATUS);
m_spaces[AS_RAM_PORTS] = &space(AS_RAM_PORTS);
m_spaces[AS_PROGRAM_MEMORY] = &space(AS_PROGRAM_MEMORY);
- m_direct = m_spaces[AS_ROM]->direct<0>();
+ m_cache = m_spaces[AS_ROM]->cache<0, 0, ENDIANNESS_LITTLE>();
m_bus_cycle_cb.bind_relative_to(*owner());
m_sync_cb.resolve_safe();
@@ -637,7 +637,7 @@ inline void mcs40_cpu_device_base::do_m1()
update_cm_rom(0x0fU);
}
// TODO: just read the high nybble here - MAME doesn't support this
- u8 const read = m_direct->read_byte(rom_bank() | m_rom_addr);
+ u8 const read = m_cache->read_byte(rom_bank() | m_rom_addr);
if (cycle::OP == m_cycle)
{
m_opr = (m_stop_ff) ? 0x0U : (read >> 4);
@@ -655,7 +655,7 @@ inline void mcs40_cpu_device_base::do_m1()
inline void mcs40_cpu_device_base::do_m2()
{
// TODO: just read the low nybble here - MAME doesn't support this
- u8 const read = m_direct->read_byte(rom_bank() | m_rom_addr);
+ u8 const read = m_cache->read_byte(rom_bank() | m_rom_addr);
if (cycle::OP == m_cycle)
m_opa = (m_stop_ff) ? 0x0U : (read & 0x0fU);
else
diff --git a/src/devices/cpu/mcs40/mcs40.h b/src/devices/cpu/mcs40/mcs40.h
index a18fe7a85c2..337e171736b 100644
--- a/src/devices/cpu/mcs40/mcs40.h
+++ b/src/devices/cpu/mcs40/mcs40.h
@@ -283,7 +283,7 @@ private:
// address spaces
address_space_config const m_space_config[7];
address_space *m_spaces[7];
- direct_read_data<0> *m_direct;
+ memory_access_cache<0, 0, ENDIANNESS_LITTLE> *m_cache;
// bus snooping callback
bus_cycle_delegate m_bus_cycle_cb;