summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/m6809
diff options
context:
space:
mode:
author hap <happppp@users.noreply.github.com>2022-12-15 13:16:05 +0100
committer hap <happppp@users.noreply.github.com>2022-12-15 13:16:16 +0100
commitc23cebc36cacd00f1612384fdf436dd4cfbc64d8 (patch)
tree9d18a3b62bc2d8ebd659e461003a5543ebed7d1a /src/devices/cpu/m6809
parentf898e47c0335fd5469645dc0e6a1b8df2b67fae1 (diff)
m6809/konami: don't use m_opcode as a temp variable
Diffstat (limited to 'src/devices/cpu/m6809')
-rw-r--r--src/devices/cpu/m6809/konami.cpp9
-rw-r--r--src/devices/cpu/m6809/konami.h2
-rw-r--r--src/devices/cpu/m6809/konami.ops57
3 files changed, 38 insertions, 30 deletions
diff --git a/src/devices/cpu/m6809/konami.cpp b/src/devices/cpu/m6809/konami.cpp
index f19712ed63d..806d2620bfb 100644
--- a/src/devices/cpu/m6809/konami.cpp
+++ b/src/devices/cpu/m6809/konami.cpp
@@ -7,6 +7,12 @@
Based on M6809 cpu core copyright John Butler
+ TODO:
+ - verify cycle timing
+ - verify status flag handling
+ - what happens with block/shift opcodes when count is 0? maybe a full loop?
+ parodius does an indexed LSRD and checks for A==0 to jump over the opcode
+
References:
6809 Simulator V09, By L.C. Benschop, Eindhoven The Netherlands.
@@ -98,6 +104,9 @@ void konami_cpu_device::device_start()
{
super::device_start();
+ m_bcount = 0;
+ save_item(NAME(m_bcount));
+
// resolve callbacks
m_set_lines.resolve();
}
diff --git a/src/devices/cpu/m6809/konami.h b/src/devices/cpu/m6809/konami.h
index 174543a77ce..e5acdef5b39 100644
--- a/src/devices/cpu/m6809/konami.h
+++ b/src/devices/cpu/m6809/konami.h
@@ -69,6 +69,8 @@ private:
template<class T> T safe_shift_left(T value, uint32_t shift);
void set_lines(uint8_t data);
void execute_one();
+
+ uint8_t m_bcount;
};
#define KONAMI_IRQ_LINE M6809_IRQ_LINE /* 0 - IRQ line number */
diff --git a/src/devices/cpu/m6809/konami.ops b/src/devices/cpu/m6809/konami.ops
index 990bb3649c5..2009bdc060f 100644
--- a/src/devices/cpu/m6809/konami.ops
+++ b/src/devices/cpu/m6809/konami.ops
@@ -467,8 +467,7 @@ MOVE:
return;
BMOVE:
- // BMOVE does not appear to be interruptable, at least judging from the
- // old implementation
+ // BMOVE does not appear to be interruptable, at least judging from the old implementation
while(m_u.w != 0)
{
@m_temp.b.l = read_memory(m_y.w++);
@@ -478,8 +477,7 @@ BMOVE:
return;
BSET:
- // BSET does not appear to be interruptable, at least judging from the
- // old implementation
+ // BSET does not appear to be interruptable, at least judging from the old implementation
while(m_u.w != 0)
{
@eat(1);
@@ -489,8 +487,7 @@ BSET:
return;
BSET2:
- // BSET2 does not appear to be interruptable, at least judging from the
- // old implementation
+ // BSET2 does not appear to be interruptable, at least judging from the old implementation
while(m_u.w != 0)
{
@eat(1);
@@ -517,90 +514,90 @@ DECBJNZ:
LSRD:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
if (is_register_addressing_mode())
- m_opcode = read_opcode_arg();
+ m_bcount = read_opcode_arg();
else
- m_opcode = m_q.r.a;
+ m_bcount = m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- if (m_opcode != 0x00)
+ if (m_bcount != 0x00)
{
// set C condition code
- if (m_temp.w & safe_shift_left(1, m_opcode - 1))
+ if (m_temp.w & safe_shift_left(1, m_bcount - 1))
m_cc |= CC_C;
else
m_cc &= ~CC_C;
- m_temp.w = set_flags<uint16_t>(CC_NZ, safe_shift_right_unsigned<uint16_t>(m_temp.w, m_opcode));
+ m_temp.w = set_flags<uint16_t>(CC_NZ, safe_shift_right_unsigned<uint16_t>(m_temp.w, m_bcount));
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
}
- eat(m_opcode);
+ eat(m_bcount);
return;
ASLD:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
if (is_register_addressing_mode())
- m_opcode = read_opcode_arg();
+ m_bcount = read_opcode_arg();
else
- m_opcode = m_q.r.a;
+ m_bcount = m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- if (m_opcode != 0x00)
+ if (m_bcount != 0x00)
{
// set C condition code
- if (m_temp.w & safe_shift_right(0x10000, m_opcode))
+ if (m_temp.w & safe_shift_right(0x10000, m_bcount))
m_cc |= CC_C;
else
m_cc &= ~CC_C;
- m_temp.w = set_flags<uint16_t>(CC_NZV, safe_shift_left<int16_t>(m_temp.w, m_opcode));
+ m_temp.w = set_flags<uint16_t>(CC_NZV, safe_shift_left<int16_t>(m_temp.w, m_bcount));
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
}
- eat(m_opcode);
+ eat(m_bcount);
return;
ASRD:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
if (is_register_addressing_mode())
- m_opcode = read_opcode_arg();
+ m_bcount = read_opcode_arg();
else
- m_opcode = m_q.r.a;
+ m_bcount = m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- if (m_opcode != 0x00)
+ if (m_bcount != 0x00)
{
// set C condition code
- if (m_temp.w & safe_shift_left(1, m_opcode - 1))
+ if (m_temp.w & safe_shift_left(1, m_bcount - 1))
m_cc |= CC_C;
else
m_cc &= ~CC_C;
- m_temp.w = set_flags<uint16_t>(CC_NZ, safe_shift_right<int16_t>(m_temp.w, m_opcode));
+ m_temp.w = set_flags<uint16_t>(CC_NZ, safe_shift_right<int16_t>(m_temp.w, m_bcount));
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
}
- eat(m_opcode);
+ eat(m_bcount);
return;
ROLD:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
if (is_register_addressing_mode())
- m_opcode = read_opcode_arg();
+ m_bcount = read_opcode_arg();
else
- m_opcode = m_q.r.a;
+ m_bcount = m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
// doing this as a loop is lame
- while(m_opcode--)
+ while(m_bcount--)
{
@eat(1);
m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_left(m_temp.w));
@@ -612,15 +609,15 @@ ROLD:
RORD:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
if (is_register_addressing_mode())
- m_opcode = read_opcode_arg();
+ m_bcount = read_opcode_arg();
else
- m_opcode = m_q.r.a;
+ m_bcount = m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
// doing this as a loop is lame
- while(m_opcode--)
+ while(m_bcount--)
{
@eat(1);
m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_right(m_temp.w));