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author | 2023-06-24 07:07:55 +1000 | |
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committer | 2023-06-24 07:07:55 +1000 | |
commit | 8c3f2a3c41c88cf9a159fd5f4577acdd6b2e95c8 (patch) | |
tree | 59db764c8919531627d43e63c85392cb281eaf69 /src/devices/cpu/h8/h8.h | |
parent | 8c1a6fb6bbfdbb563d7bf4e2f68d6380b63cedee (diff) |
Miscellaneous cleanup
Diffstat (limited to 'src/devices/cpu/h8/h8.h')
-rw-r--r-- | src/devices/cpu/h8/h8.h | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/devices/cpu/h8/h8.h b/src/devices/cpu/h8/h8.h index 07375cc4df3..060b34595ec 100644 --- a/src/devices/cpu/h8/h8.h +++ b/src/devices/cpu/h8/h8.h @@ -35,16 +35,17 @@ public: STATE_DTC_WRITEBACK = 0x10006 }; - template<int port> auto read_adc() { return m_read_adc[port].bind(); } - template<int sci> auto write_sci_tx() { return m_sci_tx[sci].bind(); } - template<int sci> auto write_sci_clk() { return m_sci_clk[sci].bind(); } - template<int sci> void sci_rx_w(int state) { m_sci[sci]->do_rx_w(state); } - template<int sci> void sci_clk_w(int state) { m_sci[sci]->do_clk_w(state); } + template<int Port> auto read_adc() { return m_read_adc[Port].bind(); } + template<int Sci> auto write_sci_tx() { return m_sci_tx[Sci].bind(); } + template<int Sci> auto write_sci_clk() { return m_sci_clk[Sci].bind(); } void sci_set_external_clock_period(int sci, const attotime &period) { m_sci[sci].lookup()->do_set_external_clock_period(period); } + template<int Sci> void sci_rx_w(int state) { m_sci[Sci]->do_rx_w(state); } + template<int Sci> void sci_clk_w(int state) { m_sci[Sci]->do_clk_w(state); } + void internal_update(); void set_irq(int irq_vector, int irq_level, bool irq_nmi); bool trigger_dma(int vector); |