diff options
author | 2017-12-27 22:51:11 +1100 | |
---|---|---|
committer | 2017-12-27 22:51:11 +1100 | |
commit | e6635b97b5d09bd801cc61bdb46f06325caabffb (patch) | |
tree | 6ee794874fe6293d339ea5702dfd1b81e26fab85 /src/devices/cpu/arm7 | |
parent | 2fb692bded535401cd6a4ae66dc94e52a622ad09 (diff) | |
parent | bf28b347fb0fd51950a161d2ac2da517bfacb102 (diff) |
Merge tag 'mame0193'
MAME 0.193
Conflicts:
src/devices/cpu/arm7/arm7thmb.cpp
Diffstat (limited to 'src/devices/cpu/arm7')
-rw-r--r-- | src/devices/cpu/arm7/arm7thmb.cpp | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/src/devices/cpu/arm7/arm7thmb.cpp b/src/devices/cpu/arm7/arm7thmb.cpp index 154e0b85095..2d4b61f6dfc 100644 --- a/src/devices/cpu/arm7/arm7thmb.cpp +++ b/src/devices/cpu/arm7/arm7thmb.cpp @@ -977,7 +977,7 @@ void arm7_cpu_device::tg05_0(uint32_t pc, uint32_t op) /* STR Rd, [Rn, Rm] */ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT; uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT; uint32_t addr = GetRegister(rn) + GetRegister(rm); - WRITE32(addr, GetRegister(rd)); + WRITE32(addr & ~3, GetRegister(rd)); R15 += 2; } @@ -987,7 +987,7 @@ void arm7_cpu_device::tg05_1(uint32_t pc, uint32_t op) /* STRH Rd, [Rn, Rm] */ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT; uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT; uint32_t addr = GetRegister(rn) + GetRegister(rm); - WRITE16(addr, GetRegister(rd)); + WRITE16(addr & ~1, GetRegister(rd)); R15 += 2; } @@ -1022,8 +1022,9 @@ void arm7_cpu_device::tg05_4(uint32_t pc, uint32_t op) /* LDR Rd, [Rn, Rm] */ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT; uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT; uint32_t addr = GetRegister(rn) + GetRegister(rm); - uint32_t op2 = READ32(addr); - SetRegister(rd, op2); + uint32_t tmp = READ32(addr & ~3); + addr = (addr & 3) << 3; + SetRegister(rd, ROR(tmp, addr)); R15 += 2; } @@ -1033,7 +1034,7 @@ void arm7_cpu_device::tg05_5(uint32_t pc, uint32_t op) /* LDRH Rd, [Rn, Rm] */ uint32_t rn = (op & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT; uint32_t rd = (op & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT; uint32_t addr = GetRegister(rn) + GetRegister(rm); - uint32_t op2 = READ16(addr); + uint32_t op2 = READ16(addr & ~1); SetRegister(rd, op2); R15 += 2; } @@ -1069,7 +1070,7 @@ void arm7_cpu_device::tg06_0(uint32_t pc, uint32_t op) /* Store */ uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT; uint32_t rd = op & THUMB_ADDSUB_RD; int32_t offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2; - WRITE32(GetRegister(rn) + offs, GetRegister(rd)); + WRITE32((GetRegister(rn) + offs) & ~3, GetRegister(rd)); R15 += 2; } @@ -1077,8 +1078,10 @@ void arm7_cpu_device::tg06_1(uint32_t pc, uint32_t op) /* Load */ { uint32_t rn = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT; uint32_t rd = op & THUMB_ADDSUB_RD; - int32_t offs = ((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2; - SetRegister(rd, READ32(GetRegister(rn) + offs)); // fix + uint32_t addr = GetRegister(rn) + (((op & THUMB_LSOP_OFFS) >> THUMB_LSOP_OFFS_SHIFT) << 2); + uint32_t tmp = READ32(addr & ~3); + addr = (addr & 3) << 3; + SetRegister(rd, ROR(tmp, addr)); R15 += 2; } @@ -1109,7 +1112,7 @@ void arm7_cpu_device::tg08_0(uint32_t pc, uint32_t op) /* Store */ uint32_t imm = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT; uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT; uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT; - WRITE16(GetRegister(rs) + (imm << 1), GetRegister(rd)); + WRITE16((GetRegister(rs) + (imm << 1)) & ~1, GetRegister(rd)); R15 += 2; } @@ -1118,7 +1121,7 @@ void arm7_cpu_device::tg08_1(uint32_t pc, uint32_t op) /* Load */ uint32_t imm = (op & THUMB_HALFOP_OFFS) >> THUMB_HALFOP_OFFS_SHIFT; uint32_t rs = (op & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT; uint32_t rd = (op & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT; - SetRegister(rd, READ16(GetRegister(rs) + (imm << 1))); + SetRegister(rd, READ16((GetRegister(rs) + (imm << 1)) & ~1)); R15 += 2; } @@ -1128,7 +1131,7 @@ void arm7_cpu_device::tg09_0(uint32_t pc, uint32_t op) /* Store */ { uint32_t rd = (op & THUMB_STACKOP_RD) >> THUMB_STACKOP_RD_SHIFT; int32_t offs = (uint8_t)(op & THUMB_INSN_IMM); - WRITE32(GetRegister(13) + ((uint32_t)offs << 2), GetRegister(rd)); + WRITE32((GetRegister(13) + ((uint32_t)offs << 2)) & ~3, GetRegister(rd)); R15 += 2; } @@ -1191,7 +1194,7 @@ void arm7_cpu_device::tg0b_4(uint32_t pc, uint32_t op) /* PUSH {Rlist} */ if (op & (1 << offs)) { SetRegister(13, GetRegister(13) - 4); - WRITE32(GetRegister(13), GetRegister(offs)); + WRITE32(GetRegister(13) & ~3, GetRegister(offs)); } } R15 += 2; @@ -1200,13 +1203,13 @@ void arm7_cpu_device::tg0b_4(uint32_t pc, uint32_t op) /* PUSH {Rlist} */ void arm7_cpu_device::tg0b_5(uint32_t pc, uint32_t op) /* PUSH {Rlist}{LR} */ { SetRegister(13, GetRegister(13) - 4); - WRITE32(GetRegister(13), GetRegister(14)); + WRITE32(GetRegister(13) & ~3, GetRegister(14)); for (int32_t offs = 7; offs >= 0; offs--) { if (op & (1 << offs)) { SetRegister(13, GetRegister(13) - 4); - WRITE32(GetRegister(13), GetRegister(offs)); + WRITE32(GetRegister(13) & ~3, GetRegister(offs)); } } R15 += 2; |