summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/am29000/am29ops.h
diff options
context:
space:
mode:
author therealmogminer@gmail.com <therealmogminer@gmail.com>2015-11-04 20:58:37 +0100
committer therealmogminer@gmail.com <therealmogminer@gmail.com>2015-11-04 20:58:37 +0100
commit41df8ec67b7d9c96e7f99d100cf06daf1abb5712 (patch)
tree9333899b6d6e52142c1b38cef4056ea61b2c6a1f /src/devices/cpu/am29000/am29ops.h
parent5bb4c27a6a22300c419dfd6892066c7525774c93 (diff)
- Fix all instances of PVS-Studio warning V578, "An odd bitwise operation
detected. Consider verifying it". [MooglyGuy]
Diffstat (limited to 'src/devices/cpu/am29000/am29ops.h')
-rw-r--r--src/devices/cpu/am29000/am29ops.h90
1 files changed, 44 insertions, 46 deletions
diff --git a/src/devices/cpu/am29000/am29ops.h b/src/devices/cpu/am29000/am29ops.h
index bd3602391e6..df8925972ab 100644
--- a/src/devices/cpu/am29000/am29ops.h
+++ b/src/devices/cpu/am29000/am29ops.h
@@ -956,22 +956,22 @@ void am29000_cpu_device::LOAD()
if (!FREEZE_MODE)
{
- m_chc = ((m_exec_ir << 8) & 0xff) |
- CHC_LS |
- RA << CHC_TR_SHIFT |
- CHC_CV;
-
+ m_chc = ((m_exec_ir << 8) & 0xff) | CHC_LS | RA << CHC_TR_SHIFT | CHC_CV;
m_cha = addr;
m_chd = r;
- if (!(m_cfg & CFG_DW) && (m_exec_ir & INST_SB_BIT))
- SET_ALU_BP(addr & 3);
+ if (!(m_cfg & CFG_DW) && INST_SB_BIT)
+ {
+ SET_ALU_BP(addr);
+ }
}
m_r[RA] = r;
if (m_cfg & CFG_DW)
+ {
logerror("DW ON A STORE");
+ }
}
void am29000_cpu_device::LOADL()
@@ -987,11 +987,13 @@ void am29000_cpu_device::LOADSET()
void am29000_cpu_device::LOADM()
{
UINT32 addr = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r;
if (INST_UA_BIT)
+ {
fatalerror("Am29000: UA bit set on LOAD\n");
+ }
+ UINT32 r;
if (INST_CE_BIT)
{
logerror("Am29000: Attempting a co-processor LOAD!\n");
@@ -1019,30 +1021,28 @@ void am29000_cpu_device::LOADM()
{
// TODO
m_chc &= (CHC_CR_MASK << CHC_CR_SHIFT);
- m_chc |= ((m_exec_ir << 8) & 0xff) |
- RA << CHC_TR_SHIFT |
- CHC_CV;
-
+ m_chc |= ((m_exec_ir << 8) & 0xff) | RA << CHC_TR_SHIFT | CHC_CV;
m_cha = addr;
m_chd = r; // ?????
- if (!(m_cfg & CFG_DW) && (m_exec_ir & INST_SB_BIT))
- SET_ALU_BP(addr & 3);
+ if (!(m_cfg & CFG_DW) && INST_SB_BIT)
+ {
+ SET_ALU_BP(addr);
+ }
}
r = RA;
+ for (INT32 cnt = 0; cnt <= GET_CHC_CR; ++cnt)
{
- int cnt;
- for (cnt = 0; cnt <= GET_CHC_CR; ++cnt)
- {
- m_r[r] = m_data->read_dword(addr);
+ m_r[r] = m_data->read_dword(addr);
// SET_CHC_CR(cnt - 1);
- addr += 4;
+ addr += 4;
- if (++r == 256)
- r = 128;
+ if (++r == 256)
+ {
+ r = 128;
}
}
}
@@ -1050,15 +1050,15 @@ void am29000_cpu_device::LOADM()
void am29000_cpu_device::STORE()
{
UINT32 addr = INST_M_BIT ? I8: GET_RB_VAL;
-// UINT32 r;
if (INST_UA_BIT)
+ {
fatalerror("Am29000: UA bit set on LOAD\n");
+ }
if (INST_CE_BIT)
{
logerror("Am29000: Attempting a co-processor LOAD!\n");
-// r = 0;
}
else
{
@@ -1073,7 +1073,6 @@ void am29000_cpu_device::STORE()
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
return;
}
-
}
}
@@ -1081,18 +1080,19 @@ void am29000_cpu_device::STORE()
if (!FREEZE_MODE)
{
- m_chc = ((m_exec_ir << 8) & 0xff) |
- RA << CHC_TR_SHIFT |
- CHC_CV;
-
+ m_chc = ((m_exec_ir << 8) & 0xff) | RA << CHC_TR_SHIFT | CHC_CV;
m_cha = addr;
- if (!(m_cfg & CFG_DW) && (m_exec_ir & INST_SB_BIT))
- SET_ALU_BP(addr & 3);
+ if (!(m_cfg & CFG_DW) && INST_SB_BIT)
+ {
+ SET_ALU_BP(addr);
+ }
}
if (m_cfg & CFG_DW)
+ {
logerror("DW ON A STORE");
+ }
}
void am29000_cpu_device::STOREL()
@@ -1103,11 +1103,13 @@ void am29000_cpu_device::STOREL()
void am29000_cpu_device::STOREM()
{
UINT32 addr = INST_M_BIT ? I8: GET_RB_VAL;
- UINT32 r;
if (INST_UA_BIT)
+ {
fatalerror("Am29000: UA bit set on LOAD\n");
+ }
+ UINT32 r;
if (INST_CE_BIT)
{
logerror("Am29000: Attempting a co-processor LOAD!\n");
@@ -1126,7 +1128,6 @@ void am29000_cpu_device::STOREM()
SIGNAL_EXCEPTION(EXCEPTION_PROTECTION_VIOLATION);
return;
}
-
}
}
@@ -1134,29 +1135,26 @@ void am29000_cpu_device::STOREM()
{
// TODO
m_chc &= (CHC_CR_MASK << CHC_CR_SHIFT);
- m_chc |= ((m_exec_ir << 8) & 0xff) |
- RA << CHC_TR_SHIFT |
- CHC_CV;
-
+ m_chc |= ((m_exec_ir << 8) & 0xff) | RA << CHC_TR_SHIFT | CHC_CV;
m_cha = addr;
- if (!(m_cfg & CFG_DW) && (m_exec_ir & INST_SB_BIT))
- SET_ALU_BP(addr & 3);
+ if (!(m_cfg & CFG_DW) && INST_SB_BIT)
+ {
+ SET_ALU_BP(addr);
+ }
}
r = RA;
+ for (INT32 cnt = 0; cnt <= GET_CHC_CR; ++cnt)
{
- int cnt;
- for (cnt = 0; cnt <= GET_CHC_CR; ++cnt)
- {
- m_data->write_dword(addr, m_r[r]);
+ m_data->write_dword(addr, m_r[r]);
-// SET_CHC_CR(cnt - 1);
- addr += 4;
+ addr += 4;
- if (++r == 256)
- r = 128;
+ if (++r == 256)
+ {
+ r = 128;
}
}
}