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author Olivier Galibert <galibert@pobox.com>2022-06-16 12:47:52 +0200
committer Olivier Galibert <galibert@pobox.com>2025-04-29 23:06:41 +0200
commit45d4cd52a8194f2ef9e0383cfb2e2a35634af6ff (patch)
tree4e8d8fcb7382a5e9e0bce5ec59939bcfbe67155a /src/devices/bus/wswan/rom.cpp
parent5c14bcdfcb4aefb71b5b62387c4ad05dbeb3814e (diff)
full xtal conversionxtal
Diffstat (limited to 'src/devices/bus/wswan/rom.cpp')
-rw-r--r--src/devices/bus/wswan/rom.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/devices/bus/wswan/rom.cpp b/src/devices/bus/wswan/rom.cpp
index 2d089989989..1f839c7f8e3 100644
--- a/src/devices/bus/wswan/rom.cpp
+++ b/src/devices/bus/wswan/rom.cpp
@@ -27,7 +27,7 @@ DEFINE_DEVICE_TYPE(WS_ROM_EEPROM, ws_rom_eeprom_device, "ws_eeprom", "Wonderswan
DEFINE_DEVICE_TYPE(WS_ROM_WWITCH, ws_wwitch_device, "ws_wwitch", "WonderWitch")
-ws_rom_device::ws_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ws_rom_device::ws_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, const XTAL &clock) :
device_t(mconfig, type, tag, owner, clock),
device_ws_cart_interface(mconfig, *this),
m_base20(0),
@@ -46,31 +46,31 @@ ws_rom_device::ws_rom_device(const machine_config &mconfig, device_type type, co
{
}
-ws_rom_device::ws_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ws_rom_device::ws_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock) :
ws_rom_device(mconfig, WS_ROM_STD, tag, owner, clock)
{
}
-ws_rom_sram_device::ws_rom_sram_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ws_rom_sram_device::ws_rom_sram_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock) :
ws_rom_device(mconfig, WS_ROM_SRAM, tag, owner, clock),
m_nvram_base(0)
{
}
-ws_rom_sram_device::ws_rom_sram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ws_rom_sram_device::ws_rom_sram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, const XTAL &clock) :
ws_rom_device(mconfig, type, tag, owner, clock),
m_nvram_base(0)
{
}
-ws_rom_eeprom_device::ws_rom_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ws_rom_eeprom_device::ws_rom_eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock) :
ws_rom_device(mconfig, WS_ROM_EEPROM, tag, owner, clock),
m_eeprom_mode(0), m_eeprom_address(0), m_eeprom_command(0), m_eeprom_start(0), m_eeprom_write_enabled(0)
{
}
-ws_wwitch_device::ws_wwitch_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ws_wwitch_device::ws_wwitch_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock) :
ws_rom_sram_device(mconfig, WS_ROM_WWITCH, tag, owner, clock)
{
}