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author Olivier Galibert <galibert@pobox.com>2022-06-16 12:47:52 +0200
committer Olivier Galibert <galibert@pobox.com>2025-04-29 23:06:41 +0200
commit45d4cd52a8194f2ef9e0383cfb2e2a35634af6ff (patch)
tree4e8d8fcb7382a5e9e0bce5ec59939bcfbe67155a /src/devices/bus/scv/rom.cpp
parent5c14bcdfcb4aefb71b5b62387c4ad05dbeb3814e (diff)
full xtal conversionxtal
Diffstat (limited to 'src/devices/bus/scv/rom.cpp')
-rw-r--r--src/devices/bus/scv/rom.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/devices/bus/scv/rom.cpp b/src/devices/bus/scv/rom.cpp
index 8be6a020752..e5c802b6e0e 100644
--- a/src/devices/bus/scv/rom.cpp
+++ b/src/devices/bus/scv/rom.cpp
@@ -26,42 +26,42 @@ DEFINE_DEVICE_TYPE(SCV_ROM128K, scv_rom128_device, "scv_rom128",
DEFINE_DEVICE_TYPE(SCV_ROM128K_RAM4K, scv_rom128ram4_device, "scv_rom128_ram4", "SCV 128K + RAM 4K Carts")
-scv_rom8_device::scv_rom8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+scv_rom8_device::scv_rom8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, const XTAL &clock)
: device_t(mconfig, type, tag, owner, clock), device_scv_cart_interface(mconfig, *this)
{
}
-scv_rom8_device::scv_rom8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+scv_rom8_device::scv_rom8_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock)
: scv_rom8_device(mconfig, SCV_ROM8K, tag, owner, clock)
{
}
-scv_rom16_device::scv_rom16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+scv_rom16_device::scv_rom16_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock)
: scv_rom8_device(mconfig, SCV_ROM16K, tag, owner, clock)
{
}
-scv_rom32_device::scv_rom32_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+scv_rom32_device::scv_rom32_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock)
: scv_rom8_device(mconfig, SCV_ROM32K, tag, owner, clock)
{
}
-scv_rom32ram8_device::scv_rom32ram8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+scv_rom32ram8_device::scv_rom32ram8_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock)
: scv_rom8_device(mconfig, SCV_ROM32K_RAM8K, tag, owner, clock), m_ram_enabled(0)
{
}
-scv_rom64_device::scv_rom64_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+scv_rom64_device::scv_rom64_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock)
: scv_rom8_device(mconfig, SCV_ROM64K, tag, owner, clock), m_bank_base(0)
{
}
-scv_rom128_device::scv_rom128_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+scv_rom128_device::scv_rom128_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock)
: scv_rom8_device(mconfig, SCV_ROM128K, tag, owner, clock), m_bank_base(0)
{
}
-scv_rom128ram4_device::scv_rom128ram4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+scv_rom128ram4_device::scv_rom128ram4_device(const machine_config &mconfig, const char *tag, device_t *owner, const XTAL &clock)
: scv_rom8_device(mconfig, SCV_ROM128K_RAM4K, tag, owner, clock), m_bank_base(0), m_ram_enabled(0)
{
}