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author m1macrophage <168948267+m1macrophage@users.noreply.github.com>2026-03-07 06:51:53 -0800
committer GitHub <noreply@github.com>2026-03-07 09:51:53 -0500
commit14cec11c19130e4074070da1f15397c283d30f05 (patch)
tree0d08dbf42c6ca7081ca27f09ac0ea07a82a509ca /scripts
parent26ee71f4ba3252166733f5df47d4318eeb65b09b (diff)
machine/pit8253.cpp: Improved timing accuracy. (#15064)
* machine/pit8253.cpp: Improved timing accuracy. * The counter is loaded and decremented on the falling edge of CLK. * GATE and GATE transitions (for edge-sensitive modes) are sampled on the rising edge of CLK. * Mode 3 treats GATE as edge-sensitive. * In modes 2 and 3, GATE has an immediate effect on OUT. * Deferred the execution of `set_clock_signal`. * Removed 8253 timing workarounds from sixtrak. * pit8253.cpp: Ensure the recent fix for mode 3 does not yet apply to `set_clk` configurations.
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