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author couriersud <couriersud@gmx.org>2019-03-29 19:40:39 +0100
committer couriersud <couriersud@gmx.org>2019-03-29 19:40:39 +0100
commite4ff0d3322b1da0c747fd98d3100e4bea840bada (patch)
tree217daaab5b24b294322b0b25f3c6e5bed369d6ac /nl_examples
parenta0d2c0c25cf6802f73189ad45724dfbceee2ba23 (diff)
netlist: Improved MOS transistor model. [Couriersud]
This is a significant improvement to the MOS transistor model. It adds modelling of the Meyer capacitance model. This is a somewhat academic addition since the effects occur on a nanosecond time scale and have a huge impact on performance. I plan to make the capacitance model selectable. Both on a model level as well as by introducing a global solver parameter. The model delivers comparable results to LTSpice.
Diffstat (limited to 'nl_examples')
-rw-r--r--nl_examples/nmos_fet.cpp10
1 files changed, 6 insertions, 4 deletions
diff --git a/nl_examples/nmos_fet.cpp b/nl_examples/nmos_fet.cpp
index ffa67c1bf00..8a096af59ac 100644
--- a/nl_examples/nmos_fet.cpp
+++ b/nl_examples/nmos_fet.cpp
@@ -9,13 +9,15 @@
#include "netlist/devices/net_lib.h"
#include "netlist/analog/nld_twoterm.h"
-NETLIST_START(bjt)
+NETLIST_START(nmos)
/* Standard stuff */
CLOCK(clk, 100) // 100 Hz
SOLVER(Solver, 48000)
- PARAM(Solver.ACCURACY, 1e-7)
- PARAM(Solver.NR_LOOPS, 5000)
+ PARAM(Solver.ACCURACY, 1e-9)
+ PARAM(Solver.NR_LOOPS, 50000)
+ PARAM(Solver.DYNAMIC_TS, 1)
+ PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 1e-9)
ANALOG_INPUT(V5, 5)
ANALOG_INPUT(V3, 3.5)
@@ -40,7 +42,7 @@ NETLIST_START(bjt)
NET_C(RCE.1, M.D)
NET_C(RCE.2, GND)
- // capacitance over D - S
+ // capacitance over G - S
CAP(C, CAP_N(1))
NET_C(M.D, C.1)