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author couriersud <couriersud@arcor.de>2015-07-04 13:22:54 +0200
committer couriersud <couriersud@arcor.de>2015-07-04 13:23:15 +0200
commit07a7c190fdbb213ab40631c1399aff3070186461 (patch)
treef270f4e2ecf414d79775fc38a0625d1f82bc723a /nl_examples
parentd1b88dcbefc4084ee3b60a3a534af72867a9d5da (diff)
Added MM5837 Noise Generator used by Congo Bongo. [Couriersud]
Diffstat (limited to 'nl_examples')
-rw-r--r--nl_examples/congoBongo.c454
-rw-r--r--nl_examples/mm5837_noise.c36
2 files changed, 490 insertions, 0 deletions
diff --git a/nl_examples/congoBongo.c b/nl_examples/congoBongo.c
new file mode 100644
index 00000000000..b3479ebebac
--- /dev/null
+++ b/nl_examples/congoBongo.c
@@ -0,0 +1,454 @@
+#include "netlist/devices/net_lib.h"
+#include "netlist/devices/nld_system.h"
+#include "netlist/analog/nld_bjt.h"
+
+/* ----------------------------------------------------------------------------
+ * Library section header START
+ * ---------------------------------------------------------------------------*/
+
+#ifndef __PLIB_PREPROCESSOR__
+
+#define DM7416_GATE(_name) \
+ NET_REGISTER_DEV_X(DM7416_GATE, _name)
+
+#define DM7416_DIP(_name) \
+ NET_REGISTER_DEV_X(DM7416_DIP, _name)
+
+#define MB3614_DIP(_name) \
+ NET_REGISTER_DEV_X(MB3614_DIP, _name)
+
+#define LM358_DIP(_name) \
+ NET_REGISTER_DEV_X(LM358_DIP, _name)
+
+#define CD4001_NOR(_name) \
+ NET_REGISTER_DEV_X(CD4001_NOR, _name)
+
+#define CD4001_DIP(_name) \
+ NET_REGISTER_DEV_X(CD4001_dip, _name)
+
+
+NETLIST_EXTERNAL(congob_lib)
+
+#endif
+
+/* ----------------------------------------------------------------------------
+ * Library section header END
+ * ---------------------------------------------------------------------------*/
+
+
+NETLIST_START(dummy)
+// EESCHEMA NETLIST VERSION 1.1 (SPICE FORMAT) CREATION DATE: WED 01 JUL 2015 11:09:25 PM CEST
+// TO EXCLUDE A COMPONENT FROM THE SPICE NETLIST ADD [SPICE_NETLIST_ENABLED] USER FIELD SET TO: N
+// TO REORDER THE COMPONENT SPICE NODE SEQUENCE ADD [SPICE_NODE_SEQUENCE] USER FIELD AND DEFINE SEQUENCE: 2,1,0
+// SHEET NAME:/
+// IGNORED O_AUDIO0: O_AUDIO0 64 0
+// .END
+
+ SOLVER(Solver, 12000)
+
+ LOCAL_SOURCE(congob_lib)
+ INCLUDE(congob_lib)
+
+
+ CAP(C20, CAP_N(68))
+ CAP(C21, CAP_U(1))
+ CAP(C22, CAP_U(47))
+ CAP(C23, CAP_N(100))
+ CAP(C24, CAP_N(100))
+ CAP(C25, CAP_U(1))
+ CAP(C26, CAP_N(68))
+ CAP(C27, CAP_N(33))
+ CAP(C28, CAP_U(47))
+ CAP(C29, CAP_U(1))
+ CAP(C30, CAP_N(33))
+ CAP(C31, CAP_N(33))
+ CAP(C32, CAP_N(68))
+ CAP(C33, CAP_N(33))
+ CAP(C34, CAP_U(47))
+ CAP(C35, CAP_N(33))
+ CAP(C36, CAP_N(33))
+ CAP(C37, CAP_U(1))
+ CAP(C38, CAP_N(10))
+ CAP(C39, CAP_N(3.3))
+ CAP(C40, CAP_U(2.2))
+ CAP(C41, CAP_N(6.8))
+ CAP(C42, CAP_N(6.8))
+ CAP(C43, CAP_N(47))
+ CAP(C44, CAP_U(1))
+ CAP(C45, CAP_U(33))
+ CAP(C46, CAP_N(100))
+ CAP(C47, CAP_U(470))
+ CAP(C48, CAP_N(1.5))
+ CAP(C49, CAP_U(220))
+ CAP(C50, CAP_N(3.9))
+ CAP(C51, CAP_U(1))
+ CAP(C52, CAP_U(1))
+ CAP(C53, CAP_U(1))
+ CAP(C54, CAP_U(1))
+ CAP(C55, CAP_U(1))
+ CAP(C56, CAP_U(10))
+ CAP(C57, CAP_N(47))
+ CAP(C58, CAP_N(22))
+ CAP(C59, CAP_U(10))
+ CAP(C60, CAP_N(22))
+ CAP(C62, CAP_N(22))
+ DIODE(D1, "DIODE")
+ DIODE(D2, "DIODE")
+ DIODE(D3, "DIODE")
+ DIODE(D4, "DIODE")
+ DIODE(D5, "DIODE")
+ DIODE(D6, "DIODE")
+ DIODE(D7, "DIODE")
+ DIODE(D8, "DIODE")
+ ANALOG_INPUT(I_BASS_DRUM0, 0)
+ ANALOG_INPUT(I_CONGA_H0, 0)
+ ANALOG_INPUT(I_CONGA_L0, 0)
+ ANALOG_INPUT(I_GORILLA0, 0)
+ ANALOG_INPUT(I_RIM0, 0)
+ ANALOG_INPUT(I_V0, 0)
+ ANALOG_INPUT(I_V12, 0)
+ ANALOG_INPUT(I_V5, 0)
+ ANALOG_INPUT(I_V6, 0)
+ QBJT_EB(Q2, "2SC1941")
+ RES(R21, RES_K(10))
+ RES(R22, RES_K(47))
+ RES(R23, RES_K(47))
+ RES(R24, RES_K(10))
+ RES(R25, RES_K(47))
+ RES(R26, RES_K(22))
+ RES(R27, RES_K(10))
+ RES(R28, RES_K(470))
+ RES(R29, RES_K(1))
+ RES(R30, RES_K(240))
+ RES(R31, RES_K(10))
+ RES(R32, RES_K(47))
+ RES(R33, RES_K(47))
+ RES(R34, RES_K(47))
+ RES(R35, RES_K(47))
+ RES(R36, RES_K(22))
+ RES(R37, RES_K(10))
+ RES(R38, RES_M(1))
+ RES(R39, 330)
+ RES(R40, RES_K(390))
+ RES(R41, RES_K(10))
+ RES(R42, RES_K(47))
+ RES(R43, RES_K(47))
+ RES(R44, RES_K(47))
+ RES(R45, RES_K(47))
+ RES(R46, RES_K(22))
+ RES(R47, RES_K(10))
+ RES(R48, RES_M(1))
+ RES(R49, 220)
+ RES(R50, RES_K(390))
+ RES(R51, RES_K(10))
+ RES(R52, RES_K(22))
+ RES(R53, RES_K(22))
+ RES(R54, RES_K(22))
+ RES(R55, RES_K(22))
+ RES(R56, RES_K(10))
+ RES(R57, RES_K(4.7))
+ RES(R58, RES_M(1))
+ RES(R59, 470)
+ RES(R60, RES_M(2.2))
+ RES(R61, RES_M(2.2))
+ RES(R62, RES_K(200))
+ RES(R63, RES_K(22))
+ RES(R64, RES_K(22))
+ RES(R65, RES_K(20))
+ RES(R66, RES_K(20))
+ RES(R67, RES_K(20))
+ RES(R68, RES_K(20))
+ RES(R69, RES_K(20))
+ RES(R70, RES_K(100))
+ RES(R71, RES_K(150))
+ RES(R72, RES_K(330))
+ RES(R73, RES_K(1))
+ RES(R74, RES_K(1))
+ RES(R75, RES_K(470))
+ RES(R76, RES_K(10))
+ RES(R77, RES_K(20))
+ RES(R78, RES_K(47))
+ RES(R79, RES_K(22))
+ RES(R80, RES_K(20))
+ RES(R81, RES_K(10))
+ RES(R82, RES_K(100))
+ RES(R83, RES_K(51))
+ RES(R84, RES_K(51))
+ RES(R85, RES_K(51))
+ RES(R86, RES_K(51))
+ RES(R87, RES_K(100))
+ RES(R88, RES_K(2.2))
+ RES(R89, RES_K(10))
+ RES(R90, RES_K(100))
+ RES(R91, RES_K(10))
+ RES(R92, RES_K(15))
+ RES(R93, RES_K(15))
+ DM7416_DIP(XU6)
+ MB3614_DIP(XU13)
+ MB3614_DIP(XU16)
+ MB3614_DIP(XU17)
+ CD4001_DIP(XU18)
+ G501534_DIP(XU15)
+ CD4538_DIP(XU19)
+ MM5837_DIP(XU20)
+ NET_C(GND)
+ NET_C(D1.K, C21.2, R23.1)
+ NET_C(D1.A, C20.1, R22.1)
+ NET_C(XU13.1, C37.2, C36.1, R48.1)
+ NET_C(XU13.2, C35.2, R48.2)
+ NET_C(XU13.3, R44.1, R46.2, R45.1)
+ NET_C(XU13.4, R27.1, R21.1, R37.1, R31.1, R47.1, R41.1, R57.1, R51.1, C46.2, C45.2, XU17.4, R80.2, XU16.4, XU20.4, XU15.12, I_V12.Q)
+ NET_C(XU13.5, R54.1, R56.2, R55.1)
+ NET_C(XU13.6, C41.2, R58.2, R60.2)
+ NET_C(XU13.7, C44.2, C42.1, R58.1, R61.1)
+ NET_C(XU13.8, C29.2, C31.1, R38.1)
+ NET_C(XU13.9, C30.2, R38.2)
+ NET_C(XU13.10, R34.1, R36.2, R35.1)
+ NET_C(XU13.11, C22.2, R29.2, R25.2, R23.2, R22.2, XU6.1, XU6.5, C28.2, R39.2, R35.2, R33.2, R32.2, C34.2, R49.2, R45.2, R43.2, R42.2, C40.2, R59.2, R55.2, R53.2, R52.2, C43.2, R69.1, R64.1, C49.2, C48.2, C47.2, C46.1, C45.1, XU17.11, XU19.1, XU19.4, XU19.8, XU19.12, XU19.15, R81.1, C56.2, C55.2, C53.2, C52.2, XU18.1, XU18.2, XU18.7, XU18.12, XU18.13, C54.2, XU16.11, R84.1, R88.1, Q2.C, C58.2, C60.2, XU20.1, XU20.2, XU15.4, I_V0.Q)
+ NET_C(XU13.12, R24.1, R26.2, R25.1)
+ NET_C(XU13.13, C23.2, R28.2)
+ NET_C(XU13.14, C25.2, C24.1, R28.1)
+ NET_C(C25.1, R30.2)
+ NET_C(C24.2, C23.1, R29.1)
+ NET_C(C21.1, R24.2)
+ NET_C(C20.2, R21.2, XU6.6)
+ NET_C(C22.1, R27.2, R26.1)
+ NET_C(R30.1, R40.1, R50.1, R62.1, XU15.3)
+ NET_C(XU6.2, XU19.7, XU18.3, XU18.11, XU15.5, XU15.6, XU15.7, XU15.8, XU15.9, XU15.10, XU15.11, XU15.14)
+ NET_C(XU6.3, I_CONGA_L0.Q)
+ NET_C(XU6.4, C26.2, R31.2)
+ NET_C(XU6.7, I_BASS_DRUM0.Q)
+ NET_C(XU6.8, C38.2, R51.2)
+ NET_C(XU6.9, I_RIM0.Q)
+ NET_C(XU6.10, C32.2, R41.2)
+ NET_C(XU6.11, I_CONGA_H0.Q)
+ NET_C(XU6.12, XU16.3, R86.2, I_V6.Q)
+ NET_C(D2.K, C27.2, R33.1)
+ NET_C(D2.A, C26.1, R32.1)
+ NET_C(C29.1, R40.2)
+ NET_C(C31.2, C30.1, R39.1)
+ NET_C(C27.1, R34.2)
+ NET_C(C28.1, R37.2, R36.1)
+ NET_C(D3.K, C33.2, R43.1)
+ NET_C(D3.A, C32.1, R42.1)
+ NET_C(C37.1, R50.2)
+ NET_C(C36.2, C35.1, R49.1)
+ NET_C(C33.1, R44.2)
+ NET_C(C34.1, R47.2, R46.1)
+ NET_C(D4.K, C39.2, R53.1)
+ NET_C(D4.A, C38.1, R52.1)
+ NET_C(C44.1, R62.2)
+ NET_C(C42.2, C41.1, R59.1)
+ NET_C(C39.1, R54.2)
+ NET_C(C40.1, R57.2, R56.1)
+ NET_C(R60.1, R61.2, C43.1)
+ NET_C(R63.1, R64.2, C47.1, D5.K, XU18.5, XU18.6)
+ NET_C(R63.2, XU20.3)
+ NET_C(R65.1, R66.2, C48.1)
+ NET_C(R65.2, XU18.4)
+ NET_C(R66.1, R67.2, C50.2)
+ NET_C(R67.1, C49.1, XU17.10)
+ NET_C(R68.1, R69.2, XU17.9)
+ NET_C(R68.2, C50.1, XU17.8, C51.1)
+ NET_C(D5.A, XU19.16, R70.2, R76.2, R71.2, XU18.14, I_V5.Q)
+ NET_C(XU17.1, XU16.6, C62.1)
+ NET_C(XU17.2, R82.1, C62.2, R85.2)
+ NET_C(XU17.3, R83.1, R84.2)
+ NET_C(XU17.5, C55.1, R72.1, R73.1)
+ NET_C(XU17.6, XU17.7, R77.2)
+ NET_C(XU17.12, R80.1, R81.2, C56.1)
+ NET_C(XU17.13, R78.1, R79.2, R77.1)
+ NET_C(XU17.14, R79.1, R82.2, R83.2)
+ NET_C(C51.2, R78.2)
+ NET_C(XU19.2, R70.1, C52.1)
+ NET_C(XU19.3, XU19.13, R76.1)
+ NET_C(XU19.5, XU19.11, I_GORILLA0.Q)
+ NET_C(XU19.6, XU18.9)
+ NET_C(XU19.9, XU18.8)
+ NET_C(XU19.10, D7.K, R75.2)
+ NET_C(XU19.14, R71.1, C53.1)
+ NET_C(R72.2, D6.K, XU18.10)
+ NET_C(R73.2, D6.A)
+ NET_C(D7.A, R74.2)
+ NET_C(R74.1, R75.1, C54.1, XU16.10)
+ NET_C(XU16.1, R91.1, R92.2)
+ NET_C(XU16.2, R90.1, R91.2)
+ NET_C(XU16.5, R86.1, R87.2)
+ NET_C(XU16.7, R87.1, D8.K, R90.2)
+ NET_C(XU16.8, XU16.9, XU15.13)
+ NET_C(XU16.12, R93.1, C58.1)
+ NET_C(XU16.13, XU16.14, C57.1, C59.2)
+ NET_C(R85.1, Q2.B)
+ NET_C(R89.1, D8.A)
+ NET_C(R89.2, R88.2, Q2.E)
+ NET_C(R92.1, C57.2, R93.2)
+ NET_C(C59.1, XU15.1)
+ NET_C(C60.1, XU15.2)
+NETLIST_END()
+
+NETLIST_START(opamp)
+
+ /* Opamp model from
+ *
+ * http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm
+ *
+ * Bandwidth 1Mhz
+ *
+ */
+
+ /* Terminal definitions for calling netlists */
+
+ ALIAS(PLUS, G1.IP) // Positive input
+ ALIAS(MINUS, G1.IN) // Negative input
+ ALIAS(OUT, EBUF.OP) // Opamp output ...
+
+ ALIAS(GND, EBUF.ON) // GND terminal
+ ALIAS(VCC, DUMMY.I) // VCC terminal
+ DUMMY_INPUT(DUMMY)
+
+ /* The opamp model */
+
+ VCCS(G1)
+ PARAM(G1.RI, RES_K(1000))
+#if 1
+ PARAM(G1.G, 100) // typical OP-AMP amplification 100 * 1000 = 100000
+ RES(RP1, 1000)
+ CAP(CP1, 1.59e-5) // <== change to 1.59e-3 for 10Khz bandwidth
+#else
+ PARAM(G1.G, 1) // typical OP-AMP amplification 100 * 1000 = 100000
+ RES(RP1, 100000)
+ CAP(CP1, 1.59e-7) // <== change to 1.59e-3 for 10Khz bandwidth
+#endif
+ VCVS(EBUF)
+ PARAM(EBUF.RO, 50)
+ PARAM(EBUF.G, 1)
+
+// PARAM(EBUF.RI, 1e20)
+// NET_C(EBUF.ON, GND)
+
+ NET_C(G1.ON, GND)
+ NET_C(RP1.2, GND)
+ NET_C(CP1.2, GND)
+ NET_C(EBUF.IN, GND)
+
+ NET_C(RP1.1, G1.OP)
+ NET_C(CP1.1, RP1.1)
+
+ DIODE(DP,"1N914")
+ DIODE(DN,"1N914")
+
+ NET_C(DP.K, VCC)
+#if 1
+ NET_C(DP.A, DN.K, RP1.1)
+#else
+ RES(RDP, 1000)
+ RES(RDN, 1000)
+ NET_C(RDP.1, DP.A)
+ NET_C(RDN.1, DN.K)
+ NET_C(RDP.2, RDN.2, RP1.1)
+#endif
+ NET_C(DN.A, GND)
+
+ NET_C(EBUF.IP, RP1.1)
+
+NETLIST_END()
+
+NETLIST_START(MB3614_DIP)
+ SUBMODEL(opamp, op1)
+ SUBMODEL(opamp, op2)
+ SUBMODEL(opamp, op3)
+ SUBMODEL(opamp, op4)
+
+ ALIAS( 1, op1.OUT)
+ ALIAS( 2, op1.MINUS)
+ ALIAS( 3, op1.PLUS)
+
+ ALIAS( 7, op2.OUT)
+ ALIAS( 6, op2.MINUS)
+ ALIAS( 5, op2.PLUS)
+
+ ALIAS( 8, op3.OUT)
+ ALIAS( 9, op3.MINUS)
+ ALIAS(10, op3.PLUS)
+
+ ALIAS(14, op4.OUT)
+ ALIAS(13, op4.MINUS)
+ ALIAS(12, op4.PLUS)
+
+ NET_C(op1.GND, op2.GND, op3.GND, op4.GND)
+ NET_C(op1.VCC, op2.VCC, op3.VCC, op4.VCC)
+
+ ALIAS(11, op1.GND)
+ ALIAS( 4, op1.VCC)
+NETLIST_END()
+
+
+NETLIST_START(DM7416_DIP)
+ DM7416_GATE(s1)
+ DM7416_GATE(s2)
+ DM7416_GATE(s3)
+ DM7416_GATE(s4)
+ DM7416_GATE(s5)
+ DM7416_GATE(s6)
+
+ ALIAS( 1, s1.A)
+ ALIAS( 2, s1.Q)
+ ALIAS( 3, s2.A)
+ ALIAS( 4, s2.Q)
+ ALIAS( 5, s3.A)
+ ALIAS( 6, s3.Q)
+
+ ALIAS( 8, s4.Q)
+ ALIAS( 9, s4.A)
+ ALIAS(10, s5.Q)
+ ALIAS(11, s5.A)
+ ALIAS(12, s6.Q)
+ ALIAS(13, s6.A)
+NETLIST_END()
+
+NETLIST_START(CD4001_DIP)
+ CD4001_NOR(s1)
+ CD4001_NOR(s2)
+ CD4001_NOR(s3)
+ CD4001_NOR(s4)
+
+ ALIAS( 1, s1.A)
+ ALIAS( 2, s1.B)
+ ALIAS( 3, s1.Q)
+ ALIAS( 4, s2.Q)
+ ALIAS( 5, s2.A)
+ ALIAS( 6, s2.B)
+
+ ALIAS( 8, s3.A)
+ ALIAS( 9, s3.B)
+ ALIAS(10, s3.Q)
+ ALIAS(11, s4.Q)
+ ALIAS(12, s4.A)
+ ALIAS(13, s4.B)
+NETLIST_END()
+
+
+NETLIST_START(congob_lib)
+ TRUTHTABLE_START(DM7416_GATE, 1, 1, 0, "")
+ TT_HEAD(" A | Q ")
+ TT_LINE(" 0 | 1 |100")
+ TT_LINE(" 1 | 0 |100")
+ TT_FAMILY(".model DM7416 FAMILY(IVL=0.8 IVH=2.0 OVL=0.1 OVH=4.95 ORL=10.0 ORH=1.0e8)")
+ TRUTHTABLE_END()
+
+ TRUTHTABLE_START(CD4001_NOR, 2, 1, 0, "")
+ TT_HEAD("A , B | Q ")
+ TT_LINE("0,0|1|85")
+ TT_LINE("X,1|0|120")
+ TT_LINE("1,X|0|120")
+ TT_FAMILY(".model CD4000 FAMILY(TYPE=CD4000)")
+ TRUTHTABLE_END()
+
+
+ //LOCAL_LIB_ENTRY(LM324_DIP)
+ //LOCAL_LIB_ENTRY(LM358_DIP)
+ LOCAL_LIB_ENTRY(CD4001_DIP)
+ LOCAL_LIB_ENTRY(DM7416_DIP)
+ LOCAL_LIB_ENTRY(MB3614_DIP)
+
+NETLIST_END()
diff --git a/nl_examples/mm5837_noise.c b/nl_examples/mm5837_noise.c
new file mode 100644
index 00000000000..7afe2b6e54d
--- /dev/null
+++ b/nl_examples/mm5837_noise.c
@@ -0,0 +1,36 @@
+/*
+ * mm5837_noise.c
+ *
+ */
+
+#include "netlist/devices/net_lib.h"
+
+NETLIST_START(ne555_astable)
+
+ /*
+ * Astable ne555
+ *
+ */
+
+ /* Standard stuff */
+
+ SOLVER(Solver, 48000)
+
+ ANALOG_INPUT(V12, 12) // 5V
+
+ /* Wiring up the ne555 */
+
+ // astable NE555, 1.13 ms period
+
+ MM5837_DIP(NOISE)
+
+ RES(R, 10000)
+
+ NET_C(NOISE.1, NOISE.2, R.2, GND)
+ NET_C(NOISE.4, V12)
+
+ NET_C(NOISE.3, R.1)
+
+ LOG(log3, NOISE.3)
+
+NETLIST_END()