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author Aaron Giles <aaron@aarongiles.com>2021-05-23 18:13:07 -0700
committer Aaron Giles <aaron@aarongiles.com>2021-05-23 18:13:07 -0700
commit9e1ed0acf4fd7cc4067f729f5ea709298b49de95 (patch)
tree47ba666f1fa944dff8103f1b39302be3fc2f7cb9 /3rdparty
parent48bde2d64798311d6581cf7102fd1631803dca87 (diff)
ymfm: Improve OPQ behavior for timers and register access. Add YM3533 device and use that instead of YM3806.
Diffstat (limited to '3rdparty')
-rw-r--r--3rdparty/ymfm/src/ymfm_opq.cpp18
-rw-r--r--3rdparty/ymfm/src/ymfm_opq.h21
2 files changed, 28 insertions, 11 deletions
diff --git a/3rdparty/ymfm/src/ymfm_opq.cpp b/3rdparty/ymfm/src/ymfm_opq.cpp
index e886722876b..02d8c35a5a8 100644
--- a/3rdparty/ymfm/src/ymfm_opq.cpp
+++ b/3rdparty/ymfm/src/ymfm_opq.cpp
@@ -31,6 +31,8 @@
#include "ymfm_opq.h"
#include "ymfm_fm.ipp"
+#define TEMPORARY_DEBUG_PRINTS (1)
+
//
// OPQ (aka YM3806/YM3533)
//
@@ -126,9 +128,11 @@ bool opq_registers::write(uint16_t index, uint8_t data, uint32_t &channel, uint3
// detune/multiple share a register based on the MSB of what is written
// remap the multiple values to 100-11F
- if ((index & 0xe0) == 0x40 && bitfield(data, 7))
+ if ((index & 0xe0) == 0x40 && bitfield(data, 7) != 0)
index += 0xc0;
+ m_regdata[index] = data;
+
// handle writes to the key on index
if (index == 0x05)
{
@@ -425,16 +429,17 @@ uint8_t ym3806::read_status()
uint8_t ym3806::read(uint32_t offset)
{
uint8_t result = 0xff;
- switch (offset & 1)
+ switch (offset)
{
- case 0: // data port (unused)
- debug::log_unexpected_read_write("Unexpected read from YM3806 offset %d\n", offset & 3);
+ case 0: // status port
+ result = read_status();
break;
- case 1: // status port, YM2203 compatible
- result = read_status();
+ default: // unknown
+ debug::log_unexpected_read_write("Unexpected read from YM3806 offset %02X\n", offset);
break;
}
+if (TEMPORARY_DEBUG_PRINTS && offset != 0) printf("Read %02X = %02X\n", offset, result);
return result;
}
@@ -446,6 +451,7 @@ uint8_t ym3806::read(uint32_t offset)
void ym3806::write(uint32_t offset, uint8_t data)
{
+if (TEMPORARY_DEBUG_PRINTS && (offset != 3 || data != 0x71)) printf("Write %02X = %02X\n", offset, data);
// write the FM register
m_fm.write(offset, data);
}
diff --git a/3rdparty/ymfm/src/ymfm_opq.h b/3rdparty/ymfm/src/ymfm_opq.h
index a61dee5ba54..8060c30575a 100644
--- a/3rdparty/ymfm/src/ymfm_opq.h
+++ b/3rdparty/ymfm/src/ymfm_opq.h
@@ -176,15 +176,15 @@ public:
// system-wide registers
uint32_t timer_a_value() const { return 0; }
- uint32_t timer_b_value() const { return byte(0x03, 0, 8); }
+ uint32_t timer_b_value() const { return byte(0x03, 2, 6) | 0xc0; } // ???
uint32_t csm() const { return 0; }
- uint32_t reset_timer_b() const { return byte(0x14, 5, 1); }
+ uint32_t reset_timer_b() const { return byte(0x03, 0, 1); } // ???
uint32_t reset_timer_a() const { return 0; }
- uint32_t enable_timer_b() const { return byte(0x14, 3, 1); }
+ uint32_t enable_timer_b() const { return byte(0x03, 0, 1); } // ???
uint32_t enable_timer_a() const { return 0; }
- uint32_t load_timer_b() const { return byte(0x14, 1, 1); }
+ uint32_t load_timer_b() const { return byte(0x03, 0, 1); } // ???
uint32_t load_timer_a() const { return 0; }
- uint32_t lfo_enable() const { return byte(0x04, 4, 1) ^ 1; }
+ uint32_t lfo_enable() const { return byte(0x04, 3, 1) ^ 1; }
uint32_t lfo_rate() const { return byte(0x04, 0, 3); }
// per-channel registers
@@ -279,6 +279,17 @@ protected:
fm_engine m_fm; // core FM engine
};
+
+// ======================> ym3533
+
+class ym3533 : public ym3806
+{
+public:
+ // constructor
+ ym3533(ymfm_interface &intf) :
+ ym3806(intf) { }
+};
+
}