summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/m6502/ost2xxx.lst
blob: 4468fe1447605091f090abd079937c3087cf84d6 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
# license:BSD-3-Clause
# copyright-holders:Olivier Galibert
# m65c02 opcodes, with a twist

brk_st_imp
	if(irq_taken || nmi_pending) {
		read_pc_noinc();
	} else {
		read_pc();
	}
	write(SP, PC >> 8);
	dec_SP();
	write(SP, PC);
	dec_SP();
	write(SP, irq_taken || nmi_pending ? P & ~F_B : P);
	dec_SP();
	set_irq_service(true);
	if(irq_taken && nmi_pending) { // NMI is not present on actual parts
		PC = read_vector(0x7ffa);
		PC = set_h(PC, read_vector(0x7ffb));
		nmi_pending = false;
	} else if(irq_taken) {
		TMP = acknowledge_irq();
		PC = read_vector(0x7ff8 - (TMP << 1));
		PC = set_h(PC, read_vector(0x7ff9 - (TMP << 1)));
	} else {
		PC = read_vector(0x7ffe);
		PC = set_h(PC, read_vector(0x7fff));
	}
	irq_taken = false;
	P = (P | F_I) & ~F_D; // Do *not* move after the prefetch
	prefetch();
	inst_state = -1;

rti_st_imp
	read_pc_noinc();
	read(SP);
	inc_SP();
	P = read(SP) | (F_B|F_E);
	inc_SP();
	PC = read(SP);
	inc_SP();
	PC = set_h(PC, read(SP));
	set_irq_service(false);
	prefetch();

reset_st
	read_arg(0xffff);
	read_pc_noinc();
	read(SP); dec_SP();
	read(SP); dec_SP();
	read(SP); dec_SP();
	P = (P | F_I) & ~F_D;
	set_irq_service(false);
	PC = read_vector(0x7ffc);
	PC = set_h(PC, read_vector(0x7ffd));
	prefetch();
	inst_state = -1;