/language/Belarusian/

'Atom feed' href='http://127.0.0.1:10000/mame/atom/src/devices/machine/upd7002.cpp?h=master' type='application/atom+xml'/>
summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/machine/upd7002.cpp
blob: 2d4d2ad4bc64f980a5dd1229ad9351700ccd1c7e (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
// license:BSD-3-Clause
// copyright-holders:Gordon Jefferyes
/******************************************************************************
    uPD7002 Analogue to Digital Converter

    MESS Driver By:

    Gordon Jefferyes
    mess_bbc@gjeffery.dircon.co.uk

******************************************************************************/

#include "emu.h"
#include "upd7002.h"


/* Device Interface */

DEFINE_DEVICE_TYPE(UPD7002, upd7002_device, "upd7002", "uPD7002 ADC")

upd7002_device::upd7002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
	: device_t(mconfig, UPD7002, tag, owner, clock)
	, m_status(0)
	, m_data1(0)
	, m_data0(0)
	, m_digitalvalue(0)
	, m_conversion_counter(0)
	, m_get_analogue_cb(*this)
	, m_eoc_cb(*this)
{
}

//-------------------------------------------------
//  device_start - device-specific startup
//-------------------------------------------------

void upd7002_device::device_start()
{
	m_get_analogue_cb.resolve();
	m_eoc_cb.resolve();

	// register for state saving
	save_item(NAME(m_status));
	save_item(NAME(m_data1));
	save_item(NAME(m_data0));
	save_item(NAME(m_digitalvalue));
	save_item(NAME(m_conversion_counter));
}

//-------------------------------------------------
//  device_reset - device-specific reset
//-------------------------------------------------

void upd7002_device::device_reset()
{
	m_status = 0;
	m_data1 = 0;
	m_data0 = 0;
	m_digitalvalue = 0;
	m_conversion_counter = 0;
}


/*****************************************************************************
 Implementation
*****************************************************************************/


READ_LINE_MEMBER( upd7002_device::eoc_r )
{
	return BIT(m_status, 7);
}


void upd7002_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
	switch (id)
	{
	case TIMER_CONVERSION_COMPLETE:
		{
			int counter_value = param;
			if (counter_value == m_conversion_counter)
			{
				// this really always does a 12 bit conversion
				m_data1 = m_digitalvalue >> 8;
				m_data0 = m_digitalvalue & 0xf0;

				// set the status register with top 2 MSB, not busy and conversion complete
				m_status = (m_status & 0x0f) | ((m_data1 & 0xc0) >> 2) | 0x40;

				// call the EOC function with EOC from status
				// eoc_r(0) this has just been set to 0
				if (!m_eoc_cb.isnull()) m_eoc_cb(0);
				m_conversion_counter=0;
			}
		}
		break;
	default:
		throw emu_fatalerror("Unknown id in upd7002_device::device_timer");
	}
}


uint8_t upd7002_device::read(offs_t offset)
{
	switch (offset & 0x03)
	{
	case 0:
		return m_status;

	case 1:
		return m_data1;

	case 2:
	case 3:
		return m_data0;
	}
	return 0;
}



void upd7002_device::write(offs_t offset, uint8_t data)
{
	/* logerror("write to uPD7002 $%02X = $%02X\n",offset,data); */

	switch (offset & 0x03)
	{
	case 0:
		/*
		Data Latch/AD start
		    D0 and D1 together define which one of the four input channels is selected
		    D2 flag input, normally set to 0????
		    D3 defines whether an 8 (0) or 12 (1) bit resolution conversion should occur
		    D4 to D7 not used.

		    an 8  bit conversion typically takes 4ms
		    an 12 bit conversion typically takes 10ms

		    writing to this register will initiate a conversion.
		*/

		/* set D6=0 busy ,D7=1 conversion not complete */
		m_status=(data & 0x0f) | 0x80;

		// call the EOC function with EOC from status
		// eoc_r(0) this has just been set to 1
		if (!m_eoc_cb.isnull()) m_eoc_cb(1);

		/* the uPD7002 works by sampling the analogue value at the start of the conversion
		   so it is read hear and stored until the end of the A to D conversion */

		// this function should return a 16 bit value.
		m_digitalvalue = m_get_analogue_cb(m_status & 0x03);

		m_conversion_counter++;

		// call a timer to start the conversion
		if (m_status & 0x08)
		{
			// 12 bit conversion takes 10ms
			timer_set(attotime::from_msec(10), TIMER_CONVERSION_COMPLETE, m_conversion_counter);
		}
		else
		{
			// 8 bit conversion takes 4ms
			timer_set(attotime::from_msec(4), TIMER_CONVERSION_COMPLETE, m_conversion_counter);
		}
		break;

	case 1:
	case 2:
		/* Nothing */
		break;

	case 3:
		/* Test Mode: Used for inspecting the device, The data input-output terminals assume an input
		      state and are connected to the A/D counter. Therefore, the A/D conversion data
		      read out after this is meaningless.
		*/
		break;
	}
}
"w"> } WRITE8_MEMBER(control_w) { membank("bank1")->set_entry(data&0x1); if (((m_control & 0x60) != 0x60) && ((data & 0x60) == 0x60)) { m_ttlrom_offset = 0; } m_control = data; } DECLARE_READ8_MEMBER(vram_r); DECLARE_WRITE8_MEMBER(vram_w); void quickpick5(machine_config &config); void quickpick5_main(address_map &map); protected: virtual void machine_start() override; virtual void machine_reset() override; virtual void video_start() override; private: required_device<cpu_device> m_maincpu; required_device<palette_device> m_palette; required_device<k05324x_device> m_k053245; required_device<k051649_device> m_k051649; required_device<k053252_device> m_k053252; required_device<gfxdecode_device> m_gfxdecode; required_device<okim6295_device> m_oki; int m_ttl_gfx_index; tilemap_t *m_ttl_tilemap; uint8_t m_control; int m_ttlrom_offset; uint8_t m_vram[0x1000]; bool m_title_hack; int m_ccu_int_time, m_ccu_int_time_count; }; WRITE8_MEMBER(quickpick5_state::ccu_int_time_w) { logerror("ccu_int_time rewritten with value of %02x\n", data); m_ccu_int_time = data; } READ8_MEMBER(quickpick5_state::vram_r) { if ((m_control & 0x10) == 0x10) { offset |= 0x800; if ((offset >= 0x800) && (offset <= 0x880)) { return m_k051649->k051649_waveform_r(space, offset & 0x7f); } else if ((offset >= 0x8e0) && (offset <= 0x8ff)) { return m_k051649->k051649_test_r(space, offset-0x8e0); } } if ((m_control & 0x60) == 0x60) { uint8_t *ROM = memregion("ttl")->base(); return ROM[m_ttlrom_offset++]; } return m_vram[offset]; } WRITE8_MEMBER(quickpick5_state::vram_w) { if ((m_control & 0x10) == 0x10) { offset |= 0x800; if ((offset >= 0x800) && (offset < 0x880)) { m_k051649->k051649_waveform_w(space, offset-0x800, data); return; } else if (offset < 0x88a) { m_k051649->k051649_frequency_w(space, offset-0x880, data); return; } else if (offset < 0x88f) { m_k051649->k051649_volume_w(space, offset-0x88a, data); return; } else if (offset < 0x890) { m_k051649->k051649_keyonoff_w(space, 0, data); return; } m_k051649->k051649_test_w(space, offset-0x8e0, data); return; } m_vram[offset] = data; m_ttl_tilemap->mark_tile_dirty(offset>>1); } void quickpick5_state::video_start() { static const gfx_layout charlayout = { 8, 8, // 8x8 4096, // # of tiles 4, // 4bpp { 0, 1, 2, 3 }, // plane offsets { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 }, // X offsets { 0*8*4, 1*8*4, 2*8*4, 3*8*4, 4*8*4, 5*8*4, 6*8*4, 7*8*4 }, // Y offsets 8*8*4 }; int gfx_index; /* find first empty slot to decode gfx */ for (gfx_index = 0; gfx_index < MAX_GFX_ELEMENTS; gfx_index++) if (m_gfxdecode->gfx(gfx_index) == nullptr) break; assert(gfx_index != MAX_GFX_ELEMENTS); // decode the ttl layer's gfx m_gfxdecode->set_gfx(gfx_index, std::make_unique<gfx_element>(m_palette, charlayout, memregion("ttl")->base(), 0, m_palette->entries() / 16, 0)); m_ttl_gfx_index = gfx_index; m_ttl_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(quickpick5_state::ttl_get_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); m_ttl_tilemap->set_transparent_pen(0); m_ttl_tilemap->set_scrollx(80); m_ttl_tilemap->set_scrolly(28); m_ttlrom_offset = 0; m_ccu_int_time_count = 0; m_ccu_int_time = 20; } TILE_GET_INFO_MEMBER(quickpick5_state::ttl_get_tile_info) { uint8_t *lvram = &m_vram[0]; int attr, code; attr = lvram[BYTE_XOR_LE((tile_index<<1)+1)]; code = lvram[BYTE_XOR_LE((tile_index<<1))] | ((attr & 0xf) << 8); attr >>= 3; attr &= ~1; SET_TILE_INFO_MEMBER(m_ttl_gfx_index, code, attr, 0); } uint32_t quickpick5_state::screen_update_quickpick5(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { bitmap.fill(0, cliprect); screen.priority().fill(0, cliprect); m_title_hack = false; m_k053245->sprites_draw(bitmap, cliprect, screen.priority()); if (!m_title_hack) { m_ttl_tilemap->draw(screen, bitmap, cliprect, 0, 0xff); } return 0; } K05324X_CB_MEMBER(quickpick5_state::sprite_callback) { *code = (*code & 0x7ff); *color = (*color & 0x003f); if (*code == 0x520) { m_title_hack = true; } } TIMER_DEVICE_CALLBACK_MEMBER(quickpick5_state::scanline) { int scanline = param; // z80 /IRQ is connected to the IRQ1(vblank) pin of k053252 CCU if(scanline == 255) { m_maincpu->set_input_line(0, ASSERT_LINE); } // z80 /NMI is connected to the IRQ2 pin of k053252 CCU // the following code is emulating INT_TIME of the k053252, this code will go away // when the new konami branch is merged. m_ccu_int_time_count--; if (m_ccu_int_time_count <= 0) { m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE); m_ccu_int_time_count = m_ccu_int_time; } } void quickpick5_state::quickpick5_main(address_map &map) { map(0x0000, 0x7fff).rom().region("maincpu", 0); map(0x8000, 0xbfff).bankr("bank1"); map(0xc000, 0xdbff).ram().share("nvram"); map(0xdc00, 0xdc0f).rw(m_k053252, FUNC(k053252_device::read), FUNC(k053252_device::write)); map(0xdc40, 0xdc4f).rw(this, FUNC(quickpick5_state::k244_r), FUNC(quickpick5_state::k244_w)); map(0xdc80, 0xdc80).portr("DSW3"); map(0xdc81, 0xdc81).portr("DSW4"); map(0xdcc0, 0xdcc0).portr("DSW1"); map(0xdcc1, 0xdcc1).portr("DSW2"); map(0xdd00, 0xdd00).nopw(); map(0xdd40, 0xdd40).noprw(); map(0xdd80, 0xdd80).rw(this, FUNC(quickpick5_state::control_r), FUNC(quickpick5_state::control_w)); map(0xddc0, 0xddc0).nopw(); map(0xde00, 0xde00).nopw(); map(0xde40, 0xde40).w(m_oki, FUNC(okim6295_device::write)); map(0xe000, 0xefff).rw(this, FUNC(quickpick5_state::vram_r), FUNC(quickpick5_state::vram_w)); map(0xf000, 0xf7ff).ram().w(m_palette, FUNC(palette_device::write8)).share("palette"); map(0xf800, 0xffff).rw(this, FUNC(quickpick5_state::k245_r), FUNC(quickpick5_state::k245_w)); } static INPUT_PORTS_START( quickpick5 ) PORT_START("DSW1") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3") PORT_DIPSETTING( 0x04, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4") PORT_DIPSETTING( 0x08, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:5") PORT_DIPSETTING( 0x10, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:6") PORT_DIPSETTING( 0x20, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7") PORT_DIPSETTING( 0x40, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") PORT_DIPSETTING( 0x80, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_START("DSW2") PORT_DIPNAME( 0x01, 0x00, "Reset Switch" ) PORT_DIPLOCATION("SW2:1") PORT_DIPSETTING( 0x01, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x02, 0x00, "Global Stats" ) PORT_DIPLOCATION("SW2:2") PORT_DIPSETTING( 0x02, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x04, 0x00, "Last Game Stats" ) PORT_DIPLOCATION("SW2:3") PORT_DIPSETTING( 0x04, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4") PORT_DIPSETTING( 0x08, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") PORT_DIPSETTING( 0x10, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") PORT_DIPSETTING( 0x20, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") PORT_DIPSETTING( 0x40, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8") PORT_DIPSETTING( 0x80, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_START("DSW3") PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1") PORT_DIPSETTING( 0x01, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2") PORT_DIPSETTING( 0x02, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3") PORT_DIPSETTING( 0x04, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4") PORT_DIPSETTING( 0x08, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5") PORT_DIPSETTING( 0x10, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6") PORT_DIPSETTING( 0x20, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7") PORT_DIPSETTING( 0x40, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8") PORT_DIPSETTING( 0x80, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_START("DSW4") PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:1") PORT_DIPSETTING( 0x01, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:2") PORT_DIPSETTING( 0x02, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:3") PORT_DIPSETTING( 0x04, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:4") PORT_DIPSETTING( 0x08, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:5") PORT_DIPSETTING( 0x10, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:6") PORT_DIPSETTING( 0x20, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:7") PORT_DIPSETTING( 0x40, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW4:8") PORT_DIPSETTING( 0x80, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) INPUT_PORTS_END void quickpick5_state::machine_start() { membank("bank1")->configure_entries(0, 0x2, memregion("maincpu")->base()+0x8000, 0x4000); membank("bank1")->set_entry(0); } void quickpick5_state::machine_reset() { } MACHINE_CONFIG_START(quickpick5_state::quickpick5) /* basic machine hardware */ MCFG_DEVICE_ADD("maincpu", Z80, XTAL(32'000'000)/4) // z84c0008pec 8mhz part, 32Mhz xtal verified on PCB, divisor unknown MCFG_DEVICE_PROGRAM_MAP(quickpick5_main) MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", quickpick5_state, scanline, "screen", 0, 1) MCFG_DEVICE_ADD("k053252", K053252, XTAL(32'000'000)/4) /* K053252, xtal verified, divider not verified */ MCFG_K053252_INT1_ACK_CB(WRITELINE(*this, quickpick5_state, vbl_ack_w)) MCFG_K053252_INT2_ACK_CB(WRITELINE(*this, quickpick5_state, nmi_ack_w)) MCFG_K053252_INT_TIME_CB(WRITE8(*this, quickpick5_state, ccu_int_time_w)) /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(59.62) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(20)) MCFG_SCREEN_SIZE(64*8, 33*8) MCFG_SCREEN_VISIBLE_AREA(88, 456-1, 28, 256-1) MCFG_SCREEN_UPDATE_DRIVER(quickpick5_state, screen_update_quickpick5) MCFG_SCREEN_PALETTE("palette") MCFG_PALETTE_ADD("palette", 1024) MCFG_PALETTE_ENABLE_SHADOWS() MCFG_PALETTE_FORMAT(xBBBBBGGGGGRRRRR) MCFG_DEVICE_ADD("k053245", K053245, 0) MCFG_GFX_PALETTE("palette") MCFG_K05324X_OFFSETS(-(44+80), 20) MCFG_K05324X_CB(quickpick5_state, sprite_callback) MCFG_GFXDECODE_ADD("gfxdecode", "palette", empty) MCFG_NVRAM_ADD_0FILL("nvram") /* sound hardware */ MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_K051649_ADD("k051649", XTAL(32'000'000)/18) // xtal is verified, divider is not MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.45) MCFG_DEVICE_ADD("oki", OKIM6295, XTAL(32'000'000)/18, okim6295_device::PIN7_HIGH) MCFG_SOUND_ROUTE(0, "mono", 1.0) MCFG_SOUND_ROUTE(1, "mono", 1.0) MACHINE_CONFIG_END ROM_START( quickp5 ) ROM_REGION( 0x10000, "maincpu", 0 ) /* main program */ ROM_LOAD( "117.10e.bin", 0x000000, 0x010000, CRC(3645e1a5) SHA1(7d0d98772f3732510e7a58f50a622fcec74087c3) ) ROM_REGION( 0x40000, "k053245", 0 ) /* sprites */ ROM_LOAD32_BYTE( "117-a02-7k.bin", 0x000003, 0x010000, CRC(745a1dc9) SHA1(33d876fb70cb802d62f87ad3721740e0961c7bec) ) ROM_LOAD32_BYTE( "117-a03-7l.bin", 0x000002, 0x010000, CRC(07ec6db7) SHA1(7a94efc5f313fee6b9b63b7d2b6ba1cbf4158900) ) ROM_LOAD32_BYTE( "117-a04-3l.bin", 0x000001, 0x010000, CRC(08dba5df) SHA1(2174be21c5a7db31ccc20ca0b88e4a94145776a5) ) ROM_LOAD32_BYTE( "117-a05-3k.bin", 0x000000, 0x010000, CRC(9b2d0501) SHA1(3f1c69ef101153da5ac3335585541006c42e954d) ) ROM_REGION( 0x80000, "ttl", 0 ) /* TTL text tilemap characters? */ ROM_LOAD( "117-18e.bin", 0x000000, 0x020000, CRC(10e0d1e2) SHA1(f4ba190814d5e3f3e910c9da24845b6ddb259bff) ) ROM_REGION( 0x20000, "oki", 0 ) /* OKIM6295 samples */ ROM_LOAD( "117-a01-2e.bin", 0x000000, 0x020000, CRC(3d8fbd01) SHA1(f350da2a4e7bfff9975188a39acf73415bd85b3d) ) ROM_REGION( 0x80000, "pals", 0 ) ROM_LOAD( "054590.11g", 0x000000, 0x040000, CRC(0442621c) SHA1(2e79bea4e37028a3c1223fb4e3b3e12ccad2b39b) ) ROM_LOAD( "054591.12g", 0x040000, 0x040000, CRC(eaa92d8f) SHA1(7a430f11127148f0c035973ce21cfec4cb60ce9d) ) ROM_END GAME( 1995, quickp5, 0, quickpick5, quickpick5, quickpick5_state, 0, ROT0, "Konami", "Quick Pick 5", MACHINE_NOT_WORKING)