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* | netlist: clang lint fixes and pedantic warning fixes. (nw) couriersud2019-04-129-25/+32
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* | netlist: improved and fast LM3900 model. couriersud2019-04-121-4/+37
| | | | | | | | | | | | LM3900 model 3 only has half the number of BJTs compared to model 1 but delivers comparable results for Money Money. Model 3 follows the datasheet. I left code for Model 0 and 2 in for educational reasons.
* | netlist: Fix handling of current sources when converting SPICE nets. couriersud2019-04-121-1/+15
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* | Adjusted LM3900 model, fixed clipping in zaccaria. couriersud2019-04-121-7/+8
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* | netlist: Add more SPICE elements to the conversion code. couriersud2019-04-122-4/+31
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* | netlist: LM3900 couriersud2019-04-121-2/+87
| | | | | | | | | | - Align LM3900 pin names with other opamps - Add a better voltage clamping model - Add high precision model (disabled due to performance)
* | flopimg.h: implemented threshold to accept disk images with a few excess and ↵ Joakim Larsson Edstrom2019-04-113-3/+30
| | | | | | | | empty tracks at the end used by HFE and DSK loaders for now
* | (nw) suppress side effects, standardise #include guards Vas Crabb2019-04-12168-764/+957
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* | netlist: Add LM2902, code refactoring. (nw) couriersud2019-04-076-45/+33
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* | netlist: MB3614 again, function controlled VARCLOCK and other couriersud2019-04-0710-36/+88
| | | | | | | | | | | | | | | | | | | | | | improvements. - fix MB3614 parameter - Added VARCLOCK which derives step size from function - optimized function handling in CS and VS - fixed a bug in ppreprocessor - add trunc to pfunction - added opamp_amplification_curve to derive characteristic amplification curve
* | netlist: TYPE=2 opamp model and MB3614 fixes. couriersud2019-04-077-63/+114
| | | | | | | | | | | | | | | | - Untie diode code - Fix some typos - add TYPE=2 opamp model which omits output voltage limitation Useful for determining causes of non-convergence - Fix MB3614 opamp parameters to match datasheet
* | netlist: indentation. (nw) couriersud2019-03-311-345/+346
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* | Netlist: Move generic models into nld_generic_models. (nw) couriersud2019-03-312-269/+217
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* | netlist: Refactored model code. (nw) couriersud2019-03-317-112/+108
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* | Netlist: Add global parameter to disable semi-conductor capacitance couriersud2019-03-317-75/+158
|/ | | | | | | | | modelling. [Couriersud] Added global NETLIST.DEFAULT_MOS_CAPMODEL parameter. Setting this to zero disables using capitance modelling in mos models. On a per mos device basis this can be achieved by adding CAPMODEL=0 to the model definition, e.g. MOSFET(X, "NMOS(CAPMODEL=0)") Improve MOSFET convergence by using log-stepping.
* netlist: Timing bug fix. Affects regression tests. [Couriersud] couriersud2019-03-291-1/+1
| | | | | | This fixes a rounding issue in the ptime code. This bug surfaced when I tested netlist with picosecond resolution in ptime. This will have a small impact on every driver using netlist. For breakout, it required to adjust the color overlay.
* netlist: Improved MOS transistor model. [Couriersud] couriersud2019-03-2910-117/+260
| | | | | | | | | This is a significant improvement to the MOS transistor model. It adds modelling of the Meyer capacitance model. This is a somewhat academic addition since the effects occur on a nanosecond time scale and have a huge impact on performance. I plan to make the capacitance model selectable. Both on a model level as well as by introducing a global solver parameter. The model delivers comparable results to LTSpice.
* (nw) Clean up the mess on master Vas Crabb2019-03-26216-8669/+12175
| | | | | | | | | | | | | This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at 598cd5227223c3b04ca31f0dbc1981256d9ea3ff. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
* Revert "conflict resolution (nw)" andreasnaive2019-03-25216-12175/+8669
| | | | | This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing changes made to 009cba4fb8102102168ef32870892438327f3705.
* netlist: add MOSFET model. [Couriersud] couriersud2019-03-2514-116/+759
| | | | | | | | | | | | | | | | | | | - added MOSFET model. Currently capacitances are not modelled. This is a 3-pin model (Bulk connected to Source) with provisions to extend it to 4-pin at a later stage. - Add a capacitor generic model which is charge conserving. Switch netlist to use this model instead of constant capacity model. - Start putting constants into a central place. Please expect minor timing differences due to a different numerical path. The cmos inverter example illustrates the analog implementation of a cmos inverter gate. These were used a lot back in the 70s/80s to generate sinus waves. The model should also be able to better emulate 4066 analog switches. The addition of a relatively simple capacitor model is planned at a later stage. Expect everything from the MOSFET model at the current stage. Wrong results as well as convergence issues and crashes.
* srcclean (nw) Vas Crabb2019-03-243-3/+3
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* spectrum: Added the Opus Discovery disc system, and OPD floppy format. Nigel Barnes2019-03-222-0/+99
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* Merge pull request #4778 from AmatCoder/AmatCoder-dsk_dsk-1 ajrhacker2019-03-191-0/+6
|\ | | | | dsk_dsk.cpp: Avoid segfault if double sided DSK image is loaded on si…
| * dsk_dsk.cpp: Avoid segfault if double sided DSK image is loaded on simple ↵ AmatCoder2019-03-191-0/+6
| | | | | | | | | | | | sided disk device MAME crashed if user was trying to load a dsk image with more heads or tracks than disk device supports. Now the error 'Incompatible image format' is raised.
* | netlist: refactor model code. (nw) couriersud2019-03-187-77/+109
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* | Fix indentation. (nw) couriersud2019-03-181-287/+287
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* | netlist: improve readability. (nw) couriersud2019-03-183-9/+8
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* | netlist: Added B-E and B-C capacitance to EB model. [Couriersud] couriersud2019-03-173-15/+54
| | | | | | | | | | Despite the overhead - two devices more per transistor - this addition significantly reduces computing time on switching conditions by reducing the needed Newton-Raphson loops dramatically.
* | netlist: Add UJT example for 2N6027. couriersud2019-03-171-0/+1
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* | Fix bug. (nw) couriersud2019-03-171-1/+1
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* | netlist: Fix formatting bug. (nw) couriersud2019-03-173-56/+59
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* | netlist: add MC1455P as device. (nw) couriersud2019-03-173-1/+11
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* | netlist: Add output resistance to NE555. couriersud2019-03-171-2/+9
| | | | | | | | | | This is a first-order approximation of the output driving stage. A logic output with appropriate family may be better but would add more complexity.
* | netlist: fix bug in LOGIC_INPUT devices. (nw) couriersud2019-03-161-0/+1
| | | | | | | | | | Now family parameter is actually used. Also fixed bugs in code using this device. gamemachine now creates sound at realistic pitch.
* | gamemachine: add netlist audio. [Couriersud] couriersud2019-03-161-0/+2
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* New working machine couriersud2019-03-123-11/+15
| | | | ----------- Rebound [DICE team, Couriersud]
* mtx: Added expansion bus with SDX floppy controller. Nigel Barnes2019-03-102-0/+86
| | | | | | | | | - 80 column card with SDX in CP/M mode. - ROM/RAM banking fixed for CP/M, and MTX500 now correctly detected. - Support for Type 03 and Type 07 .mfloppy images. - Added alternate MTX2 romset (German). - Keyboard ROM now selected in Configuration. - Quickload .RUN files.
* netlist: fix breakout paddle regression. (nw) couriersud2019-03-101-12/+16
| | | | The interesting parts in datasheets are always those which are not mentioned.
* netlist: add reverse parameter to 3-pin-potentiometer. (nw) Couriersud2019-03-092-1/+4
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* netlist: fix reset bug in 555 device. (nw) Couriersud2019-03-091-11/+12
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* netlist: fix bugs in object initialization order. (nw) Couriersud2019-03-065-54/+45
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* netlist: remove printf. (nw) couriersud2019-03-022-2/+3
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* netlist: refactoring. (nw) couriersud2019-03-0114-517/+414
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* netlist: memory code refactoring. (nw) couriersud2019-03-0120-311/+304
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* netlist: clang tidy. (nw) couriersud2019-03-014-51/+48
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* Netlist: improve readability. (nw) couriersud2019-03-015-22/+28
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* netlist: cosmetic changes - mostly indentation. (nw) couriersud2019-03-0129-1231/+1209
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* netlist: analog readability refactoring. (nw) couriersud2019-02-2513-59/+59
| | | | | | | Change the sign of go (or in other terms a12 and a21 matrix stencil elements). This should make further optimization of matrix population easier. In addition hopefully improve the readability of the code by sacrifying overloads for more verbose member names.
* netlist: fix bugs in the alignment code. (nw) couriersud2019-02-258-59/+107
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* netlist: tidy changes and better constexpr support for ptime class. (nw) couriersud2019-02-2430-94/+103
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