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* netlist: add more defines to nltool -v --version output couriersud2019-05-011-2/+2
| | | | | | - breakout: update notes - 9316: switch to output array - ppmf: fix a warning - nlid_system.h: remove useless brackets.
* netlist: move things where they belong (nw) couriersud2019-04-291-5/+29
| | | | OMP defines belong into pconfig.h since pomp.h - used by netlist - depends on them.
* netlist: fix include order and logging queue stats (nw) couriersud2019-04-281-3/+3
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* plib: don't assume constructors will only throw things derived from ↵ Vas Crabb2019-04-242-2/+2
| | | | | | | | std::exception (nw) funworld.cpp cleanup: (nw) * remove revision history - we use version control for a reason * don't #define things before inluding the PCH, and don't #define generic names before #including anything
* netlist: fix validation errors. (nw) couriersud2019-04-231-3/+10
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* netlist: fix exception handling and uninitialized var. (nw) couriersud2019-04-223-3/+3
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* netlist/plib: Fix memory leak when exception is thrown in constructor. couriersud2019-04-222-2/+28
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* netlist: Fix MT06827. couriersud2019-04-224-17/+30
| | | | All pstonum calls now need to specify if they want local locale or the "classic" "C" locale.
* netlist: fix some error/warnings. (nw) couriersud2019-04-222-71/+75
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* netlist: minor optimization. (nw) couriersud2019-04-221-1/+1
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* netlist: lint and pedantic warning fixes. (nw) couriersud2019-04-221-0/+6
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* netlist: srcclean (nw) couriersud2019-04-181-4/+4
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* netlist: scalable error messages. couriersud2019-04-181-0/+6
| | | This approach uses functors for logging messages.
* plib: mempool refactoring. (nw) couriersud2019-04-171-24/+19
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* netlist: Improve validation code. couriersud2019-04-161-1/+1
| | | Adjust warning levels and fix a number of topics identified.
* netlist: Add validation support to netlist device. couriersud2019-04-152-15/+33
| | | | | | mame -validate now also checks all netlist devices. It does this by constructing a temporary netlist. This commit also fixes some memory leaks and a bad bug which surfaced in validation.
* plib: fix crash when argument is missing. (nw) couriersud2019-04-131-1/+3
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* netlist: clang lint fixes and pedantic warning fixes. (nw) couriersud2019-04-124-6/+7
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* netlist: MB3614 again, function controlled VARCLOCK and other couriersud2019-04-073-7/+21
| | | | | | | | | | | improvements. - fix MB3614 parameter - Added VARCLOCK which derives step size from function - optimized function handling in CS and VS - fixed a bug in ppreprocessor - add trunc to pfunction - added opamp_amplification_curve to derive characteristic amplification curve
* netlist: TYPE=2 opamp model and MB3614 fixes. couriersud2019-04-071-3/+4
| | | | | | | | - Untie diode code - Fix some typos - add TYPE=2 opamp model which omits output voltage limitation Useful for determining causes of non-convergence - Fix MB3614 opamp parameters to match datasheet
* Netlist: Add global parameter to disable semi-conductor capacitance couriersud2019-03-311-0/+1
| | | | | | | | | modelling. [Couriersud] Added global NETLIST.DEFAULT_MOS_CAPMODEL parameter. Setting this to zero disables using capitance modelling in mos models. On a per mos device basis this can be achieved by adding CAPMODEL=0 to the model definition, e.g. MOSFET(X, "NMOS(CAPMODEL=0)") Improve MOSFET convergence by using log-stepping.
* netlist: Timing bug fix. Affects regression tests. [Couriersud] couriersud2019-03-291-1/+1
| | | | | | This fixes a rounding issue in the ptime code. This bug surfaced when I tested netlist with picosecond resolution in ptime. This will have a small impact on every driver using netlist. For breakout, it required to adjust the color overlay.
* (nw) Clean up the mess on master Vas Crabb2019-03-2638-1497/+4004
| | | | | | | | | | | | | This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at 598cd5227223c3b04ca31f0dbc1981256d9ea3ff. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
* Revert "conflict resolution (nw)" andreasnaive2019-03-2538-4004/+1497
| | | | | This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing changes made to 009cba4fb8102102168ef32870892438327f3705.
* netlist: add MOSFET model. [Couriersud] couriersud2019-03-252-1/+30
| | | | | | | | | | | | | | | | | | | - added MOSFET model. Currently capacitances are not modelled. This is a 3-pin model (Bulk connected to Source) with provisions to extend it to 4-pin at a later stage. - Add a capacitor generic model which is charge conserving. Switch netlist to use this model instead of constant capacity model. - Start putting constants into a central place. Please expect minor timing differences due to a different numerical path. The cmos inverter example illustrates the analog implementation of a cmos inverter gate. These were used a lot back in the 70s/80s to generate sinus waves. The model should also be able to better emulate 4066 analog switches. The addition of a relatively simple capacitor model is planned at a later stage. Expect everything from the MOSFET model at the current stage. Wrong results as well as convergence issues and crashes.
* srcclean (nw) Vas Crabb2019-03-241-1/+1
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* netlist: refactor model code. (nw) couriersud2019-03-181-0/+6
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* netlist: Added B-E and B-C capacitance to EB model. [Couriersud] couriersud2019-03-171-0/+6
| | | | | Despite the overhead - two devices more per transistor - this addition significantly reduces computing time on switching conditions by reducing the needed Newton-Raphson loops dramatically.
* Fix bug. (nw) couriersud2019-03-171-1/+1
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* netlist: Fix formatting bug. (nw) couriersud2019-03-171-50/+58
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* netlist: remove printf. (nw) couriersud2019-03-022-2/+3
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* netlist: refactoring. (nw) couriersud2019-03-017-90/+26
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* netlist: memory code refactoring. (nw) couriersud2019-03-018-266/+259
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* netlist: clang tidy. (nw) couriersud2019-03-011-1/+1
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* netlist: cosmetic changes - mostly indentation. (nw) couriersud2019-03-019-26/+25
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* netlist: fix bugs in the alignment code. (nw) couriersud2019-02-254-34/+79
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* netlist: tidy changes and better constexpr support for ptime class. (nw) couriersud2019-02-248-53/+52
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* netlist: more alignment related refactoring. (nw) couriersud2019-02-247-72/+213
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* Move fillmatrix to to matrix solver base class. (nw) couriersud2019-02-242-3/+11
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* srcclean (nw) Vas Crabb2019-02-245-75/+75
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* Move ptime struct into plib namespace and fix relative includes. (nw) couriersud2019-02-231-0/+136
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* netlist: Fix some more exotic compile options. (nw) couriersud2019-02-231-1/+1
| | | | 128bit integers on kaby lake are not that much slower than 64bit. This may be an option for MAME's attotime as well.
* netlist: fix visibility issues and more issues reported by tidy. (nw) couriersud2019-02-2219-60/+84
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* netlist: memory management. [Couriersud] couriersud2019-02-228-50/+257
| | | | | | | | | | | | | | Memory management in plib is now alignment-aware. All allocations respect c++11 alignas. Selected classes like parray and aligned_vector also provide hints (__builtin_assume_aligned) to g++ and clang. The alignment optimizations have little impact on the current use cases. They only become effective on bigger data processing. What has a measurable impact is memory pooling. This speeds up netlist games like breakout and pong by about 5%. Tested with linux, macosx and windows cross builds. All features are disabled since I can not rule out they may temporarily break more exotic builds.
* netlist: fix a bug and some performance tweaks. (nw) couriersud2019-02-203-22/+48
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* (nw) clean up trivial stuff - the device delegate boilerplate is ugly, I ↵ Vas Crabb2019-02-192-5/+5
| | | | will address it ASAP
* netlist: tick off some issues clang-tidy highlights. (nw) couriersud2019-02-186-193/+217
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* netlist: refactoring startup process and array usage. (nw) couriersud2019-02-172-12/+13
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* netlist: memory pool now supports aligned storage. (nw) couriersud2019-02-166-54/+164
| | | | | | Set USE_MEMPOOL to 1 to try this (max 5% performance increase). For mingw, there is no alignment support. This triggers -Wattribute errors which due to -Werror crash the build.
* netlist: indent. (nw) couriersud2019-02-131-114/+114
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