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* netlist: code maintenance (nw) couriersud2019-10-121-1/+1
| | | | - clang lint and pedantic fixes - mat_cr.h: separate solving linear systems from underlying matrix
* netlist: maintenance and lint fixes. (nw) couriersud2019-10-061-2/+2
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* netlist: more lint corrections. (nw) couriersud2019-09-282-2/+2
| | | | - fixed lint corrections - added NOLINT where needed
* netlist: remove base_dummy class and fix CD4020 VCC/VDD. couriersud2019-05-111-13/+5
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* netlist: Add more validations and fix issues identified. couriersud2019-04-212-3/+3
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* netlist: bug fixes and nltool validation. couriersud2019-04-211-1/+2
| | | | nltool now supports a validate command which acts similar to MAME's validation.
* netlist: srcclean (nw) couriersud2019-04-182-49/+49
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* netlist: scalable error messages. couriersud2019-04-181-1/+1
| | | This approach uses functors for logging messages.
* netlist: bug fixing. couriersud2019-04-132-18/+19
| | | | | - fix sound route dependency - add "K" as a valid Kilo multiplier. - Fix current source parameter update.
* netlist: clang lint fixes and pedantic warning fixes. (nw) couriersud2019-04-122-2/+8
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* netlist: Add LM2902, code refactoring. (nw) couriersud2019-04-073-42/+10
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* netlist: MB3614 again, function controlled VARCLOCK and other couriersud2019-04-072-12/+14
| | | | | | | | | | | improvements. - fix MB3614 parameter - Added VARCLOCK which derives step size from function - optimized function handling in CS and VS - fixed a bug in ppreprocessor - add trunc to pfunction - added opamp_amplification_curve to derive characteristic amplification curve
* netlist: TYPE=2 opamp model and MB3614 fixes. couriersud2019-04-074-58/+105
| | | | | | | | - Untie diode code - Fix some typos - add TYPE=2 opamp model which omits output voltage limitation Useful for determining causes of non-convergence - Fix MB3614 opamp parameters to match datasheet
* netlist: indentation. (nw) couriersud2019-03-311-345/+346
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* Netlist: Move generic models into nld_generic_models. (nw) couriersud2019-03-312-269/+217
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* netlist: Refactored model code. (nw) couriersud2019-03-312-82/+78
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* Netlist: Add global parameter to disable semi-conductor capacitance couriersud2019-03-312-65/+130
| | | | | | | | | modelling. [Couriersud] Added global NETLIST.DEFAULT_MOS_CAPMODEL parameter. Setting this to zero disables using capitance modelling in mos models. On a per mos device basis this can be achieved by adding CAPMODEL=0 to the model definition, e.g. MOSFET(X, "NMOS(CAPMODEL=0)") Improve MOSFET convergence by using log-stepping.
* netlist: Improved MOS transistor model. [Couriersud] couriersud2019-03-292-110/+248
| | | | | | | | | This is a significant improvement to the MOS transistor model. It adds modelling of the Meyer capacitance model. This is a somewhat academic addition since the effects occur on a nanosecond time scale and have a huge impact on performance. I plan to make the capacitance model selectable. Both on a model level as well as by introducing a global solver parameter. The model delivers comparable results to LTSpice.
* (nw) Clean up the mess on master Vas Crabb2019-03-2614-651/+1262
| | | | | | | | | | | | | This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at 598cd5227223c3b04ca31f0dbc1981256d9ea3ff. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
* Revert "conflict resolution (nw)" andreasnaive2019-03-2514-1262/+651
| | | | | This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing changes made to 009cba4fb8102102168ef32870892438327f3705.
* netlist: add MOSFET model. [Couriersud] couriersud2019-03-255-111/+702
| | | | | | | | | | | | | | | | | | | - added MOSFET model. Currently capacitances are not modelled. This is a 3-pin model (Bulk connected to Source) with provisions to extend it to 4-pin at a later stage. - Add a capacitor generic model which is charge conserving. Switch netlist to use this model instead of constant capacity model. - Start putting constants into a central place. Please expect minor timing differences due to a different numerical path. The cmos inverter example illustrates the analog implementation of a cmos inverter gate. These were used a lot back in the 70s/80s to generate sinus waves. The model should also be able to better emulate 4066 analog switches. The addition of a relatively simple capacitor model is planned at a later stage. Expect everything from the MOSFET model at the current stage. Wrong results as well as convergence issues and crashes.
* netlist: refactor model code. (nw) couriersud2019-03-181-1/+0
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* Fix indentation. (nw) couriersud2019-03-181-287/+287
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* netlist: improve readability. (nw) couriersud2019-03-182-6/+6
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* netlist: Added B-E and B-C capacitance to EB model. [Couriersud] couriersud2019-03-171-13/+46
| | | | | Despite the overhead - two devices more per transistor - this addition significantly reduces computing time on switching conditions by reducing the needed Newton-Raphson loops dramatically.
* netlist: add reverse parameter to 3-pin-potentiometer. (nw) Couriersud2019-03-092-1/+4
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* netlist: analog readability refactoring. (nw) couriersud2019-02-254-28/+28
| | | | | | | Change the sign of go (or in other terms a12 and a21 matrix stencil elements). This should make further optimization of matrix population easier. In addition hopefully improve the readability of the code by sacrifying overloads for more verbose member names.
* netlist: tidy changes and better constexpr support for ptime class. (nw) couriersud2019-02-241-1/+1
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* srcclean (nw) Vas Crabb2019-02-242-2/+2
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* netlist: Fix relative include paths and a conflict. (nw) couriersud2019-02-2310-14/+14
| | | | nl_types.h is part of libc++. Any project with a file with the same name on the include path just fails to compile. Renamed to nltypes.h
* Move ptime struct into plib namespace and fix relative includes. (nw) couriersud2019-02-232-2/+2
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* netlist: fix visibility issues and more issues reported by tidy. (nw) couriersud2019-02-224-14/+14
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* netlist: fix access specifiers. (nw) couriersud2019-02-202-8/+11
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* netlist: more core guidelines work. (nw) couriersud2019-02-091-1/+1
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* netlist: constants are now constexpr functions. (nw) couriersud2019-02-094-17/+17
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* netlist: make constants struct members constexpr const. (nw) couriersud2019-02-081-1/+1
| | | | - enable GCC diagnostics in vector ops for GCC 7 again - Use forwarding in vector_ops
* netlist: Refactoring after adding clang-tidy support to netlist makefile couriersud2019-02-077-64/+48
| | | | | | | - convert macros to c++ code. - order of device creation should not depend on std lib. - some state saving cleanup. - added support for clang-tidy to makefile. - modifications triggered by clang-tidy-9.
* netlist: Fix regression. (nw) couriersud2019-02-043-0/+12
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* netlist: All devices now specify parameters in factory constructor. (nw) couriersud2019-02-015-17/+17
| | | | This previously was part of net_lib.cpp and repeatedly caused bugs.
* netlist: remove trampoline code. (nw) couriersud2019-02-012-7/+9
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* netlist: code maintenance and fixing kidniki ... (nw) couriersud2019-02-015-104/+76
| | | to run at acceptable speed again.
* netlist: More run/setup separation. (nw) couriersud2019-01-181-3/+4
| | | Still some distance ahead in properly separating execution and setup.
* netlist: refactored netlist creation. (nw) couriersud2019-01-154-32/+35
| | | | | | This is an effort to separate netlist creation from netlist execution. The primary target is to avoid that code which will only run during execution is able to call setup code and thus create ugly hacks.
* netlist: Fix logging during object construction. (nw) couriersud2019-01-131-6/+14
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* Removed most inlines not necessary ... (nw) couriersud2019-01-122-6/+6
| | | | | On some I wasn't entirely sure :-( Thanks Vas: https://github.com/mamedev/mame/commit/0f0e8853f33bef49bc6f5bd8b53444d209699e44#r31909683
* Fix state saving for pfunction lfsr. (nw) couriersud2017-05-281-0/+2
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* Netlist code refactoring: couriersud2017-04-091-1/+1
| | | | | | | | | | | | | | | | | | | - more use of c++ features - some CRTP in pfmtlog - demangled code for truthtables - use more constexpr - rewrite main loop - use default constructors and assignment operators were applicable. - optimized 7448 and 9316 All of this has decreased startup time by approx. 25% to 30%. Complex netlists like pong or kidniki are parsed, analyzed and constructed in around 15 ms. Run performance has increased by about 5%. All in all not to bad. A game like pong uses a clock of 7 MHz (after division by 2). Thats 14 MHz clock invocations. Running at over 200%, 28 MHz. On a 3.9 GHz Machine about 140 cycles/clock change. [Couriersud]
* More cppcheck fixes. (nw) Couriersud2017-03-053-4/+4
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* Clean up net_t interface and increase readability. (nw) couriersud2017-02-224-15/+13
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* srcclean (nw) Vas Crabb2017-02-191-1/+1
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