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* Make submaps work with address-shifted spaces (nw) AJR2019-06-091-2/+2
| | | | Note that submaps are now assumed to use an address shift of 0. It is possible, though unlikely, for this to cause some breakage.
* emumem: Remove obsolete alignement limit Olivier Galibert2019-04-061-19/+0
| | | | | | emumem_mud: Correct start/end on big endian apollo, fccpu20, fccpu30: Correct vector lookup address pic8259: Avoid reacting to debugger reads [O. Galibert]
* (nw) Clean up the mess on master Vas Crabb2019-03-261-9/+14
| | | | | | | | | | | | | This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at 598cd5227223c3b04ca31f0dbc1981256d9ea3ff. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
* Revert "conflict resolution (nw)" andreasnaive2019-03-251-14/+9
| | | | | This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing changes made to 009cba4fb8102102168ef32870892438327f3705.
* emumem: Allow an address shift of 1 (to the right) for 8-bit spaces (nw) AJR2019-03-011-0/+9
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* Eliminate the default address map member of address_space_config (nw) AJR2019-02-171-9/+5
| | | | | | Since all device address maps are now class methods defined in ordinary C++, default RAM maps can be provided more simply with an explicit has_configured_map check in an internal map definition. A number of default address maps that probably weren't meant to be overridden have also been changed to ordinary internal maps.
* emumem: remove m_baseptr, may fix the save state issues [O. Galibert] Olivier Galibert2018-12-201-9/+1
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* -keyboard/a1200, changela, goldnpkr, m68705prg, mexico86, pipeline, pitnrun, ↵ mooglyguy2018-12-141-1/+1
| | | | | | | | | | qix, quizpun2, stfight, tigeroad: Removed MACHINE_CONFIG. [Ryan Holtz] -m68705, m68hc05: Removed MCFG. [Ryan Holtz] -qix: First-pass cleanup. [Ryan Holtz] -core: Fixed spelling of "nonexistent". [Ryan Holtz]
* Invalidate memory access caches when removing watchpoints to prevent crashes ↵ AJR2018-10-231-0/+1
| | | | on subsequent accesses to the same memory areas
* srcclean (nw) Vas Crabb2018-09-231-2/+2
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* emumem: Fix ioports/membanks in internal maps [O. Galibert] Olivier Galibert2018-08-261-18/+18
| | | | PS: That may break things, we'll see.
* Apply logical address mask properly in debug disassembly view AJR2018-08-241-8/+68
| | | | | | Associated core changes (nw) - Move definition of address_space_config from dimemory.cpp to emumem.cpp (declaration was already in emumem.h) - Add getters for more members of address_space_config with future privatization in mind (nw)
* memory,devcb: Put capabilities at parity [O. Galibert] Olivier Galibert2018-08-101-1/+185
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* memory: Allow simplified versions of handlers [O. Galibert] Olivier Galibert2018-08-021-31/+308
| | | | | | | | | | | | | | | | | | | | | | | A standard memory handler has as a prototype (where uX = u8, u16, u32 or u64): uX device::read(address_space &space, offs_t offset, uX mem_mask); void device::write(address_space &space, offs_t offset, uX data, uX mem_mask); We now allow simplified versions which are: uX device::read(offs_t offset, uX mem_mask); void device::write(offs_t offset, uX data, uX mem_mask); uX device::read(offs_t offset); void device::write(offs_t offset, uX data); uX device::read(); void device::write(uX data); Use them at will. Also consider (DECLARE_)(READ|WRITE)(8|16|32|64)_MEMBER on the way out, use the explicit prototypes. Same for lambdas in the memory map, the parameters are now optional following the same combinations.
* (nw) srcclean and some cleanup: Vas Crabb2018-07-221-17/+17
| | | | | | * Make more #include guards follow standard format - using MAME_ as the prefix makes it easy to see which ones come from our code in a preprocessor dump, and having both src/devices/machine/foo.h and src/mame/machine/foo.h causes issues anyway * Get #include "emu.h" out of headers - it should only be the first thing in a complilation unit or we get differences in behaviour with PCH on/off * Add out-of-line destructors to some devices - it forces the compiler to instantiate the vtable in a certain location and avoids some non-deterministic compiler behaviours
* A better way to make friends (nw) AJR2018-06-291-3/+0
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* emumem: Backend modernization [O. Galibert] Olivier Galibert2018-06-291-3685/+869
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* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-111-345/+177
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* Relax constraints on address mirroring/global mask combinations. Mirror bits ↵ AJR2018-04-111-3/+1
| | | | | | are now allowed to fall outside the driver-specified global mask, though memory map validation requires that they cover the entire masked-out portions of the address space if any do. This change is intended to expedite debugging of software written for the TMPZ84C015 or similar Z80-based controllers which use 8-bit I/O addressing for the on-chip peripherals but may use either 8-bit or 16-bit addressing externally.
* Fix fencepost in memory_manager::region_containing, which caused regions to ↵ smf-2018-04-071-1/+1
| | | | be registered for state saving. [smf]
* Now that was a subtle one... (nw) Olivier Galibert2018-04-051-0/+2
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* Grammar police (nw) Olivier Galibert2018-02-241-2/+2
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* Set up heavily mirrored memory ranges with subunit masks (e.g. orunners) ↵ AJR2018-02-151-31/+61
| | | | much more efficiently
* Generalized support for byte-smeared accesses (nw) (#3207) ajrhacker2018-02-151-140/+162
| | | The new cswidth address map constructor method overrides the masking normally performed on narrow-width accesses. This entailed a lot of reconfiguration to make the shifting and masking of subunits independent operations. There is unlikely to have any significant performance impact on drivers that don't frequently reconfigure their memory handlers.
* API change: Memory maps are now methods of the owner class [O. Galibert] Olivier Galibert2018-02-121-35/+84
| | | | | Also, a lot more freedom happened, that's going to be more visible soon.
* Head, meet desk (nw) Olivier Galibert2018-02-071-1/+1
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* Renju fix, that one was a nightmare (nw) Olivier Galibert2018-02-071-7/+11
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* API change: Memory maps are now "last entry wins" [O. Galibert] Olivier Galibert2018-01-311-7/+1
| | | | | | | This allows for the much more natural "import another map and patch it" structure, or "cover a whole region then punch holes in it". Our previous first-entry-wins rule was always a surprise to newcomers, and oldcomers too.
* srcclean and manual cleanups (nw) Vas Crabb2017-12-241-7/+7
| | | | | please people, remember to keep source UTF-8 and if you're committing on behalf of others, clean up indents to meet MAME conventions anyone can run srcclean over a submission and see what will get hit
* we're all friends (nw) smf-2017-12-151-51/+51
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* Remove machine member of address_space (nw) AJR2017-12-141-36/+35
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* another example of m_machine(machine()) (nw) smf-2017-12-141-3/+3
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* replacing space.machine() with machine() has some interesting consequences (nw) smf-2017-12-141-6/+6
| | | | | m_machine(space.machine()) running_machine &machine() const { return m_machine; }
* space.machine -> machine (nw) Olivier Galibert2017-12-141-5/+5
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* Revert "Revert "Merge branch 'master' of https://github.com/mamedev/mame"" Firehawke2017-12-131-18/+68
| | | | This reverts commit 54155441e9ba9941e85d80c4834a66376a11e791.
* Revert "Merge branch 'master' of https://github.com/mamedev/mame" Firehawke2017-12-131-68/+18
| | | | | This reverts commit f537428e5a40ba6dde8ca9bf0fe9ae6b1f189ac4, reversing changes made to 0d70d798107d4e4e8fb9f230410aeb1e888d65c5.
* Watchpoint fixes (nw) Olivier Galibert2017-12-031-18/+68
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* constexpr implies inline, generalise iabs, work around lack of C++14 ↵ Vas Crabb2017-12-011-1/+1
| | | | constexpr in VS2015 (nw)
* Pet peeving with extreme prejudice (nw) Olivier Galibert2017-11-301-161/+161
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* fixes (nw) Olivier Galibert2017-11-301-1/+1
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* fix for Visual Studio 2017 (nw) smf-2017-11-291-2/+2
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* emumem: API change [O. Galibert] Olivier Galibert2017-11-291-331/+538
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
* forgot these (nw) Vas Crabb2017-07-131-1/+3
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* kill a trampoline (nw) Vas Crabb2017-07-131-18/+0
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* Make device_memory_interface own its address_spaces Vas Crabb2017-07-131-116/+98
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* make device_memory_interface slightly less of a special case, use a typedef ↵ Vas Crabb2017-07-101-13/+0
| | | | to avoid nested templates everywhere (nw)
* Initialization ordering fixes (nw) Olivier Galibert2017-07-031-1/+13
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* dimemory: Lift the cap on the number of address spaces per device [O. Galibert] Olivier Galibert2017-07-031-7/+8
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* Changed 'enum read_or_write' to be 'enum class' Nathan Woods2017-06-191-26/+26
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* general cleanup: Vas Crabb2017-05-231-2/+2
| | | | | | | | | | | * move rarely-used output and pty interfaces out of emu.h * consolidate and de-duplicate forward declarations, also remove some obsolete ones * clean up more #include guard macros * scope down a few more things (nw) Everyone, please keep forward declarations for src/emu in src/emu/emufwd.h - this will make it far easier to keep them in sync with declarations than having them scattered through all the other files.