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* Make submaps work with address-shifted spaces (nw) AJR2019-06-091-7/+40
| | | | Note that submaps are now assumed to use an address shift of 0. It is possible, though unlikely, for this to cause some breakage.
* (nw) Clean up the mess on master Vas Crabb2019-03-261-6/+0
| | | | | | | | | | | | | This effectively reverts b380514764cf857469bae61c11143a19f79a74c5 and c24473ddff715ecec2e258a6eb38960cf8c8e98e, restoring the state at 598cd5227223c3b04ca31f0dbc1981256d9ea3ff. Before pushing, please check that what you're about to push is sane. Check your local commit log and ensure there isn't anything out-of-place before pushing to mainline. When things like this happen, it wastes everyone's time. I really don't need this in a week when real work™ is busting my balls and I'm behind where I want to be with preparing for MAME release.
* Revert "conflict resolution (nw)" andreasnaive2019-03-251-0/+6
| | | | | This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing changes made to 009cba4fb8102102168ef32870892438327f3705.
* Eliminate the default address map member of address_space_config (nw) AJR2019-02-171-6/+0
| | | | | | Since all device address maps are now class methods defined in ordinary C++, default RAM maps can be provided more simply with an explicit has_configured_map check in an internal map definition. A number of default address maps that probably weren't meant to be overridden have also been changed to ordinary internal maps.
* -keyboard/a1200, changela, goldnpkr, m68705prg, mexico86, pipeline, pitnrun, ↵ mooglyguy2018-12-141-1/+1
| | | | | | | | | | qix, quizpun2, stfight, tigeroad: Removed MACHINE_CONFIG. [Ryan Holtz] -m68705, m68hc05: Removed MCFG. [Ryan Holtz] -qix: First-pass cleanup. [Ryan Holtz] -core: Fixed spelling of "nonexistent". [Ryan Holtz]
* memory,devcb: Put capabilities at parity [O. Galibert] Olivier Galibert2018-08-101-18/+210
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* I did say it would be dreafully stupid (nw) Olivier Galibert2018-08-031-11/+11
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* memory: Allow simplified versions of handlers [O. Galibert] Olivier Galibert2018-08-021-34/+315
| | | | | | | | | | | | | | | | | | | | | | | A standard memory handler has as a prototype (where uX = u8, u16, u32 or u64): uX device::read(address_space &space, offs_t offset, uX mem_mask); void device::write(address_space &space, offs_t offset, uX data, uX mem_mask); We now allow simplified versions which are: uX device::read(offs_t offset, uX mem_mask); void device::write(offs_t offset, uX data, uX mem_mask); uX device::read(offs_t offset); void device::write(offs_t offset, uX data); uX device::read(); void device::write(uX data); Use them at will. Also consider (DECLARE_)(READ|WRITE)(8|16|32|64)_MEMBER on the way out, use the explicit prototypes. Same for lambdas in the memory map, the parameters are now optional following the same combinations.
* emumem: Backend modernization [O. Galibert] Olivier Galibert2018-06-291-21/+0
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* Move ROM loading macros to romentry.h and remove romload.h from emu.h (nw) AJR2018-06-241-0/+1
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* as if millions of this pointers suddenly cried out in terror, and were ↵ Vas Crabb2018-06-081-6/+3
| | | | | | | suddenly silenced * streamline templates in addrmap.h * get rid of overloads on read/write member names - this will become even more important in the near future
* Remove some machine().device usage from the core (nw) AJR2018-05-201-5/+3
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* Relax constraints on address mirroring/global mask combinations. Mirror bits ↵ AJR2018-04-111-0/+6
| | | | | | are now allowed to fall outside the driver-specified global mask, though memory map validation requires that they cover the entire masked-out portions of the address space if any do. This change is intended to expedite debugging of software written for the TMPZ84C015 or similar Z80-based controllers which use 8-bit I/O addressing for the on-chip peripherals but may use either 8-bit or 16-bit addressing externally.
* Some corners of C/C++ are just a pain (nw) Olivier Galibert2018-03-141-1/+1
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* addrmap: Fix subtle bug with nonsubtle effects, also ensure initialization (nw) Olivier Galibert2018-03-141-1/+2
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* Rename some memory stuff (nw) Olivier Galibert2018-03-141-6/+23
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* Generalized support for byte-smeared accesses (nw) (#3207) ajrhacker2018-02-151-2/+5
| | | The new cswidth address map constructor method overrides the masking normally performed on narrow-width accesses. This entailed a lot of reconfiguration to make the shifting and masking of subunits independent operations. There is unlikely to have any significant performance impact on drivers that don't frequently reconfigure their memory handlers.
* emumem: Fix extra-large device map (nw) Olivier Galibert2018-02-121-6/+9
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* API change: Memory maps are now methods of the owner class [O. Galibert] Olivier Galibert2018-02-121-187/+200
| | | | | Also, a lot more freedom happened, that's going to be more visible soon.
* address_map: Internal maps must now be constructed last to have priority (nw) AJR2018-02-011-6/+6
| | | | This fixes sound in mpatrol.
* memory: Deambiguate handlers, also a hint of things to come (nw) Olivier Galibert2018-01-191-26/+26
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* Pet peeving with extreme prejudice (nw) Olivier Galibert2017-11-301-2/+2
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* remove debug code (nw) smf-2017-11-291-1/+0
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* emumem: API change [O. Galibert] Olivier Galibert2017-11-291-13/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
* Start adding stuff for iterating ROM entries in a more C++ way without ↵ Vas Crabb2017-09-221-3/+5
| | | | needing to allocate everywhere, improve performance of -listxml by another 10% or so
* dimemory: Lift the cap on the number of address spaces per device [O. Galibert] Olivier Galibert2017-07-031-3/+3
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* Improve validation checking for address ranges (nw) AJR2017-06-221-11/+10
| | | | arcompact: Attempt at fixing I/O space (nw)
* Sorry test, it's not that I don't like you anymore, but there's this Olivier Galibert2017-06-211-4/+1
| | | | AM_IMPORT_FROM guy there, and it's real love this time (nw)
* NPOT subunit compromise (nw) AJR2017-04-281-7/+2
| | | | Handlers with a non-power-of-2 number of subunits are allowed once again. However, the offset multiplier will be rounded up to the nearest power of 2.
* Perform unitmask checking during validation in non-debug builds (nw) AJR2017-04-261-7/+31
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* Memory unit masking and address mirroring fixes (nw) AJR2017-03-251-1/+25
| | | | | | - Fix a bug which effectively treated AM_MIRROR as AM_SELECT when applied to a single-address range mirrored into a contiguous block. The automatic expansion of zero address masks now only applies to those stemming from (default) configuration, not from optimization. (This allows the assertion in latch8_device to be reinstated.) - Fix a bug where AM_SELECT applied to narrow-width handlers with a submaximal number of subunits would select the wrong address bits or none at all. (This allows rpunch_gga_w to be WRITE8 as intended.) - Add more stringent appropriateness checking of unit masks for narrow-width handlers.
* Adds a new addrmap.cpp validation intended to catch AM_REGION declarations ↵ Nathan Woods2017-03-091-0/+4
| | | | not tied to anything meaningful
* Address map fixes (nw) AJR2016-12-251-3/+5
| | | | | | - tms32025: Correct space of internal data maps - mc1000: Separate out opcodes map - addrmap.cpp: Replace a few debug asserts with friendlier error messages (makes validation less dangerous in debug builds)
* srcclean (nw) Vas Crabb2016-11-271-3/+3
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* Introduce u8/u16/u32/u64/s8/s16/s32/s64 Vas Crabb2016-11-191-25/+25
| | | | | | | | | | | | * New abbreviated types are in osd and util namespaces, and also in global namespace for things that #include "emu.h" * Get rid of import of cstdint types to global namespace (C99 does this anyway) * Remove the cstdint types from everything in emu * Get rid of U64/S64 macros * Fix a bug in dps16 caused by incorrect use of macro * Fix debugcon not checking for "do " prefix case-insensitively * Fix a lot of messed up tabulation * More constexpr * Fix up many __names
* addrmem: Obvious renames and helpers [O. Galibert] Olivier Galibert2016-11-101-4/+4
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* addrmap: Dotify [O. Galibert] Olivier Galibert2016-11-101-33/+33
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* addrmap: Change setters into passthroughs [O. Galibert] Olivier Galibert2016-11-091-15/+30
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* addrmap: Simplify constructor, thanks Micko [O. Galibert] Olivier Galibert2016-11-091-18/+1
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* addrmap: De-hand-templatize address_map_entry, remove then unneeded entry ↵ Olivier Galibert2016-11-091-101/+31
| | | | parameter [O. Galibert]
* addrmap: Remove device parameter [O. Galibert] Olivier Galibert2016-11-091-29/+36
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* NOTICE (TYPE NAME CONSOLIDATION) Miodrag Milanovic2016-10-221-25/+25
| | | | | Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8 also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
* Make address maps complain when entry bounds lie outside the global mask (nw) AJR2016-08-081-2/+13
| | | | | - Alter a bunch of address maps so all validity checks pass. These includes global address masks in Hexaa and the Newbrain FDC (regression testing should be done here). - Remove the Lisa wraparound read/write handlers.
* Validity checking for AM_MASK/AM_MIRROR/AM_SELECT, based on OG's recent ↵ AJR2016-06-171-0/+22
| | | | | | | restrictions (nw) - Update address maps so all drivers pass checks - Comment out some irregularly-patterned mirrors on RAM areas (needs better solution)
* Memory fun [O.Galibert] Olivier Galibert2016-06-141-0/+4
| | | | | | | | | | | | | | | | | | | | | - Added AM_SELECT/addrselect field. Replaces the old AM_MIRROR/AM_MASK combo used to mirror a handler and get the mirrored bits in the offset. - Removed mask and/or mirror from where it didn't belong. Simplified a lot of instances of mask that just weren't needed, especially in bus handlers. Used the short forms of install handlers where possible. - Replaced the 60s hippy, "It's cool man" range parameter handling in map_range that tried to guess what was meant when the values passed were not entirely sensible, by a cranky, diner waitress-turned IRS auditor curmudgeon. Main control function has a series of 14 tests just to find a reason to fatalerror out your requests. You have been warned. Some drivers, hopefully not many, will fail the gate-guarding bureaucrat trials. Should be easy to fix actually, I worked on the error messages. A full regression test would be welcome.
* Various cleanups suggested by static analyzer (nw) Miodrag Milanovic2016-04-241-3/+3
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* Iterate over devices C++11 style AJR2016-04-181-4/+3
| | | | | | Replace the old device_iterator and its specialized versions with functionally equivalent classes that use standard operators to yield references to devices/interfaces rather than pointers. With range-based for loops, they no longer have to be stored in named variables, though they can also be reused concurrently since the iteration state is now maintained by a subclass. Add a few more typical getters to device_t::subdevice_list.
* Typo fix: nonexistant → nonexistent Jordi Mallach2016-04-011-4/+4
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* Iterate over core classes C++11 style AJR2016-03-311-44/+48
| | | | | | | | C++11 range-based for loops can now iterate over simple_list, tagged_list, core_options, device_t::subdevice_list, device_t::interface_list, render_primitive_list and all subclasses of the above, and much code has been refactored to use them. Most core classes that have these lists as members now have methods that return the lists themselves, replacing most of the methods that returned the object at an owned list's head. (A few have been retained due to their use in drivers or OSD.) device_t now manages subdevice and interface lists through subclasses, but has given up the work of adding and removing subdevices to machine_config. memory_manager has its tagged lists exposed, though the old rooted tag lookup methods have been removed (they were privatized already).
* reverting: Miodrag Milanovic2016-01-201-17/+19
| | | | | | | SHA-1: 1f90ceab075c4869298e963bf0a14a0aac2f1caa * tags are now strings (nw) fix start project for custom builds in Visual Studio (nw)