Commit message (Collapse) | Author | Age | Files | Lines | |
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* | tms7000: Show A, B and all bits of PC in debug state | 2020-05-24 | 2 | -8/+12 | |
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* | i386: Future-proofing for upcoming debugger refactoring (nw) | 2020-05-23 | 2 | -1/+1 | |
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* | unsp: UINT_MAS needs climits [O. Galibert] | 2020-05-22 | 2 | -0/+4 | |
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* | -unsp: Removed outdated commnet related to Ext Push/Pop ops. The register ↵ | 2020-05-22 | 1 | -10/+1 | |
| | | | | decoding is correct. (nw) | ||||
* | -unsp: Fix compile, nw | 2020-05-21 | 3 | -8/+6 | |
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* | -unsp: Fixed DIVQ operation and several Memory Bitop operations. [Ryan Holtz] | 2020-05-21 | 5 | -22/+26 | |
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* | last batch of changes to make the ↵ | 2020-05-21 | 8 | -24/+24 | |
| | | | | https://github.com/mamedev/mame/tree/devcb-no-space branch build. (nw) | ||||
* | Merge pull request #6720 from cam900/tms320c31_internal | 2020-05-21 | 5 | -20/+131 | |
|\ | | | | | cpu/tms32031/*: Add/Correct notes for Internal peripherals and Chip family differences | ||||
| * | cpu/tms32031/*: Add/Correct notes for Internal peripherals and Chip family ↵ | 2020-05-21 | 5 | -20/+131 | |
| | | | | | | | | | | | | | | | | differences Fix chip name (no NMOS variant exists) and some descriptions Fix Microcomputer mode when 320C30 internal ROM is empty reference: TMS320C3x User's Manual | ||||
* | | switched PlayStation CPU over to memory_access_specific (nw) | 2020-05-21 | 2 | -12/+14 | |
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* | -sparc: Use memory_access_specific for a minor speedup, nw | 2020-05-20 | 2 | -2/+2 | |
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* | Remove binary files that were inadvertently committed previously, nw | 2020-05-20 | 2 | -0/+0 | |
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* | Merge pull request #6689 from cam900/patch-144 | 2020-05-19 | 1 | -1/+1 | |
|\ | | | | | jaguar.cpp: Add info for debugging | ||||
| * | Merge branch 'master' into patch-144 | 2020-05-16 | 12 | -507/+574 | |
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| * | | jaguar.cpp: Add notes of debugging feature | 2020-05-13 | 1 | -1/+1 | |
| | | | | | | | | | GPU code can be executed out of external RAM, Reference: Midsummer Technical Reference Manual | ||||
* | | | -sun4: Make use of multiple address spaces in the SPARC core rather than ↵ | 2020-05-20 | 5 | -60/+61 | |
| | | | | | | | | | | | | having the MMU handle it all. [Ryan Holtz] | ||||
* | | | 6502: correct device names (nw) | 2020-05-19 | 13 | -16/+16 | |
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* | | | m6809/konami.ops: Fixed broken ROLD/RORD opcodes [RndMnkIII] | 2020-05-19 | 1 | -2/+2 | |
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* | | | emumem: Another slight speedup, implemented on the 680x0 for now [O. Galibert] | 2020-05-19 | 1 | -88/+93 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | memory_access_specific is declared and used exactly like memory_access_cache, but does not cache. It does, however, shortcut the virtual call into address_space, so that's one layer of call less. Gives another nice speedup for accesses with bad locality (e.g. anything that's not opcodes), at the expense of having a specifically typed object in the class. Should do well for cpus in general, drivers can keep using the address_space access calls for easier logistics. | ||||
* | | | -unsp: Added support for Ext DS_Indirect opcodes. [Ryan Holtz] | 2020-05-19 | 1 | -27/+50 | |
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* | | | -sparc: Fixed FPU exception handling and IU interlocking. All SPARCstation 2 ↵ | 2020-05-17 | 2 | -193/+221 | |
| | | | | | | | | | | | | tests pass. [Ryan Holtz] | ||||
* | | | -unsp: Added DIVQ and extended BIT_OP opcodes. [Ryan Holtz] | 2020-05-16 | 4 | -29/+150 | |
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* | | jaguar.cpp updates [Angelo Salese] | 2020-05-15 | 2 | -320/+390 | |
| | | | | | | | | | | | | | | | | | | | | * move i/o handlers to specific maps, untangle register array usage, to be completed * Nuke duplicate I/O accesses, rename to iobus_r/w, make go_w to be an actual line * Fix addqmod & subqmod modulo mask for DSP * Refactor TOM to host CPU function, and fix GPU irq lv 3 when a GPU object is encountered. Fixes mutntpng and atarikrt booting * Fix Jaguar irq line to 2, trusted * Start reworking the blitter * Relicensed to BSD | ||||
* | | various drivers: READ/WRITE macros removal (nw) | 2020-05-15 | 2 | -3/+3 | |
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* | | m37710: Rename some registers to agree with Mitsubishi documentation | 2020-05-14 | 6 | -183/+180 | |
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* | | (nw) i8085.cpp: Remove leftover logerror() (#6698) | 2020-05-14 | 1 | -1/+0 | |
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* | | i186.cpp: initialized variable as needed to avoid timing regression in some ↵ | 2020-05-13 | 1 | -0/+1 | |
|/ | | | | leland.cpp games in debug devnoclear builds (nw) | ||||
* | sshot: correct cpu type (nw) | 2020-05-13 | 2 | -3/+4 | |
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* | psion: does not need direct access to internal mcu reg (nw) | 2020-05-09 | 2 | -3/+1 | |
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* | 6801: tcsr upper 3 bits are read-only (nw) | 2020-05-09 | 2 | -5/+6 | |
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* | 6801: remove hack, the real cause of adam locking up at boot was fixed ↵ | 2020-05-09 | 1 | -5/+1 | |
| | | | | recently with TCSR_OCF clear (nw) | ||||
* | i8085: Interrupt updates | 2020-05-08 | 2 | -24/+49 | |
| | | | | | | | | - Eliminate special-casing and three-in-one loading of CALL (and JMP) vectors in favor of fetching each byte in succession like a normal instruction - Add INTA callback, called only when INTR (and not any other interrupt) is acknowledged - Enforce that TRAP (NMI) must be held at a high level until acknowledgment pic8259: Move recently-introduced inta_call hack down into the only Z80-based driver that still needs it. The hardware-accurate way of synthesizing multiple INTA pulses in a Z80 system (which involves rerouting what would otherwise be normal memory reads) is not so simple and deservedly rare. (nw) | ||||
* | i8085: Stop in debugger after an interrupt is taken, not immediately before | 2020-05-08 | 1 | -2/+2 | |
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* | Merge pull request #6650 from RyogaMasaki/i960_iac_messages | 2020-05-06 | 1 | -0/+21 | |
|\ | | | | | Add partial support for all IAC messages | ||||
| * | Add partial support for all IAC messages | 2020-05-06 | 1 | -0/+21 | |
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* | | nw: 6309 fix my fix | 2020-05-06 | 1 | -5/+5 | |
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* | | m68kfpu: add fmod instruction (nw) | 2020-05-06 | 1 | -0/+10 | |
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* | Update hd6309.ops | 2020-05-05 | 1 | -1/+0 | |
| | | | $1020 is an illegal opcode on the 6309. On the 6809 it is a rarely used form of LBRA. I tested on a real 6309 and $1020 vectors to Illegal. | ||||
* | nec, v25: Add byte registers to debugger state; improve tracking of previous ↵ | 2020-05-04 | 4 | -152/+85 | |
| | | | | PC for debugger; use more NEC register names | ||||
* | 6801: that's not "TOH" (nw) | 2020-05-04 | 1 | -1/+1 | |
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* | i960dasm: rewrote disassembler [SailorSat] | 2020-05-04 | 2 | -266/+494 | |
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* | i86, i286: Update m_prev_ip (and therefore CURPC) after taking interrupt (nw) | 2020-05-03 | 2 | -4/+4 | |
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* | i86, i186, i286: Add byte registers to debugger state; improve tracking of ↵ | 2020-05-03 | 5 | -8/+28 | |
| | | | | | | | | previous PC for debugger i286: Don't clear INT state upon acknowledgment; add exception hook for debugger i86: Correct a fortuitously harmless typo in state registration (nw) | ||||
* | hh_pic16: rename sfxchas to flash (nw) | 2020-05-03 | 2 | -5/+5 | |
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* | t11: More accurate emulation of interrupt acknowledgment; add PF and HLT ↵ | 2020-05-02 | 2 | -77/+164 | |
| | | | | | | interrupts (nw) This is accurate behavior for the T11, but it makes some of the driver changes a bit more awkward than they probably should be, given that one device is standing in for every CPU vaguely related to the PDP-11 family. Galaxy Game obviously wasn't written for a T11, and the BK-0010's K1801VM1 doesn't look like a lot like the T11 either. | ||||
* | m68000: Add exception hook for debugger gex command | 2020-05-02 | 2 | -19/+15 | |
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* | m6801: Clear OCF when output compare register is rewritten, not read from | 2020-05-02 | 1 | -20/+24 | |
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* | leonardo: fix lockup and add buttonpanel leds (nw) | 2020-05-02 | 1 | -1/+1 | |
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* | Add file missing from e9fe64ecdb7c4da51da9e595de75dfaa1db394a2 (nw) | 2020-05-02 | 1 | -0/+2 | |
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* | i86, i186, i286: Don't automatically clear IRQ state upon acknowledgment | 2020-05-02 | 3 | -6/+5 | |
| | | | | i86, i386, v20, v30 & related CPUs: Add exception hook for debugger gex command |