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* tx0_ptp.xml: New working software items AJR2023-05-271-9/+16
| | | | | | | | | --------------------------------------- FLIT - Flexowriter Interrogation Tape [Bitsavers] FLIT II [Bitsavers] FLITloader Punch [Bitsavers, AJR] * tx0: Minor adjustments to OPR disassembly
* tx0: Update OPR disassembly for older versions; add notes AJR2022-05-221-5/+26
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* Debugger feature improvements AJR2022-03-271-4/+13
| | | | | | | | - Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core
* New clones marked as NOT_WORKING AJR2021-09-251-5/+81
| | | | | | | | -------------------------------- TX-0 upgraded system (8 kWords of RAM, old order code) * tx0_64kw: Swap LR and MBR when MLR and LMB are specified together * tx0_8kw: Recognize a few more composite OPRs in disassembly
* tx0dasm.cpp: Add notes on OPRs for reference AJR2021-08-261-0/+74
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* tx0_64kw, tx0_8kw: Fixes and improvements AJR2021-08-121-85/+654
| | | | | | | | | - Complete rewrite of disassemblers, using standard names for OPRs - Clear MBR in cycle 1 when AMB is not specified - Perform AMB before COM (tx0_64kw) - Fix characters printed on Flexowriter (bit order was incorrectly reversed) - Modernize logging in CPU device - Only call the debugger hook once per instruction cycle
* Separate TX-0 from PDP-1; separate some SoC types in build AJR2020-11-191-0/+133