| Commit message (Collapse) | Author | Age | Files | Lines |
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shifted LOG_xxx constant macros
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* Reduce repeated directory walking in cleansrc target (substantially
improves speed of building the target on Windows).
* Disable a validity check using an MSVC language extension when using
clang in MSVC ABI mode.
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TX-0 upgraded system (8 kWords of RAM, old order code)
* tx0_64kw: Swap LR and MBR when MLR and LMB are specified together
* tx0_8kw: Recognize a few more composite OPRs in disassembly
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- Load typewriter input into correct bit positions of LR
- Invert MSB of display coordinates (fixes tic-tac-toe grid)
- tx0_8kw: Resolve confusion between SHR and CYR semantics (these were incorrectly swapped)
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- Complete rewrite of disassemblers, using standard names for OPRs
- Clear MBR in cycle 1 when AMB is not specified
- Perform AMB before COM (tx0_64kw)
- Fix characters printed on Flexowriter (bit order was incorrectly reversed)
- Modernize logging in CPU device
- Only call the debugger hook once per instruction cycle
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- Make IOS actually wait for I/O when used more than once
- Remove break statement that disabled half the OPRs
- Don't normalize minus zero sums (also applies to tx0_8kw)
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