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path: root/src/devices/cpu/sparc/sparcdasm.cpp
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* Fix most implicit fallthrough warnings from clang Vas Crabb2020-11-171-0/+1
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* -Switch to building MAME as C++17. Vas Crabb2020-11-151-0/+4
| | | | | | | * Updated sol2 to 3.2.2 * Updated pugixml to 1.10 * Increased minimum clang version to 6 * Cleaned up some stuff that can use new features
* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-261-75/+84
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* Changed disassembler infrastructure to not use char buffers internally Nathan Woods2016-11-201-10/+0
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* Converted another declaration to const and constructor syntax Nathan Woods2016-11-191-1/+1
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* Changing a number of declarations to be const and use constructor syntax Nathan Woods2016-11-191-5/+5
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* Changed the sparc disassembler to use 'std::ostream &' internally Nathan Woods2016-11-181-261/+259
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* NOTICE (TYPE NAME CONSOLIDATION) Miodrag Milanovic2016-10-221-29/+29
| | | | | Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8 also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
* SPARC disassembler: tst, neg and more mov synthetics [Vas Crabb] Vas Crabb2016-07-071-51/+113
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* more compile fixes (nw) R. Belmont2016-06-271-2/+1
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* Add support for showing will branch/will fall through comment on SPARC ↵ Vas Crabb2016-06-271-12/+81
| | | | | | branches under the cursor Disabled until we can get a hook to refress the instructions under PC when stepping
* SPARC VIS 2+, VIS 3 and VIS 3B disassembler support [Vas Crabb] Vas Crabb2016-06-241-56/+187
| | | | | * Note that this omits non-VIS OSA 2007/2011 features * VIS 2+ ldtxa/ldtwa/sttwa still uses ldda/stda, using new mnemonics requires special-casing this instruction and checking ASI
* VS2015 fixes in SPARC, disassemble VIS II SIAM (nw) Vas Crabb2016-06-231-1/+9
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* terminate those strings (nw) Vas Crabb2016-06-231-1/+6
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* VIS I (UltraSPARC) and II (UltraSPARC III) for SPARC disassembler [Vas Crabb] Vas Crabb2016-06-231-30/+215
| | | | | * Supports %gsr, all ops with exception of SIAM, and all ASI constants * Use -arch sparcv9vis1 or -arch sparcv9vis2 with unidasm
* Add SPARC to unidasm [Vas Crabb] Vas Crabb2016-06-221-7/+11
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* SPARC disassembler improvements: [Vas Crabb] Vas Crabb2016-06-221-46/+53
| | | | | | | * Fix addcc/andcc in SPARCv7 mode and simplify integer op tables * Allow ASI descriptions to be supplied with MCFG macro sun4: add SPARC ASI descriptions [Vas Crabb]
* improve SPARC disassembler: [Vas Crabb] Vas Crabb2016-06-221-516/+1097
| | | | | | | | * Support SPARCv9 * Allow plug-in ASI comments * Fix format of some opcodes * Produce clr synthetic * Allow running in v7, v8 and v9 modes
* Show target address for call and branch instructions in SPARC therealmogminer@gmail.com2016-06-191-2/+2
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* gcc 6.1.1 warning fix (nw) Olivier Galibert2016-06-181-2/+2
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* Add (untested) trap support to SPARC core therealmogminer@gmail.com2016-06-181-2/+16
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* Add majority of SPARC integer ops therealmogminer@gmail.com2016-06-181-4/+19
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* Initial MB86901 diassembler therealmogminer@gmail.com2016-06-171-0/+565