| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | simulate sh3 sci transmitter emptying, fixes ↵ | 2025-04-28 | 1 | -0/+5 | |
| | | | | | https://github.com/mamedev/mame/issues/13634 | ||||
| * | srcclean in preparation for release. | 2025-04-27 | 1 | -1/+1 | |
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| * | check correct irr0 bits, after the register size was corrected in ↵ | 2025-04-22 | 1 | -4/+4 | |
| | | | | | b26662f1bba6809df145d9e8b3f78f66e3a7c7db [smf] | ||||
| * | Implemented specific SH3/SH4 chips & pass the required endian into the ↵ | 2025-04-17 | 1 | -665/+1778 | |
| | | | | | constructor, SH4 internal registers now work when using big endian. The debugger is now aware that the SH3/SH4 has an MMU. [smf] | ||||
| * | cpu/sh: Improved SH7021 SoC emulation. (#11610) [Ryan Holtz, Phil Bennett] | 2023-10-16 | 1 | -112/+112 | |
| | | | | | | * Added (rudimentary) SH7021 DMA, timers and GPIO, and logging for the rest. * Fixed SH2 NMIs occurring in a delay slot when using the interpreter. * Generally cleaned up code and renamed functions/macros/variables more conventionally. | ||||
| * | src/devices/cpu: Remove #include "debugger.h" where no longer necessary | 2022-04-06 | 1 | -1/+0 | |
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| * | finally retired the READ8/16/32/64 and WRITE8/16/32/64 macros (nw) | 2020-06-18 | 1 | -4/+4 | |
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| * | srcclean, manual adjustments (nw) | 2020-01-26 | 1 | -1/+1 | |
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| * | sh3: handle INTEVT register | 2019-12-22 | 1 | -4/+6 | |
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| * | Preliminary SH3 / SH4 recompiler [David Haywood] (#2711) | 2017-10-11 | 1 | -72/+72 | |
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| * | use 'sh' instead of 'superh' | 2017-10-02 | 1 | -0/+681 | |
