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path: root/src/devices/cpu/powerpc/ppcdrc.cpp
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* misc cpu: no need to check debug enabled flag manually hap2025-04-111-2/+2
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* cpu/powerpc: Fixed issues in POWER div (signed divide) instruction causing ↵ Vas Crabb2025-04-081-5/+10
| | | | | | | | | | GitHub #13329. This was "working" on x86-64 due to the backend treating shift/rotate instructions with zero immediate bit count as a no-op even if the source and destination registaer aren't the same. Fixing the bug in the back-end caused it to break the same way on x86-64 as it does on the other three back-ends that didn't have this bug.
* -cpu/drcbearm64.cpp: More fixes and optimisations: Vas Crabb2025-03-141-15/+13
| | | | | | | | | | | | | | | * Correctly identify valid immediate constants for add/sub/cmp (it was too conservative). * Don't unnecessarily copy UML register values kept in host registers for CMP. * Fixed detection of TST against immediate zero and optimised generated code. * Optimised TST against immediate with all bits set. -cpu/alto2: Follow the same pattern as the other things that have been altered to avoid problematic memsets in this device. -cpu/powerpc: Realigned some comments that had drifted.
* cpu/powerpc: More support for the 601's POWER/PPC dual nature, including ↵ arbee2025-01-041-4/+157
| | | | | | several POWER instructions. [R. Belmont] apple/macpdm.cpp: Implemented audio DMA IRQs and some minor cleanup. [R. Belmont]
* Fixed various recompiler issues and added functionality: (#13108) 9871238791132024-12-291-1/+3
| | | | | | | | | | | | * cpu/uml.cpp: Added BREAK, SETFLGS, MULSLW and MULULW opcodes. * cpu/uml.cpp: Limit range of immediate shift count arguments for consistency. * cpu/uml.cpp: Fix simplification of multiplication and division operations. * cpu/drcbec.cpp: Added more methods of accessing OP_CARRY. * cpu/drcbec.cpp: Fixed flag calculation for BSWAP and MULS opcodes. * cpu/drcbec.cpp: Made calculation for shift and rotation opcodes consistent. * cpu/drcbec.cpp: Return mapvar register ID instead of value for mapvars. * cpu/drcbex64.cpp, cpu/drcbex86.cpp: Fixed bugs in various opcodes to make them behave like the C backend. * cpu/drcbex64.cpp: Fixed SAVE, RESTORE and SETFMOD. * cpu/powerpc: Implement MULLWx and MULLWOx using the new MULSLW opcode.
* cpu/powerpc: Don't generalte illegal instruction exception for lmw invalid ↵ 9871238791132023-11-231-18/+6
| | | | forms (fixes MT08791). (#11775)
* -cpu/powerpc: Don't overwrite RA in lmw instruction. (#11512) 9871238791132023-08-281-5/+20
| | | | | | * For 4xx series and 601, skip over the register update. * For any other flavor, raise an illegal instruction exception. -konami/stingnet: Added ATA CS1 to address map, and removed comment about crash which has been fixed.
* Clean up several sprintf() deprecation warningss in non-3rdparty code. [R. ↵ arbee2023-06-031-2/+2
| | | | Belmont]
* -Lua engine: run everything in coroutines. (#11019) Vas Crabb2023-03-251-2/+1
| | | | | | | | | * This lets you use emu.wait(...) directly without mucking around creating coroutines. * Allow emu.wait to accept an attotime argument. * Added a couple more wait helper functions. -emu/profiler.h: Actually use scope-based profiling helpers. * This makes the comment at the top of emu/profile.h less dishonest, and makes it easier to write exception-safe code. * Got rid of some do { ... } while (0) loops that only existed so break could be used like a goto.
* dimemory: Add the target address space to translate, wrap the constants Olivier Galibert2023-03-181-4/+4
| | | | divtlb: Wrap the constants
* src/devices/cpu: Remove #include "debugger.h" where no longer necessary AJR2022-04-061-1/+0
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* powerpc: add power family disassembly Patrick Mackinlay2021-10-251-3/+2
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* ppc: better lswx/stsxw fix Olivier Galibert2021-03-261-6/+10
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* ppc: Fix uml for stswx, lswx Olivier Galibert2021-03-261-2/+2
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* ppc: fix mmu/exceptions debug messages Olivier Galibert2021-03-261-3/+12
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* ppc: Fix mcrxr uml Olivier Galibert2021-03-261-1/+1
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* Eliminate ARRAY_LENGTH template in favor of C++17's std::size AJR2021-02-141-6/+6
| | | | | | | | | | * osdcomm.h: Move definition of EQUIVALENT_ARRAY to coretmpl.h * sharc.cpp, gt64xxx.cpp, ym2413.cpp, gb_lcd.cpp, snes_ppu.cpp: Use STRUCT_MEMBER for save state registration * gio/newport.cpp, megadrive/svp.cpp, nes_ctrl/bcbattle.cpp, arm7.cpp, tms9995.cpp, pckeybrd.cpp, sa1110.cpp, sa1111.cpp, jangou_blitter.cpp, vic4567.cpp: Use std::fill(_n) instead of memset * emucore.h: Remove obsolete typedef
* ppcdrc.cpp: Fixed debug flag test causing fast RAM accesses to be ↵ Philip Bennett2019-09-241-1/+1
| | | | erroneously emitted. Hopefully fixes unusual breakpoint/watchpoint behaviour [Phil Bennett]
* srcclean (nw) Vas Crabb2018-12-231-1/+1
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* Last round of macro removals before the freeze. (nw) mooglyguy2018-12-221-1/+36
| | | | | | | | | | | | -sound/discrete, okim6295: Removed MCFG macros. [Ryan Holtz] -norautp, osi, audio/mario: Removed MACHINE_CONFIG macros. [Ryan Holtz] -vsmile: Split into its own driver from vii.cpp. [Ryan Holtz] -vii: Fixed broken controller inputs. [Ryan Holtz] -konamim2: Massive update. Most games work, but are still marked non-working due to rare MAME crashes in the PPC DRC. [Phil Bennett, Ryan Holtz]
* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-111-4/+4
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* don't pass so many naked pointers around (nw) Vas Crabb2018-03-251-83/+70
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* modernise drcuml somewhat (nw) Vas Crabb2018-03-241-64/+64
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* Make UML shorthand a bit easier to use without using namespace everywhere, ↵ Vas Crabb2018-03-231-47/+46
| | | | clean up a bit of macro hell in PowerPC core
* Pet peeving with extreme prejudice (nw) Olivier Galibert2017-11-301-1/+1
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* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-261-5/+5
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.
* Attempt at fixing PPC DRC scheduling bug (MT #6615) AJR2017-11-181-5/+5
| | | | N.B. My development machine lacks the computing power to test this rigorously (it at least seems to work for scud).
* ppcdrc.cpp: Clean up indentation of the previous commit. Maxim Poliakovski2016-12-291-3/+3
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* ppcdrc.cpp: clear two LSBs of the branch target address. Maxim Poliakovski2016-12-291-2/+5
| | | | This is what a real CPU does in order to prevent branching to an invalid address.
* first srcclean pass (nw) Vas Crabb2016-12-251-6/+6
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* ppc: set DSISR to the DSI flags rather than the address on data access ↵ arbee2016-12-201-3/+23
| | | | faults. [R. Belmont, maximumspatium]
* Removed 'ppc_dasm_one(std::string &string,...' declaration, and updated caller Nathan Woods2016-11-201-3/+4
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* buffer.vec() ==> &buffer.vec()[0] Nathan Woods2016-11-201-1/+1
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* Eliminated 'ppc_dasm_one(std::string &string,...' trampoline Nathan Woods2016-11-201-4/+8
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* Changing the PowerPC DRC to not use static char buffers when disassembling Nathan Woods2016-11-201-7/+7
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* Introduce u8/u16/u32/u64/s8/s16/s32/s64 Vas Crabb2016-11-191-95/+95
| | | | | | | | | | | | * New abbreviated types are in osd and util namespaces, and also in global namespace for things that #include "emu.h" * Get rid of import of cstdint types to global namespace (C99 does this anyway) * Remove the cstdint types from everything in emu * Get rid of U64/S64 macros * Fix a bug in dps16 caused by incorrect use of macro * Fix debugcon not checking for "do " prefix case-insensitively * Fix a lot of messed up tabulation * More constexpr * Fix up many __names
* Moved the declaration for ppc_dasm_one() to a header file Nathan Woods2016-11-161-2/+0
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* converted lot of TRUE/FALSE to real boolean and updated types (nw) Miodrag Milanovic2016-10-221-374/+374
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* NOTICE (TYPE NAME CONSOLIDATION) Miodrag Milanovic2016-10-221-77/+77
| | | | | Use standard uint64_t, uint32_t, uint16_t or uint8_t instead of UINT64, UINT32, UINT16 or UINT8 also use standard int64_t, int32_t, int16_t or int8_t instead of INT64, INT32, INT16 or INT8
* use standard types uintptr_t, char16_t and char32_t instead of FPTR, ↵ Miodrag Milanovic2016-10-221-4/+4
| | | | utf16_char, unicode_char (nw)
* ppcdrc: optimize (nw) Ville Linde2016-04-141-1/+4
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* ppcdrc: map some FPU registers to physical registers (nw) Ville Linde2016-04-141-0/+29
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* ppcdrc: use the new instructions for FPU loads and stores (nw) Ville Linde2016-04-071-32/+24
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* ppcdrc: handle divide by zero (nw) Ville Linde2016-03-121-1/+13
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* Make generic VTLB implementation a modern device interface (nw) AJR2016-02-071-5/+5
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* some handmade changes (nw) Miodrag Milanovic2015-12-211-14/+14
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* clang-modernize part 3 Miodrag Milanovic2015-12-041-34/+34
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* Rename *.c -> *.cpp in our source (nw) Miodrag Milanovic2015-11-081-0/+3923