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* Detect array members that can't be replicated and manually register each ↵ Aaron Giles2021-04-191-2/+0
| | | | item instead. Remove old ALLOW_SAVE_TYPE now that enums are implicitly supported. Add stricter checking of endpoint offsets. Some other cleanups.
* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-251-18/+8
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* sweeten most of the remaining arrays of delegates (nw) Vas Crabb2020-02-071-6/+4
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* pace: Add flag display (nw) AJR2020-01-231-1/+30
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* pace: Hack one cycle off shift/rotate instructions when count is nonzero; ↵ AJR2020-01-131-17/+19
| | | | update notes (nw)
* Darn those switch warnings (nw) AJR2020-01-131-1/+1
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* (nw) pace.cpp : patched 3 compile errors. Please check that these work as ↵ Robbbert2020-01-141-2/+3
| | | | intended.
* pace: Fix carry flag calculation (nw) AJR2020-01-131-2/+2
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* Add preliminary execution core for PACE architecture AJR2020-01-131-42/+806
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* pace, we32100: Notes (nw) AJR2020-01-011-4/+6
| | | | t11: Fix empty disassembler output for some invalid opcodes (nw)
* Add new disassembler for PACE architecture AJR2019-12-281-0/+206
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